2658 lines
76 KiB
Plaintext
2658 lines
76 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-31968024
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// Cuda compilation tools, release 12.0, V12.0.76
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// Based on NVVM 7.0.1
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//
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.version 8.0
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.target sm_52
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.address_size 64
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// .globl __raygen__oxMain
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.const .align 16 .b8 params[1184];
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.visible .entry __raygen__oxMain()
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{
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.reg .pred %p<189>;
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.reg .b16 %rs<183>;
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.reg .f32 %f<1692>;
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.reg .b32 %r<428>;
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.reg .b64 %rd<74>;
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// begin inline asm
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call (%r26), _optix_get_launch_index_x, ();
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// end inline asm
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// begin inline asm
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call (%r27), _optix_get_launch_index_y, ();
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// end inline asm
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ld.const.u64 %rd20, [params+400];
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cvta.to.global.u64 %rd21, %rd20;
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ld.const.u32 %r32, [params+392];
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mad.lo.s32 %r33, %r32, %r27, %r26;
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mul.wide.u32 %rd22, %r33, 4;
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add.s64 %rd1, %rd21, %rd22;
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ld.global.v2.u8 {%rs18, %rs177}, [%rd1];
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or.b16 %rs20, %rs18, %rs177;
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and.b16 %rs21, %rs20, 255;
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setp.eq.s16 %p10, %rs21, 0;
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@%p10 bra $L__BB0_2;
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ld.global.u8 %rs176, [%rd1+2];
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bra.uni $L__BB0_3;
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$L__BB0_2:
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ld.global.u8 %rs176, [%rd1+2];
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setp.eq.s16 %p11, %rs176, 0;
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mov.f32 %f1591, 0f00000000;
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mov.u16 %rs177, 0;
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mov.f32 %f1592, %f1591;
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mov.f32 %f1593, %f1591;
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@%p11 bra $L__BB0_4;
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$L__BB0_3:
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cvt.rn.f32.u16 %f299, %rs18;
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div.rn.f32 %f300, %f299, 0f437F0000;
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fma.rn.f32 %f301, %f300, 0f40000000, 0fBF800000;
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and.b16 %rs24, %rs177, 255;
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cvt.rn.f32.u16 %f302, %rs24;
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div.rn.f32 %f303, %f302, 0f437F0000;
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fma.rn.f32 %f304, %f303, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f305, %rs176;
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div.rn.f32 %f306, %f305, 0f437F0000;
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fma.rn.f32 %f307, %f306, 0f40000000, 0fBF800000;
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mul.f32 %f308, %f304, %f304;
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fma.rn.f32 %f309, %f301, %f301, %f308;
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fma.rn.f32 %f310, %f307, %f307, %f309;
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sqrt.rn.f32 %f311, %f310;
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rcp.rn.f32 %f312, %f311;
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mul.f32 %f1593, %f312, %f307;
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mul.f32 %f1592, %f312, %f304;
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mul.f32 %f1591, %f301, %f312;
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$L__BB0_4:
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ld.const.v2.u32 {%r34, %r35}, [params];
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add.s32 %r3, %r34, %r26;
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add.s32 %r4, %r35, %r27;
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setp.eq.f32 %p12, %f1591, 0f00000000;
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setp.eq.f32 %p13, %f1592, 0f00000000;
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and.pred %p14, %p12, %p13;
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setp.eq.f32 %p15, %f1593, 0f00000000;
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and.pred %p16, %p15, %p14;
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@%p16 bra $L__BB0_154;
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bra.uni $L__BB0_5;
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$L__BB0_154:
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ld.const.u32 %r23, [params+104];
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and.b32 %r404, %r23, 1;
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setp.eq.b32 %p178, %r404, 1;
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mov.pred %p179, 0;
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xor.pred %p180, %p178, %p179;
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not.pred %p181, %p180;
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@%p181 bra $L__BB0_156;
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ld.const.u64 %rd53, [params+144];
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cvta.to.global.u64 %rd54, %rd53;
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ld.const.u32 %r405, [params+136];
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mad.lo.s32 %r406, %r405, %r4, %r3;
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mul.wide.u32 %rd55, %r406, 4;
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add.s64 %rd56, %rd54, %rd55;
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mov.u16 %rs113, 0;
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st.global.v4.u8 [%rd56], {%rs113, %rs113, %rs113, %rs113};
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$L__BB0_156:
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and.b32 %r407, %r23, 8;
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setp.eq.s32 %p182, %r407, 0;
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@%p182 bra $L__BB0_158;
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ld.const.u64 %rd57, [params+192];
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cvta.to.global.u64 %rd58, %rd57;
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ld.const.u32 %r408, [params+184];
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mad.lo.s32 %r409, %r408, %r4, %r3;
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mov.f32 %f1551, 0f00000000;
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cvt.rzi.u32.f32 %r410, %f1551;
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mul.wide.u32 %rd59, %r409, 2;
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add.s64 %rd60, %rd58, %rd59;
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mov.u16 %rs114, 0;
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cvt.u16.u32 %rs115, %r410;
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st.global.v2.u8 [%rd60], {%rs115, %rs114};
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$L__BB0_158:
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and.b32 %r411, %r23, 4;
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setp.eq.s32 %p183, %r411, 0;
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ld.const.u32 %r427, [params+108];
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@%p183 bra $L__BB0_162;
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setp.eq.s32 %p184, %r427, 0;
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ld.const.u64 %rd61, [params+224];
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cvta.to.global.u64 %rd62, %rd61;
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ld.const.u32 %r412, [params+216];
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mad.lo.s32 %r413, %r412, %r4, %r3;
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mul.wide.u32 %rd63, %r413, 8;
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add.s64 %rd16, %rd62, %rd63;
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@%p184 bra $L__BB0_161;
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ld.global.v4.u16 {%rs122, %rs123, %rs124, %rs125}, [%rd16];
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// begin inline asm
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{ cvt.f32.f16 %f1552, %rs122;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f1553, %rs123;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f1554, %rs124;}
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// end inline asm
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add.f32 %f1555, %f1552, 0f00000000;
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add.f32 %f1556, %f1553, 0f00000000;
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add.f32 %f1557, %f1554, 0f00000000;
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// begin inline asm
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{ cvt.rn.f16.f32 %rs121, %f1557;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs120, %f1556;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs119, %f1555;}
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// end inline asm
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mov.u16 %rs126, 0;
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st.global.v4.u16 [%rd16], {%rs119, %rs120, %rs121, %rs126};
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bra.uni $L__BB0_162;
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$L__BB0_5:
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ld.const.u64 %rd23, [params+432];
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cvta.to.global.u64 %rd24, %rd23;
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ld.const.u32 %r38, [params+424];
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mad.lo.s32 %r39, %r38, %r27, %r26;
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mul.wide.u32 %rd25, %r39, 12;
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add.s64 %rd26, %rd24, %rd25;
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ld.global.f32 %f10, [%rd26];
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mul.f32 %f313, %f10, 0f3456BF95;
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ld.global.f32 %f11, [%rd26+4];
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mul.f32 %f314, %f11, 0f3456BF95;
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ld.global.f32 %f12, [%rd26+8];
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mul.f32 %f315, %f12, 0f3456BF95;
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abs.f32 %f316, %f1591;
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div.rn.f32 %f317, %f313, %f316;
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abs.f32 %f318, %f1592;
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div.rn.f32 %f319, %f314, %f318;
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abs.f32 %f320, %f1593;
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div.rn.f32 %f321, %f315, %f320;
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abs.f32 %f322, %f317;
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abs.f32 %f323, %f319;
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abs.f32 %f324, %f321;
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mov.f32 %f325, 0f38D1B717;
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max.f32 %f326, %f322, %f325;
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max.f32 %f327, %f323, %f325;
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max.f32 %f328, %f324, %f325;
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fma.rn.f32 %f13, %f1591, %f326, %f10;
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fma.rn.f32 %f14, %f1592, %f327, %f11;
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fma.rn.f32 %f15, %f1593, %f328, %f12;
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ld.const.u64 %rd27, [params+464];
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cvta.to.global.u64 %rd28, %rd27;
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ld.const.u32 %r40, [params+456];
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mad.lo.s32 %r41, %r40, %r27, %r26;
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mul.wide.u32 %rd29, %r41, 4;
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add.s64 %rd2, %rd28, %rd29;
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ld.global.v2.u8 {%rs26, %rs180}, [%rd2];
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or.b16 %rs28, %rs26, %rs180;
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and.b16 %rs29, %rs28, 255;
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setp.eq.s16 %p17, %rs29, 0;
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@%p17 bra $L__BB0_7;
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ld.global.u8 %rs178, [%rd2+2];
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bra.uni $L__BB0_8;
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$L__BB0_7:
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ld.global.u8 %rs178, [%rd2+2];
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setp.eq.s16 %p18, %rs178, 0;
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mov.f32 %f1594, 0f00000000;
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mov.u16 %rs180, 0;
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mov.u16 %rs181, %rs180;
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mov.f32 %f1595, %f1594;
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mov.f32 %f1596, %f1594;
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@%p18 bra $L__BB0_9;
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$L__BB0_8:
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mov.u16 %rs181, %rs180;
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cvt.rn.f32.u16 %f332, %rs26;
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div.rn.f32 %f333, %f332, 0f437F0000;
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fma.rn.f32 %f334, %f333, 0f40000000, 0fBF800000;
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and.b16 %rs34, %rs181, 255;
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cvt.rn.f32.u16 %f335, %rs34;
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div.rn.f32 %f336, %f335, 0f437F0000;
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fma.rn.f32 %f337, %f336, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f338, %rs178;
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div.rn.f32 %f339, %f338, 0f437F0000;
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fma.rn.f32 %f340, %f339, 0f40000000, 0fBF800000;
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mul.f32 %f341, %f337, %f337;
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fma.rn.f32 %f342, %f334, %f334, %f341;
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fma.rn.f32 %f343, %f340, %f340, %f342;
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sqrt.rn.f32 %f344, %f343;
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rcp.rn.f32 %f345, %f344;
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mul.f32 %f1596, %f345, %f340;
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mul.f32 %f1595, %f345, %f337;
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mul.f32 %f1594, %f334, %f345;
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mov.u16 %rs180, %rs178;
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$L__BB0_9:
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mul.f32 %f349, %f1592, %f1596;
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mul.f32 %f350, %f1593, %f1595;
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sub.f32 %f351, %f349, %f350;
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mul.f32 %f352, %f1593, %f1594;
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mul.f32 %f353, %f1591, %f1596;
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sub.f32 %f354, %f352, %f353;
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mul.f32 %f355, %f1591, %f1595;
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mul.f32 %f356, %f1592, %f1594;
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sub.f32 %f357, %f355, %f356;
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ld.global.u8 %rs36, [%rd2+3];
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setp.eq.s16 %p19, %rs36, 0;
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selp.f32 %f22, 0fBF800000, 0f3F800000, %p19;
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mul.f32 %f358, %f351, %f22;
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mul.f32 %f359, %f354, %f22;
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mul.f32 %f360, %f357, %f22;
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mul.f32 %f361, %f358, 0f00000000;
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mul.f32 %f362, %f359, 0f00000000;
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mul.f32 %f363, %f360, 0f00000000;
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fma.rn.f32 %f364, %f1594, 0f3F5105EC, %f361;
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fma.rn.f32 %f365, %f1595, 0f3F5105EC, %f362;
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fma.rn.f32 %f366, %f1596, 0f3F5105EC, %f363;
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mul.f32 %f23, %f1591, 0f3F13CD3A;
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add.f32 %f24, %f23, %f364;
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mul.f32 %f25, %f1592, 0f3F13CD3A;
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add.f32 %f26, %f25, %f365;
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mul.f32 %f27, %f1593, 0f3F13CD3A;
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add.f32 %f28, %f27, %f366;
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or.b16 %rs37, %rs26, %rs181;
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or.b16 %rs15, %rs37, %rs180;
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and.b16 %rs38, %rs15, 255;
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setp.eq.s16 %p20, %rs38, 0;
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mov.f32 %f1600, 0f00000000;
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mov.f32 %f1597, %f1600;
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mov.f32 %f1598, %f1600;
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mov.f32 %f1599, %f1600;
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@%p20 bra $L__BB0_11;
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cvt.rn.f32.u16 %f367, %rs26;
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div.rn.f32 %f368, %f367, 0f437F0000;
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fma.rn.f32 %f369, %f368, 0f40000000, 0fBF800000;
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and.b16 %rs40, %rs181, 255;
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cvt.rn.f32.u16 %f370, %rs40;
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div.rn.f32 %f371, %f370, 0f437F0000;
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fma.rn.f32 %f372, %f371, 0f40000000, 0fBF800000;
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and.b16 %rs41, %rs180, 255;
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cvt.rn.f32.u16 %f373, %rs41;
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div.rn.f32 %f374, %f373, 0f437F0000;
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fma.rn.f32 %f375, %f374, 0f40000000, 0fBF800000;
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mul.f32 %f376, %f372, %f372;
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fma.rn.f32 %f377, %f369, %f369, %f376;
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fma.rn.f32 %f378, %f375, %f375, %f377;
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sqrt.rn.f32 %f379, %f378;
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rcp.rn.f32 %f380, %f379;
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mul.f32 %f1599, %f380, %f375;
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mul.f32 %f1598, %f380, %f372;
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mul.f32 %f1597, %f369, %f380;
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$L__BB0_11:
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mul.f32 %f384, %f1592, %f1599;
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mul.f32 %f385, %f1593, %f1598;
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sub.f32 %f386, %f384, %f385;
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mul.f32 %f387, %f1593, %f1597;
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mul.f32 %f388, %f1591, %f1599;
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sub.f32 %f389, %f387, %f388;
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mul.f32 %f390, %f1591, %f1598;
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mul.f32 %f391, %f1592, %f1597;
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sub.f32 %f392, %f390, %f391;
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mul.f32 %f393, %f386, %f22;
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mul.f32 %f394, %f389, %f22;
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mul.f32 %f395, %f392, %f22;
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mul.f32 %f396, %f1597, 0f3ED105EC;
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mul.f32 %f397, %f1598, 0f3ED105EC;
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mul.f32 %f398, %f1599, 0f3ED105EC;
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mul.f32 %f399, %f393, 0f3F3504F3;
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mul.f32 %f400, %f394, 0f3F3504F3;
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mul.f32 %f401, %f395, 0f3F3504F3;
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sub.f32 %f402, %f399, %f396;
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sub.f32 %f403, %f400, %f397;
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sub.f32 %f404, %f401, %f398;
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add.f32 %f35, %f23, %f402;
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add.f32 %f36, %f25, %f403;
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add.f32 %f37, %f27, %f404;
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mov.f32 %f1601, %f1600;
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mov.f32 %f1602, %f1600;
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@%p20 bra $L__BB0_13;
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cvt.rn.f32.u16 %f405, %rs26;
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div.rn.f32 %f406, %f405, 0f437F0000;
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fma.rn.f32 %f407, %f406, 0f40000000, 0fBF800000;
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and.b16 %rs44, %rs181, 255;
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cvt.rn.f32.u16 %f408, %rs44;
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div.rn.f32 %f409, %f408, 0f437F0000;
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fma.rn.f32 %f410, %f409, 0f40000000, 0fBF800000;
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and.b16 %rs45, %rs180, 255;
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cvt.rn.f32.u16 %f411, %rs45;
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div.rn.f32 %f412, %f411, 0f437F0000;
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fma.rn.f32 %f413, %f412, 0f40000000, 0fBF800000;
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mul.f32 %f414, %f410, %f410;
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fma.rn.f32 %f415, %f407, %f407, %f414;
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fma.rn.f32 %f416, %f413, %f413, %f415;
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sqrt.rn.f32 %f417, %f416;
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rcp.rn.f32 %f418, %f417;
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mul.f32 %f1602, %f418, %f413;
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mul.f32 %f1601, %f418, %f410;
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mul.f32 %f1600, %f407, %f418;
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$L__BB0_13:
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mul.f32 %f419, %f1592, %f1602;
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mul.f32 %f420, %f1593, %f1601;
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sub.f32 %f421, %f419, %f420;
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mul.f32 %f422, %f1593, %f1600;
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mul.f32 %f423, %f1591, %f1602;
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sub.f32 %f424, %f422, %f423;
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mul.f32 %f425, %f1591, %f1601;
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mul.f32 %f426, %f1592, %f1600;
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sub.f32 %f427, %f425, %f426;
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mul.f32 %f428, %f421, %f22;
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mul.f32 %f429, %f424, %f22;
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mul.f32 %f430, %f427, %f22;
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mul.f32 %f431, %f1600, 0f3ED105EC;
|
|
mul.f32 %f432, %f1601, 0f3ED105EC;
|
|
mul.f32 %f433, %f1602, 0f3ED105EC;
|
|
mul.f32 %f434, %f428, 0fBF3504F3;
|
|
mul.f32 %f435, %f429, 0fBF3504F3;
|
|
mul.f32 %f436, %f430, 0fBF3504F3;
|
|
sub.f32 %f437, %f434, %f431;
|
|
sub.f32 %f438, %f435, %f432;
|
|
sub.f32 %f439, %f436, %f433;
|
|
add.f32 %f44, %f23, %f437;
|
|
add.f32 %f45, %f25, %f438;
|
|
add.f32 %f46, %f27, %f439;
|
|
ld.const.u32 %r5, [params+600];
|
|
setp.eq.s32 %p22, %r5, 0;
|
|
@%p22 bra $L__BB0_52;
|
|
|
|
ld.const.u64 %rd30, [params+608];
|
|
cvta.to.global.u64 %rd3, %rd30;
|
|
mov.f32 %f453, 0f40000000;
|
|
cvt.rzi.f32.f32 %f454, %f453;
|
|
add.f32 %f455, %f454, %f454;
|
|
mov.f32 %f456, 0f40800000;
|
|
sub.f32 %f457, %f456, %f455;
|
|
abs.f32 %f47, %f457;
|
|
ld.const.u32 %r6, [params+544];
|
|
ld.const.u32 %r425, [params+104];
|
|
mul.f32 %f48, %f13, 0f3456BF95;
|
|
mul.f32 %f49, %f14, 0f3456BF95;
|
|
mul.f32 %f50, %f15, 0f3456BF95;
|
|
mov.f32 %f452, 0f00000000;
|
|
mov.u32 %r421, 0;
|
|
ld.const.u64 %rd4, [params+96];
|
|
abs.f32 %f690, %f48;
|
|
abs.f32 %f691, %f49;
|
|
max.f32 %f692, %f690, %f691;
|
|
abs.f32 %f693, %f50;
|
|
max.f32 %f694, %f692, %f693;
|
|
mov.f32 %f1657, %f452;
|
|
mov.f32 %f1656, %f452;
|
|
mov.f32 %f1655, %f452;
|
|
mov.f32 %f1654, %f452;
|
|
mov.f32 %f1653, %f452;
|
|
mov.f32 %f1652, %f452;
|
|
mov.f32 %f1651, %f452;
|
|
mov.f32 %f1650, %f452;
|
|
mov.f32 %f1649, %f452;
|
|
mov.f32 %f1648, %f452;
|
|
mov.f32 %f1647, %f452;
|
|
mov.f32 %f1646, %f452;
|
|
mov.f32 %f1645, %f452;
|
|
|
|
$L__BB0_15:
|
|
mul.wide.u32 %rd31, %r421, 112;
|
|
add.s64 %rd6, %rd3, %rd31;
|
|
ld.global.v4.f32 {%f459, %f460, %f461, %f462}, [%rd6];
|
|
ld.global.v4.f32 {%f463, %f464, %f465, %f466}, [%rd6+16];
|
|
ld.global.v4.f32 {%f469, %f1624, %f1625, %f472}, [%rd6+32];
|
|
ld.global.v4.f32 {%f473, %f474, %f475, %f1622}, [%rd6+48];
|
|
ld.global.v4.f32 {%f477, %f478, %f479, %f480}, [%rd6+64];
|
|
ld.global.v4.u32 {%r43, %r44, %r45, %r46}, [%rd6+80];
|
|
mov.b32 %f83, %r45;
|
|
mov.b32 %f82, %r44;
|
|
mov.b32 %f81, %r43;
|
|
ld.global.u64 %rd7, [%rd6+96];
|
|
sub.f32 %f481, %f460, %f10;
|
|
sub.f32 %f482, %f461, %f11;
|
|
sub.f32 %f483, %f462, %f12;
|
|
mul.f32 %f484, %f482, %f482;
|
|
fma.rn.f32 %f485, %f481, %f481, %f484;
|
|
fma.rn.f32 %f486, %f483, %f483, %f485;
|
|
sqrt.rn.f32 %f487, %f486;
|
|
rcp.rn.f32 %f488, %f487;
|
|
mul.f32 %f85, %f481, %f488;
|
|
mul.f32 %f86, %f482, %f488;
|
|
mul.f32 %f87, %f483, %f488;
|
|
mul.f32 %f88, %f487, %f464;
|
|
mul.f32 %f89, %f487, %f466;
|
|
abs.f32 %f90, %f89;
|
|
setp.lt.f32 %p23, %f90, 0f00800000;
|
|
mul.f32 %f489, %f90, 0f4B800000;
|
|
selp.f32 %f490, %f489, %f90, %p23;
|
|
selp.f32 %f491, 0fC3170000, 0fC2FE0000, %p23;
|
|
mov.b32 %r50, %f490;
|
|
and.b32 %r51, %r50, 8388607;
|
|
or.b32 %r52, %r51, 1065353216;
|
|
mov.b32 %f492, %r52;
|
|
shr.u32 %r53, %r50, 23;
|
|
cvt.rn.f32.u32 %f493, %r53;
|
|
add.f32 %f494, %f491, %f493;
|
|
setp.gt.f32 %p24, %f492, 0f3FB504F3;
|
|
mul.f32 %f495, %f492, 0f3F000000;
|
|
add.f32 %f496, %f494, 0f3F800000;
|
|
selp.f32 %f497, %f496, %f494, %p24;
|
|
selp.f32 %f498, %f495, %f492, %p24;
|
|
add.f32 %f499, %f498, 0fBF800000;
|
|
add.f32 %f500, %f498, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f501, %f500;
|
|
add.f32 %f502, %f499, %f499;
|
|
mul.f32 %f503, %f502, %f501;
|
|
mul.f32 %f504, %f503, %f503;
|
|
mov.f32 %f505, 0f3C4CAF63;
|
|
mov.f32 %f506, 0f3B18F0FE;
|
|
fma.rn.f32 %f507, %f506, %f504, %f505;
|
|
mov.f32 %f508, 0f3DAAAABD;
|
|
fma.rn.f32 %f509, %f507, %f504, %f508;
|
|
mul.rn.f32 %f510, %f509, %f504;
|
|
mul.rn.f32 %f511, %f510, %f503;
|
|
sub.f32 %f512, %f499, %f503;
|
|
add.f32 %f513, %f512, %f512;
|
|
neg.f32 %f514, %f503;
|
|
fma.rn.f32 %f515, %f514, %f499, %f513;
|
|
mul.rn.f32 %f516, %f501, %f515;
|
|
add.f32 %f517, %f511, %f503;
|
|
sub.f32 %f518, %f503, %f517;
|
|
add.f32 %f519, %f511, %f518;
|
|
add.f32 %f520, %f516, %f519;
|
|
add.f32 %f521, %f517, %f520;
|
|
sub.f32 %f522, %f517, %f521;
|
|
add.f32 %f523, %f520, %f522;
|
|
mov.f32 %f524, 0f3F317200;
|
|
mul.rn.f32 %f525, %f497, %f524;
|
|
mov.f32 %f526, 0f35BFBE8E;
|
|
mul.rn.f32 %f527, %f497, %f526;
|
|
add.f32 %f528, %f525, %f521;
|
|
sub.f32 %f529, %f525, %f528;
|
|
add.f32 %f530, %f521, %f529;
|
|
add.f32 %f531, %f523, %f530;
|
|
add.f32 %f532, %f527, %f531;
|
|
add.f32 %f533, %f528, %f532;
|
|
sub.f32 %f534, %f528, %f533;
|
|
add.f32 %f535, %f532, %f534;
|
|
mul.rn.f32 %f537, %f456, %f533;
|
|
neg.f32 %f538, %f537;
|
|
fma.rn.f32 %f539, %f456, %f533, %f538;
|
|
fma.rn.f32 %f540, %f456, %f535, %f539;
|
|
fma.rn.f32 %f542, %f452, %f533, %f540;
|
|
add.rn.f32 %f543, %f537, %f542;
|
|
neg.f32 %f544, %f543;
|
|
add.rn.f32 %f545, %f537, %f544;
|
|
add.rn.f32 %f546, %f545, %f542;
|
|
mov.b32 %r54, %f543;
|
|
setp.eq.s32 %p25, %r54, 1118925336;
|
|
add.s32 %r55, %r54, -1;
|
|
mov.b32 %f547, %r55;
|
|
add.f32 %f548, %f546, 0f37000000;
|
|
selp.f32 %f91, %f548, %f546, %p25;
|
|
selp.f32 %f549, %f547, %f543, %p25;
|
|
mov.f32 %f550, 0f3FB8AA3B;
|
|
mul.rn.f32 %f551, %f549, %f550;
|
|
cvt.rzi.f32.f32 %f552, %f551;
|
|
abs.f32 %f553, %f552;
|
|
setp.gt.f32 %p26, %f553, 0f42FC0000;
|
|
mov.b32 %r56, %f552;
|
|
and.b32 %r57, %r56, -2147483648;
|
|
or.b32 %r58, %r57, 1123811328;
|
|
mov.b32 %f554, %r58;
|
|
selp.f32 %f555, %f554, %f552, %p26;
|
|
mov.f32 %f556, 0fBF317218;
|
|
fma.rn.f32 %f557, %f555, %f556, %f549;
|
|
mov.f32 %f558, 0f3102E308;
|
|
fma.rn.f32 %f559, %f555, %f558, %f557;
|
|
mul.f32 %f560, %f559, 0f3FB8AA3B;
|
|
add.f32 %f561, %f555, 0f4B40007F;
|
|
mov.b32 %r59, %f561;
|
|
shl.b32 %r60, %r59, 23;
|
|
mov.b32 %f562, %r60;
|
|
ex2.approx.ftz.f32 %f563, %f560;
|
|
mul.f32 %f92, %f563, %f562;
|
|
setp.eq.f32 %p27, %f92, 0f7F800000;
|
|
mov.f32 %f1616, 0f7F800000;
|
|
@%p27 bra $L__BB0_17;
|
|
|
|
fma.rn.f32 %f1616, %f92, %f91, %f92;
|
|
|
|
$L__BB0_17:
|
|
setp.lt.f32 %p28, %f89, 0f00000000;
|
|
setp.eq.f32 %p29, %f47, 0f3F800000;
|
|
and.pred %p1, %p28, %p29;
|
|
setp.eq.f32 %p30, %f89, 0f00000000;
|
|
@%p30 bra $L__BB0_21;
|
|
bra.uni $L__BB0_18;
|
|
|
|
$L__BB0_21:
|
|
add.f32 %f568, %f89, %f89;
|
|
selp.f32 %f1618, %f568, 0f00000000, %p29;
|
|
bra.uni $L__BB0_22;
|
|
|
|
$L__BB0_18:
|
|
mov.b32 %r61, %f1616;
|
|
xor.b32 %r62, %r61, -2147483648;
|
|
mov.b32 %f564, %r62;
|
|
selp.f32 %f1618, %f564, %f1616, %p1;
|
|
setp.geu.f32 %p31, %f89, 0f00000000;
|
|
@%p31 bra $L__BB0_22;
|
|
|
|
mov.f32 %f565, 0f40800000;
|
|
cvt.rzi.f32.f32 %f566, %f565;
|
|
setp.eq.f32 %p32, %f566, 0f40800000;
|
|
@%p32 bra $L__BB0_22;
|
|
|
|
mov.f32 %f1618, 0f7FFFFFFF;
|
|
|
|
$L__BB0_22:
|
|
abs.f32 %f1588, %f89;
|
|
add.f32 %f569, %f1588, 0f40800000;
|
|
mov.b32 %r63, %f569;
|
|
setp.lt.s32 %p34, %r63, 2139095040;
|
|
@%p34 bra $L__BB0_27;
|
|
|
|
abs.f32 %f1589, %f89;
|
|
setp.gtu.f32 %p35, %f1589, 0f7F800000;
|
|
@%p35 bra $L__BB0_26;
|
|
bra.uni $L__BB0_24;
|
|
|
|
$L__BB0_26:
|
|
add.f32 %f1618, %f89, 0f40800000;
|
|
bra.uni $L__BB0_27;
|
|
|
|
$L__BB0_24:
|
|
abs.f32 %f1590, %f89;
|
|
setp.neu.f32 %p36, %f1590, 0f7F800000;
|
|
@%p36 bra $L__BB0_27;
|
|
|
|
selp.f32 %f1618, 0fFF800000, 0f7F800000, %p1;
|
|
|
|
$L__BB0_27:
|
|
mov.f32 %f570, 0f3F800000;
|
|
sub.f32 %f571, %f570, %f1618;
|
|
setp.eq.f32 %p37, %f89, 0f3F800000;
|
|
selp.f32 %f572, 0f00000000, %f571, %p37;
|
|
cvt.sat.f32.f32 %f573, %f572;
|
|
fma.rn.f32 %f574, %f88, %f88, %f465;
|
|
div.rn.f32 %f101, %f573, %f574;
|
|
mul.f32 %f575, %f1592, %f86;
|
|
fma.rn.f32 %f576, %f1591, %f85, %f575;
|
|
fma.rn.f32 %f102, %f1593, %f87, %f576;
|
|
setp.eq.f32 %p38, %f459, 0f3F800000;
|
|
@%p38 bra $L__BB0_33;
|
|
bra.uni $L__BB0_28;
|
|
|
|
$L__BB0_33:
|
|
setp.eq.s64 %p42, %rd7, 0;
|
|
mov.f32 %f1623, %f469;
|
|
mov.f32 %f1626, %f101;
|
|
@%p42 bra $L__BB0_37;
|
|
|
|
setp.geu.f32 %p43, %f1622, 0f00000000;
|
|
mov.f32 %f1619, %f85;
|
|
mov.f32 %f1620, %f86;
|
|
mov.f32 %f1621, %f87;
|
|
@%p43 bra $L__BB0_36;
|
|
|
|
mul.f32 %f601, %f82, %f482;
|
|
fma.rn.f32 %f602, %f81, %f481, %f601;
|
|
fma.rn.f32 %f604, %f83, %f483, %f602;
|
|
rcp.rn.f32 %f605, %f604;
|
|
mul.f32 %f1619, %f481, %f605;
|
|
mul.f32 %f1620, %f482, %f605;
|
|
mul.f32 %f1621, %f483, %f605;
|
|
neg.f32 %f1622, %f1622;
|
|
|
|
$L__BB0_36:
|
|
mul.f32 %f606, %f83, %f87;
|
|
mul.f32 %f607, %f82, %f86;
|
|
neg.f32 %f608, %f607;
|
|
mul.f32 %f609, %f81, %f85;
|
|
sub.f32 %f610, %f608, %f609;
|
|
sub.f32 %f611, %f610, %f606;
|
|
setp.gt.f32 %p44, %f611, 0f00000000;
|
|
selp.f32 %f612, 0f3F800000, 0f00000000, %p44;
|
|
mov.f32 %f613, 0f3F800000;
|
|
mul.f32 %f614, %f474, %f1620;
|
|
mul.f32 %f615, %f478, %f1620;
|
|
fma.rn.f32 %f616, %f473, %f1619, %f614;
|
|
fma.rn.f32 %f617, %f477, %f1619, %f615;
|
|
fma.rn.f32 %f618, %f475, %f1621, %f616;
|
|
fma.rn.f32 %f619, %f479, %f1621, %f617;
|
|
fma.rn.f32 %f620, %f1622, %f618, 0f3F000000;
|
|
sub.f32 %f621, %f613, %f620;
|
|
fma.rn.f32 %f622, %f1622, %f619, 0f3F000000;
|
|
tex.2d.v4.f32.f32 {%f623, %f624, %f625, %f626}, [%rd7, {%f621, %f622}];
|
|
mul.f32 %f627, %f612, %f623;
|
|
mul.f32 %f628, %f612, %f624;
|
|
mul.f32 %f629, %f612, %f625;
|
|
mul.f32 %f1623, %f469, %f627;
|
|
mul.f32 %f1624, %f1624, %f628;
|
|
mul.f32 %f1625, %f1625, %f629;
|
|
mov.f32 %f1626, %f101;
|
|
bra.uni $L__BB0_37;
|
|
|
|
$L__BB0_28:
|
|
setp.eq.f32 %p39, %f459, 0f40000000;
|
|
@%p39 bra $L__BB0_31;
|
|
bra.uni $L__BB0_29;
|
|
|
|
$L__BB0_31:
|
|
setp.eq.s64 %p41, %rd7, 0;
|
|
mov.f32 %f1623, %f469;
|
|
mov.f32 %f1626, %f101;
|
|
@%p41 bra $L__BB0_37;
|
|
|
|
mul.f32 %f586, %f474, %f86;
|
|
mul.f32 %f587, %f478, %f86;
|
|
mul.f32 %f588, %f82, %f86;
|
|
fma.rn.f32 %f589, %f473, %f85, %f586;
|
|
fma.rn.f32 %f590, %f477, %f85, %f587;
|
|
fma.rn.f32 %f591, %f81, %f85, %f588;
|
|
fma.rn.f32 %f592, %f475, %f87, %f589;
|
|
fma.rn.f32 %f593, %f479, %f87, %f590;
|
|
fma.rn.f32 %f594, %f83, %f87, %f591;
|
|
tex.cube.v4.f32.f32 {%f595, %f596, %f597, %f598}, [%rd7, {%f592, %f593, %f594, %f594}];
|
|
mul.f32 %f1623, %f469, %f595;
|
|
mul.f32 %f1624, %f1624, %f596;
|
|
mul.f32 %f1625, %f1625, %f597;
|
|
mov.f32 %f1626, %f101;
|
|
bra.uni $L__BB0_37;
|
|
|
|
$L__BB0_29:
|
|
setp.neu.f32 %p40, %f459, 0f40800000;
|
|
mov.f32 %f1623, %f469;
|
|
mov.f32 %f1626, %f101;
|
|
@%p40 bra $L__BB0_37;
|
|
|
|
mul.f32 %f577, %f81, %f85;
|
|
mul.f32 %f578, %f82, %f86;
|
|
neg.f32 %f579, %f578;
|
|
sub.f32 %f580, %f579, %f577;
|
|
mul.f32 %f581, %f83, %f87;
|
|
sub.f32 %f582, %f580, %f581;
|
|
fma.rn.f32 %f583, %f472, %f582, %f1622;
|
|
cvt.sat.f32.f32 %f584, %f583;
|
|
mul.f32 %f585, %f584, %f584;
|
|
mul.f32 %f1626, %f101, %f585;
|
|
mov.f32 %f1623, %f469;
|
|
|
|
$L__BB0_37:
|
|
max.f32 %f642, %f1623, %f1624;
|
|
max.f32 %f643, %f642, %f1625;
|
|
setp.eq.s32 %p46, %r6, 0;
|
|
selp.f32 %f644, %f102, 0f3F800000, %p46;
|
|
cvt.sat.f32.f32 %f645, %f644;
|
|
mul.f32 %f135, %f645, %f1626;
|
|
mul.f32 %f646, %f135, %f643;
|
|
setp.lt.f32 %p47, %f646, 0f3727C5AC;
|
|
mov.pred %p188, -1;
|
|
mov.f32 %f1627, 0f00000000;
|
|
mov.f32 %f1628, %f1627;
|
|
mov.f32 %f1629, %f1627;
|
|
mov.f32 %f1630, %f1627;
|
|
mov.f32 %f1631, %f1627;
|
|
mov.f32 %f1632, %f1627;
|
|
mov.f32 %f1633, %f1627;
|
|
mov.f32 %f1634, %f1627;
|
|
mov.f32 %f1635, %f1627;
|
|
mov.f32 %f1636, %f1627;
|
|
mov.f32 %f1637, %f1627;
|
|
mov.f32 %f1638, %f1627;
|
|
@%p47 bra $L__BB0_39;
|
|
|
|
mul.f32 %f1627, %f1623, %f135;
|
|
mul.f32 %f647, %f26, %f86;
|
|
fma.rn.f32 %f648, %f24, %f85, %f647;
|
|
fma.rn.f32 %f649, %f28, %f87, %f648;
|
|
cvt.sat.f32.f32 %f650, %f649;
|
|
mul.f32 %f651, %f1623, %f1626;
|
|
mul.f32 %f652, %f651, %f650;
|
|
mul.f32 %f653, %f1624, %f1626;
|
|
mul.f32 %f654, %f653, %f650;
|
|
mul.f32 %f655, %f1625, %f1626;
|
|
mul.f32 %f656, %f655, %f650;
|
|
mul.f32 %f657, %f36, %f86;
|
|
fma.rn.f32 %f658, %f35, %f85, %f657;
|
|
fma.rn.f32 %f659, %f37, %f87, %f658;
|
|
cvt.sat.f32.f32 %f660, %f659;
|
|
mul.f32 %f661, %f651, %f660;
|
|
mul.f32 %f662, %f653, %f660;
|
|
mul.f32 %f663, %f655, %f660;
|
|
mul.f32 %f664, %f45, %f86;
|
|
fma.rn.f32 %f665, %f44, %f85, %f664;
|
|
fma.rn.f32 %f666, %f46, %f87, %f665;
|
|
cvt.sat.f32.f32 %f667, %f666;
|
|
mul.f32 %f668, %f651, %f667;
|
|
mul.f32 %f669, %f653, %f667;
|
|
mul.f32 %f670, %f655, %f667;
|
|
add.f32 %f671, %f652, %f661;
|
|
add.f32 %f672, %f654, %f662;
|
|
add.f32 %f673, %f656, %f663;
|
|
add.f32 %f674, %f671, %f668;
|
|
add.f32 %f675, %f672, %f669;
|
|
add.f32 %f676, %f673, %f670;
|
|
mul.f32 %f677, %f674, 0f3F13CD3A;
|
|
mul.f32 %f678, %f675, 0f3F13CD3A;
|
|
mul.f32 %f679, %f676, 0f3F13CD3A;
|
|
div.rn.f32 %f680, %f1627, %f677;
|
|
mul.f32 %f1628, %f1624, %f135;
|
|
div.rn.f32 %f681, %f1628, %f678;
|
|
mul.f32 %f1629, %f1625, %f135;
|
|
div.rn.f32 %f682, %f1629, %f679;
|
|
setp.eq.f32 %p49, %f1627, 0f00000000;
|
|
selp.f32 %f683, 0f00000000, %f680, %p49;
|
|
setp.eq.f32 %p50, %f1628, 0f00000000;
|
|
selp.f32 %f684, 0f00000000, %f681, %p50;
|
|
setp.eq.f32 %p51, %f1629, 0f00000000;
|
|
selp.f32 %f685, 0f00000000, %f682, %p51;
|
|
mul.f32 %f1630, %f652, %f683;
|
|
mul.f32 %f1631, %f654, %f684;
|
|
mul.f32 %f1632, %f656, %f685;
|
|
mul.f32 %f1633, %f661, %f683;
|
|
mul.f32 %f1634, %f662, %f684;
|
|
mul.f32 %f1635, %f663, %f685;
|
|
mul.f32 %f1636, %f668, %f683;
|
|
mul.f32 %f1637, %f669, %f684;
|
|
mul.f32 %f1638, %f670, %f685;
|
|
mov.pred %p188, 0;
|
|
|
|
$L__BB0_39:
|
|
@%p188 bra $L__BB0_51;
|
|
|
|
setp.eq.s32 %p52, %r46, 0;
|
|
mov.u16 %rs182, 0;
|
|
mov.f32 %f1644, 0f3F800000;
|
|
@%p52 bra $L__BB0_48;
|
|
|
|
abs.s32 %r10, %r46;
|
|
setp.lt.s32 %p53, %r10, 1;
|
|
mov.f32 %f1640, 0f00000000;
|
|
@%p53 bra $L__BB0_47;
|
|
|
|
mov.f32 %f695, 0f38D1B717;
|
|
max.f32 %f696, %f694, %f695;
|
|
and.b32 %r65, %r425, 32;
|
|
setp.eq.s32 %p54, %r65, 0;
|
|
mov.u32 %r424, 0;
|
|
selp.f32 %f697, 0f3F800000, 0f41200000, %p54;
|
|
mul.f32 %f160, %f697, %f696;
|
|
and.b32 %r11, %r10, 1;
|
|
setp.eq.s32 %p55, %r10, 1;
|
|
mov.f32 %f1640, 0f00000000;
|
|
@%p55 bra $L__BB0_45;
|
|
|
|
sub.s32 %r423, %r10, %r11;
|
|
|
|
$L__BB0_44:
|
|
cvt.rn.f32.s32 %f717, %r424;
|
|
mul.f32 %f718, %f717, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f719, %f718;
|
|
sub.f32 %f720, %f718, %f719;
|
|
mul.f32 %f721, %f717, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f722, %f721;
|
|
sub.f32 %f723, %f721, %f722;
|
|
mul.f32 %f724, %f717, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f725, %f724;
|
|
sub.f32 %f726, %f724, %f725;
|
|
add.f32 %f727, %f723, 0f4199851F;
|
|
add.f32 %f728, %f726, 0f4199851F;
|
|
add.f32 %f729, %f720, 0f4199851F;
|
|
mul.f32 %f730, %f723, %f728;
|
|
fma.rn.f32 %f731, %f720, %f727, %f730;
|
|
fma.rn.f32 %f732, %f729, %f726, %f731;
|
|
add.f32 %f733, %f720, %f732;
|
|
add.f32 %f734, %f723, %f732;
|
|
add.f32 %f735, %f726, %f732;
|
|
add.f32 %f736, %f733, %f734;
|
|
mul.f32 %f737, %f735, %f736;
|
|
cvt.rmi.f32.f32 %f738, %f737;
|
|
sub.f32 %f739, %f737, %f738;
|
|
add.f32 %f740, %f733, %f735;
|
|
mul.f32 %f741, %f734, %f740;
|
|
cvt.rmi.f32.f32 %f742, %f741;
|
|
sub.f32 %f743, %f741, %f742;
|
|
add.f32 %f744, %f734, %f735;
|
|
mul.f32 %f745, %f733, %f744;
|
|
cvt.rmi.f32.f32 %f746, %f745;
|
|
sub.f32 %f747, %f745, %f746;
|
|
fma.rn.f32 %f748, %f739, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f749, %f743, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f750, %f747, 0f40000000, 0fBF800000;
|
|
ld.global.f32 %f751, [%rd6+16];
|
|
ld.global.f32 %f752, [%rd6+4];
|
|
fma.rn.f32 %f753, %f751, %f748, %f752;
|
|
ld.global.f32 %f754, [%rd6+8];
|
|
fma.rn.f32 %f755, %f751, %f749, %f754;
|
|
ld.global.f32 %f756, [%rd6+12];
|
|
fma.rn.f32 %f757, %f751, %f750, %f756;
|
|
sub.f32 %f758, %f753, %f10;
|
|
sub.f32 %f759, %f755, %f11;
|
|
sub.f32 %f760, %f757, %f12;
|
|
mul.f32 %f761, %f759, %f759;
|
|
fma.rn.f32 %f762, %f758, %f758, %f761;
|
|
fma.rn.f32 %f763, %f760, %f760, %f762;
|
|
sqrt.rn.f32 %f706, %f763;
|
|
rcp.rn.f32 %f764, %f706;
|
|
mul.f32 %f702, %f764, %f758;
|
|
mul.f32 %f703, %f764, %f759;
|
|
mul.f32 %f704, %f764, %f760;
|
|
mov.f32 %f716, 0f00000000;
|
|
mov.u32 %r174, 2;
|
|
mov.u32 %r176, 1;
|
|
mov.u32 %r177, 1065353216;
|
|
mov.u32 %r208, 0;
|
|
// begin inline asm
|
|
call(%r67,%r68,%r69,%r70,%r71,%r72,%r73,%r74,%r75,%r76,%r77,%r78,%r79,%r80,%r81,%r82,%r83,%r84,%r85,%r86,%r87,%r88,%r89,%r90,%r91,%r92,%r93,%r94,%r95,%r96,%r97,%r98),_optix_trace_typed_32,(%r208,%rd4,%f13,%f14,%f15,%f702,%f703,%f704,%f160,%f706,%f716,%r176,%r208,%r176,%r174,%r176,%r176,%r177,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208);
|
|
// end inline asm
|
|
mov.b32 %f765, %r67;
|
|
add.f32 %f766, %f1640, %f765;
|
|
add.s32 %r209, %r424, 1;
|
|
cvt.rn.f32.s32 %f767, %r209;
|
|
mul.f32 %f768, %f767, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f769, %f768;
|
|
sub.f32 %f770, %f768, %f769;
|
|
mul.f32 %f771, %f767, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f772, %f771;
|
|
sub.f32 %f773, %f771, %f772;
|
|
mul.f32 %f774, %f767, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f775, %f774;
|
|
sub.f32 %f776, %f774, %f775;
|
|
add.f32 %f777, %f773, 0f4199851F;
|
|
add.f32 %f778, %f776, 0f4199851F;
|
|
add.f32 %f779, %f770, 0f4199851F;
|
|
mul.f32 %f780, %f773, %f778;
|
|
fma.rn.f32 %f781, %f770, %f777, %f780;
|
|
fma.rn.f32 %f782, %f779, %f776, %f781;
|
|
add.f32 %f783, %f770, %f782;
|
|
add.f32 %f784, %f773, %f782;
|
|
add.f32 %f785, %f776, %f782;
|
|
add.f32 %f786, %f783, %f784;
|
|
mul.f32 %f787, %f785, %f786;
|
|
cvt.rmi.f32.f32 %f788, %f787;
|
|
sub.f32 %f789, %f787, %f788;
|
|
add.f32 %f790, %f783, %f785;
|
|
mul.f32 %f791, %f784, %f790;
|
|
cvt.rmi.f32.f32 %f792, %f791;
|
|
sub.f32 %f793, %f791, %f792;
|
|
add.f32 %f794, %f784, %f785;
|
|
mul.f32 %f795, %f783, %f794;
|
|
cvt.rmi.f32.f32 %f796, %f795;
|
|
sub.f32 %f797, %f795, %f796;
|
|
fma.rn.f32 %f798, %f789, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f799, %f793, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f800, %f797, 0f40000000, 0fBF800000;
|
|
ld.global.f32 %f801, [%rd6+16];
|
|
ld.global.f32 %f802, [%rd6+4];
|
|
fma.rn.f32 %f803, %f801, %f798, %f802;
|
|
ld.global.f32 %f804, [%rd6+8];
|
|
fma.rn.f32 %f805, %f801, %f799, %f804;
|
|
ld.global.f32 %f806, [%rd6+12];
|
|
fma.rn.f32 %f807, %f801, %f800, %f806;
|
|
sub.f32 %f808, %f803, %f10;
|
|
sub.f32 %f809, %f805, %f11;
|
|
sub.f32 %f810, %f807, %f12;
|
|
mul.f32 %f811, %f809, %f809;
|
|
fma.rn.f32 %f812, %f808, %f808, %f811;
|
|
fma.rn.f32 %f813, %f810, %f810, %f812;
|
|
sqrt.rn.f32 %f715, %f813;
|
|
rcp.rn.f32 %f814, %f715;
|
|
mul.f32 %f711, %f814, %f808;
|
|
mul.f32 %f712, %f814, %f809;
|
|
mul.f32 %f713, %f814, %f810;
|
|
// begin inline asm
|
|
call(%r138,%r139,%r140,%r141,%r142,%r143,%r144,%r145,%r146,%r147,%r148,%r149,%r150,%r151,%r152,%r153,%r154,%r155,%r156,%r157,%r158,%r159,%r160,%r161,%r162,%r163,%r164,%r165,%r166,%r167,%r168,%r169),_optix_trace_typed_32,(%r208,%rd4,%f13,%f14,%f15,%f711,%f712,%f713,%f160,%f715,%f716,%r176,%r208,%r176,%r174,%r176,%r176,%r177,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208);
|
|
// end inline asm
|
|
mov.b32 %f815, %r138;
|
|
add.f32 %f1640, %f766, %f815;
|
|
add.s32 %r424, %r424, 2;
|
|
add.s32 %r423, %r423, -2;
|
|
setp.ne.s32 %p56, %r423, 0;
|
|
@%p56 bra $L__BB0_44;
|
|
|
|
$L__BB0_45:
|
|
setp.eq.s32 %p57, %r11, 0;
|
|
@%p57 bra $L__BB0_47;
|
|
|
|
cvt.rn.f32.s32 %f825, %r424;
|
|
mul.f32 %f826, %f825, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f827, %f826;
|
|
sub.f32 %f828, %f826, %f827;
|
|
mul.f32 %f829, %f825, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f830, %f829;
|
|
sub.f32 %f831, %f829, %f830;
|
|
mul.f32 %f832, %f825, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f833, %f832;
|
|
sub.f32 %f834, %f832, %f833;
|
|
add.f32 %f835, %f831, 0f4199851F;
|
|
add.f32 %f836, %f834, 0f4199851F;
|
|
add.f32 %f837, %f828, 0f4199851F;
|
|
mul.f32 %f838, %f831, %f836;
|
|
fma.rn.f32 %f839, %f828, %f835, %f838;
|
|
fma.rn.f32 %f840, %f837, %f834, %f839;
|
|
add.f32 %f841, %f828, %f840;
|
|
add.f32 %f842, %f831, %f840;
|
|
add.f32 %f843, %f834, %f840;
|
|
add.f32 %f844, %f841, %f842;
|
|
mul.f32 %f845, %f843, %f844;
|
|
cvt.rmi.f32.f32 %f846, %f845;
|
|
sub.f32 %f847, %f845, %f846;
|
|
add.f32 %f848, %f841, %f843;
|
|
mul.f32 %f849, %f842, %f848;
|
|
cvt.rmi.f32.f32 %f850, %f849;
|
|
sub.f32 %f851, %f849, %f850;
|
|
add.f32 %f852, %f842, %f843;
|
|
mul.f32 %f853, %f841, %f852;
|
|
cvt.rmi.f32.f32 %f854, %f853;
|
|
sub.f32 %f855, %f853, %f854;
|
|
fma.rn.f32 %f856, %f847, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f857, %f851, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f858, %f855, 0f40000000, 0fBF800000;
|
|
ld.global.f32 %f859, [%rd6+16];
|
|
ld.global.f32 %f860, [%rd6+4];
|
|
fma.rn.f32 %f861, %f859, %f856, %f860;
|
|
ld.global.f32 %f862, [%rd6+8];
|
|
fma.rn.f32 %f863, %f859, %f857, %f862;
|
|
ld.global.f32 %f864, [%rd6+12];
|
|
fma.rn.f32 %f865, %f859, %f858, %f864;
|
|
sub.f32 %f866, %f861, %f10;
|
|
sub.f32 %f867, %f863, %f11;
|
|
sub.f32 %f868, %f865, %f12;
|
|
mul.f32 %f869, %f867, %f867;
|
|
fma.rn.f32 %f870, %f866, %f866, %f869;
|
|
fma.rn.f32 %f871, %f868, %f868, %f870;
|
|
sqrt.rn.f32 %f823, %f871;
|
|
rcp.rn.f32 %f872, %f823;
|
|
mul.f32 %f819, %f872, %f866;
|
|
mul.f32 %f820, %f872, %f867;
|
|
mul.f32 %f821, %f872, %f868;
|
|
mov.f32 %f824, 0f00000000;
|
|
mov.u32 %r246, 2;
|
|
mov.u32 %r248, 1;
|
|
mov.u32 %r249, 1065353216;
|
|
mov.u32 %r280, 0;
|
|
// begin inline asm
|
|
call(%r210,%r211,%r212,%r213,%r214,%r215,%r216,%r217,%r218,%r219,%r220,%r221,%r222,%r223,%r224,%r225,%r226,%r227,%r228,%r229,%r230,%r231,%r232,%r233,%r234,%r235,%r236,%r237,%r238,%r239,%r240,%r241),_optix_trace_typed_32,(%r280,%rd4,%f13,%f14,%f15,%f819,%f820,%f821,%f160,%f823,%f824,%r248,%r280,%r248,%r246,%r248,%r248,%r249,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280);
|
|
// end inline asm
|
|
mov.b32 %f873, %r210;
|
|
add.f32 %f1640, %f1640, %f873;
|
|
|
|
$L__BB0_47:
|
|
cvt.rn.f32.s32 %f874, %r10;
|
|
div.rn.f32 %f1644, %f1640, %f874;
|
|
shr.u32 %r281, %r46, 31;
|
|
cvt.u16.u32 %rs182, %r281;
|
|
|
|
$L__BB0_48:
|
|
fma.rn.f32 %f1645, %f1627, %f1644, %f1645;
|
|
fma.rn.f32 %f1646, %f1628, %f1644, %f1646;
|
|
fma.rn.f32 %f1647, %f1629, %f1644, %f1647;
|
|
fma.rn.f32 %f1648, %f1630, %f1644, %f1648;
|
|
fma.rn.f32 %f1649, %f1631, %f1644, %f1649;
|
|
fma.rn.f32 %f1650, %f1632, %f1644, %f1650;
|
|
fma.rn.f32 %f1651, %f1633, %f1644, %f1651;
|
|
fma.rn.f32 %f1652, %f1634, %f1644, %f1652;
|
|
fma.rn.f32 %f1653, %f1635, %f1644, %f1653;
|
|
fma.rn.f32 %f1654, %f1636, %f1644, %f1654;
|
|
fma.rn.f32 %f1655, %f1637, %f1644, %f1655;
|
|
fma.rn.f32 %f1656, %f1638, %f1644, %f1656;
|
|
setp.eq.s16 %p58, %rs182, 0;
|
|
@%p58 bra $L__BB0_50;
|
|
|
|
div.rn.f32 %f875, %f1627, %f469;
|
|
div.rn.f32 %f876, %f875, %f101;
|
|
cvt.sat.f32.f32 %f877, %f876;
|
|
mul.f32 %f1644, %f1644, %f877;
|
|
|
|
$L__BB0_50:
|
|
add.f32 %f1657, %f1657, %f1644;
|
|
|
|
$L__BB0_51:
|
|
cvt.u64.u32 %rd73, %r421;
|
|
cvt.u32.u64 %r282, %rd73;
|
|
add.s32 %r421, %r282, 1;
|
|
setp.lt.u32 %p59, %r421, %r5;
|
|
@%p59 bra $L__BB0_15;
|
|
bra.uni $L__BB0_53;
|
|
|
|
$L__BB0_52:
|
|
mov.f32 %f1645, 0f00000000;
|
|
ld.const.u32 %r425, [params+104];
|
|
mov.f32 %f1646, %f1645;
|
|
mov.f32 %f1647, %f1645;
|
|
mov.f32 %f1648, %f1645;
|
|
mov.f32 %f1649, %f1645;
|
|
mov.f32 %f1650, %f1645;
|
|
mov.f32 %f1651, %f1645;
|
|
mov.f32 %f1652, %f1645;
|
|
mov.f32 %f1653, %f1645;
|
|
mov.f32 %f1654, %f1645;
|
|
mov.f32 %f1655, %f1645;
|
|
mov.f32 %f1656, %f1645;
|
|
mov.f32 %f1657, %f1645;
|
|
|
|
$L__BB0_53:
|
|
and.b32 %r283, %r425, 8;
|
|
setp.eq.s32 %p60, %r283, 0;
|
|
@%p60 bra $L__BB0_67;
|
|
|
|
cvt.sat.f32.f32 %f210, %f1657;
|
|
ld.const.u64 %rd35, [params+192];
|
|
cvta.to.global.u64 %rd8, %rd35;
|
|
ld.const.u32 %r284, [params+184];
|
|
mad.lo.s32 %r285, %r284, %r4, %r3;
|
|
cvt.u64.u32 %rd9, %r285;
|
|
mov.f32 %f892, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f893, %f892;
|
|
add.f32 %f894, %f893, %f893;
|
|
mov.f32 %f895, 0f3EE8BA2E;
|
|
sub.f32 %f896, %f895, %f894;
|
|
abs.f32 %f211, %f896;
|
|
abs.f32 %f212, %f210;
|
|
setp.lt.f32 %p61, %f212, 0f00800000;
|
|
mul.f32 %f897, %f212, 0f4B800000;
|
|
selp.f32 %f898, %f897, %f212, %p61;
|
|
selp.f32 %f899, 0fC3170000, 0fC2FE0000, %p61;
|
|
mov.b32 %r286, %f898;
|
|
and.b32 %r287, %r286, 8388607;
|
|
or.b32 %r288, %r287, 1065353216;
|
|
mov.b32 %f900, %r288;
|
|
shr.u32 %r289, %r286, 23;
|
|
cvt.rn.f32.u32 %f901, %r289;
|
|
add.f32 %f902, %f899, %f901;
|
|
setp.gt.f32 %p62, %f900, 0f3FB504F3;
|
|
mul.f32 %f903, %f900, 0f3F000000;
|
|
add.f32 %f904, %f902, 0f3F800000;
|
|
selp.f32 %f905, %f904, %f902, %p62;
|
|
selp.f32 %f906, %f903, %f900, %p62;
|
|
add.f32 %f907, %f906, 0fBF800000;
|
|
add.f32 %f908, %f906, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f909, %f908;
|
|
add.f32 %f910, %f907, %f907;
|
|
mul.f32 %f911, %f910, %f909;
|
|
mul.f32 %f912, %f911, %f911;
|
|
mov.f32 %f913, 0f3C4CAF63;
|
|
mov.f32 %f914, 0f3B18F0FE;
|
|
fma.rn.f32 %f915, %f914, %f912, %f913;
|
|
mov.f32 %f916, 0f3DAAAABD;
|
|
fma.rn.f32 %f917, %f915, %f912, %f916;
|
|
mul.rn.f32 %f918, %f917, %f912;
|
|
mul.rn.f32 %f919, %f918, %f911;
|
|
sub.f32 %f920, %f907, %f911;
|
|
add.f32 %f921, %f920, %f920;
|
|
neg.f32 %f922, %f911;
|
|
fma.rn.f32 %f923, %f922, %f907, %f921;
|
|
mul.rn.f32 %f924, %f909, %f923;
|
|
add.f32 %f925, %f919, %f911;
|
|
sub.f32 %f926, %f911, %f925;
|
|
add.f32 %f927, %f919, %f926;
|
|
add.f32 %f928, %f924, %f927;
|
|
add.f32 %f929, %f925, %f928;
|
|
sub.f32 %f930, %f925, %f929;
|
|
add.f32 %f931, %f928, %f930;
|
|
mov.f32 %f932, 0f3F317200;
|
|
mul.rn.f32 %f933, %f905, %f932;
|
|
mov.f32 %f934, 0f35BFBE8E;
|
|
mul.rn.f32 %f935, %f905, %f934;
|
|
add.f32 %f936, %f933, %f929;
|
|
sub.f32 %f937, %f933, %f936;
|
|
add.f32 %f938, %f929, %f937;
|
|
add.f32 %f939, %f931, %f938;
|
|
add.f32 %f940, %f935, %f939;
|
|
add.f32 %f941, %f936, %f940;
|
|
sub.f32 %f942, %f936, %f941;
|
|
add.f32 %f943, %f940, %f942;
|
|
mul.rn.f32 %f944, %f895, %f941;
|
|
neg.f32 %f945, %f944;
|
|
fma.rn.f32 %f946, %f895, %f941, %f945;
|
|
fma.rn.f32 %f947, %f895, %f943, %f946;
|
|
mov.f32 %f948, 0f00000000;
|
|
fma.rn.f32 %f949, %f948, %f941, %f947;
|
|
add.rn.f32 %f950, %f944, %f949;
|
|
neg.f32 %f951, %f950;
|
|
add.rn.f32 %f952, %f944, %f951;
|
|
add.rn.f32 %f953, %f952, %f949;
|
|
mov.b32 %r290, %f950;
|
|
setp.eq.s32 %p63, %r290, 1118925336;
|
|
add.s32 %r291, %r290, -1;
|
|
mov.b32 %f954, %r291;
|
|
add.f32 %f955, %f953, 0f37000000;
|
|
selp.f32 %f213, %f955, %f953, %p63;
|
|
selp.f32 %f956, %f954, %f950, %p63;
|
|
mov.f32 %f957, 0f3FB8AA3B;
|
|
mul.rn.f32 %f958, %f956, %f957;
|
|
cvt.rzi.f32.f32 %f959, %f958;
|
|
abs.f32 %f960, %f959;
|
|
setp.gt.f32 %p64, %f960, 0f42FC0000;
|
|
mov.b32 %r292, %f959;
|
|
and.b32 %r293, %r292, -2147483648;
|
|
or.b32 %r294, %r293, 1123811328;
|
|
mov.b32 %f961, %r294;
|
|
selp.f32 %f962, %f961, %f959, %p64;
|
|
mov.f32 %f963, 0fBF317218;
|
|
fma.rn.f32 %f964, %f962, %f963, %f956;
|
|
mov.f32 %f965, 0f3102E308;
|
|
fma.rn.f32 %f966, %f962, %f965, %f964;
|
|
mul.f32 %f967, %f966, 0f3FB8AA3B;
|
|
add.f32 %f968, %f962, 0f4B40007F;
|
|
mov.b32 %r295, %f968;
|
|
shl.b32 %r296, %r295, 23;
|
|
mov.b32 %f969, %r296;
|
|
ex2.approx.ftz.f32 %f970, %f967;
|
|
mul.f32 %f214, %f970, %f969;
|
|
setp.eq.f32 %p65, %f214, 0f7F800000;
|
|
mov.f32 %f1671, 0f7F800000;
|
|
@%p65 bra $L__BB0_56;
|
|
|
|
fma.rn.f32 %f1671, %f214, %f213, %f214;
|
|
|
|
$L__BB0_56:
|
|
setp.lt.f32 %p66, %f210, 0f00000000;
|
|
setp.eq.f32 %p67, %f211, 0f3F800000;
|
|
and.pred %p3, %p66, %p67;
|
|
setp.eq.f32 %p68, %f210, 0f00000000;
|
|
@%p68 bra $L__BB0_60;
|
|
bra.uni $L__BB0_57;
|
|
|
|
$L__BB0_60:
|
|
add.f32 %f975, %f210, %f210;
|
|
selp.f32 %f1673, %f975, 0f00000000, %p67;
|
|
bra.uni $L__BB0_61;
|
|
|
|
$L__BB0_161:
|
|
mov.f32 %f1560, 0f00000000;
|
|
mov.u32 %r427, 0;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs129, %f1560;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs128, %f1560;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs127, %f1560;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs130, 0;
|
|
st.global.v4.u16 [%rd16], {%rs127, %rs128, %rs129, %rs130};
|
|
|
|
$L__BB0_162:
|
|
ld.const.u64 %rd64, [params+256];
|
|
cvta.to.global.u64 %rd65, %rd64;
|
|
ld.const.u32 %r415, [params+248];
|
|
mad.lo.s32 %r416, %r415, %r4, %r3;
|
|
mul.wide.u32 %rd66, %r416, 8;
|
|
add.s64 %rd17, %rd65, %rd66;
|
|
setp.eq.s32 %p185, %r427, 0;
|
|
@%p185 bra $L__BB0_164;
|
|
|
|
ld.global.v4.u16 {%rs137, %rs138, %rs139, %rs140}, [%rd17];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1561, %rs137;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1562, %rs138;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1563, %rs139;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1564, %f1561, 0f00000000;
|
|
add.f32 %f1565, %f1562, 0f00000000;
|
|
add.f32 %f1566, %f1563, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs136, %f1566;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs135, %f1565;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs134, %f1564;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs141, 0;
|
|
st.global.v4.u16 [%rd17], {%rs134, %rs135, %rs136, %rs141};
|
|
bra.uni $L__BB0_165;
|
|
|
|
$L__BB0_164:
|
|
mov.f32 %f1569, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs144, %f1569;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs143, %f1569;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs142, %f1569;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs145, 0;
|
|
st.global.v4.u16 [%rd17], {%rs142, %rs143, %rs144, %rs145};
|
|
|
|
$L__BB0_165:
|
|
ld.const.u64 %rd67, [params+272];
|
|
cvta.to.global.u64 %rd68, %rd67;
|
|
ld.const.u32 %r417, [params+264];
|
|
mad.lo.s32 %r418, %r417, %r4, %r3;
|
|
mul.wide.u32 %rd69, %r418, 8;
|
|
add.s64 %rd18, %rd68, %rd69;
|
|
@%p185 bra $L__BB0_167;
|
|
|
|
ld.global.v4.u16 {%rs152, %rs153, %rs154, %rs155}, [%rd18];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1570, %rs152;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1571, %rs153;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1572, %rs154;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1573, %f1570, 0f00000000;
|
|
add.f32 %f1574, %f1571, 0f00000000;
|
|
add.f32 %f1575, %f1572, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs151, %f1575;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs150, %f1574;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs149, %f1573;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs156, 0;
|
|
st.global.v4.u16 [%rd18], {%rs149, %rs150, %rs151, %rs156};
|
|
bra.uni $L__BB0_168;
|
|
|
|
$L__BB0_167:
|
|
mov.f32 %f1578, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs159, %f1578;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs158, %f1578;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs157, %f1578;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs160, 0;
|
|
st.global.v4.u16 [%rd18], {%rs157, %rs158, %rs159, %rs160};
|
|
|
|
$L__BB0_168:
|
|
ld.const.u64 %rd70, [params+288];
|
|
cvta.to.global.u64 %rd71, %rd70;
|
|
ld.const.u32 %r419, [params+280];
|
|
mad.lo.s32 %r420, %r419, %r4, %r3;
|
|
mul.wide.u32 %rd72, %r420, 8;
|
|
add.s64 %rd19, %rd71, %rd72;
|
|
@%p185 bra $L__BB0_170;
|
|
|
|
ld.global.v4.u16 {%rs167, %rs168, %rs169, %rs170}, [%rd19];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1579, %rs167;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1580, %rs168;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1581, %rs169;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1582, %f1579, 0f00000000;
|
|
add.f32 %f1583, %f1580, 0f00000000;
|
|
add.f32 %f1584, %f1581, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs166, %f1584;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs165, %f1583;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs164, %f1582;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs171, 0;
|
|
st.global.v4.u16 [%rd19], {%rs164, %rs165, %rs166, %rs171};
|
|
bra.uni $L__BB0_171;
|
|
|
|
$L__BB0_170:
|
|
mov.f32 %f1587, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs174, %f1587;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs173, %f1587;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs172, %f1587;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs175, 0;
|
|
st.global.v4.u16 [%rd19], {%rs172, %rs173, %rs174, %rs175};
|
|
bra.uni $L__BB0_171;
|
|
|
|
$L__BB0_57:
|
|
mov.b32 %r297, %f1671;
|
|
xor.b32 %r298, %r297, -2147483648;
|
|
mov.b32 %f971, %r298;
|
|
selp.f32 %f1673, %f971, %f1671, %p3;
|
|
setp.geu.f32 %p69, %f210, 0f00000000;
|
|
@%p69 bra $L__BB0_61;
|
|
|
|
mov.f32 %f972, 0f3EE8BA2E;
|
|
cvt.rzi.f32.f32 %f973, %f972;
|
|
setp.eq.f32 %p70, %f973, 0f3EE8BA2E;
|
|
@%p70 bra $L__BB0_61;
|
|
|
|
mov.f32 %f1673, 0f7FFFFFFF;
|
|
|
|
$L__BB0_61:
|
|
add.f32 %f976, %f212, 0f3EE8BA2E;
|
|
mov.b32 %r299, %f976;
|
|
setp.lt.s32 %p72, %r299, 2139095040;
|
|
@%p72 bra $L__BB0_66;
|
|
|
|
setp.gtu.f32 %p73, %f212, 0f7F800000;
|
|
@%p73 bra $L__BB0_65;
|
|
bra.uni $L__BB0_63;
|
|
|
|
$L__BB0_65:
|
|
add.f32 %f1673, %f210, 0f3EE8BA2E;
|
|
bra.uni $L__BB0_66;
|
|
|
|
$L__BB0_63:
|
|
setp.neu.f32 %p74, %f212, 0f7F800000;
|
|
@%p74 bra $L__BB0_66;
|
|
|
|
selp.f32 %f1673, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
$L__BB0_66:
|
|
mul.f32 %f977, %f1673, 0f437F0000;
|
|
setp.eq.f32 %p75, %f210, 0f3F800000;
|
|
selp.f32 %f978, 0f437F0000, %f977, %p75;
|
|
cvt.rzi.u32.f32 %r300, %f978;
|
|
shl.b64 %rd36, %rd9, 1;
|
|
add.s64 %rd37, %rd8, %rd36;
|
|
cvt.u16.u32 %rs47, %r300;
|
|
mov.u16 %rs48, 255;
|
|
st.global.v2.u8 [%rd37], {%rs47, %rs48};
|
|
|
|
$L__BB0_67:
|
|
and.b32 %r301, %r425, 1;
|
|
setp.eq.b32 %p76, %r301, 1;
|
|
mov.pred %p77, 0;
|
|
xor.pred %p78, %p76, %p77;
|
|
not.pred %p79, %p78;
|
|
@%p79 bra $L__BB0_141;
|
|
|
|
mov.f32 %f980, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f981, %f980;
|
|
add.f32 %f982, %f981, %f981;
|
|
mov.f32 %f983, 0f3EE66666;
|
|
sub.f32 %f984, %f983, %f982;
|
|
abs.f32 %f223, %f984;
|
|
abs.f32 %f224, %f1645;
|
|
setp.lt.f32 %p80, %f224, 0f00800000;
|
|
mul.f32 %f985, %f224, 0f4B800000;
|
|
selp.f32 %f986, %f985, %f224, %p80;
|
|
selp.f32 %f987, 0fC3170000, 0fC2FE0000, %p80;
|
|
mov.b32 %r302, %f986;
|
|
and.b32 %r303, %r302, 8388607;
|
|
or.b32 %r304, %r303, 1065353216;
|
|
mov.b32 %f988, %r304;
|
|
shr.u32 %r305, %r302, 23;
|
|
cvt.rn.f32.u32 %f989, %r305;
|
|
add.f32 %f990, %f987, %f989;
|
|
setp.gt.f32 %p81, %f988, 0f3FB504F3;
|
|
mul.f32 %f991, %f988, 0f3F000000;
|
|
add.f32 %f992, %f990, 0f3F800000;
|
|
selp.f32 %f993, %f992, %f990, %p81;
|
|
selp.f32 %f994, %f991, %f988, %p81;
|
|
add.f32 %f995, %f994, 0fBF800000;
|
|
add.f32 %f996, %f994, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f997, %f996;
|
|
add.f32 %f998, %f995, %f995;
|
|
mul.f32 %f999, %f998, %f997;
|
|
mul.f32 %f1000, %f999, %f999;
|
|
mov.f32 %f1001, 0f3C4CAF63;
|
|
mov.f32 %f1002, 0f3B18F0FE;
|
|
fma.rn.f32 %f1003, %f1002, %f1000, %f1001;
|
|
mov.f32 %f1004, 0f3DAAAABD;
|
|
fma.rn.f32 %f1005, %f1003, %f1000, %f1004;
|
|
mul.rn.f32 %f1006, %f1005, %f1000;
|
|
mul.rn.f32 %f1007, %f1006, %f999;
|
|
sub.f32 %f1008, %f995, %f999;
|
|
add.f32 %f1009, %f1008, %f1008;
|
|
neg.f32 %f1010, %f999;
|
|
fma.rn.f32 %f1011, %f1010, %f995, %f1009;
|
|
mul.rn.f32 %f1012, %f997, %f1011;
|
|
add.f32 %f1013, %f1007, %f999;
|
|
sub.f32 %f1014, %f999, %f1013;
|
|
add.f32 %f1015, %f1007, %f1014;
|
|
add.f32 %f1016, %f1012, %f1015;
|
|
add.f32 %f1017, %f1013, %f1016;
|
|
sub.f32 %f1018, %f1013, %f1017;
|
|
add.f32 %f1019, %f1016, %f1018;
|
|
mov.f32 %f1020, 0f3F317200;
|
|
mul.rn.f32 %f1021, %f993, %f1020;
|
|
mov.f32 %f1022, 0f35BFBE8E;
|
|
mul.rn.f32 %f1023, %f993, %f1022;
|
|
add.f32 %f1024, %f1021, %f1017;
|
|
sub.f32 %f1025, %f1021, %f1024;
|
|
add.f32 %f1026, %f1017, %f1025;
|
|
add.f32 %f1027, %f1019, %f1026;
|
|
add.f32 %f1028, %f1023, %f1027;
|
|
add.f32 %f1029, %f1024, %f1028;
|
|
sub.f32 %f1030, %f1024, %f1029;
|
|
add.f32 %f1031, %f1028, %f1030;
|
|
mul.rn.f32 %f1032, %f983, %f1029;
|
|
neg.f32 %f1033, %f1032;
|
|
fma.rn.f32 %f1034, %f983, %f1029, %f1033;
|
|
fma.rn.f32 %f1035, %f983, %f1031, %f1034;
|
|
mov.f32 %f1036, 0f00000000;
|
|
fma.rn.f32 %f1037, %f1036, %f1029, %f1035;
|
|
add.rn.f32 %f1038, %f1032, %f1037;
|
|
neg.f32 %f1039, %f1038;
|
|
add.rn.f32 %f1040, %f1032, %f1039;
|
|
add.rn.f32 %f1041, %f1040, %f1037;
|
|
mov.b32 %r306, %f1038;
|
|
setp.eq.s32 %p82, %r306, 1118925336;
|
|
add.s32 %r307, %r306, -1;
|
|
mov.b32 %f1042, %r307;
|
|
add.f32 %f1043, %f1041, 0f37000000;
|
|
selp.f32 %f225, %f1043, %f1041, %p82;
|
|
selp.f32 %f1044, %f1042, %f1038, %p82;
|
|
mov.f32 %f1045, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1046, %f1044, %f1045;
|
|
cvt.rzi.f32.f32 %f1047, %f1046;
|
|
abs.f32 %f1048, %f1047;
|
|
setp.gt.f32 %p83, %f1048, 0f42FC0000;
|
|
mov.b32 %r308, %f1047;
|
|
and.b32 %r309, %r308, -2147483648;
|
|
or.b32 %r310, %r309, 1123811328;
|
|
mov.b32 %f1049, %r310;
|
|
selp.f32 %f1050, %f1049, %f1047, %p83;
|
|
mov.f32 %f1051, 0fBF317218;
|
|
fma.rn.f32 %f1052, %f1050, %f1051, %f1044;
|
|
mov.f32 %f1053, 0f3102E308;
|
|
fma.rn.f32 %f1054, %f1050, %f1053, %f1052;
|
|
mul.f32 %f1055, %f1054, 0f3FB8AA3B;
|
|
add.f32 %f1056, %f1050, 0f4B40007F;
|
|
mov.b32 %r311, %f1056;
|
|
shl.b32 %r312, %r311, 23;
|
|
mov.b32 %f1057, %r312;
|
|
ex2.approx.ftz.f32 %f1058, %f1055;
|
|
mul.f32 %f226, %f1058, %f1057;
|
|
setp.eq.f32 %p84, %f226, 0f7F800000;
|
|
mov.f32 %f1674, 0f7F800000;
|
|
@%p84 bra $L__BB0_70;
|
|
|
|
fma.rn.f32 %f1674, %f226, %f225, %f226;
|
|
|
|
$L__BB0_70:
|
|
setp.lt.f32 %p85, %f1645, 0f00000000;
|
|
setp.eq.f32 %p86, %f223, 0f3F800000;
|
|
and.pred %p4, %p85, %p86;
|
|
setp.eq.f32 %p87, %f1645, 0f00000000;
|
|
@%p87 bra $L__BB0_74;
|
|
bra.uni $L__BB0_71;
|
|
|
|
$L__BB0_74:
|
|
add.f32 %f1063, %f1645, %f1645;
|
|
selp.f32 %f1676, %f1063, 0f00000000, %p86;
|
|
bra.uni $L__BB0_75;
|
|
|
|
$L__BB0_71:
|
|
mov.b32 %r313, %f1674;
|
|
xor.b32 %r314, %r313, -2147483648;
|
|
mov.b32 %f1059, %r314;
|
|
selp.f32 %f1676, %f1059, %f1674, %p4;
|
|
setp.geu.f32 %p88, %f1645, 0f00000000;
|
|
@%p88 bra $L__BB0_75;
|
|
|
|
mov.f32 %f1060, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f1061, %f1060;
|
|
setp.eq.f32 %p89, %f1061, 0f3EE66666;
|
|
@%p89 bra $L__BB0_75;
|
|
|
|
mov.f32 %f1676, 0f7FFFFFFF;
|
|
|
|
$L__BB0_75:
|
|
add.f32 %f1064, %f224, 0f3EE66666;
|
|
mov.b32 %r315, %f1064;
|
|
setp.lt.s32 %p91, %r315, 2139095040;
|
|
@%p91 bra $L__BB0_80;
|
|
|
|
setp.gtu.f32 %p92, %f224, 0f7F800000;
|
|
@%p92 bra $L__BB0_79;
|
|
bra.uni $L__BB0_77;
|
|
|
|
$L__BB0_79:
|
|
add.f32 %f1676, %f1645, 0f3EE66666;
|
|
bra.uni $L__BB0_80;
|
|
|
|
$L__BB0_77:
|
|
setp.neu.f32 %p93, %f224, 0f7F800000;
|
|
@%p93 bra $L__BB0_80;
|
|
|
|
selp.f32 %f1676, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
$L__BB0_80:
|
|
setp.eq.f32 %p94, %f1645, 0f3F800000;
|
|
selp.f32 %f235, 0f3F800000, %f1676, %p94;
|
|
abs.f32 %f236, %f1646;
|
|
setp.lt.f32 %p95, %f236, 0f00800000;
|
|
mul.f32 %f1066, %f236, 0f4B800000;
|
|
selp.f32 %f1067, %f1066, %f236, %p95;
|
|
selp.f32 %f1068, 0fC3170000, 0fC2FE0000, %p95;
|
|
mov.b32 %r316, %f1067;
|
|
and.b32 %r317, %r316, 8388607;
|
|
or.b32 %r318, %r317, 1065353216;
|
|
mov.b32 %f1069, %r318;
|
|
shr.u32 %r319, %r316, 23;
|
|
cvt.rn.f32.u32 %f1070, %r319;
|
|
add.f32 %f1071, %f1068, %f1070;
|
|
setp.gt.f32 %p96, %f1069, 0f3FB504F3;
|
|
mul.f32 %f1072, %f1069, 0f3F000000;
|
|
add.f32 %f1073, %f1071, 0f3F800000;
|
|
selp.f32 %f1074, %f1073, %f1071, %p96;
|
|
selp.f32 %f1075, %f1072, %f1069, %p96;
|
|
add.f32 %f1076, %f1075, 0fBF800000;
|
|
add.f32 %f1077, %f1075, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1078, %f1077;
|
|
add.f32 %f1079, %f1076, %f1076;
|
|
mul.f32 %f1080, %f1079, %f1078;
|
|
mul.f32 %f1081, %f1080, %f1080;
|
|
mov.f32 %f1082, 0f3C4CAF63;
|
|
mov.f32 %f1083, 0f3B18F0FE;
|
|
fma.rn.f32 %f1084, %f1083, %f1081, %f1082;
|
|
mov.f32 %f1085, 0f3DAAAABD;
|
|
fma.rn.f32 %f1086, %f1084, %f1081, %f1085;
|
|
mul.rn.f32 %f1087, %f1086, %f1081;
|
|
mul.rn.f32 %f1088, %f1087, %f1080;
|
|
sub.f32 %f1089, %f1076, %f1080;
|
|
add.f32 %f1090, %f1089, %f1089;
|
|
neg.f32 %f1091, %f1080;
|
|
fma.rn.f32 %f1092, %f1091, %f1076, %f1090;
|
|
mul.rn.f32 %f1093, %f1078, %f1092;
|
|
add.f32 %f1094, %f1088, %f1080;
|
|
sub.f32 %f1095, %f1080, %f1094;
|
|
add.f32 %f1096, %f1088, %f1095;
|
|
add.f32 %f1097, %f1093, %f1096;
|
|
add.f32 %f1098, %f1094, %f1097;
|
|
sub.f32 %f1099, %f1094, %f1098;
|
|
add.f32 %f1100, %f1097, %f1099;
|
|
mov.f32 %f1101, 0f3F317200;
|
|
mul.rn.f32 %f1102, %f1074, %f1101;
|
|
mov.f32 %f1103, 0f35BFBE8E;
|
|
mul.rn.f32 %f1104, %f1074, %f1103;
|
|
add.f32 %f1105, %f1102, %f1098;
|
|
sub.f32 %f1106, %f1102, %f1105;
|
|
add.f32 %f1107, %f1098, %f1106;
|
|
add.f32 %f1108, %f1100, %f1107;
|
|
add.f32 %f1109, %f1104, %f1108;
|
|
add.f32 %f1110, %f1105, %f1109;
|
|
sub.f32 %f1111, %f1105, %f1110;
|
|
add.f32 %f1112, %f1109, %f1111;
|
|
mov.f32 %f1113, 0f3EE66666;
|
|
mul.rn.f32 %f1114, %f1113, %f1110;
|
|
neg.f32 %f1115, %f1114;
|
|
fma.rn.f32 %f1116, %f1113, %f1110, %f1115;
|
|
fma.rn.f32 %f1117, %f1113, %f1112, %f1116;
|
|
mov.f32 %f1118, 0f00000000;
|
|
fma.rn.f32 %f1119, %f1118, %f1110, %f1117;
|
|
add.rn.f32 %f1120, %f1114, %f1119;
|
|
neg.f32 %f1121, %f1120;
|
|
add.rn.f32 %f1122, %f1114, %f1121;
|
|
add.rn.f32 %f1123, %f1122, %f1119;
|
|
mov.b32 %r320, %f1120;
|
|
setp.eq.s32 %p97, %r320, 1118925336;
|
|
add.s32 %r321, %r320, -1;
|
|
mov.b32 %f1124, %r321;
|
|
add.f32 %f1125, %f1123, 0f37000000;
|
|
selp.f32 %f237, %f1125, %f1123, %p97;
|
|
selp.f32 %f1126, %f1124, %f1120, %p97;
|
|
mov.f32 %f1127, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1128, %f1126, %f1127;
|
|
cvt.rzi.f32.f32 %f1129, %f1128;
|
|
abs.f32 %f1130, %f1129;
|
|
setp.gt.f32 %p98, %f1130, 0f42FC0000;
|
|
mov.b32 %r322, %f1129;
|
|
and.b32 %r323, %r322, -2147483648;
|
|
or.b32 %r324, %r323, 1123811328;
|
|
mov.b32 %f1131, %r324;
|
|
selp.f32 %f1132, %f1131, %f1129, %p98;
|
|
mov.f32 %f1133, 0fBF317218;
|
|
fma.rn.f32 %f1134, %f1132, %f1133, %f1126;
|
|
mov.f32 %f1135, 0f3102E308;
|
|
fma.rn.f32 %f1136, %f1132, %f1135, %f1134;
|
|
mul.f32 %f1137, %f1136, 0f3FB8AA3B;
|
|
add.f32 %f1138, %f1132, 0f4B40007F;
|
|
mov.b32 %r325, %f1138;
|
|
shl.b32 %r326, %r325, 23;
|
|
mov.b32 %f1139, %r326;
|
|
ex2.approx.ftz.f32 %f1140, %f1137;
|
|
mul.f32 %f238, %f1140, %f1139;
|
|
setp.eq.f32 %p99, %f238, 0f7F800000;
|
|
mov.f32 %f1677, 0f7F800000;
|
|
@%p99 bra $L__BB0_82;
|
|
|
|
fma.rn.f32 %f1677, %f238, %f237, %f238;
|
|
|
|
$L__BB0_82:
|
|
setp.lt.f32 %p100, %f1646, 0f00000000;
|
|
and.pred %p5, %p100, %p86;
|
|
setp.eq.f32 %p102, %f1646, 0f00000000;
|
|
@%p102 bra $L__BB0_86;
|
|
bra.uni $L__BB0_83;
|
|
|
|
$L__BB0_86:
|
|
add.f32 %f1145, %f1646, %f1646;
|
|
selp.f32 %f1679, %f1145, 0f00000000, %p86;
|
|
bra.uni $L__BB0_87;
|
|
|
|
$L__BB0_83:
|
|
mov.b32 %r327, %f1677;
|
|
xor.b32 %r328, %r327, -2147483648;
|
|
mov.b32 %f1141, %r328;
|
|
selp.f32 %f1679, %f1141, %f1677, %p5;
|
|
setp.geu.f32 %p103, %f1646, 0f00000000;
|
|
@%p103 bra $L__BB0_87;
|
|
|
|
mov.f32 %f1142, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f1143, %f1142;
|
|
setp.eq.f32 %p104, %f1143, 0f3EE66666;
|
|
@%p104 bra $L__BB0_87;
|
|
|
|
mov.f32 %f1679, 0f7FFFFFFF;
|
|
|
|
$L__BB0_87:
|
|
add.f32 %f1146, %f236, 0f3EE66666;
|
|
mov.b32 %r329, %f1146;
|
|
setp.lt.s32 %p106, %r329, 2139095040;
|
|
@%p106 bra $L__BB0_92;
|
|
|
|
setp.gtu.f32 %p107, %f236, 0f7F800000;
|
|
@%p107 bra $L__BB0_91;
|
|
bra.uni $L__BB0_89;
|
|
|
|
$L__BB0_91:
|
|
add.f32 %f1679, %f1646, 0f3EE66666;
|
|
bra.uni $L__BB0_92;
|
|
|
|
$L__BB0_89:
|
|
setp.neu.f32 %p108, %f236, 0f7F800000;
|
|
@%p108 bra $L__BB0_92;
|
|
|
|
selp.f32 %f1679, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
$L__BB0_92:
|
|
setp.eq.f32 %p109, %f1646, 0f3F800000;
|
|
selp.f32 %f247, 0f3F800000, %f1679, %p109;
|
|
abs.f32 %f248, %f1647;
|
|
setp.lt.f32 %p110, %f248, 0f00800000;
|
|
mul.f32 %f1148, %f248, 0f4B800000;
|
|
selp.f32 %f1149, %f1148, %f248, %p110;
|
|
selp.f32 %f1150, 0fC3170000, 0fC2FE0000, %p110;
|
|
mov.b32 %r330, %f1149;
|
|
and.b32 %r331, %r330, 8388607;
|
|
or.b32 %r332, %r331, 1065353216;
|
|
mov.b32 %f1151, %r332;
|
|
shr.u32 %r333, %r330, 23;
|
|
cvt.rn.f32.u32 %f1152, %r333;
|
|
add.f32 %f1153, %f1150, %f1152;
|
|
setp.gt.f32 %p111, %f1151, 0f3FB504F3;
|
|
mul.f32 %f1154, %f1151, 0f3F000000;
|
|
add.f32 %f1155, %f1153, 0f3F800000;
|
|
selp.f32 %f1156, %f1155, %f1153, %p111;
|
|
selp.f32 %f1157, %f1154, %f1151, %p111;
|
|
add.f32 %f1158, %f1157, 0fBF800000;
|
|
add.f32 %f1159, %f1157, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1160, %f1159;
|
|
add.f32 %f1161, %f1158, %f1158;
|
|
mul.f32 %f1162, %f1161, %f1160;
|
|
mul.f32 %f1163, %f1162, %f1162;
|
|
mov.f32 %f1164, 0f3C4CAF63;
|
|
mov.f32 %f1165, 0f3B18F0FE;
|
|
fma.rn.f32 %f1166, %f1165, %f1163, %f1164;
|
|
mov.f32 %f1167, 0f3DAAAABD;
|
|
fma.rn.f32 %f1168, %f1166, %f1163, %f1167;
|
|
mul.rn.f32 %f1169, %f1168, %f1163;
|
|
mul.rn.f32 %f1170, %f1169, %f1162;
|
|
sub.f32 %f1171, %f1158, %f1162;
|
|
add.f32 %f1172, %f1171, %f1171;
|
|
neg.f32 %f1173, %f1162;
|
|
fma.rn.f32 %f1174, %f1173, %f1158, %f1172;
|
|
mul.rn.f32 %f1175, %f1160, %f1174;
|
|
add.f32 %f1176, %f1170, %f1162;
|
|
sub.f32 %f1177, %f1162, %f1176;
|
|
add.f32 %f1178, %f1170, %f1177;
|
|
add.f32 %f1179, %f1175, %f1178;
|
|
add.f32 %f1180, %f1176, %f1179;
|
|
sub.f32 %f1181, %f1176, %f1180;
|
|
add.f32 %f1182, %f1179, %f1181;
|
|
mov.f32 %f1183, 0f3F317200;
|
|
mul.rn.f32 %f1184, %f1156, %f1183;
|
|
mov.f32 %f1185, 0f35BFBE8E;
|
|
mul.rn.f32 %f1186, %f1156, %f1185;
|
|
add.f32 %f1187, %f1184, %f1180;
|
|
sub.f32 %f1188, %f1184, %f1187;
|
|
add.f32 %f1189, %f1180, %f1188;
|
|
add.f32 %f1190, %f1182, %f1189;
|
|
add.f32 %f1191, %f1186, %f1190;
|
|
add.f32 %f1192, %f1187, %f1191;
|
|
sub.f32 %f1193, %f1187, %f1192;
|
|
add.f32 %f1194, %f1191, %f1193;
|
|
mov.f32 %f1195, 0f3EE66666;
|
|
mul.rn.f32 %f1196, %f1195, %f1192;
|
|
neg.f32 %f1197, %f1196;
|
|
fma.rn.f32 %f1198, %f1195, %f1192, %f1197;
|
|
fma.rn.f32 %f1199, %f1195, %f1194, %f1198;
|
|
mov.f32 %f1200, 0f00000000;
|
|
fma.rn.f32 %f1201, %f1200, %f1192, %f1199;
|
|
add.rn.f32 %f1202, %f1196, %f1201;
|
|
neg.f32 %f1203, %f1202;
|
|
add.rn.f32 %f1204, %f1196, %f1203;
|
|
add.rn.f32 %f1205, %f1204, %f1201;
|
|
mov.b32 %r334, %f1202;
|
|
setp.eq.s32 %p112, %r334, 1118925336;
|
|
add.s32 %r335, %r334, -1;
|
|
mov.b32 %f1206, %r335;
|
|
add.f32 %f1207, %f1205, 0f37000000;
|
|
selp.f32 %f249, %f1207, %f1205, %p112;
|
|
selp.f32 %f1208, %f1206, %f1202, %p112;
|
|
mov.f32 %f1209, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1210, %f1208, %f1209;
|
|
cvt.rzi.f32.f32 %f1211, %f1210;
|
|
abs.f32 %f1212, %f1211;
|
|
setp.gt.f32 %p113, %f1212, 0f42FC0000;
|
|
mov.b32 %r336, %f1211;
|
|
and.b32 %r337, %r336, -2147483648;
|
|
or.b32 %r338, %r337, 1123811328;
|
|
mov.b32 %f1213, %r338;
|
|
selp.f32 %f1214, %f1213, %f1211, %p113;
|
|
mov.f32 %f1215, 0fBF317218;
|
|
fma.rn.f32 %f1216, %f1214, %f1215, %f1208;
|
|
mov.f32 %f1217, 0f3102E308;
|
|
fma.rn.f32 %f1218, %f1214, %f1217, %f1216;
|
|
mul.f32 %f1219, %f1218, 0f3FB8AA3B;
|
|
add.f32 %f1220, %f1214, 0f4B40007F;
|
|
mov.b32 %r339, %f1220;
|
|
shl.b32 %r340, %r339, 23;
|
|
mov.b32 %f1221, %r340;
|
|
ex2.approx.ftz.f32 %f1222, %f1219;
|
|
mul.f32 %f250, %f1222, %f1221;
|
|
setp.eq.f32 %p114, %f250, 0f7F800000;
|
|
mov.f32 %f1680, 0f7F800000;
|
|
@%p114 bra $L__BB0_94;
|
|
|
|
fma.rn.f32 %f1680, %f250, %f249, %f250;
|
|
|
|
$L__BB0_94:
|
|
setp.lt.f32 %p115, %f1647, 0f00000000;
|
|
and.pred %p6, %p115, %p86;
|
|
setp.eq.f32 %p117, %f1647, 0f00000000;
|
|
@%p117 bra $L__BB0_98;
|
|
bra.uni $L__BB0_95;
|
|
|
|
$L__BB0_98:
|
|
add.f32 %f1227, %f1647, %f1647;
|
|
selp.f32 %f1682, %f1227, 0f00000000, %p86;
|
|
bra.uni $L__BB0_99;
|
|
|
|
$L__BB0_95:
|
|
mov.b32 %r341, %f1680;
|
|
xor.b32 %r342, %r341, -2147483648;
|
|
mov.b32 %f1223, %r342;
|
|
selp.f32 %f1682, %f1223, %f1680, %p6;
|
|
setp.geu.f32 %p118, %f1647, 0f00000000;
|
|
@%p118 bra $L__BB0_99;
|
|
|
|
mov.f32 %f1224, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f1225, %f1224;
|
|
setp.eq.f32 %p119, %f1225, 0f3EE66666;
|
|
@%p119 bra $L__BB0_99;
|
|
|
|
mov.f32 %f1682, 0f7FFFFFFF;
|
|
|
|
$L__BB0_99:
|
|
add.f32 %f1228, %f248, 0f3EE66666;
|
|
mov.b32 %r343, %f1228;
|
|
setp.lt.s32 %p121, %r343, 2139095040;
|
|
@%p121 bra $L__BB0_104;
|
|
|
|
setp.gtu.f32 %p122, %f248, 0f7F800000;
|
|
@%p122 bra $L__BB0_103;
|
|
bra.uni $L__BB0_101;
|
|
|
|
$L__BB0_103:
|
|
add.f32 %f1682, %f1647, 0f3EE66666;
|
|
bra.uni $L__BB0_104;
|
|
|
|
$L__BB0_101:
|
|
setp.neu.f32 %p123, %f248, 0f7F800000;
|
|
@%p123 bra $L__BB0_104;
|
|
|
|
selp.f32 %f1682, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
$L__BB0_104:
|
|
setp.eq.f32 %p124, %f1647, 0f3F800000;
|
|
mov.f32 %f1230, 0f3F800000;
|
|
selp.f32 %f1231, 0f3F800000, %f1682, %p124;
|
|
ld.const.u64 %rd38, [params+144];
|
|
cvta.to.global.u64 %rd10, %rd38;
|
|
ld.const.u32 %r344, [params+136];
|
|
mad.lo.s32 %r345, %r344, %r4, %r3;
|
|
cvt.u64.u32 %rd11, %r345;
|
|
min.f32 %f1232, %f235, %f1230;
|
|
mov.f32 %f1233, 0f00000000;
|
|
max.f32 %f259, %f1233, %f1232;
|
|
min.f32 %f1234, %f247, %f1230;
|
|
max.f32 %f260, %f1233, %f1234;
|
|
min.f32 %f1235, %f1231, %f1230;
|
|
max.f32 %f261, %f1233, %f1235;
|
|
mov.f32 %f1236, 0f3E555555;
|
|
cvt.rzi.f32.f32 %f1237, %f1236;
|
|
add.f32 %f1238, %f1237, %f1237;
|
|
mov.f32 %f1239, 0f3ED55555;
|
|
sub.f32 %f1240, %f1239, %f1238;
|
|
abs.f32 %f262, %f1240;
|
|
abs.f32 %f263, %f259;
|
|
setp.lt.f32 %p125, %f263, 0f00800000;
|
|
mul.f32 %f1241, %f263, 0f4B800000;
|
|
selp.f32 %f1242, %f1241, %f263, %p125;
|
|
selp.f32 %f1243, 0fC3170000, 0fC2FE0000, %p125;
|
|
mov.b32 %r346, %f1242;
|
|
and.b32 %r347, %r346, 8388607;
|
|
or.b32 %r348, %r347, 1065353216;
|
|
mov.b32 %f1244, %r348;
|
|
shr.u32 %r349, %r346, 23;
|
|
cvt.rn.f32.u32 %f1245, %r349;
|
|
add.f32 %f1246, %f1243, %f1245;
|
|
setp.gt.f32 %p126, %f1244, 0f3FB504F3;
|
|
mul.f32 %f1247, %f1244, 0f3F000000;
|
|
add.f32 %f1248, %f1246, 0f3F800000;
|
|
selp.f32 %f1249, %f1248, %f1246, %p126;
|
|
selp.f32 %f1250, %f1247, %f1244, %p126;
|
|
add.f32 %f1251, %f1250, 0fBF800000;
|
|
add.f32 %f1252, %f1250, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1253, %f1252;
|
|
add.f32 %f1254, %f1251, %f1251;
|
|
mul.f32 %f1255, %f1254, %f1253;
|
|
mul.f32 %f1256, %f1255, %f1255;
|
|
mov.f32 %f1257, 0f3C4CAF63;
|
|
mov.f32 %f1258, 0f3B18F0FE;
|
|
fma.rn.f32 %f1259, %f1258, %f1256, %f1257;
|
|
mov.f32 %f1260, 0f3DAAAABD;
|
|
fma.rn.f32 %f1261, %f1259, %f1256, %f1260;
|
|
mul.rn.f32 %f1262, %f1261, %f1256;
|
|
mul.rn.f32 %f1263, %f1262, %f1255;
|
|
sub.f32 %f1264, %f1251, %f1255;
|
|
add.f32 %f1265, %f1264, %f1264;
|
|
neg.f32 %f1266, %f1255;
|
|
fma.rn.f32 %f1267, %f1266, %f1251, %f1265;
|
|
mul.rn.f32 %f1268, %f1253, %f1267;
|
|
add.f32 %f1269, %f1263, %f1255;
|
|
sub.f32 %f1270, %f1255, %f1269;
|
|
add.f32 %f1271, %f1263, %f1270;
|
|
add.f32 %f1272, %f1268, %f1271;
|
|
add.f32 %f1273, %f1269, %f1272;
|
|
sub.f32 %f1274, %f1269, %f1273;
|
|
add.f32 %f1275, %f1272, %f1274;
|
|
mov.f32 %f1276, 0f3F317200;
|
|
mul.rn.f32 %f1277, %f1249, %f1276;
|
|
mov.f32 %f1278, 0f35BFBE8E;
|
|
mul.rn.f32 %f1279, %f1249, %f1278;
|
|
add.f32 %f1280, %f1277, %f1273;
|
|
sub.f32 %f1281, %f1277, %f1280;
|
|
add.f32 %f1282, %f1273, %f1281;
|
|
add.f32 %f1283, %f1275, %f1282;
|
|
add.f32 %f1284, %f1279, %f1283;
|
|
add.f32 %f1285, %f1280, %f1284;
|
|
sub.f32 %f1286, %f1280, %f1285;
|
|
add.f32 %f1287, %f1284, %f1286;
|
|
mul.rn.f32 %f1288, %f1239, %f1285;
|
|
neg.f32 %f1289, %f1288;
|
|
fma.rn.f32 %f1290, %f1239, %f1285, %f1289;
|
|
fma.rn.f32 %f1291, %f1239, %f1287, %f1290;
|
|
fma.rn.f32 %f1292, %f1233, %f1285, %f1291;
|
|
add.rn.f32 %f1293, %f1288, %f1292;
|
|
neg.f32 %f1294, %f1293;
|
|
add.rn.f32 %f1295, %f1288, %f1294;
|
|
add.rn.f32 %f1296, %f1295, %f1292;
|
|
mov.b32 %r350, %f1293;
|
|
setp.eq.s32 %p127, %r350, 1118925336;
|
|
add.s32 %r351, %r350, -1;
|
|
mov.b32 %f1297, %r351;
|
|
add.f32 %f1298, %f1296, 0f37000000;
|
|
selp.f32 %f264, %f1298, %f1296, %p127;
|
|
selp.f32 %f1299, %f1297, %f1293, %p127;
|
|
mov.f32 %f1300, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1301, %f1299, %f1300;
|
|
cvt.rzi.f32.f32 %f1302, %f1301;
|
|
abs.f32 %f1303, %f1302;
|
|
setp.gt.f32 %p128, %f1303, 0f42FC0000;
|
|
mov.b32 %r352, %f1302;
|
|
and.b32 %r353, %r352, -2147483648;
|
|
or.b32 %r354, %r353, 1123811328;
|
|
mov.b32 %f1304, %r354;
|
|
selp.f32 %f1305, %f1304, %f1302, %p128;
|
|
mov.f32 %f1306, 0fBF317218;
|
|
fma.rn.f32 %f1307, %f1305, %f1306, %f1299;
|
|
mov.f32 %f1308, 0f3102E308;
|
|
fma.rn.f32 %f1309, %f1305, %f1308, %f1307;
|
|
mul.f32 %f1310, %f1309, 0f3FB8AA3B;
|
|
add.f32 %f1311, %f1305, 0f4B40007F;
|
|
mov.b32 %r355, %f1311;
|
|
shl.b32 %r356, %r355, 23;
|
|
mov.b32 %f1312, %r356;
|
|
ex2.approx.ftz.f32 %f1313, %f1310;
|
|
mul.f32 %f265, %f1313, %f1312;
|
|
setp.eq.f32 %p129, %f265, 0f7F800000;
|
|
mov.f32 %f1683, 0f7F800000;
|
|
@%p129 bra $L__BB0_106;
|
|
|
|
fma.rn.f32 %f1683, %f265, %f264, %f265;
|
|
|
|
$L__BB0_106:
|
|
setp.lt.f32 %p130, %f259, 0f00000000;
|
|
setp.eq.f32 %p131, %f262, 0f3F800000;
|
|
and.pred %p7, %p130, %p131;
|
|
setp.eq.f32 %p132, %f259, 0f00000000;
|
|
@%p132 bra $L__BB0_110;
|
|
bra.uni $L__BB0_107;
|
|
|
|
$L__BB0_110:
|
|
add.f32 %f1318, %f259, %f259;
|
|
selp.f32 %f1685, %f1318, 0f00000000, %p131;
|
|
bra.uni $L__BB0_111;
|
|
|
|
$L__BB0_107:
|
|
mov.b32 %r357, %f1683;
|
|
xor.b32 %r358, %r357, -2147483648;
|
|
mov.b32 %f1314, %r358;
|
|
selp.f32 %f1685, %f1314, %f1683, %p7;
|
|
setp.geu.f32 %p133, %f259, 0f00000000;
|
|
@%p133 bra $L__BB0_111;
|
|
|
|
mov.f32 %f1315, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1316, %f1315;
|
|
setp.eq.f32 %p134, %f1316, 0f3ED55555;
|
|
@%p134 bra $L__BB0_111;
|
|
|
|
mov.f32 %f1685, 0f7FFFFFFF;
|
|
|
|
$L__BB0_111:
|
|
add.f32 %f1319, %f263, 0f3ED55555;
|
|
mov.b32 %r359, %f1319;
|
|
setp.lt.s32 %p136, %r359, 2139095040;
|
|
@%p136 bra $L__BB0_116;
|
|
|
|
setp.gtu.f32 %p137, %f263, 0f7F800000;
|
|
@%p137 bra $L__BB0_115;
|
|
bra.uni $L__BB0_113;
|
|
|
|
$L__BB0_115:
|
|
add.f32 %f1685, %f259, 0f3ED55555;
|
|
bra.uni $L__BB0_116;
|
|
|
|
$L__BB0_113:
|
|
setp.neu.f32 %p138, %f263, 0f7F800000;
|
|
@%p138 bra $L__BB0_116;
|
|
|
|
selp.f32 %f1685, 0fFF800000, 0f7F800000, %p7;
|
|
|
|
$L__BB0_116:
|
|
abs.f32 %f274, %f260;
|
|
setp.lt.f32 %p139, %f274, 0f00800000;
|
|
mul.f32 %f1321, %f274, 0f4B800000;
|
|
selp.f32 %f1322, %f1321, %f274, %p139;
|
|
selp.f32 %f1323, 0fC3170000, 0fC2FE0000, %p139;
|
|
mov.b32 %r360, %f1322;
|
|
and.b32 %r361, %r360, 8388607;
|
|
or.b32 %r362, %r361, 1065353216;
|
|
mov.b32 %f1324, %r362;
|
|
shr.u32 %r363, %r360, 23;
|
|
cvt.rn.f32.u32 %f1325, %r363;
|
|
add.f32 %f1326, %f1323, %f1325;
|
|
setp.gt.f32 %p140, %f1324, 0f3FB504F3;
|
|
mul.f32 %f1327, %f1324, 0f3F000000;
|
|
add.f32 %f1328, %f1326, 0f3F800000;
|
|
selp.f32 %f1329, %f1328, %f1326, %p140;
|
|
selp.f32 %f1330, %f1327, %f1324, %p140;
|
|
add.f32 %f1331, %f1330, 0fBF800000;
|
|
add.f32 %f1332, %f1330, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1333, %f1332;
|
|
add.f32 %f1334, %f1331, %f1331;
|
|
mul.f32 %f1335, %f1334, %f1333;
|
|
mul.f32 %f1336, %f1335, %f1335;
|
|
mov.f32 %f1337, 0f3C4CAF63;
|
|
mov.f32 %f1338, 0f3B18F0FE;
|
|
fma.rn.f32 %f1339, %f1338, %f1336, %f1337;
|
|
mov.f32 %f1340, 0f3DAAAABD;
|
|
fma.rn.f32 %f1341, %f1339, %f1336, %f1340;
|
|
mul.rn.f32 %f1342, %f1341, %f1336;
|
|
mul.rn.f32 %f1343, %f1342, %f1335;
|
|
sub.f32 %f1344, %f1331, %f1335;
|
|
add.f32 %f1345, %f1344, %f1344;
|
|
neg.f32 %f1346, %f1335;
|
|
fma.rn.f32 %f1347, %f1346, %f1331, %f1345;
|
|
mul.rn.f32 %f1348, %f1333, %f1347;
|
|
add.f32 %f1349, %f1343, %f1335;
|
|
sub.f32 %f1350, %f1335, %f1349;
|
|
add.f32 %f1351, %f1343, %f1350;
|
|
add.f32 %f1352, %f1348, %f1351;
|
|
add.f32 %f1353, %f1349, %f1352;
|
|
sub.f32 %f1354, %f1349, %f1353;
|
|
add.f32 %f1355, %f1352, %f1354;
|
|
mov.f32 %f1356, 0f3F317200;
|
|
mul.rn.f32 %f1357, %f1329, %f1356;
|
|
mov.f32 %f1358, 0f35BFBE8E;
|
|
mul.rn.f32 %f1359, %f1329, %f1358;
|
|
add.f32 %f1360, %f1357, %f1353;
|
|
sub.f32 %f1361, %f1357, %f1360;
|
|
add.f32 %f1362, %f1353, %f1361;
|
|
add.f32 %f1363, %f1355, %f1362;
|
|
add.f32 %f1364, %f1359, %f1363;
|
|
add.f32 %f1365, %f1360, %f1364;
|
|
sub.f32 %f1366, %f1360, %f1365;
|
|
add.f32 %f1367, %f1364, %f1366;
|
|
mov.f32 %f1368, 0f3ED55555;
|
|
mul.rn.f32 %f1369, %f1368, %f1365;
|
|
neg.f32 %f1370, %f1369;
|
|
fma.rn.f32 %f1371, %f1368, %f1365, %f1370;
|
|
fma.rn.f32 %f1372, %f1368, %f1367, %f1371;
|
|
mov.f32 %f1373, 0f00000000;
|
|
fma.rn.f32 %f1374, %f1373, %f1365, %f1372;
|
|
add.rn.f32 %f1375, %f1369, %f1374;
|
|
neg.f32 %f1376, %f1375;
|
|
add.rn.f32 %f1377, %f1369, %f1376;
|
|
add.rn.f32 %f1378, %f1377, %f1374;
|
|
mov.b32 %r364, %f1375;
|
|
setp.eq.s32 %p141, %r364, 1118925336;
|
|
add.s32 %r365, %r364, -1;
|
|
mov.b32 %f1379, %r365;
|
|
add.f32 %f1380, %f1378, 0f37000000;
|
|
selp.f32 %f275, %f1380, %f1378, %p141;
|
|
selp.f32 %f1381, %f1379, %f1375, %p141;
|
|
mov.f32 %f1382, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1383, %f1381, %f1382;
|
|
cvt.rzi.f32.f32 %f1384, %f1383;
|
|
abs.f32 %f1385, %f1384;
|
|
setp.gt.f32 %p142, %f1385, 0f42FC0000;
|
|
mov.b32 %r366, %f1384;
|
|
and.b32 %r367, %r366, -2147483648;
|
|
or.b32 %r368, %r367, 1123811328;
|
|
mov.b32 %f1386, %r368;
|
|
selp.f32 %f1387, %f1386, %f1384, %p142;
|
|
mov.f32 %f1388, 0fBF317218;
|
|
fma.rn.f32 %f1389, %f1387, %f1388, %f1381;
|
|
mov.f32 %f1390, 0f3102E308;
|
|
fma.rn.f32 %f1391, %f1387, %f1390, %f1389;
|
|
mul.f32 %f1392, %f1391, 0f3FB8AA3B;
|
|
add.f32 %f1393, %f1387, 0f4B40007F;
|
|
mov.b32 %r369, %f1393;
|
|
shl.b32 %r370, %r369, 23;
|
|
mov.b32 %f1394, %r370;
|
|
ex2.approx.ftz.f32 %f1395, %f1392;
|
|
mul.f32 %f276, %f1395, %f1394;
|
|
setp.eq.f32 %p143, %f276, 0f7F800000;
|
|
mov.f32 %f1686, 0f7F800000;
|
|
@%p143 bra $L__BB0_118;
|
|
|
|
fma.rn.f32 %f1686, %f276, %f275, %f276;
|
|
|
|
$L__BB0_118:
|
|
setp.lt.f32 %p144, %f260, 0f00000000;
|
|
and.pred %p8, %p144, %p131;
|
|
setp.eq.f32 %p146, %f260, 0f00000000;
|
|
@%p146 bra $L__BB0_122;
|
|
bra.uni $L__BB0_119;
|
|
|
|
$L__BB0_122:
|
|
add.f32 %f1400, %f260, %f260;
|
|
selp.f32 %f1688, %f1400, 0f00000000, %p131;
|
|
bra.uni $L__BB0_123;
|
|
|
|
$L__BB0_119:
|
|
mov.b32 %r371, %f1686;
|
|
xor.b32 %r372, %r371, -2147483648;
|
|
mov.b32 %f1396, %r372;
|
|
selp.f32 %f1688, %f1396, %f1686, %p8;
|
|
setp.geu.f32 %p147, %f260, 0f00000000;
|
|
@%p147 bra $L__BB0_123;
|
|
|
|
mov.f32 %f1397, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1398, %f1397;
|
|
setp.eq.f32 %p148, %f1398, 0f3ED55555;
|
|
@%p148 bra $L__BB0_123;
|
|
|
|
mov.f32 %f1688, 0f7FFFFFFF;
|
|
|
|
$L__BB0_123:
|
|
add.f32 %f1401, %f274, 0f3ED55555;
|
|
mov.b32 %r373, %f1401;
|
|
setp.lt.s32 %p150, %r373, 2139095040;
|
|
@%p150 bra $L__BB0_128;
|
|
|
|
setp.gtu.f32 %p151, %f274, 0f7F800000;
|
|
@%p151 bra $L__BB0_127;
|
|
bra.uni $L__BB0_125;
|
|
|
|
$L__BB0_127:
|
|
add.f32 %f1688, %f260, 0f3ED55555;
|
|
bra.uni $L__BB0_128;
|
|
|
|
$L__BB0_125:
|
|
setp.neu.f32 %p152, %f274, 0f7F800000;
|
|
@%p152 bra $L__BB0_128;
|
|
|
|
selp.f32 %f1688, 0fFF800000, 0f7F800000, %p8;
|
|
|
|
$L__BB0_128:
|
|
abs.f32 %f285, %f261;
|
|
setp.lt.f32 %p153, %f285, 0f00800000;
|
|
mul.f32 %f1403, %f285, 0f4B800000;
|
|
selp.f32 %f1404, %f1403, %f285, %p153;
|
|
selp.f32 %f1405, 0fC3170000, 0fC2FE0000, %p153;
|
|
mov.b32 %r374, %f1404;
|
|
and.b32 %r375, %r374, 8388607;
|
|
or.b32 %r376, %r375, 1065353216;
|
|
mov.b32 %f1406, %r376;
|
|
shr.u32 %r377, %r374, 23;
|
|
cvt.rn.f32.u32 %f1407, %r377;
|
|
add.f32 %f1408, %f1405, %f1407;
|
|
setp.gt.f32 %p154, %f1406, 0f3FB504F3;
|
|
mul.f32 %f1409, %f1406, 0f3F000000;
|
|
add.f32 %f1410, %f1408, 0f3F800000;
|
|
selp.f32 %f1411, %f1410, %f1408, %p154;
|
|
selp.f32 %f1412, %f1409, %f1406, %p154;
|
|
add.f32 %f1413, %f1412, 0fBF800000;
|
|
add.f32 %f1414, %f1412, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1415, %f1414;
|
|
add.f32 %f1416, %f1413, %f1413;
|
|
mul.f32 %f1417, %f1416, %f1415;
|
|
mul.f32 %f1418, %f1417, %f1417;
|
|
mov.f32 %f1419, 0f3C4CAF63;
|
|
mov.f32 %f1420, 0f3B18F0FE;
|
|
fma.rn.f32 %f1421, %f1420, %f1418, %f1419;
|
|
mov.f32 %f1422, 0f3DAAAABD;
|
|
fma.rn.f32 %f1423, %f1421, %f1418, %f1422;
|
|
mul.rn.f32 %f1424, %f1423, %f1418;
|
|
mul.rn.f32 %f1425, %f1424, %f1417;
|
|
sub.f32 %f1426, %f1413, %f1417;
|
|
add.f32 %f1427, %f1426, %f1426;
|
|
neg.f32 %f1428, %f1417;
|
|
fma.rn.f32 %f1429, %f1428, %f1413, %f1427;
|
|
mul.rn.f32 %f1430, %f1415, %f1429;
|
|
add.f32 %f1431, %f1425, %f1417;
|
|
sub.f32 %f1432, %f1417, %f1431;
|
|
add.f32 %f1433, %f1425, %f1432;
|
|
add.f32 %f1434, %f1430, %f1433;
|
|
add.f32 %f1435, %f1431, %f1434;
|
|
sub.f32 %f1436, %f1431, %f1435;
|
|
add.f32 %f1437, %f1434, %f1436;
|
|
mov.f32 %f1438, 0f3F317200;
|
|
mul.rn.f32 %f1439, %f1411, %f1438;
|
|
mov.f32 %f1440, 0f35BFBE8E;
|
|
mul.rn.f32 %f1441, %f1411, %f1440;
|
|
add.f32 %f1442, %f1439, %f1435;
|
|
sub.f32 %f1443, %f1439, %f1442;
|
|
add.f32 %f1444, %f1435, %f1443;
|
|
add.f32 %f1445, %f1437, %f1444;
|
|
add.f32 %f1446, %f1441, %f1445;
|
|
add.f32 %f1447, %f1442, %f1446;
|
|
sub.f32 %f1448, %f1442, %f1447;
|
|
add.f32 %f1449, %f1446, %f1448;
|
|
mov.f32 %f1450, 0f3ED55555;
|
|
mul.rn.f32 %f1451, %f1450, %f1447;
|
|
neg.f32 %f1452, %f1451;
|
|
fma.rn.f32 %f1453, %f1450, %f1447, %f1452;
|
|
fma.rn.f32 %f1454, %f1450, %f1449, %f1453;
|
|
mov.f32 %f1455, 0f00000000;
|
|
fma.rn.f32 %f1456, %f1455, %f1447, %f1454;
|
|
add.rn.f32 %f1457, %f1451, %f1456;
|
|
neg.f32 %f1458, %f1457;
|
|
add.rn.f32 %f1459, %f1451, %f1458;
|
|
add.rn.f32 %f1460, %f1459, %f1456;
|
|
mov.b32 %r378, %f1457;
|
|
setp.eq.s32 %p155, %r378, 1118925336;
|
|
add.s32 %r379, %r378, -1;
|
|
mov.b32 %f1461, %r379;
|
|
add.f32 %f1462, %f1460, 0f37000000;
|
|
selp.f32 %f286, %f1462, %f1460, %p155;
|
|
selp.f32 %f1463, %f1461, %f1457, %p155;
|
|
mov.f32 %f1464, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1465, %f1463, %f1464;
|
|
cvt.rzi.f32.f32 %f1466, %f1465;
|
|
abs.f32 %f1467, %f1466;
|
|
setp.gt.f32 %p156, %f1467, 0f42FC0000;
|
|
mov.b32 %r380, %f1466;
|
|
and.b32 %r381, %r380, -2147483648;
|
|
or.b32 %r382, %r381, 1123811328;
|
|
mov.b32 %f1468, %r382;
|
|
selp.f32 %f1469, %f1468, %f1466, %p156;
|
|
mov.f32 %f1470, 0fBF317218;
|
|
fma.rn.f32 %f1471, %f1469, %f1470, %f1463;
|
|
mov.f32 %f1472, 0f3102E308;
|
|
fma.rn.f32 %f1473, %f1469, %f1472, %f1471;
|
|
mul.f32 %f1474, %f1473, 0f3FB8AA3B;
|
|
add.f32 %f1475, %f1469, 0f4B40007F;
|
|
mov.b32 %r383, %f1475;
|
|
shl.b32 %r384, %r383, 23;
|
|
mov.b32 %f1476, %r384;
|
|
ex2.approx.ftz.f32 %f1477, %f1474;
|
|
mul.f32 %f287, %f1477, %f1476;
|
|
setp.eq.f32 %p157, %f287, 0f7F800000;
|
|
mov.f32 %f1689, 0f7F800000;
|
|
@%p157 bra $L__BB0_130;
|
|
|
|
fma.rn.f32 %f1689, %f287, %f286, %f287;
|
|
|
|
$L__BB0_130:
|
|
setp.lt.f32 %p158, %f261, 0f00000000;
|
|
and.pred %p9, %p158, %p131;
|
|
setp.eq.f32 %p160, %f261, 0f00000000;
|
|
@%p160 bra $L__BB0_134;
|
|
bra.uni $L__BB0_131;
|
|
|
|
$L__BB0_134:
|
|
add.f32 %f1482, %f261, %f261;
|
|
selp.f32 %f1691, %f1482, 0f00000000, %p131;
|
|
bra.uni $L__BB0_135;
|
|
|
|
$L__BB0_131:
|
|
mov.b32 %r385, %f1689;
|
|
xor.b32 %r386, %r385, -2147483648;
|
|
mov.b32 %f1478, %r386;
|
|
selp.f32 %f1691, %f1478, %f1689, %p9;
|
|
setp.geu.f32 %p161, %f261, 0f00000000;
|
|
@%p161 bra $L__BB0_135;
|
|
|
|
mov.f32 %f1479, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1480, %f1479;
|
|
setp.eq.f32 %p162, %f1480, 0f3ED55555;
|
|
@%p162 bra $L__BB0_135;
|
|
|
|
mov.f32 %f1691, 0f7FFFFFFF;
|
|
|
|
$L__BB0_135:
|
|
add.f32 %f1483, %f285, 0f3ED55555;
|
|
mov.b32 %r387, %f1483;
|
|
setp.lt.s32 %p164, %r387, 2139095040;
|
|
@%p164 bra $L__BB0_140;
|
|
|
|
setp.gtu.f32 %p165, %f285, 0f7F800000;
|
|
@%p165 bra $L__BB0_139;
|
|
bra.uni $L__BB0_137;
|
|
|
|
$L__BB0_139:
|
|
add.f32 %f1691, %f261, 0f3ED55555;
|
|
bra.uni $L__BB0_140;
|
|
|
|
$L__BB0_137:
|
|
setp.neu.f32 %p166, %f285, 0f7F800000;
|
|
@%p166 bra $L__BB0_140;
|
|
|
|
selp.f32 %f1691, 0fFF800000, 0f7F800000, %p9;
|
|
|
|
$L__BB0_140:
|
|
fma.rn.f32 %f1484, %f1685, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p167, %f259, 0f3F800000;
|
|
mov.f32 %f1485, 0f3F800000;
|
|
selp.f32 %f1486, 0f3F7FFFFF, %f1484, %p167;
|
|
mul.f32 %f1487, %f259, 0f414EB852;
|
|
setp.lt.f32 %p168, %f259, 0f3B4D2E1C;
|
|
selp.f32 %f1488, %f1487, %f1486, %p168;
|
|
fma.rn.f32 %f1489, %f1688, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p169, %f260, 0f3F800000;
|
|
selp.f32 %f1490, 0f3F7FFFFF, %f1489, %p169;
|
|
mul.f32 %f1491, %f260, 0f414EB852;
|
|
setp.lt.f32 %p170, %f260, 0f3B4D2E1C;
|
|
selp.f32 %f1492, %f1491, %f1490, %p170;
|
|
fma.rn.f32 %f1493, %f1691, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p171, %f261, 0f3F800000;
|
|
selp.f32 %f1494, 0f3F7FFFFF, %f1493, %p171;
|
|
mul.f32 %f1495, %f261, 0f414EB852;
|
|
setp.lt.f32 %p172, %f261, 0f3B4D2E1C;
|
|
selp.f32 %f1496, %f1495, %f1494, %p172;
|
|
min.f32 %f1497, %f1488, %f1485;
|
|
mov.f32 %f1498, 0f00000000;
|
|
max.f32 %f1499, %f1498, %f1497;
|
|
mul.f32 %f1500, %f1499, 0f43800000;
|
|
cvt.rzi.u32.f32 %r388, %f1500;
|
|
min.u32 %r389, %r388, 255;
|
|
min.f32 %f1501, %f1492, %f1485;
|
|
max.f32 %f1502, %f1498, %f1501;
|
|
mul.f32 %f1503, %f1502, 0f43800000;
|
|
cvt.rzi.u32.f32 %r390, %f1503;
|
|
min.u32 %r391, %r390, 255;
|
|
min.f32 %f1504, %f1496, %f1485;
|
|
max.f32 %f1505, %f1498, %f1504;
|
|
mul.f32 %f1506, %f1505, 0f43800000;
|
|
cvt.rzi.u32.f32 %r392, %f1506;
|
|
min.u32 %r393, %r392, 255;
|
|
shl.b64 %rd39, %rd11, 2;
|
|
add.s64 %rd40, %rd10, %rd39;
|
|
cvt.u16.u32 %rs49, %r393;
|
|
cvt.u16.u32 %rs50, %r391;
|
|
cvt.u16.u32 %rs51, %r389;
|
|
mov.u16 %rs52, 255;
|
|
st.global.v4.u8 [%rd40], {%rs51, %rs50, %rs49, %rs52};
|
|
|
|
$L__BB0_141:
|
|
and.b32 %r394, %r425, 4;
|
|
setp.eq.s32 %p173, %r394, 0;
|
|
ld.const.u32 %r426, [params+108];
|
|
@%p173 bra $L__BB0_145;
|
|
|
|
setp.eq.s32 %p174, %r426, 0;
|
|
ld.const.u64 %rd41, [params+224];
|
|
cvta.to.global.u64 %rd42, %rd41;
|
|
ld.const.u32 %r395, [params+216];
|
|
mad.lo.s32 %r396, %r395, %r4, %r3;
|
|
mul.wide.u32 %rd43, %r396, 8;
|
|
add.s64 %rd12, %rd42, %rd43;
|
|
@%p174 bra $L__BB0_144;
|
|
|
|
ld.global.v4.u16 {%rs60, %rs61, %rs62, %rs63}, [%rd12];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1507, %rs60;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1508, %rs61;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1509, %rs62;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1510, %f1645, %f1507;
|
|
add.f32 %f1511, %f1646, %f1508;
|
|
add.f32 %f1512, %f1647, %f1509;
|
|
mov.f32 %f1513, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs58, %f1512;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs57, %f1511;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs56, %f1510;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs59, %f1513;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd12], {%rs56, %rs57, %rs58, %rs59};
|
|
bra.uni $L__BB0_145;
|
|
|
|
$L__BB0_144:
|
|
mov.f32 %f1517, 0f3F800000;
|
|
mov.u32 %r426, 0;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs67, %f1517;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs66, %f1647;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs65, %f1646;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs64, %f1645;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd12], {%rs64, %rs65, %rs66, %rs67};
|
|
|
|
$L__BB0_145:
|
|
ld.const.u64 %rd44, [params+256];
|
|
cvta.to.global.u64 %rd45, %rd44;
|
|
ld.const.u32 %r398, [params+248];
|
|
mad.lo.s32 %r399, %r398, %r4, %r3;
|
|
mul.wide.u32 %rd46, %r399, 8;
|
|
add.s64 %rd13, %rd45, %rd46;
|
|
setp.eq.s32 %p175, %r426, 0;
|
|
@%p175 bra $L__BB0_147;
|
|
|
|
ld.global.v4.u16 {%rs75, %rs76, %rs77, %rs78}, [%rd13];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1518, %rs75;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1519, %rs76;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1520, %rs77;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1521, %f1648, %f1518;
|
|
add.f32 %f1522, %f1649, %f1519;
|
|
add.f32 %f1523, %f1650, %f1520;
|
|
mov.f32 %f1524, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs73, %f1523;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs72, %f1522;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs71, %f1521;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs74, %f1524;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd13], {%rs71, %rs72, %rs73, %rs74};
|
|
bra.uni $L__BB0_148;
|
|
|
|
$L__BB0_147:
|
|
mov.f32 %f1528, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs82, %f1528;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs81, %f1650;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs80, %f1649;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs79, %f1648;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd13], {%rs79, %rs80, %rs81, %rs82};
|
|
|
|
$L__BB0_148:
|
|
ld.const.u64 %rd47, [params+272];
|
|
cvta.to.global.u64 %rd48, %rd47;
|
|
ld.const.u32 %r400, [params+264];
|
|
mad.lo.s32 %r401, %r400, %r4, %r3;
|
|
mul.wide.u32 %rd49, %r401, 8;
|
|
add.s64 %rd14, %rd48, %rd49;
|
|
@%p175 bra $L__BB0_150;
|
|
|
|
ld.global.v4.u16 {%rs90, %rs91, %rs92, %rs93}, [%rd14];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1529, %rs90;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1530, %rs91;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1531, %rs92;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1532, %f1651, %f1529;
|
|
add.f32 %f1533, %f1652, %f1530;
|
|
add.f32 %f1534, %f1653, %f1531;
|
|
mov.f32 %f1535, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs88, %f1534;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs87, %f1533;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs86, %f1532;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs89, %f1535;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd14], {%rs86, %rs87, %rs88, %rs89};
|
|
bra.uni $L__BB0_151;
|
|
|
|
$L__BB0_150:
|
|
mov.f32 %f1539, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs97, %f1539;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs96, %f1653;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs95, %f1652;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs94, %f1651;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd14], {%rs94, %rs95, %rs96, %rs97};
|
|
|
|
$L__BB0_151:
|
|
ld.const.u64 %rd50, [params+288];
|
|
cvta.to.global.u64 %rd51, %rd50;
|
|
ld.const.u32 %r402, [params+280];
|
|
mad.lo.s32 %r403, %r402, %r4, %r3;
|
|
mul.wide.u32 %rd52, %r403, 8;
|
|
add.s64 %rd15, %rd51, %rd52;
|
|
@%p175 bra $L__BB0_153;
|
|
|
|
ld.global.v4.u16 {%rs105, %rs106, %rs107, %rs108}, [%rd15];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1540, %rs105;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1541, %rs106;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1542, %rs107;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1543, %f1654, %f1540;
|
|
add.f32 %f1544, %f1655, %f1541;
|
|
add.f32 %f1545, %f1656, %f1542;
|
|
mov.f32 %f1546, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs103, %f1545;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs102, %f1544;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs101, %f1543;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs104, %f1546;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd15], {%rs101, %rs102, %rs103, %rs104};
|
|
bra.uni $L__BB0_171;
|
|
|
|
$L__BB0_153:
|
|
mov.f32 %f1550, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs112, %f1550;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs111, %f1656;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs110, %f1655;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs109, %f1654;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd15], {%rs109, %rs110, %rs111, %rs112};
|
|
|
|
$L__BB0_171:
|
|
ret;
|
|
|
|
}
|
|
|