2686 lines
76 KiB
Plaintext
2686 lines
76 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-31968024
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// Cuda compilation tools, release 12.0, V12.0.76
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// Based on NVVM 7.0.1
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//
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.version 8.0
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.target sm_52
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.address_size 64
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// .globl __raygen__oxMain
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.const .align 16 .b8 params[1184];
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.visible .entry __raygen__oxMain()
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{
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.reg .pred %p<189>;
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.reg .b16 %rs<183>;
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.reg .f32 %f<1740>;
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.reg .b32 %r<428>;
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.reg .b64 %rd<74>;
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// begin inline asm
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call (%r26), _optix_get_launch_index_x, ();
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// end inline asm
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// begin inline asm
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call (%r27), _optix_get_launch_index_y, ();
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// end inline asm
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ld.const.u64 %rd20, [params+400];
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cvta.to.global.u64 %rd21, %rd20;
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ld.const.u32 %r32, [params+392];
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mad.lo.s32 %r33, %r32, %r27, %r26;
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mul.wide.u32 %rd22, %r33, 4;
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add.s64 %rd1, %rd21, %rd22;
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ld.global.v2.u8 {%rs18, %rs177}, [%rd1];
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or.b16 %rs20, %rs18, %rs177;
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and.b16 %rs21, %rs20, 255;
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setp.eq.s16 %p10, %rs21, 0;
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@%p10 bra $L__BB0_2;
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ld.global.u8 %rs176, [%rd1+2];
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bra.uni $L__BB0_3;
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$L__BB0_2:
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ld.global.u8 %rs176, [%rd1+2];
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setp.eq.s16 %p11, %rs176, 0;
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mov.f32 %f1629, 0f00000000;
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mov.u16 %rs177, 0;
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mov.f32 %f1630, %f1629;
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mov.f32 %f1631, %f1629;
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@%p11 bra $L__BB0_4;
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$L__BB0_3:
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cvt.rn.f32.u16 %f317, %rs18;
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div.rn.f32 %f318, %f317, 0f437F0000;
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fma.rn.f32 %f319, %f318, 0f40000000, 0fBF800000;
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and.b16 %rs24, %rs177, 255;
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cvt.rn.f32.u16 %f320, %rs24;
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div.rn.f32 %f321, %f320, 0f437F0000;
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fma.rn.f32 %f322, %f321, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f323, %rs176;
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div.rn.f32 %f324, %f323, 0f437F0000;
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fma.rn.f32 %f325, %f324, 0f40000000, 0fBF800000;
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mul.f32 %f326, %f322, %f322;
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fma.rn.f32 %f327, %f319, %f319, %f326;
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fma.rn.f32 %f328, %f325, %f325, %f327;
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sqrt.rn.f32 %f329, %f328;
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rcp.rn.f32 %f330, %f329;
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mul.f32 %f1631, %f330, %f325;
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mul.f32 %f1630, %f330, %f322;
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mul.f32 %f1629, %f319, %f330;
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$L__BB0_4:
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ld.const.v2.u32 {%r34, %r35}, [params];
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add.s32 %r3, %r34, %r26;
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add.s32 %r4, %r35, %r27;
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setp.eq.f32 %p12, %f1629, 0f00000000;
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setp.eq.f32 %p13, %f1630, 0f00000000;
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and.pred %p14, %p12, %p13;
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setp.eq.f32 %p15, %f1631, 0f00000000;
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and.pred %p16, %p15, %p14;
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@%p16 bra $L__BB0_154;
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bra.uni $L__BB0_5;
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$L__BB0_154:
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ld.const.u32 %r23, [params+104];
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and.b32 %r404, %r23, 1;
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setp.eq.b32 %p178, %r404, 1;
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mov.pred %p179, 0;
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xor.pred %p180, %p178, %p179;
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not.pred %p181, %p180;
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@%p181 bra $L__BB0_156;
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ld.const.u64 %rd53, [params+144];
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cvta.to.global.u64 %rd54, %rd53;
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ld.const.u32 %r405, [params+136];
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mad.lo.s32 %r406, %r405, %r4, %r3;
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mul.wide.u32 %rd55, %r406, 4;
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add.s64 %rd56, %rd54, %rd55;
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mov.u16 %rs113, 0;
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st.global.v4.u8 [%rd56], {%rs113, %rs113, %rs113, %rs113};
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$L__BB0_156:
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and.b32 %r407, %r23, 8;
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setp.eq.s32 %p182, %r407, 0;
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@%p182 bra $L__BB0_158;
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ld.const.u64 %rd57, [params+192];
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cvta.to.global.u64 %rd58, %rd57;
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ld.const.u32 %r408, [params+184];
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mad.lo.s32 %r409, %r408, %r4, %r3;
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mov.f32 %f1589, 0f00000000;
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cvt.rzi.u32.f32 %r410, %f1589;
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mul.wide.u32 %rd59, %r409, 2;
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add.s64 %rd60, %rd58, %rd59;
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mov.u16 %rs114, 0;
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cvt.u16.u32 %rs115, %r410;
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st.global.v2.u8 [%rd60], {%rs115, %rs114};
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$L__BB0_158:
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and.b32 %r411, %r23, 4;
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setp.eq.s32 %p183, %r411, 0;
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ld.const.u32 %r427, [params+108];
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@%p183 bra $L__BB0_162;
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setp.eq.s32 %p184, %r427, 0;
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ld.const.u64 %rd61, [params+224];
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cvta.to.global.u64 %rd62, %rd61;
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ld.const.u32 %r412, [params+216];
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mad.lo.s32 %r413, %r412, %r4, %r3;
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mul.wide.u32 %rd63, %r413, 8;
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add.s64 %rd16, %rd62, %rd63;
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@%p184 bra $L__BB0_161;
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ld.global.v4.u16 {%rs122, %rs123, %rs124, %rs125}, [%rd16];
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// begin inline asm
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{ cvt.f32.f16 %f1590, %rs122;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f1591, %rs123;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f1592, %rs124;}
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// end inline asm
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add.f32 %f1593, %f1590, 0f00000000;
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add.f32 %f1594, %f1591, 0f00000000;
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add.f32 %f1595, %f1592, 0f00000000;
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// begin inline asm
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{ cvt.rn.f16.f32 %rs121, %f1595;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs120, %f1594;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs119, %f1593;}
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// end inline asm
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mov.u16 %rs126, 0;
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st.global.v4.u16 [%rd16], {%rs119, %rs120, %rs121, %rs126};
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bra.uni $L__BB0_162;
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$L__BB0_5:
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ld.const.u64 %rd23, [params+432];
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cvta.to.global.u64 %rd24, %rd23;
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ld.const.u32 %r38, [params+424];
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mad.lo.s32 %r39, %r38, %r27, %r26;
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mul.wide.u32 %rd25, %r39, 12;
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add.s64 %rd26, %rd24, %rd25;
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ld.global.f32 %f10, [%rd26];
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mul.f32 %f331, %f10, 0f3456BF95;
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ld.global.f32 %f11, [%rd26+4];
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mul.f32 %f332, %f11, 0f3456BF95;
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ld.global.f32 %f12, [%rd26+8];
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mul.f32 %f333, %f12, 0f3456BF95;
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abs.f32 %f334, %f1629;
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div.rn.f32 %f335, %f331, %f334;
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abs.f32 %f336, %f1630;
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div.rn.f32 %f337, %f332, %f336;
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abs.f32 %f338, %f1631;
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div.rn.f32 %f339, %f333, %f338;
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abs.f32 %f340, %f335;
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abs.f32 %f341, %f337;
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abs.f32 %f342, %f339;
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mov.f32 %f343, 0f38D1B717;
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max.f32 %f344, %f340, %f343;
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max.f32 %f345, %f341, %f343;
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max.f32 %f346, %f342, %f343;
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fma.rn.f32 %f13, %f1629, %f344, %f10;
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fma.rn.f32 %f14, %f1630, %f345, %f11;
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fma.rn.f32 %f15, %f1631, %f346, %f12;
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cvt.rn.f32.u32 %f16, %r26;
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cvt.rn.f32.u32 %f17, %r27;
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ld.const.u64 %rd27, [params+464];
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cvta.to.global.u64 %rd28, %rd27;
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ld.const.u32 %r40, [params+456];
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mad.lo.s32 %r41, %r40, %r27, %r26;
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mul.wide.u32 %rd29, %r41, 4;
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add.s64 %rd2, %rd28, %rd29;
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ld.global.v2.u8 {%rs26, %rs180}, [%rd2];
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or.b16 %rs28, %rs26, %rs180;
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and.b16 %rs29, %rs28, 255;
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setp.eq.s16 %p17, %rs29, 0;
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@%p17 bra $L__BB0_7;
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ld.global.u8 %rs178, [%rd2+2];
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bra.uni $L__BB0_8;
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$L__BB0_7:
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ld.global.u8 %rs178, [%rd2+2];
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setp.eq.s16 %p18, %rs178, 0;
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mov.f32 %f1632, 0f00000000;
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mov.u16 %rs180, 0;
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mov.u16 %rs181, %rs180;
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mov.f32 %f1633, %f1632;
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mov.f32 %f1634, %f1632;
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@%p18 bra $L__BB0_9;
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$L__BB0_8:
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mov.u16 %rs181, %rs180;
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cvt.rn.f32.u16 %f350, %rs26;
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div.rn.f32 %f351, %f350, 0f437F0000;
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fma.rn.f32 %f352, %f351, 0f40000000, 0fBF800000;
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and.b16 %rs34, %rs181, 255;
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cvt.rn.f32.u16 %f353, %rs34;
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div.rn.f32 %f354, %f353, 0f437F0000;
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fma.rn.f32 %f355, %f354, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f356, %rs178;
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div.rn.f32 %f357, %f356, 0f437F0000;
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fma.rn.f32 %f358, %f357, 0f40000000, 0fBF800000;
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mul.f32 %f359, %f355, %f355;
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fma.rn.f32 %f360, %f352, %f352, %f359;
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fma.rn.f32 %f361, %f358, %f358, %f360;
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sqrt.rn.f32 %f362, %f361;
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rcp.rn.f32 %f363, %f362;
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mul.f32 %f1634, %f363, %f358;
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mul.f32 %f1633, %f363, %f355;
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mul.f32 %f1632, %f352, %f363;
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mov.u16 %rs180, %rs178;
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$L__BB0_9:
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mul.f32 %f367, %f1630, %f1634;
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mul.f32 %f368, %f1631, %f1633;
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sub.f32 %f369, %f367, %f368;
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mul.f32 %f370, %f1631, %f1632;
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mul.f32 %f371, %f1629, %f1634;
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sub.f32 %f372, %f370, %f371;
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mul.f32 %f373, %f1629, %f1633;
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mul.f32 %f374, %f1630, %f1632;
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sub.f32 %f375, %f373, %f374;
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ld.global.u8 %rs36, [%rd2+3];
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setp.eq.s16 %p19, %rs36, 0;
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selp.f32 %f24, 0fBF800000, 0f3F800000, %p19;
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mul.f32 %f376, %f369, %f24;
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mul.f32 %f377, %f372, %f24;
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mul.f32 %f378, %f375, %f24;
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mul.f32 %f379, %f376, 0f00000000;
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mul.f32 %f380, %f377, 0f00000000;
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mul.f32 %f381, %f378, 0f00000000;
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fma.rn.f32 %f382, %f1632, 0f3F5105EC, %f379;
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fma.rn.f32 %f383, %f1633, 0f3F5105EC, %f380;
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fma.rn.f32 %f384, %f1634, 0f3F5105EC, %f381;
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mul.f32 %f25, %f1629, 0f3F13CD3A;
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add.f32 %f26, %f25, %f382;
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mul.f32 %f27, %f1630, 0f3F13CD3A;
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add.f32 %f28, %f27, %f383;
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mul.f32 %f29, %f1631, 0f3F13CD3A;
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add.f32 %f30, %f29, %f384;
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or.b16 %rs37, %rs26, %rs181;
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or.b16 %rs15, %rs37, %rs180;
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and.b16 %rs38, %rs15, 255;
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setp.eq.s16 %p20, %rs38, 0;
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mov.f32 %f1638, 0f00000000;
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mov.f32 %f1635, %f1638;
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mov.f32 %f1636, %f1638;
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mov.f32 %f1637, %f1638;
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@%p20 bra $L__BB0_11;
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cvt.rn.f32.u16 %f385, %rs26;
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div.rn.f32 %f386, %f385, 0f437F0000;
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fma.rn.f32 %f387, %f386, 0f40000000, 0fBF800000;
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and.b16 %rs40, %rs181, 255;
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cvt.rn.f32.u16 %f388, %rs40;
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div.rn.f32 %f389, %f388, 0f437F0000;
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fma.rn.f32 %f390, %f389, 0f40000000, 0fBF800000;
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and.b16 %rs41, %rs180, 255;
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cvt.rn.f32.u16 %f391, %rs41;
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div.rn.f32 %f392, %f391, 0f437F0000;
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fma.rn.f32 %f393, %f392, 0f40000000, 0fBF800000;
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mul.f32 %f394, %f390, %f390;
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fma.rn.f32 %f395, %f387, %f387, %f394;
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fma.rn.f32 %f396, %f393, %f393, %f395;
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sqrt.rn.f32 %f397, %f396;
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rcp.rn.f32 %f398, %f397;
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mul.f32 %f1637, %f398, %f393;
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mul.f32 %f1636, %f398, %f390;
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mul.f32 %f1635, %f387, %f398;
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$L__BB0_11:
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mul.f32 %f402, %f1630, %f1637;
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mul.f32 %f403, %f1631, %f1636;
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sub.f32 %f404, %f402, %f403;
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mul.f32 %f405, %f1631, %f1635;
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mul.f32 %f406, %f1629, %f1637;
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sub.f32 %f407, %f405, %f406;
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mul.f32 %f408, %f1629, %f1636;
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mul.f32 %f409, %f1630, %f1635;
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sub.f32 %f410, %f408, %f409;
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mul.f32 %f411, %f404, %f24;
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mul.f32 %f412, %f407, %f24;
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mul.f32 %f413, %f410, %f24;
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mul.f32 %f414, %f1635, 0f3ED105EC;
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mul.f32 %f415, %f1636, 0f3ED105EC;
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mul.f32 %f416, %f1637, 0f3ED105EC;
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mul.f32 %f417, %f411, 0f3F3504F3;
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mul.f32 %f418, %f412, 0f3F3504F3;
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mul.f32 %f419, %f413, 0f3F3504F3;
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sub.f32 %f420, %f417, %f414;
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sub.f32 %f421, %f418, %f415;
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sub.f32 %f422, %f419, %f416;
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add.f32 %f37, %f25, %f420;
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add.f32 %f38, %f27, %f421;
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add.f32 %f39, %f29, %f422;
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mov.f32 %f1639, %f1638;
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mov.f32 %f1640, %f1638;
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@%p20 bra $L__BB0_13;
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cvt.rn.f32.u16 %f423, %rs26;
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div.rn.f32 %f424, %f423, 0f437F0000;
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fma.rn.f32 %f425, %f424, 0f40000000, 0fBF800000;
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and.b16 %rs44, %rs181, 255;
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cvt.rn.f32.u16 %f426, %rs44;
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div.rn.f32 %f427, %f426, 0f437F0000;
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fma.rn.f32 %f428, %f427, 0f40000000, 0fBF800000;
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and.b16 %rs45, %rs180, 255;
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cvt.rn.f32.u16 %f429, %rs45;
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div.rn.f32 %f430, %f429, 0f437F0000;
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fma.rn.f32 %f431, %f430, 0f40000000, 0fBF800000;
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mul.f32 %f432, %f428, %f428;
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fma.rn.f32 %f433, %f425, %f425, %f432;
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fma.rn.f32 %f434, %f431, %f431, %f433;
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sqrt.rn.f32 %f435, %f434;
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rcp.rn.f32 %f436, %f435;
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mul.f32 %f1640, %f436, %f431;
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mul.f32 %f1639, %f436, %f428;
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mul.f32 %f1638, %f425, %f436;
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$L__BB0_13:
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mul.f32 %f437, %f1630, %f1640;
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mul.f32 %f438, %f1631, %f1639;
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sub.f32 %f439, %f437, %f438;
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mul.f32 %f440, %f1631, %f1638;
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mul.f32 %f441, %f1629, %f1640;
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sub.f32 %f442, %f440, %f441;
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mul.f32 %f443, %f1629, %f1639;
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mul.f32 %f444, %f1630, %f1638;
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sub.f32 %f445, %f443, %f444;
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mul.f32 %f446, %f439, %f24;
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mul.f32 %f447, %f442, %f24;
|
|
mul.f32 %f448, %f445, %f24;
|
|
mul.f32 %f449, %f1638, 0f3ED105EC;
|
|
mul.f32 %f450, %f1639, 0f3ED105EC;
|
|
mul.f32 %f451, %f1640, 0f3ED105EC;
|
|
mul.f32 %f452, %f446, 0fBF3504F3;
|
|
mul.f32 %f453, %f447, 0fBF3504F3;
|
|
mul.f32 %f454, %f448, 0fBF3504F3;
|
|
sub.f32 %f455, %f452, %f449;
|
|
sub.f32 %f456, %f453, %f450;
|
|
sub.f32 %f457, %f454, %f451;
|
|
add.f32 %f46, %f25, %f455;
|
|
add.f32 %f47, %f27, %f456;
|
|
add.f32 %f48, %f29, %f457;
|
|
ld.const.u32 %r5, [params+600];
|
|
setp.eq.s32 %p22, %r5, 0;
|
|
@%p22 bra $L__BB0_52;
|
|
|
|
ld.const.u64 %rd30, [params+608];
|
|
cvta.to.global.u64 %rd3, %rd30;
|
|
mov.f32 %f471, 0f40000000;
|
|
cvt.rzi.f32.f32 %f472, %f471;
|
|
add.f32 %f473, %f472, %f472;
|
|
mov.f32 %f474, 0f40800000;
|
|
sub.f32 %f475, %f474, %f473;
|
|
abs.f32 %f49, %f475;
|
|
ld.const.u32 %r6, [params+544];
|
|
ld.const.u32 %r425, [params+104];
|
|
mul.f32 %f50, %f13, 0f3456BF95;
|
|
mul.f32 %f51, %f14, 0f3456BF95;
|
|
mul.f32 %f52, %f15, 0f3456BF95;
|
|
mov.f32 %f470, 0f00000000;
|
|
mov.u32 %r421, 0;
|
|
ld.const.u64 %rd4, [params+96];
|
|
abs.f32 %f714, %f50;
|
|
abs.f32 %f715, %f51;
|
|
max.f32 %f716, %f714, %f715;
|
|
abs.f32 %f717, %f52;
|
|
max.f32 %f718, %f716, %f717;
|
|
mov.f32 %f1705, %f470;
|
|
mov.f32 %f1704, %f470;
|
|
mov.f32 %f1703, %f470;
|
|
mov.f32 %f1702, %f470;
|
|
mov.f32 %f1701, %f470;
|
|
mov.f32 %f1700, %f470;
|
|
mov.f32 %f1699, %f470;
|
|
mov.f32 %f1698, %f470;
|
|
mov.f32 %f1697, %f470;
|
|
mov.f32 %f1696, %f470;
|
|
mov.f32 %f1695, %f470;
|
|
mov.f32 %f1694, %f470;
|
|
mov.f32 %f1693, %f470;
|
|
|
|
$L__BB0_15:
|
|
mul.wide.u32 %rd31, %r421, 112;
|
|
add.s64 %rd6, %rd3, %rd31;
|
|
ld.global.v4.f32 {%f477, %f478, %f479, %f480}, [%rd6];
|
|
ld.global.v4.f32 {%f481, %f482, %f483, %f484}, [%rd6+16];
|
|
ld.global.v4.f32 {%f487, %f1662, %f1663, %f490}, [%rd6+32];
|
|
ld.global.v4.f32 {%f491, %f492, %f493, %f1660}, [%rd6+48];
|
|
ld.global.v4.f32 {%f495, %f496, %f497, %f498}, [%rd6+64];
|
|
ld.global.v4.u32 {%r43, %r44, %r45, %r46}, [%rd6+80];
|
|
mov.b32 %f85, %r45;
|
|
mov.b32 %f84, %r44;
|
|
mov.b32 %f83, %r43;
|
|
ld.global.u64 %rd7, [%rd6+96];
|
|
sub.f32 %f499, %f478, %f10;
|
|
sub.f32 %f500, %f479, %f11;
|
|
sub.f32 %f501, %f480, %f12;
|
|
mul.f32 %f502, %f500, %f500;
|
|
fma.rn.f32 %f503, %f499, %f499, %f502;
|
|
fma.rn.f32 %f504, %f501, %f501, %f503;
|
|
sqrt.rn.f32 %f505, %f504;
|
|
rcp.rn.f32 %f506, %f505;
|
|
mul.f32 %f87, %f499, %f506;
|
|
mul.f32 %f88, %f500, %f506;
|
|
mul.f32 %f89, %f501, %f506;
|
|
mul.f32 %f90, %f505, %f482;
|
|
mul.f32 %f91, %f505, %f484;
|
|
abs.f32 %f92, %f91;
|
|
setp.lt.f32 %p23, %f92, 0f00800000;
|
|
mul.f32 %f507, %f92, 0f4B800000;
|
|
selp.f32 %f508, %f507, %f92, %p23;
|
|
selp.f32 %f509, 0fC3170000, 0fC2FE0000, %p23;
|
|
mov.b32 %r50, %f508;
|
|
and.b32 %r51, %r50, 8388607;
|
|
or.b32 %r52, %r51, 1065353216;
|
|
mov.b32 %f510, %r52;
|
|
shr.u32 %r53, %r50, 23;
|
|
cvt.rn.f32.u32 %f511, %r53;
|
|
add.f32 %f512, %f509, %f511;
|
|
setp.gt.f32 %p24, %f510, 0f3FB504F3;
|
|
mul.f32 %f513, %f510, 0f3F000000;
|
|
add.f32 %f514, %f512, 0f3F800000;
|
|
selp.f32 %f515, %f514, %f512, %p24;
|
|
selp.f32 %f516, %f513, %f510, %p24;
|
|
add.f32 %f517, %f516, 0fBF800000;
|
|
add.f32 %f518, %f516, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f519, %f518;
|
|
add.f32 %f520, %f517, %f517;
|
|
mul.f32 %f521, %f520, %f519;
|
|
mul.f32 %f522, %f521, %f521;
|
|
mov.f32 %f523, 0f3C4CAF63;
|
|
mov.f32 %f524, 0f3B18F0FE;
|
|
fma.rn.f32 %f525, %f524, %f522, %f523;
|
|
mov.f32 %f526, 0f3DAAAABD;
|
|
fma.rn.f32 %f527, %f525, %f522, %f526;
|
|
mul.rn.f32 %f528, %f527, %f522;
|
|
mul.rn.f32 %f529, %f528, %f521;
|
|
sub.f32 %f530, %f517, %f521;
|
|
add.f32 %f531, %f530, %f530;
|
|
neg.f32 %f532, %f521;
|
|
fma.rn.f32 %f533, %f532, %f517, %f531;
|
|
mul.rn.f32 %f534, %f519, %f533;
|
|
add.f32 %f535, %f529, %f521;
|
|
sub.f32 %f536, %f521, %f535;
|
|
add.f32 %f537, %f529, %f536;
|
|
add.f32 %f538, %f534, %f537;
|
|
add.f32 %f539, %f535, %f538;
|
|
sub.f32 %f540, %f535, %f539;
|
|
add.f32 %f541, %f538, %f540;
|
|
mov.f32 %f542, 0f3F317200;
|
|
mul.rn.f32 %f543, %f515, %f542;
|
|
mov.f32 %f544, 0f35BFBE8E;
|
|
mul.rn.f32 %f545, %f515, %f544;
|
|
add.f32 %f546, %f543, %f539;
|
|
sub.f32 %f547, %f543, %f546;
|
|
add.f32 %f548, %f539, %f547;
|
|
add.f32 %f549, %f541, %f548;
|
|
add.f32 %f550, %f545, %f549;
|
|
add.f32 %f551, %f546, %f550;
|
|
sub.f32 %f552, %f546, %f551;
|
|
add.f32 %f553, %f550, %f552;
|
|
mul.rn.f32 %f555, %f474, %f551;
|
|
neg.f32 %f556, %f555;
|
|
fma.rn.f32 %f557, %f474, %f551, %f556;
|
|
fma.rn.f32 %f558, %f474, %f553, %f557;
|
|
fma.rn.f32 %f560, %f470, %f551, %f558;
|
|
add.rn.f32 %f561, %f555, %f560;
|
|
neg.f32 %f562, %f561;
|
|
add.rn.f32 %f563, %f555, %f562;
|
|
add.rn.f32 %f564, %f563, %f560;
|
|
mov.b32 %r54, %f561;
|
|
setp.eq.s32 %p25, %r54, 1118925336;
|
|
add.s32 %r55, %r54, -1;
|
|
mov.b32 %f565, %r55;
|
|
add.f32 %f566, %f564, 0f37000000;
|
|
selp.f32 %f93, %f566, %f564, %p25;
|
|
selp.f32 %f567, %f565, %f561, %p25;
|
|
mov.f32 %f568, 0f3FB8AA3B;
|
|
mul.rn.f32 %f569, %f567, %f568;
|
|
cvt.rzi.f32.f32 %f570, %f569;
|
|
abs.f32 %f571, %f570;
|
|
setp.gt.f32 %p26, %f571, 0f42FC0000;
|
|
mov.b32 %r56, %f570;
|
|
and.b32 %r57, %r56, -2147483648;
|
|
or.b32 %r58, %r57, 1123811328;
|
|
mov.b32 %f572, %r58;
|
|
selp.f32 %f573, %f572, %f570, %p26;
|
|
mov.f32 %f574, 0fBF317218;
|
|
fma.rn.f32 %f575, %f573, %f574, %f567;
|
|
mov.f32 %f576, 0f3102E308;
|
|
fma.rn.f32 %f577, %f573, %f576, %f575;
|
|
mul.f32 %f578, %f577, 0f3FB8AA3B;
|
|
add.f32 %f579, %f573, 0f4B40007F;
|
|
mov.b32 %r59, %f579;
|
|
shl.b32 %r60, %r59, 23;
|
|
mov.b32 %f580, %r60;
|
|
ex2.approx.ftz.f32 %f581, %f578;
|
|
mul.f32 %f94, %f581, %f580;
|
|
setp.eq.f32 %p27, %f94, 0f7F800000;
|
|
mov.f32 %f1654, 0f7F800000;
|
|
@%p27 bra $L__BB0_17;
|
|
|
|
fma.rn.f32 %f1654, %f94, %f93, %f94;
|
|
|
|
$L__BB0_17:
|
|
setp.lt.f32 %p28, %f91, 0f00000000;
|
|
setp.eq.f32 %p29, %f49, 0f3F800000;
|
|
and.pred %p1, %p28, %p29;
|
|
setp.eq.f32 %p30, %f91, 0f00000000;
|
|
@%p30 bra $L__BB0_21;
|
|
bra.uni $L__BB0_18;
|
|
|
|
$L__BB0_21:
|
|
add.f32 %f586, %f91, %f91;
|
|
selp.f32 %f1656, %f586, 0f00000000, %p29;
|
|
bra.uni $L__BB0_22;
|
|
|
|
$L__BB0_18:
|
|
mov.b32 %r61, %f1654;
|
|
xor.b32 %r62, %r61, -2147483648;
|
|
mov.b32 %f582, %r62;
|
|
selp.f32 %f1656, %f582, %f1654, %p1;
|
|
setp.geu.f32 %p31, %f91, 0f00000000;
|
|
@%p31 bra $L__BB0_22;
|
|
|
|
mov.f32 %f583, 0f40800000;
|
|
cvt.rzi.f32.f32 %f584, %f583;
|
|
setp.eq.f32 %p32, %f584, 0f40800000;
|
|
@%p32 bra $L__BB0_22;
|
|
|
|
mov.f32 %f1656, 0f7FFFFFFF;
|
|
|
|
$L__BB0_22:
|
|
abs.f32 %f1626, %f91;
|
|
add.f32 %f587, %f1626, 0f40800000;
|
|
mov.b32 %r63, %f587;
|
|
setp.lt.s32 %p34, %r63, 2139095040;
|
|
@%p34 bra $L__BB0_27;
|
|
|
|
abs.f32 %f1627, %f91;
|
|
setp.gtu.f32 %p35, %f1627, 0f7F800000;
|
|
@%p35 bra $L__BB0_26;
|
|
bra.uni $L__BB0_24;
|
|
|
|
$L__BB0_26:
|
|
add.f32 %f1656, %f91, 0f40800000;
|
|
bra.uni $L__BB0_27;
|
|
|
|
$L__BB0_24:
|
|
abs.f32 %f1628, %f91;
|
|
setp.neu.f32 %p36, %f1628, 0f7F800000;
|
|
@%p36 bra $L__BB0_27;
|
|
|
|
selp.f32 %f1656, 0fFF800000, 0f7F800000, %p1;
|
|
|
|
$L__BB0_27:
|
|
mov.f32 %f588, 0f3F800000;
|
|
sub.f32 %f589, %f588, %f1656;
|
|
setp.eq.f32 %p37, %f91, 0f3F800000;
|
|
selp.f32 %f590, 0f00000000, %f589, %p37;
|
|
cvt.sat.f32.f32 %f591, %f590;
|
|
fma.rn.f32 %f592, %f90, %f90, %f483;
|
|
div.rn.f32 %f103, %f591, %f592;
|
|
mul.f32 %f593, %f1630, %f88;
|
|
fma.rn.f32 %f594, %f1629, %f87, %f593;
|
|
fma.rn.f32 %f104, %f1631, %f89, %f594;
|
|
setp.eq.f32 %p38, %f477, 0f3F800000;
|
|
@%p38 bra $L__BB0_33;
|
|
bra.uni $L__BB0_28;
|
|
|
|
$L__BB0_33:
|
|
setp.eq.s64 %p42, %rd7, 0;
|
|
mov.f32 %f1661, %f487;
|
|
mov.f32 %f1664, %f103;
|
|
@%p42 bra $L__BB0_37;
|
|
|
|
setp.geu.f32 %p43, %f1660, 0f00000000;
|
|
mov.f32 %f1657, %f87;
|
|
mov.f32 %f1658, %f88;
|
|
mov.f32 %f1659, %f89;
|
|
@%p43 bra $L__BB0_36;
|
|
|
|
mul.f32 %f619, %f84, %f500;
|
|
fma.rn.f32 %f620, %f83, %f499, %f619;
|
|
fma.rn.f32 %f622, %f85, %f501, %f620;
|
|
rcp.rn.f32 %f623, %f622;
|
|
mul.f32 %f1657, %f499, %f623;
|
|
mul.f32 %f1658, %f500, %f623;
|
|
mul.f32 %f1659, %f501, %f623;
|
|
neg.f32 %f1660, %f1660;
|
|
|
|
$L__BB0_36:
|
|
mul.f32 %f624, %f85, %f89;
|
|
mul.f32 %f625, %f84, %f88;
|
|
neg.f32 %f626, %f625;
|
|
mul.f32 %f627, %f83, %f87;
|
|
sub.f32 %f628, %f626, %f627;
|
|
sub.f32 %f629, %f628, %f624;
|
|
setp.gt.f32 %p44, %f629, 0f00000000;
|
|
selp.f32 %f630, 0f3F800000, 0f00000000, %p44;
|
|
mov.f32 %f631, 0f3F800000;
|
|
mul.f32 %f632, %f492, %f1658;
|
|
mul.f32 %f633, %f496, %f1658;
|
|
fma.rn.f32 %f634, %f491, %f1657, %f632;
|
|
fma.rn.f32 %f635, %f495, %f1657, %f633;
|
|
fma.rn.f32 %f636, %f493, %f1659, %f634;
|
|
fma.rn.f32 %f637, %f497, %f1659, %f635;
|
|
fma.rn.f32 %f638, %f1660, %f636, 0f3F000000;
|
|
sub.f32 %f639, %f631, %f638;
|
|
fma.rn.f32 %f640, %f1660, %f637, 0f3F000000;
|
|
tex.2d.v4.f32.f32 {%f641, %f642, %f643, %f644}, [%rd7, {%f639, %f640}];
|
|
mul.f32 %f645, %f630, %f641;
|
|
mul.f32 %f646, %f630, %f642;
|
|
mul.f32 %f647, %f630, %f643;
|
|
mul.f32 %f1661, %f487, %f645;
|
|
mul.f32 %f1662, %f1662, %f646;
|
|
mul.f32 %f1663, %f1663, %f647;
|
|
mov.f32 %f1664, %f103;
|
|
bra.uni $L__BB0_37;
|
|
|
|
$L__BB0_28:
|
|
setp.eq.f32 %p39, %f477, 0f40000000;
|
|
@%p39 bra $L__BB0_31;
|
|
bra.uni $L__BB0_29;
|
|
|
|
$L__BB0_31:
|
|
setp.eq.s64 %p41, %rd7, 0;
|
|
mov.f32 %f1661, %f487;
|
|
mov.f32 %f1664, %f103;
|
|
@%p41 bra $L__BB0_37;
|
|
|
|
mul.f32 %f604, %f492, %f88;
|
|
mul.f32 %f605, %f496, %f88;
|
|
mul.f32 %f606, %f84, %f88;
|
|
fma.rn.f32 %f607, %f491, %f87, %f604;
|
|
fma.rn.f32 %f608, %f495, %f87, %f605;
|
|
fma.rn.f32 %f609, %f83, %f87, %f606;
|
|
fma.rn.f32 %f610, %f493, %f89, %f607;
|
|
fma.rn.f32 %f611, %f497, %f89, %f608;
|
|
fma.rn.f32 %f612, %f85, %f89, %f609;
|
|
tex.cube.v4.f32.f32 {%f613, %f614, %f615, %f616}, [%rd7, {%f610, %f611, %f612, %f612}];
|
|
mul.f32 %f1661, %f487, %f613;
|
|
mul.f32 %f1662, %f1662, %f614;
|
|
mul.f32 %f1663, %f1663, %f615;
|
|
mov.f32 %f1664, %f103;
|
|
bra.uni $L__BB0_37;
|
|
|
|
$L__BB0_29:
|
|
setp.neu.f32 %p40, %f477, 0f40800000;
|
|
mov.f32 %f1661, %f487;
|
|
mov.f32 %f1664, %f103;
|
|
@%p40 bra $L__BB0_37;
|
|
|
|
mul.f32 %f595, %f83, %f87;
|
|
mul.f32 %f596, %f84, %f88;
|
|
neg.f32 %f597, %f596;
|
|
sub.f32 %f598, %f597, %f595;
|
|
mul.f32 %f599, %f85, %f89;
|
|
sub.f32 %f600, %f598, %f599;
|
|
fma.rn.f32 %f601, %f490, %f600, %f1660;
|
|
cvt.sat.f32.f32 %f602, %f601;
|
|
mul.f32 %f603, %f602, %f602;
|
|
mul.f32 %f1664, %f103, %f603;
|
|
mov.f32 %f1661, %f487;
|
|
|
|
$L__BB0_37:
|
|
max.f32 %f660, %f1661, %f1662;
|
|
max.f32 %f661, %f660, %f1663;
|
|
setp.eq.s32 %p46, %r6, 0;
|
|
selp.f32 %f662, %f104, 0f3F800000, %p46;
|
|
cvt.sat.f32.f32 %f663, %f662;
|
|
mul.f32 %f137, %f663, %f1664;
|
|
mul.f32 %f664, %f137, %f661;
|
|
setp.lt.f32 %p47, %f664, 0f3727C5AC;
|
|
mov.pred %p188, -1;
|
|
mov.f32 %f1665, 0f00000000;
|
|
mov.f32 %f1666, %f1665;
|
|
mov.f32 %f1667, %f1665;
|
|
mov.f32 %f1668, %f1665;
|
|
mov.f32 %f1669, %f1665;
|
|
mov.f32 %f1670, %f1665;
|
|
mov.f32 %f1671, %f1665;
|
|
mov.f32 %f1672, %f1665;
|
|
mov.f32 %f1673, %f1665;
|
|
mov.f32 %f1674, %f1665;
|
|
mov.f32 %f1675, %f1665;
|
|
mov.f32 %f1676, %f1665;
|
|
@%p47 bra $L__BB0_39;
|
|
|
|
mul.f32 %f1665, %f1661, %f137;
|
|
mul.f32 %f665, %f28, %f88;
|
|
fma.rn.f32 %f666, %f26, %f87, %f665;
|
|
fma.rn.f32 %f667, %f30, %f89, %f666;
|
|
cvt.sat.f32.f32 %f668, %f667;
|
|
mul.f32 %f669, %f1661, %f1664;
|
|
mul.f32 %f670, %f669, %f668;
|
|
mul.f32 %f671, %f1662, %f1664;
|
|
mul.f32 %f672, %f671, %f668;
|
|
mul.f32 %f673, %f1663, %f1664;
|
|
mul.f32 %f674, %f673, %f668;
|
|
mul.f32 %f675, %f38, %f88;
|
|
fma.rn.f32 %f676, %f37, %f87, %f675;
|
|
fma.rn.f32 %f677, %f39, %f89, %f676;
|
|
cvt.sat.f32.f32 %f678, %f677;
|
|
mul.f32 %f679, %f669, %f678;
|
|
mul.f32 %f680, %f671, %f678;
|
|
mul.f32 %f681, %f673, %f678;
|
|
mul.f32 %f682, %f47, %f88;
|
|
fma.rn.f32 %f683, %f46, %f87, %f682;
|
|
fma.rn.f32 %f684, %f48, %f89, %f683;
|
|
cvt.sat.f32.f32 %f685, %f684;
|
|
mul.f32 %f686, %f669, %f685;
|
|
mul.f32 %f687, %f671, %f685;
|
|
mul.f32 %f688, %f673, %f685;
|
|
add.f32 %f689, %f670, %f679;
|
|
add.f32 %f690, %f672, %f680;
|
|
add.f32 %f691, %f674, %f681;
|
|
add.f32 %f692, %f689, %f686;
|
|
add.f32 %f693, %f690, %f687;
|
|
add.f32 %f694, %f691, %f688;
|
|
mul.f32 %f695, %f692, 0f3F13CD3A;
|
|
mul.f32 %f696, %f693, 0f3F13CD3A;
|
|
mul.f32 %f697, %f694, 0f3F13CD3A;
|
|
div.rn.f32 %f698, %f1665, %f695;
|
|
mul.f32 %f1666, %f1662, %f137;
|
|
div.rn.f32 %f699, %f1666, %f696;
|
|
mul.f32 %f1667, %f1663, %f137;
|
|
div.rn.f32 %f700, %f1667, %f697;
|
|
setp.eq.f32 %p49, %f1665, 0f00000000;
|
|
selp.f32 %f701, 0f00000000, %f698, %p49;
|
|
setp.eq.f32 %p50, %f1666, 0f00000000;
|
|
selp.f32 %f702, 0f00000000, %f699, %p50;
|
|
setp.eq.f32 %p51, %f1667, 0f00000000;
|
|
selp.f32 %f703, 0f00000000, %f700, %p51;
|
|
mul.f32 %f1668, %f670, %f701;
|
|
mul.f32 %f1669, %f672, %f702;
|
|
mul.f32 %f1670, %f674, %f703;
|
|
mul.f32 %f1671, %f679, %f701;
|
|
mul.f32 %f1672, %f680, %f702;
|
|
mul.f32 %f1673, %f681, %f703;
|
|
mul.f32 %f1674, %f686, %f701;
|
|
mul.f32 %f1675, %f687, %f702;
|
|
mul.f32 %f1676, %f688, %f703;
|
|
mov.pred %p188, 0;
|
|
|
|
$L__BB0_39:
|
|
@%p188 bra $L__BB0_51;
|
|
|
|
setp.eq.s32 %p52, %r46, 0;
|
|
mov.u16 %rs182, 0;
|
|
mov.f32 %f1692, 0f3F800000;
|
|
mov.f32 %f1690, %f1692;
|
|
mov.f32 %f1691, %f1692;
|
|
@%p52 bra $L__BB0_48;
|
|
|
|
abs.s32 %r10, %r46;
|
|
setp.lt.s32 %p53, %r10, 1;
|
|
mov.f32 %f1680, 0f00000000;
|
|
mov.f32 %f1681, %f1680;
|
|
mov.f32 %f1682, %f1680;
|
|
@%p53 bra $L__BB0_47;
|
|
|
|
mov.f32 %f719, 0f38D1B717;
|
|
max.f32 %f720, %f718, %f719;
|
|
and.b32 %r65, %r425, 32;
|
|
setp.eq.s32 %p54, %r65, 0;
|
|
mov.u32 %r424, 0;
|
|
selp.f32 %f721, 0f3F800000, 0f41200000, %p54;
|
|
mul.f32 %f162, %f721, %f720;
|
|
and.b32 %r11, %r10, 1;
|
|
setp.eq.s32 %p55, %r10, 1;
|
|
mov.f32 %f1682, 0f00000000;
|
|
mov.f32 %f1681, %f1682;
|
|
mov.f32 %f1680, %f1682;
|
|
@%p55 bra $L__BB0_45;
|
|
|
|
sub.s32 %r423, %r10, %r11;
|
|
|
|
$L__BB0_44:
|
|
cvt.rn.f32.s32 %f743, %r424;
|
|
add.f32 %f744, %f16, %f743;
|
|
sub.f32 %f745, %f17, %f743;
|
|
mul.f32 %f746, %f744, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f747, %f746;
|
|
sub.f32 %f748, %f746, %f747;
|
|
mul.f32 %f749, %f745, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f750, %f749;
|
|
sub.f32 %f751, %f749, %f750;
|
|
mul.f32 %f752, %f743, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f753, %f752;
|
|
sub.f32 %f754, %f752, %f753;
|
|
add.f32 %f755, %f751, 0f420551EC;
|
|
add.f32 %f756, %f748, 0f420551EC;
|
|
add.f32 %f757, %f754, 0f420551EC;
|
|
mul.f32 %f758, %f748, %f755;
|
|
fma.rn.f32 %f759, %f751, %f756, %f758;
|
|
fma.rn.f32 %f760, %f754, %f757, %f759;
|
|
add.f32 %f761, %f748, %f760;
|
|
add.f32 %f762, %f751, %f760;
|
|
add.f32 %f763, %f754, %f760;
|
|
add.f32 %f764, %f761, %f762;
|
|
mul.f32 %f765, %f763, %f764;
|
|
cvt.rmi.f32.f32 %f766, %f765;
|
|
sub.f32 %f767, %f765, %f766;
|
|
add.f32 %f768, %f761, %f761;
|
|
mul.f32 %f769, %f762, %f768;
|
|
cvt.rmi.f32.f32 %f770, %f769;
|
|
sub.f32 %f771, %f769, %f770;
|
|
mul.f32 %f772, %f761, %f764;
|
|
cvt.rmi.f32.f32 %f773, %f772;
|
|
sub.f32 %f774, %f772, %f773;
|
|
fma.rn.f32 %f775, %f767, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f776, %f771, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f777, %f774, 0f40000000, 0fBF800000;
|
|
ld.global.f32 %f778, [%rd6+16];
|
|
ld.global.f32 %f779, [%rd6+4];
|
|
fma.rn.f32 %f780, %f778, %f775, %f779;
|
|
ld.global.f32 %f781, [%rd6+8];
|
|
fma.rn.f32 %f782, %f778, %f776, %f781;
|
|
ld.global.f32 %f783, [%rd6+12];
|
|
fma.rn.f32 %f784, %f778, %f777, %f783;
|
|
sub.f32 %f785, %f780, %f10;
|
|
sub.f32 %f786, %f782, %f11;
|
|
sub.f32 %f787, %f784, %f12;
|
|
mul.f32 %f788, %f786, %f786;
|
|
fma.rn.f32 %f789, %f785, %f785, %f788;
|
|
fma.rn.f32 %f790, %f787, %f787, %f789;
|
|
sqrt.rn.f32 %f732, %f790;
|
|
rcp.rn.f32 %f791, %f732;
|
|
mul.f32 %f728, %f791, %f785;
|
|
mul.f32 %f729, %f791, %f786;
|
|
mul.f32 %f730, %f791, %f787;
|
|
mov.f32 %f742, 0f00000000;
|
|
mov.u32 %r174, 2;
|
|
mov.u32 %r175, 1;
|
|
mov.u32 %r176, 3;
|
|
mov.u32 %r179, 1065353216;
|
|
mov.u32 %r208, 0;
|
|
// begin inline asm
|
|
call(%r67,%r68,%r69,%r70,%r71,%r72,%r73,%r74,%r75,%r76,%r77,%r78,%r79,%r80,%r81,%r82,%r83,%r84,%r85,%r86,%r87,%r88,%r89,%r90,%r91,%r92,%r93,%r94,%r95,%r96,%r97,%r98),_optix_trace_typed_32,(%r208,%rd4,%f13,%f14,%f15,%f728,%f729,%f730,%f162,%f732,%f742,%r175,%r208,%r175,%r174,%r175,%r176,%r179,%r179,%r179,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208);
|
|
// end inline asm
|
|
mov.b32 %f792, %r67;
|
|
mov.b32 %f793, %r68;
|
|
mov.b32 %f794, %r69;
|
|
add.f32 %f795, %f1680, %f792;
|
|
add.f32 %f796, %f1681, %f793;
|
|
add.f32 %f797, %f1682, %f794;
|
|
add.s32 %r209, %r424, 1;
|
|
cvt.rn.f32.s32 %f798, %r209;
|
|
add.f32 %f799, %f16, %f798;
|
|
sub.f32 %f800, %f17, %f798;
|
|
mul.f32 %f801, %f799, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f802, %f801;
|
|
sub.f32 %f803, %f801, %f802;
|
|
mul.f32 %f804, %f800, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f805, %f804;
|
|
sub.f32 %f806, %f804, %f805;
|
|
mul.f32 %f807, %f798, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f808, %f807;
|
|
sub.f32 %f809, %f807, %f808;
|
|
add.f32 %f810, %f806, 0f420551EC;
|
|
add.f32 %f811, %f803, 0f420551EC;
|
|
add.f32 %f812, %f809, 0f420551EC;
|
|
mul.f32 %f813, %f803, %f810;
|
|
fma.rn.f32 %f814, %f806, %f811, %f813;
|
|
fma.rn.f32 %f815, %f809, %f812, %f814;
|
|
add.f32 %f816, %f803, %f815;
|
|
add.f32 %f817, %f806, %f815;
|
|
add.f32 %f818, %f809, %f815;
|
|
add.f32 %f819, %f816, %f817;
|
|
mul.f32 %f820, %f818, %f819;
|
|
cvt.rmi.f32.f32 %f821, %f820;
|
|
sub.f32 %f822, %f820, %f821;
|
|
add.f32 %f823, %f816, %f816;
|
|
mul.f32 %f824, %f817, %f823;
|
|
cvt.rmi.f32.f32 %f825, %f824;
|
|
sub.f32 %f826, %f824, %f825;
|
|
mul.f32 %f827, %f816, %f819;
|
|
cvt.rmi.f32.f32 %f828, %f827;
|
|
sub.f32 %f829, %f827, %f828;
|
|
fma.rn.f32 %f830, %f822, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f831, %f826, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f832, %f829, 0f40000000, 0fBF800000;
|
|
ld.global.f32 %f833, [%rd6+16];
|
|
ld.global.f32 %f834, [%rd6+4];
|
|
fma.rn.f32 %f835, %f833, %f830, %f834;
|
|
ld.global.f32 %f836, [%rd6+8];
|
|
fma.rn.f32 %f837, %f833, %f831, %f836;
|
|
ld.global.f32 %f838, [%rd6+12];
|
|
fma.rn.f32 %f839, %f833, %f832, %f838;
|
|
sub.f32 %f840, %f835, %f10;
|
|
sub.f32 %f841, %f837, %f11;
|
|
sub.f32 %f842, %f839, %f12;
|
|
mul.f32 %f843, %f841, %f841;
|
|
fma.rn.f32 %f844, %f840, %f840, %f843;
|
|
fma.rn.f32 %f845, %f842, %f842, %f844;
|
|
sqrt.rn.f32 %f741, %f845;
|
|
rcp.rn.f32 %f846, %f741;
|
|
mul.f32 %f737, %f846, %f840;
|
|
mul.f32 %f738, %f846, %f841;
|
|
mul.f32 %f739, %f846, %f842;
|
|
// begin inline asm
|
|
call(%r138,%r139,%r140,%r141,%r142,%r143,%r144,%r145,%r146,%r147,%r148,%r149,%r150,%r151,%r152,%r153,%r154,%r155,%r156,%r157,%r158,%r159,%r160,%r161,%r162,%r163,%r164,%r165,%r166,%r167,%r168,%r169),_optix_trace_typed_32,(%r208,%rd4,%f13,%f14,%f15,%f737,%f738,%f739,%f162,%f741,%f742,%r175,%r208,%r175,%r174,%r175,%r176,%r179,%r179,%r179,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208,%r208);
|
|
// end inline asm
|
|
mov.b32 %f847, %r138;
|
|
mov.b32 %f848, %r139;
|
|
mov.b32 %f849, %r140;
|
|
add.f32 %f1680, %f795, %f847;
|
|
add.f32 %f1681, %f796, %f848;
|
|
add.f32 %f1682, %f797, %f849;
|
|
add.s32 %r424, %r424, 2;
|
|
add.s32 %r423, %r423, -2;
|
|
setp.ne.s32 %p56, %r423, 0;
|
|
@%p56 bra $L__BB0_44;
|
|
|
|
$L__BB0_45:
|
|
setp.eq.s32 %p57, %r11, 0;
|
|
@%p57 bra $L__BB0_47;
|
|
|
|
cvt.rn.f32.s32 %f859, %r424;
|
|
add.f32 %f860, %f16, %f859;
|
|
sub.f32 %f861, %f17, %f859;
|
|
mul.f32 %f862, %f860, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f863, %f862;
|
|
sub.f32 %f864, %f862, %f863;
|
|
mul.f32 %f865, %f861, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f866, %f865;
|
|
sub.f32 %f867, %f865, %f866;
|
|
mul.f32 %f868, %f859, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f869, %f868;
|
|
sub.f32 %f870, %f868, %f869;
|
|
add.f32 %f871, %f867, 0f420551EC;
|
|
add.f32 %f872, %f864, 0f420551EC;
|
|
add.f32 %f873, %f870, 0f420551EC;
|
|
mul.f32 %f874, %f864, %f871;
|
|
fma.rn.f32 %f875, %f867, %f872, %f874;
|
|
fma.rn.f32 %f876, %f870, %f873, %f875;
|
|
add.f32 %f877, %f864, %f876;
|
|
add.f32 %f878, %f867, %f876;
|
|
add.f32 %f879, %f870, %f876;
|
|
add.f32 %f880, %f877, %f878;
|
|
mul.f32 %f881, %f879, %f880;
|
|
cvt.rmi.f32.f32 %f882, %f881;
|
|
sub.f32 %f883, %f881, %f882;
|
|
add.f32 %f884, %f877, %f877;
|
|
mul.f32 %f885, %f878, %f884;
|
|
cvt.rmi.f32.f32 %f886, %f885;
|
|
sub.f32 %f887, %f885, %f886;
|
|
mul.f32 %f888, %f877, %f880;
|
|
cvt.rmi.f32.f32 %f889, %f888;
|
|
sub.f32 %f890, %f888, %f889;
|
|
fma.rn.f32 %f891, %f883, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f892, %f887, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f893, %f890, 0f40000000, 0fBF800000;
|
|
ld.global.f32 %f894, [%rd6+16];
|
|
ld.global.f32 %f895, [%rd6+4];
|
|
fma.rn.f32 %f896, %f894, %f891, %f895;
|
|
ld.global.f32 %f897, [%rd6+8];
|
|
fma.rn.f32 %f898, %f894, %f892, %f897;
|
|
ld.global.f32 %f899, [%rd6+12];
|
|
fma.rn.f32 %f900, %f894, %f893, %f899;
|
|
sub.f32 %f901, %f896, %f10;
|
|
sub.f32 %f902, %f898, %f11;
|
|
sub.f32 %f903, %f900, %f12;
|
|
mul.f32 %f904, %f902, %f902;
|
|
fma.rn.f32 %f905, %f901, %f901, %f904;
|
|
fma.rn.f32 %f906, %f903, %f903, %f905;
|
|
sqrt.rn.f32 %f857, %f906;
|
|
rcp.rn.f32 %f907, %f857;
|
|
mul.f32 %f853, %f907, %f901;
|
|
mul.f32 %f854, %f907, %f902;
|
|
mul.f32 %f855, %f907, %f903;
|
|
mov.f32 %f858, 0f00000000;
|
|
mov.u32 %r246, 2;
|
|
mov.u32 %r247, 1;
|
|
mov.u32 %r248, 3;
|
|
mov.u32 %r251, 1065353216;
|
|
mov.u32 %r280, 0;
|
|
// begin inline asm
|
|
call(%r210,%r211,%r212,%r213,%r214,%r215,%r216,%r217,%r218,%r219,%r220,%r221,%r222,%r223,%r224,%r225,%r226,%r227,%r228,%r229,%r230,%r231,%r232,%r233,%r234,%r235,%r236,%r237,%r238,%r239,%r240,%r241),_optix_trace_typed_32,(%r280,%rd4,%f13,%f14,%f15,%f853,%f854,%f855,%f162,%f857,%f858,%r247,%r280,%r247,%r246,%r247,%r248,%r251,%r251,%r251,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280,%r280);
|
|
// end inline asm
|
|
mov.b32 %f908, %r210;
|
|
mov.b32 %f909, %r211;
|
|
mov.b32 %f910, %r212;
|
|
add.f32 %f1680, %f1680, %f908;
|
|
add.f32 %f1681, %f1681, %f909;
|
|
add.f32 %f1682, %f1682, %f910;
|
|
|
|
$L__BB0_47:
|
|
cvt.rn.f32.s32 %f911, %r10;
|
|
rcp.rn.f32 %f912, %f911;
|
|
mul.f32 %f1692, %f912, %f1680;
|
|
mul.f32 %f1690, %f912, %f1681;
|
|
mul.f32 %f1691, %f912, %f1682;
|
|
shr.u32 %r281, %r46, 31;
|
|
cvt.u16.u32 %rs182, %r281;
|
|
|
|
$L__BB0_48:
|
|
fma.rn.f32 %f1693, %f1665, %f1692, %f1693;
|
|
fma.rn.f32 %f1694, %f1666, %f1690, %f1694;
|
|
fma.rn.f32 %f1695, %f1667, %f1691, %f1695;
|
|
fma.rn.f32 %f1696, %f1668, %f1692, %f1696;
|
|
fma.rn.f32 %f1697, %f1669, %f1690, %f1697;
|
|
fma.rn.f32 %f1698, %f1670, %f1691, %f1698;
|
|
fma.rn.f32 %f1699, %f1671, %f1692, %f1699;
|
|
fma.rn.f32 %f1700, %f1672, %f1690, %f1700;
|
|
fma.rn.f32 %f1701, %f1673, %f1691, %f1701;
|
|
fma.rn.f32 %f1702, %f1674, %f1692, %f1702;
|
|
fma.rn.f32 %f1703, %f1675, %f1690, %f1703;
|
|
fma.rn.f32 %f1704, %f1676, %f1691, %f1704;
|
|
setp.eq.s16 %p58, %rs182, 0;
|
|
@%p58 bra $L__BB0_50;
|
|
|
|
div.rn.f32 %f913, %f1665, %f487;
|
|
div.rn.f32 %f914, %f913, %f103;
|
|
cvt.sat.f32.f32 %f915, %f914;
|
|
mul.f32 %f1692, %f1692, %f915;
|
|
|
|
$L__BB0_50:
|
|
add.f32 %f1705, %f1705, %f1692;
|
|
|
|
$L__BB0_51:
|
|
cvt.u64.u32 %rd73, %r421;
|
|
cvt.u32.u64 %r282, %rd73;
|
|
add.s32 %r421, %r282, 1;
|
|
setp.lt.u32 %p59, %r421, %r5;
|
|
@%p59 bra $L__BB0_15;
|
|
bra.uni $L__BB0_53;
|
|
|
|
$L__BB0_52:
|
|
mov.f32 %f1693, 0f00000000;
|
|
ld.const.u32 %r425, [params+104];
|
|
mov.f32 %f1694, %f1693;
|
|
mov.f32 %f1695, %f1693;
|
|
mov.f32 %f1696, %f1693;
|
|
mov.f32 %f1697, %f1693;
|
|
mov.f32 %f1698, %f1693;
|
|
mov.f32 %f1699, %f1693;
|
|
mov.f32 %f1700, %f1693;
|
|
mov.f32 %f1701, %f1693;
|
|
mov.f32 %f1702, %f1693;
|
|
mov.f32 %f1703, %f1693;
|
|
mov.f32 %f1704, %f1693;
|
|
mov.f32 %f1705, %f1693;
|
|
|
|
$L__BB0_53:
|
|
and.b32 %r283, %r425, 8;
|
|
setp.eq.s32 %p60, %r283, 0;
|
|
@%p60 bra $L__BB0_67;
|
|
|
|
cvt.sat.f32.f32 %f228, %f1705;
|
|
ld.const.u64 %rd35, [params+192];
|
|
cvta.to.global.u64 %rd8, %rd35;
|
|
ld.const.u32 %r284, [params+184];
|
|
mad.lo.s32 %r285, %r284, %r4, %r3;
|
|
cvt.u64.u32 %rd9, %r285;
|
|
mov.f32 %f930, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f931, %f930;
|
|
add.f32 %f932, %f931, %f931;
|
|
mov.f32 %f933, 0f3EE8BA2E;
|
|
sub.f32 %f934, %f933, %f932;
|
|
abs.f32 %f229, %f934;
|
|
abs.f32 %f230, %f228;
|
|
setp.lt.f32 %p61, %f230, 0f00800000;
|
|
mul.f32 %f935, %f230, 0f4B800000;
|
|
selp.f32 %f936, %f935, %f230, %p61;
|
|
selp.f32 %f937, 0fC3170000, 0fC2FE0000, %p61;
|
|
mov.b32 %r286, %f936;
|
|
and.b32 %r287, %r286, 8388607;
|
|
or.b32 %r288, %r287, 1065353216;
|
|
mov.b32 %f938, %r288;
|
|
shr.u32 %r289, %r286, 23;
|
|
cvt.rn.f32.u32 %f939, %r289;
|
|
add.f32 %f940, %f937, %f939;
|
|
setp.gt.f32 %p62, %f938, 0f3FB504F3;
|
|
mul.f32 %f941, %f938, 0f3F000000;
|
|
add.f32 %f942, %f940, 0f3F800000;
|
|
selp.f32 %f943, %f942, %f940, %p62;
|
|
selp.f32 %f944, %f941, %f938, %p62;
|
|
add.f32 %f945, %f944, 0fBF800000;
|
|
add.f32 %f946, %f944, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f947, %f946;
|
|
add.f32 %f948, %f945, %f945;
|
|
mul.f32 %f949, %f948, %f947;
|
|
mul.f32 %f950, %f949, %f949;
|
|
mov.f32 %f951, 0f3C4CAF63;
|
|
mov.f32 %f952, 0f3B18F0FE;
|
|
fma.rn.f32 %f953, %f952, %f950, %f951;
|
|
mov.f32 %f954, 0f3DAAAABD;
|
|
fma.rn.f32 %f955, %f953, %f950, %f954;
|
|
mul.rn.f32 %f956, %f955, %f950;
|
|
mul.rn.f32 %f957, %f956, %f949;
|
|
sub.f32 %f958, %f945, %f949;
|
|
add.f32 %f959, %f958, %f958;
|
|
neg.f32 %f960, %f949;
|
|
fma.rn.f32 %f961, %f960, %f945, %f959;
|
|
mul.rn.f32 %f962, %f947, %f961;
|
|
add.f32 %f963, %f957, %f949;
|
|
sub.f32 %f964, %f949, %f963;
|
|
add.f32 %f965, %f957, %f964;
|
|
add.f32 %f966, %f962, %f965;
|
|
add.f32 %f967, %f963, %f966;
|
|
sub.f32 %f968, %f963, %f967;
|
|
add.f32 %f969, %f966, %f968;
|
|
mov.f32 %f970, 0f3F317200;
|
|
mul.rn.f32 %f971, %f943, %f970;
|
|
mov.f32 %f972, 0f35BFBE8E;
|
|
mul.rn.f32 %f973, %f943, %f972;
|
|
add.f32 %f974, %f971, %f967;
|
|
sub.f32 %f975, %f971, %f974;
|
|
add.f32 %f976, %f967, %f975;
|
|
add.f32 %f977, %f969, %f976;
|
|
add.f32 %f978, %f973, %f977;
|
|
add.f32 %f979, %f974, %f978;
|
|
sub.f32 %f980, %f974, %f979;
|
|
add.f32 %f981, %f978, %f980;
|
|
mul.rn.f32 %f982, %f933, %f979;
|
|
neg.f32 %f983, %f982;
|
|
fma.rn.f32 %f984, %f933, %f979, %f983;
|
|
fma.rn.f32 %f985, %f933, %f981, %f984;
|
|
mov.f32 %f986, 0f00000000;
|
|
fma.rn.f32 %f987, %f986, %f979, %f985;
|
|
add.rn.f32 %f988, %f982, %f987;
|
|
neg.f32 %f989, %f988;
|
|
add.rn.f32 %f990, %f982, %f989;
|
|
add.rn.f32 %f991, %f990, %f987;
|
|
mov.b32 %r290, %f988;
|
|
setp.eq.s32 %p63, %r290, 1118925336;
|
|
add.s32 %r291, %r290, -1;
|
|
mov.b32 %f992, %r291;
|
|
add.f32 %f993, %f991, 0f37000000;
|
|
selp.f32 %f231, %f993, %f991, %p63;
|
|
selp.f32 %f994, %f992, %f988, %p63;
|
|
mov.f32 %f995, 0f3FB8AA3B;
|
|
mul.rn.f32 %f996, %f994, %f995;
|
|
cvt.rzi.f32.f32 %f997, %f996;
|
|
abs.f32 %f998, %f997;
|
|
setp.gt.f32 %p64, %f998, 0f42FC0000;
|
|
mov.b32 %r292, %f997;
|
|
and.b32 %r293, %r292, -2147483648;
|
|
or.b32 %r294, %r293, 1123811328;
|
|
mov.b32 %f999, %r294;
|
|
selp.f32 %f1000, %f999, %f997, %p64;
|
|
mov.f32 %f1001, 0fBF317218;
|
|
fma.rn.f32 %f1002, %f1000, %f1001, %f994;
|
|
mov.f32 %f1003, 0f3102E308;
|
|
fma.rn.f32 %f1004, %f1000, %f1003, %f1002;
|
|
mul.f32 %f1005, %f1004, 0f3FB8AA3B;
|
|
add.f32 %f1006, %f1000, 0f4B40007F;
|
|
mov.b32 %r295, %f1006;
|
|
shl.b32 %r296, %r295, 23;
|
|
mov.b32 %f1007, %r296;
|
|
ex2.approx.ftz.f32 %f1008, %f1005;
|
|
mul.f32 %f232, %f1008, %f1007;
|
|
setp.eq.f32 %p65, %f232, 0f7F800000;
|
|
mov.f32 %f1719, 0f7F800000;
|
|
@%p65 bra $L__BB0_56;
|
|
|
|
fma.rn.f32 %f1719, %f232, %f231, %f232;
|
|
|
|
$L__BB0_56:
|
|
setp.lt.f32 %p66, %f228, 0f00000000;
|
|
setp.eq.f32 %p67, %f229, 0f3F800000;
|
|
and.pred %p3, %p66, %p67;
|
|
setp.eq.f32 %p68, %f228, 0f00000000;
|
|
@%p68 bra $L__BB0_60;
|
|
bra.uni $L__BB0_57;
|
|
|
|
$L__BB0_60:
|
|
add.f32 %f1013, %f228, %f228;
|
|
selp.f32 %f1721, %f1013, 0f00000000, %p67;
|
|
bra.uni $L__BB0_61;
|
|
|
|
$L__BB0_161:
|
|
mov.f32 %f1598, 0f00000000;
|
|
mov.u32 %r427, 0;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs129, %f1598;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs128, %f1598;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs127, %f1598;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs130, 0;
|
|
st.global.v4.u16 [%rd16], {%rs127, %rs128, %rs129, %rs130};
|
|
|
|
$L__BB0_162:
|
|
ld.const.u64 %rd64, [params+256];
|
|
cvta.to.global.u64 %rd65, %rd64;
|
|
ld.const.u32 %r415, [params+248];
|
|
mad.lo.s32 %r416, %r415, %r4, %r3;
|
|
mul.wide.u32 %rd66, %r416, 8;
|
|
add.s64 %rd17, %rd65, %rd66;
|
|
setp.eq.s32 %p185, %r427, 0;
|
|
@%p185 bra $L__BB0_164;
|
|
|
|
ld.global.v4.u16 {%rs137, %rs138, %rs139, %rs140}, [%rd17];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1599, %rs137;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1600, %rs138;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1601, %rs139;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1602, %f1599, 0f00000000;
|
|
add.f32 %f1603, %f1600, 0f00000000;
|
|
add.f32 %f1604, %f1601, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs136, %f1604;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs135, %f1603;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs134, %f1602;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs141, 0;
|
|
st.global.v4.u16 [%rd17], {%rs134, %rs135, %rs136, %rs141};
|
|
bra.uni $L__BB0_165;
|
|
|
|
$L__BB0_164:
|
|
mov.f32 %f1607, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs144, %f1607;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs143, %f1607;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs142, %f1607;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs145, 0;
|
|
st.global.v4.u16 [%rd17], {%rs142, %rs143, %rs144, %rs145};
|
|
|
|
$L__BB0_165:
|
|
ld.const.u64 %rd67, [params+272];
|
|
cvta.to.global.u64 %rd68, %rd67;
|
|
ld.const.u32 %r417, [params+264];
|
|
mad.lo.s32 %r418, %r417, %r4, %r3;
|
|
mul.wide.u32 %rd69, %r418, 8;
|
|
add.s64 %rd18, %rd68, %rd69;
|
|
@%p185 bra $L__BB0_167;
|
|
|
|
ld.global.v4.u16 {%rs152, %rs153, %rs154, %rs155}, [%rd18];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1608, %rs152;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1609, %rs153;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1610, %rs154;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1611, %f1608, 0f00000000;
|
|
add.f32 %f1612, %f1609, 0f00000000;
|
|
add.f32 %f1613, %f1610, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs151, %f1613;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs150, %f1612;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs149, %f1611;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs156, 0;
|
|
st.global.v4.u16 [%rd18], {%rs149, %rs150, %rs151, %rs156};
|
|
bra.uni $L__BB0_168;
|
|
|
|
$L__BB0_167:
|
|
mov.f32 %f1616, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs159, %f1616;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs158, %f1616;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs157, %f1616;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs160, 0;
|
|
st.global.v4.u16 [%rd18], {%rs157, %rs158, %rs159, %rs160};
|
|
|
|
$L__BB0_168:
|
|
ld.const.u64 %rd70, [params+288];
|
|
cvta.to.global.u64 %rd71, %rd70;
|
|
ld.const.u32 %r419, [params+280];
|
|
mad.lo.s32 %r420, %r419, %r4, %r3;
|
|
mul.wide.u32 %rd72, %r420, 8;
|
|
add.s64 %rd19, %rd71, %rd72;
|
|
@%p185 bra $L__BB0_170;
|
|
|
|
ld.global.v4.u16 {%rs167, %rs168, %rs169, %rs170}, [%rd19];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1617, %rs167;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1618, %rs168;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1619, %rs169;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1620, %f1617, 0f00000000;
|
|
add.f32 %f1621, %f1618, 0f00000000;
|
|
add.f32 %f1622, %f1619, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs166, %f1622;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs165, %f1621;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs164, %f1620;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs171, 0;
|
|
st.global.v4.u16 [%rd19], {%rs164, %rs165, %rs166, %rs171};
|
|
bra.uni $L__BB0_171;
|
|
|
|
$L__BB0_170:
|
|
mov.f32 %f1625, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs174, %f1625;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs173, %f1625;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs172, %f1625;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs175, 0;
|
|
st.global.v4.u16 [%rd19], {%rs172, %rs173, %rs174, %rs175};
|
|
bra.uni $L__BB0_171;
|
|
|
|
$L__BB0_57:
|
|
mov.b32 %r297, %f1719;
|
|
xor.b32 %r298, %r297, -2147483648;
|
|
mov.b32 %f1009, %r298;
|
|
selp.f32 %f1721, %f1009, %f1719, %p3;
|
|
setp.geu.f32 %p69, %f228, 0f00000000;
|
|
@%p69 bra $L__BB0_61;
|
|
|
|
mov.f32 %f1010, 0f3EE8BA2E;
|
|
cvt.rzi.f32.f32 %f1011, %f1010;
|
|
setp.eq.f32 %p70, %f1011, 0f3EE8BA2E;
|
|
@%p70 bra $L__BB0_61;
|
|
|
|
mov.f32 %f1721, 0f7FFFFFFF;
|
|
|
|
$L__BB0_61:
|
|
add.f32 %f1014, %f230, 0f3EE8BA2E;
|
|
mov.b32 %r299, %f1014;
|
|
setp.lt.s32 %p72, %r299, 2139095040;
|
|
@%p72 bra $L__BB0_66;
|
|
|
|
setp.gtu.f32 %p73, %f230, 0f7F800000;
|
|
@%p73 bra $L__BB0_65;
|
|
bra.uni $L__BB0_63;
|
|
|
|
$L__BB0_65:
|
|
add.f32 %f1721, %f228, 0f3EE8BA2E;
|
|
bra.uni $L__BB0_66;
|
|
|
|
$L__BB0_63:
|
|
setp.neu.f32 %p74, %f230, 0f7F800000;
|
|
@%p74 bra $L__BB0_66;
|
|
|
|
selp.f32 %f1721, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
$L__BB0_66:
|
|
mul.f32 %f1015, %f1721, 0f437F0000;
|
|
setp.eq.f32 %p75, %f228, 0f3F800000;
|
|
selp.f32 %f1016, 0f437F0000, %f1015, %p75;
|
|
cvt.rzi.u32.f32 %r300, %f1016;
|
|
shl.b64 %rd36, %rd9, 1;
|
|
add.s64 %rd37, %rd8, %rd36;
|
|
cvt.u16.u32 %rs47, %r300;
|
|
mov.u16 %rs48, 255;
|
|
st.global.v2.u8 [%rd37], {%rs47, %rs48};
|
|
|
|
$L__BB0_67:
|
|
and.b32 %r301, %r425, 1;
|
|
setp.eq.b32 %p76, %r301, 1;
|
|
mov.pred %p77, 0;
|
|
xor.pred %p78, %p76, %p77;
|
|
not.pred %p79, %p78;
|
|
@%p79 bra $L__BB0_141;
|
|
|
|
mov.f32 %f1018, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f1019, %f1018;
|
|
add.f32 %f1020, %f1019, %f1019;
|
|
mov.f32 %f1021, 0f3EE66666;
|
|
sub.f32 %f1022, %f1021, %f1020;
|
|
abs.f32 %f241, %f1022;
|
|
abs.f32 %f242, %f1693;
|
|
setp.lt.f32 %p80, %f242, 0f00800000;
|
|
mul.f32 %f1023, %f242, 0f4B800000;
|
|
selp.f32 %f1024, %f1023, %f242, %p80;
|
|
selp.f32 %f1025, 0fC3170000, 0fC2FE0000, %p80;
|
|
mov.b32 %r302, %f1024;
|
|
and.b32 %r303, %r302, 8388607;
|
|
or.b32 %r304, %r303, 1065353216;
|
|
mov.b32 %f1026, %r304;
|
|
shr.u32 %r305, %r302, 23;
|
|
cvt.rn.f32.u32 %f1027, %r305;
|
|
add.f32 %f1028, %f1025, %f1027;
|
|
setp.gt.f32 %p81, %f1026, 0f3FB504F3;
|
|
mul.f32 %f1029, %f1026, 0f3F000000;
|
|
add.f32 %f1030, %f1028, 0f3F800000;
|
|
selp.f32 %f1031, %f1030, %f1028, %p81;
|
|
selp.f32 %f1032, %f1029, %f1026, %p81;
|
|
add.f32 %f1033, %f1032, 0fBF800000;
|
|
add.f32 %f1034, %f1032, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1035, %f1034;
|
|
add.f32 %f1036, %f1033, %f1033;
|
|
mul.f32 %f1037, %f1036, %f1035;
|
|
mul.f32 %f1038, %f1037, %f1037;
|
|
mov.f32 %f1039, 0f3C4CAF63;
|
|
mov.f32 %f1040, 0f3B18F0FE;
|
|
fma.rn.f32 %f1041, %f1040, %f1038, %f1039;
|
|
mov.f32 %f1042, 0f3DAAAABD;
|
|
fma.rn.f32 %f1043, %f1041, %f1038, %f1042;
|
|
mul.rn.f32 %f1044, %f1043, %f1038;
|
|
mul.rn.f32 %f1045, %f1044, %f1037;
|
|
sub.f32 %f1046, %f1033, %f1037;
|
|
add.f32 %f1047, %f1046, %f1046;
|
|
neg.f32 %f1048, %f1037;
|
|
fma.rn.f32 %f1049, %f1048, %f1033, %f1047;
|
|
mul.rn.f32 %f1050, %f1035, %f1049;
|
|
add.f32 %f1051, %f1045, %f1037;
|
|
sub.f32 %f1052, %f1037, %f1051;
|
|
add.f32 %f1053, %f1045, %f1052;
|
|
add.f32 %f1054, %f1050, %f1053;
|
|
add.f32 %f1055, %f1051, %f1054;
|
|
sub.f32 %f1056, %f1051, %f1055;
|
|
add.f32 %f1057, %f1054, %f1056;
|
|
mov.f32 %f1058, 0f3F317200;
|
|
mul.rn.f32 %f1059, %f1031, %f1058;
|
|
mov.f32 %f1060, 0f35BFBE8E;
|
|
mul.rn.f32 %f1061, %f1031, %f1060;
|
|
add.f32 %f1062, %f1059, %f1055;
|
|
sub.f32 %f1063, %f1059, %f1062;
|
|
add.f32 %f1064, %f1055, %f1063;
|
|
add.f32 %f1065, %f1057, %f1064;
|
|
add.f32 %f1066, %f1061, %f1065;
|
|
add.f32 %f1067, %f1062, %f1066;
|
|
sub.f32 %f1068, %f1062, %f1067;
|
|
add.f32 %f1069, %f1066, %f1068;
|
|
mul.rn.f32 %f1070, %f1021, %f1067;
|
|
neg.f32 %f1071, %f1070;
|
|
fma.rn.f32 %f1072, %f1021, %f1067, %f1071;
|
|
fma.rn.f32 %f1073, %f1021, %f1069, %f1072;
|
|
mov.f32 %f1074, 0f00000000;
|
|
fma.rn.f32 %f1075, %f1074, %f1067, %f1073;
|
|
add.rn.f32 %f1076, %f1070, %f1075;
|
|
neg.f32 %f1077, %f1076;
|
|
add.rn.f32 %f1078, %f1070, %f1077;
|
|
add.rn.f32 %f1079, %f1078, %f1075;
|
|
mov.b32 %r306, %f1076;
|
|
setp.eq.s32 %p82, %r306, 1118925336;
|
|
add.s32 %r307, %r306, -1;
|
|
mov.b32 %f1080, %r307;
|
|
add.f32 %f1081, %f1079, 0f37000000;
|
|
selp.f32 %f243, %f1081, %f1079, %p82;
|
|
selp.f32 %f1082, %f1080, %f1076, %p82;
|
|
mov.f32 %f1083, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1084, %f1082, %f1083;
|
|
cvt.rzi.f32.f32 %f1085, %f1084;
|
|
abs.f32 %f1086, %f1085;
|
|
setp.gt.f32 %p83, %f1086, 0f42FC0000;
|
|
mov.b32 %r308, %f1085;
|
|
and.b32 %r309, %r308, -2147483648;
|
|
or.b32 %r310, %r309, 1123811328;
|
|
mov.b32 %f1087, %r310;
|
|
selp.f32 %f1088, %f1087, %f1085, %p83;
|
|
mov.f32 %f1089, 0fBF317218;
|
|
fma.rn.f32 %f1090, %f1088, %f1089, %f1082;
|
|
mov.f32 %f1091, 0f3102E308;
|
|
fma.rn.f32 %f1092, %f1088, %f1091, %f1090;
|
|
mul.f32 %f1093, %f1092, 0f3FB8AA3B;
|
|
add.f32 %f1094, %f1088, 0f4B40007F;
|
|
mov.b32 %r311, %f1094;
|
|
shl.b32 %r312, %r311, 23;
|
|
mov.b32 %f1095, %r312;
|
|
ex2.approx.ftz.f32 %f1096, %f1093;
|
|
mul.f32 %f244, %f1096, %f1095;
|
|
setp.eq.f32 %p84, %f244, 0f7F800000;
|
|
mov.f32 %f1722, 0f7F800000;
|
|
@%p84 bra $L__BB0_70;
|
|
|
|
fma.rn.f32 %f1722, %f244, %f243, %f244;
|
|
|
|
$L__BB0_70:
|
|
setp.lt.f32 %p85, %f1693, 0f00000000;
|
|
setp.eq.f32 %p86, %f241, 0f3F800000;
|
|
and.pred %p4, %p85, %p86;
|
|
setp.eq.f32 %p87, %f1693, 0f00000000;
|
|
@%p87 bra $L__BB0_74;
|
|
bra.uni $L__BB0_71;
|
|
|
|
$L__BB0_74:
|
|
add.f32 %f1101, %f1693, %f1693;
|
|
selp.f32 %f1724, %f1101, 0f00000000, %p86;
|
|
bra.uni $L__BB0_75;
|
|
|
|
$L__BB0_71:
|
|
mov.b32 %r313, %f1722;
|
|
xor.b32 %r314, %r313, -2147483648;
|
|
mov.b32 %f1097, %r314;
|
|
selp.f32 %f1724, %f1097, %f1722, %p4;
|
|
setp.geu.f32 %p88, %f1693, 0f00000000;
|
|
@%p88 bra $L__BB0_75;
|
|
|
|
mov.f32 %f1098, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f1099, %f1098;
|
|
setp.eq.f32 %p89, %f1099, 0f3EE66666;
|
|
@%p89 bra $L__BB0_75;
|
|
|
|
mov.f32 %f1724, 0f7FFFFFFF;
|
|
|
|
$L__BB0_75:
|
|
add.f32 %f1102, %f242, 0f3EE66666;
|
|
mov.b32 %r315, %f1102;
|
|
setp.lt.s32 %p91, %r315, 2139095040;
|
|
@%p91 bra $L__BB0_80;
|
|
|
|
setp.gtu.f32 %p92, %f242, 0f7F800000;
|
|
@%p92 bra $L__BB0_79;
|
|
bra.uni $L__BB0_77;
|
|
|
|
$L__BB0_79:
|
|
add.f32 %f1724, %f1693, 0f3EE66666;
|
|
bra.uni $L__BB0_80;
|
|
|
|
$L__BB0_77:
|
|
setp.neu.f32 %p93, %f242, 0f7F800000;
|
|
@%p93 bra $L__BB0_80;
|
|
|
|
selp.f32 %f1724, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
$L__BB0_80:
|
|
setp.eq.f32 %p94, %f1693, 0f3F800000;
|
|
selp.f32 %f253, 0f3F800000, %f1724, %p94;
|
|
abs.f32 %f254, %f1694;
|
|
setp.lt.f32 %p95, %f254, 0f00800000;
|
|
mul.f32 %f1104, %f254, 0f4B800000;
|
|
selp.f32 %f1105, %f1104, %f254, %p95;
|
|
selp.f32 %f1106, 0fC3170000, 0fC2FE0000, %p95;
|
|
mov.b32 %r316, %f1105;
|
|
and.b32 %r317, %r316, 8388607;
|
|
or.b32 %r318, %r317, 1065353216;
|
|
mov.b32 %f1107, %r318;
|
|
shr.u32 %r319, %r316, 23;
|
|
cvt.rn.f32.u32 %f1108, %r319;
|
|
add.f32 %f1109, %f1106, %f1108;
|
|
setp.gt.f32 %p96, %f1107, 0f3FB504F3;
|
|
mul.f32 %f1110, %f1107, 0f3F000000;
|
|
add.f32 %f1111, %f1109, 0f3F800000;
|
|
selp.f32 %f1112, %f1111, %f1109, %p96;
|
|
selp.f32 %f1113, %f1110, %f1107, %p96;
|
|
add.f32 %f1114, %f1113, 0fBF800000;
|
|
add.f32 %f1115, %f1113, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1116, %f1115;
|
|
add.f32 %f1117, %f1114, %f1114;
|
|
mul.f32 %f1118, %f1117, %f1116;
|
|
mul.f32 %f1119, %f1118, %f1118;
|
|
mov.f32 %f1120, 0f3C4CAF63;
|
|
mov.f32 %f1121, 0f3B18F0FE;
|
|
fma.rn.f32 %f1122, %f1121, %f1119, %f1120;
|
|
mov.f32 %f1123, 0f3DAAAABD;
|
|
fma.rn.f32 %f1124, %f1122, %f1119, %f1123;
|
|
mul.rn.f32 %f1125, %f1124, %f1119;
|
|
mul.rn.f32 %f1126, %f1125, %f1118;
|
|
sub.f32 %f1127, %f1114, %f1118;
|
|
add.f32 %f1128, %f1127, %f1127;
|
|
neg.f32 %f1129, %f1118;
|
|
fma.rn.f32 %f1130, %f1129, %f1114, %f1128;
|
|
mul.rn.f32 %f1131, %f1116, %f1130;
|
|
add.f32 %f1132, %f1126, %f1118;
|
|
sub.f32 %f1133, %f1118, %f1132;
|
|
add.f32 %f1134, %f1126, %f1133;
|
|
add.f32 %f1135, %f1131, %f1134;
|
|
add.f32 %f1136, %f1132, %f1135;
|
|
sub.f32 %f1137, %f1132, %f1136;
|
|
add.f32 %f1138, %f1135, %f1137;
|
|
mov.f32 %f1139, 0f3F317200;
|
|
mul.rn.f32 %f1140, %f1112, %f1139;
|
|
mov.f32 %f1141, 0f35BFBE8E;
|
|
mul.rn.f32 %f1142, %f1112, %f1141;
|
|
add.f32 %f1143, %f1140, %f1136;
|
|
sub.f32 %f1144, %f1140, %f1143;
|
|
add.f32 %f1145, %f1136, %f1144;
|
|
add.f32 %f1146, %f1138, %f1145;
|
|
add.f32 %f1147, %f1142, %f1146;
|
|
add.f32 %f1148, %f1143, %f1147;
|
|
sub.f32 %f1149, %f1143, %f1148;
|
|
add.f32 %f1150, %f1147, %f1149;
|
|
mov.f32 %f1151, 0f3EE66666;
|
|
mul.rn.f32 %f1152, %f1151, %f1148;
|
|
neg.f32 %f1153, %f1152;
|
|
fma.rn.f32 %f1154, %f1151, %f1148, %f1153;
|
|
fma.rn.f32 %f1155, %f1151, %f1150, %f1154;
|
|
mov.f32 %f1156, 0f00000000;
|
|
fma.rn.f32 %f1157, %f1156, %f1148, %f1155;
|
|
add.rn.f32 %f1158, %f1152, %f1157;
|
|
neg.f32 %f1159, %f1158;
|
|
add.rn.f32 %f1160, %f1152, %f1159;
|
|
add.rn.f32 %f1161, %f1160, %f1157;
|
|
mov.b32 %r320, %f1158;
|
|
setp.eq.s32 %p97, %r320, 1118925336;
|
|
add.s32 %r321, %r320, -1;
|
|
mov.b32 %f1162, %r321;
|
|
add.f32 %f1163, %f1161, 0f37000000;
|
|
selp.f32 %f255, %f1163, %f1161, %p97;
|
|
selp.f32 %f1164, %f1162, %f1158, %p97;
|
|
mov.f32 %f1165, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1166, %f1164, %f1165;
|
|
cvt.rzi.f32.f32 %f1167, %f1166;
|
|
abs.f32 %f1168, %f1167;
|
|
setp.gt.f32 %p98, %f1168, 0f42FC0000;
|
|
mov.b32 %r322, %f1167;
|
|
and.b32 %r323, %r322, -2147483648;
|
|
or.b32 %r324, %r323, 1123811328;
|
|
mov.b32 %f1169, %r324;
|
|
selp.f32 %f1170, %f1169, %f1167, %p98;
|
|
mov.f32 %f1171, 0fBF317218;
|
|
fma.rn.f32 %f1172, %f1170, %f1171, %f1164;
|
|
mov.f32 %f1173, 0f3102E308;
|
|
fma.rn.f32 %f1174, %f1170, %f1173, %f1172;
|
|
mul.f32 %f1175, %f1174, 0f3FB8AA3B;
|
|
add.f32 %f1176, %f1170, 0f4B40007F;
|
|
mov.b32 %r325, %f1176;
|
|
shl.b32 %r326, %r325, 23;
|
|
mov.b32 %f1177, %r326;
|
|
ex2.approx.ftz.f32 %f1178, %f1175;
|
|
mul.f32 %f256, %f1178, %f1177;
|
|
setp.eq.f32 %p99, %f256, 0f7F800000;
|
|
mov.f32 %f1725, 0f7F800000;
|
|
@%p99 bra $L__BB0_82;
|
|
|
|
fma.rn.f32 %f1725, %f256, %f255, %f256;
|
|
|
|
$L__BB0_82:
|
|
setp.lt.f32 %p100, %f1694, 0f00000000;
|
|
and.pred %p5, %p100, %p86;
|
|
setp.eq.f32 %p102, %f1694, 0f00000000;
|
|
@%p102 bra $L__BB0_86;
|
|
bra.uni $L__BB0_83;
|
|
|
|
$L__BB0_86:
|
|
add.f32 %f1183, %f1694, %f1694;
|
|
selp.f32 %f1727, %f1183, 0f00000000, %p86;
|
|
bra.uni $L__BB0_87;
|
|
|
|
$L__BB0_83:
|
|
mov.b32 %r327, %f1725;
|
|
xor.b32 %r328, %r327, -2147483648;
|
|
mov.b32 %f1179, %r328;
|
|
selp.f32 %f1727, %f1179, %f1725, %p5;
|
|
setp.geu.f32 %p103, %f1694, 0f00000000;
|
|
@%p103 bra $L__BB0_87;
|
|
|
|
mov.f32 %f1180, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f1181, %f1180;
|
|
setp.eq.f32 %p104, %f1181, 0f3EE66666;
|
|
@%p104 bra $L__BB0_87;
|
|
|
|
mov.f32 %f1727, 0f7FFFFFFF;
|
|
|
|
$L__BB0_87:
|
|
add.f32 %f1184, %f254, 0f3EE66666;
|
|
mov.b32 %r329, %f1184;
|
|
setp.lt.s32 %p106, %r329, 2139095040;
|
|
@%p106 bra $L__BB0_92;
|
|
|
|
setp.gtu.f32 %p107, %f254, 0f7F800000;
|
|
@%p107 bra $L__BB0_91;
|
|
bra.uni $L__BB0_89;
|
|
|
|
$L__BB0_91:
|
|
add.f32 %f1727, %f1694, 0f3EE66666;
|
|
bra.uni $L__BB0_92;
|
|
|
|
$L__BB0_89:
|
|
setp.neu.f32 %p108, %f254, 0f7F800000;
|
|
@%p108 bra $L__BB0_92;
|
|
|
|
selp.f32 %f1727, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
$L__BB0_92:
|
|
setp.eq.f32 %p109, %f1694, 0f3F800000;
|
|
selp.f32 %f265, 0f3F800000, %f1727, %p109;
|
|
abs.f32 %f266, %f1695;
|
|
setp.lt.f32 %p110, %f266, 0f00800000;
|
|
mul.f32 %f1186, %f266, 0f4B800000;
|
|
selp.f32 %f1187, %f1186, %f266, %p110;
|
|
selp.f32 %f1188, 0fC3170000, 0fC2FE0000, %p110;
|
|
mov.b32 %r330, %f1187;
|
|
and.b32 %r331, %r330, 8388607;
|
|
or.b32 %r332, %r331, 1065353216;
|
|
mov.b32 %f1189, %r332;
|
|
shr.u32 %r333, %r330, 23;
|
|
cvt.rn.f32.u32 %f1190, %r333;
|
|
add.f32 %f1191, %f1188, %f1190;
|
|
setp.gt.f32 %p111, %f1189, 0f3FB504F3;
|
|
mul.f32 %f1192, %f1189, 0f3F000000;
|
|
add.f32 %f1193, %f1191, 0f3F800000;
|
|
selp.f32 %f1194, %f1193, %f1191, %p111;
|
|
selp.f32 %f1195, %f1192, %f1189, %p111;
|
|
add.f32 %f1196, %f1195, 0fBF800000;
|
|
add.f32 %f1197, %f1195, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1198, %f1197;
|
|
add.f32 %f1199, %f1196, %f1196;
|
|
mul.f32 %f1200, %f1199, %f1198;
|
|
mul.f32 %f1201, %f1200, %f1200;
|
|
mov.f32 %f1202, 0f3C4CAF63;
|
|
mov.f32 %f1203, 0f3B18F0FE;
|
|
fma.rn.f32 %f1204, %f1203, %f1201, %f1202;
|
|
mov.f32 %f1205, 0f3DAAAABD;
|
|
fma.rn.f32 %f1206, %f1204, %f1201, %f1205;
|
|
mul.rn.f32 %f1207, %f1206, %f1201;
|
|
mul.rn.f32 %f1208, %f1207, %f1200;
|
|
sub.f32 %f1209, %f1196, %f1200;
|
|
add.f32 %f1210, %f1209, %f1209;
|
|
neg.f32 %f1211, %f1200;
|
|
fma.rn.f32 %f1212, %f1211, %f1196, %f1210;
|
|
mul.rn.f32 %f1213, %f1198, %f1212;
|
|
add.f32 %f1214, %f1208, %f1200;
|
|
sub.f32 %f1215, %f1200, %f1214;
|
|
add.f32 %f1216, %f1208, %f1215;
|
|
add.f32 %f1217, %f1213, %f1216;
|
|
add.f32 %f1218, %f1214, %f1217;
|
|
sub.f32 %f1219, %f1214, %f1218;
|
|
add.f32 %f1220, %f1217, %f1219;
|
|
mov.f32 %f1221, 0f3F317200;
|
|
mul.rn.f32 %f1222, %f1194, %f1221;
|
|
mov.f32 %f1223, 0f35BFBE8E;
|
|
mul.rn.f32 %f1224, %f1194, %f1223;
|
|
add.f32 %f1225, %f1222, %f1218;
|
|
sub.f32 %f1226, %f1222, %f1225;
|
|
add.f32 %f1227, %f1218, %f1226;
|
|
add.f32 %f1228, %f1220, %f1227;
|
|
add.f32 %f1229, %f1224, %f1228;
|
|
add.f32 %f1230, %f1225, %f1229;
|
|
sub.f32 %f1231, %f1225, %f1230;
|
|
add.f32 %f1232, %f1229, %f1231;
|
|
mov.f32 %f1233, 0f3EE66666;
|
|
mul.rn.f32 %f1234, %f1233, %f1230;
|
|
neg.f32 %f1235, %f1234;
|
|
fma.rn.f32 %f1236, %f1233, %f1230, %f1235;
|
|
fma.rn.f32 %f1237, %f1233, %f1232, %f1236;
|
|
mov.f32 %f1238, 0f00000000;
|
|
fma.rn.f32 %f1239, %f1238, %f1230, %f1237;
|
|
add.rn.f32 %f1240, %f1234, %f1239;
|
|
neg.f32 %f1241, %f1240;
|
|
add.rn.f32 %f1242, %f1234, %f1241;
|
|
add.rn.f32 %f1243, %f1242, %f1239;
|
|
mov.b32 %r334, %f1240;
|
|
setp.eq.s32 %p112, %r334, 1118925336;
|
|
add.s32 %r335, %r334, -1;
|
|
mov.b32 %f1244, %r335;
|
|
add.f32 %f1245, %f1243, 0f37000000;
|
|
selp.f32 %f267, %f1245, %f1243, %p112;
|
|
selp.f32 %f1246, %f1244, %f1240, %p112;
|
|
mov.f32 %f1247, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1248, %f1246, %f1247;
|
|
cvt.rzi.f32.f32 %f1249, %f1248;
|
|
abs.f32 %f1250, %f1249;
|
|
setp.gt.f32 %p113, %f1250, 0f42FC0000;
|
|
mov.b32 %r336, %f1249;
|
|
and.b32 %r337, %r336, -2147483648;
|
|
or.b32 %r338, %r337, 1123811328;
|
|
mov.b32 %f1251, %r338;
|
|
selp.f32 %f1252, %f1251, %f1249, %p113;
|
|
mov.f32 %f1253, 0fBF317218;
|
|
fma.rn.f32 %f1254, %f1252, %f1253, %f1246;
|
|
mov.f32 %f1255, 0f3102E308;
|
|
fma.rn.f32 %f1256, %f1252, %f1255, %f1254;
|
|
mul.f32 %f1257, %f1256, 0f3FB8AA3B;
|
|
add.f32 %f1258, %f1252, 0f4B40007F;
|
|
mov.b32 %r339, %f1258;
|
|
shl.b32 %r340, %r339, 23;
|
|
mov.b32 %f1259, %r340;
|
|
ex2.approx.ftz.f32 %f1260, %f1257;
|
|
mul.f32 %f268, %f1260, %f1259;
|
|
setp.eq.f32 %p114, %f268, 0f7F800000;
|
|
mov.f32 %f1728, 0f7F800000;
|
|
@%p114 bra $L__BB0_94;
|
|
|
|
fma.rn.f32 %f1728, %f268, %f267, %f268;
|
|
|
|
$L__BB0_94:
|
|
setp.lt.f32 %p115, %f1695, 0f00000000;
|
|
and.pred %p6, %p115, %p86;
|
|
setp.eq.f32 %p117, %f1695, 0f00000000;
|
|
@%p117 bra $L__BB0_98;
|
|
bra.uni $L__BB0_95;
|
|
|
|
$L__BB0_98:
|
|
add.f32 %f1265, %f1695, %f1695;
|
|
selp.f32 %f1730, %f1265, 0f00000000, %p86;
|
|
bra.uni $L__BB0_99;
|
|
|
|
$L__BB0_95:
|
|
mov.b32 %r341, %f1728;
|
|
xor.b32 %r342, %r341, -2147483648;
|
|
mov.b32 %f1261, %r342;
|
|
selp.f32 %f1730, %f1261, %f1728, %p6;
|
|
setp.geu.f32 %p118, %f1695, 0f00000000;
|
|
@%p118 bra $L__BB0_99;
|
|
|
|
mov.f32 %f1262, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f1263, %f1262;
|
|
setp.eq.f32 %p119, %f1263, 0f3EE66666;
|
|
@%p119 bra $L__BB0_99;
|
|
|
|
mov.f32 %f1730, 0f7FFFFFFF;
|
|
|
|
$L__BB0_99:
|
|
add.f32 %f1266, %f266, 0f3EE66666;
|
|
mov.b32 %r343, %f1266;
|
|
setp.lt.s32 %p121, %r343, 2139095040;
|
|
@%p121 bra $L__BB0_104;
|
|
|
|
setp.gtu.f32 %p122, %f266, 0f7F800000;
|
|
@%p122 bra $L__BB0_103;
|
|
bra.uni $L__BB0_101;
|
|
|
|
$L__BB0_103:
|
|
add.f32 %f1730, %f1695, 0f3EE66666;
|
|
bra.uni $L__BB0_104;
|
|
|
|
$L__BB0_101:
|
|
setp.neu.f32 %p123, %f266, 0f7F800000;
|
|
@%p123 bra $L__BB0_104;
|
|
|
|
selp.f32 %f1730, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
$L__BB0_104:
|
|
setp.eq.f32 %p124, %f1695, 0f3F800000;
|
|
mov.f32 %f1268, 0f3F800000;
|
|
selp.f32 %f1269, 0f3F800000, %f1730, %p124;
|
|
ld.const.u64 %rd38, [params+144];
|
|
cvta.to.global.u64 %rd10, %rd38;
|
|
ld.const.u32 %r344, [params+136];
|
|
mad.lo.s32 %r345, %r344, %r4, %r3;
|
|
cvt.u64.u32 %rd11, %r345;
|
|
min.f32 %f1270, %f253, %f1268;
|
|
mov.f32 %f1271, 0f00000000;
|
|
max.f32 %f277, %f1271, %f1270;
|
|
min.f32 %f1272, %f265, %f1268;
|
|
max.f32 %f278, %f1271, %f1272;
|
|
min.f32 %f1273, %f1269, %f1268;
|
|
max.f32 %f279, %f1271, %f1273;
|
|
mov.f32 %f1274, 0f3E555555;
|
|
cvt.rzi.f32.f32 %f1275, %f1274;
|
|
add.f32 %f1276, %f1275, %f1275;
|
|
mov.f32 %f1277, 0f3ED55555;
|
|
sub.f32 %f1278, %f1277, %f1276;
|
|
abs.f32 %f280, %f1278;
|
|
abs.f32 %f281, %f277;
|
|
setp.lt.f32 %p125, %f281, 0f00800000;
|
|
mul.f32 %f1279, %f281, 0f4B800000;
|
|
selp.f32 %f1280, %f1279, %f281, %p125;
|
|
selp.f32 %f1281, 0fC3170000, 0fC2FE0000, %p125;
|
|
mov.b32 %r346, %f1280;
|
|
and.b32 %r347, %r346, 8388607;
|
|
or.b32 %r348, %r347, 1065353216;
|
|
mov.b32 %f1282, %r348;
|
|
shr.u32 %r349, %r346, 23;
|
|
cvt.rn.f32.u32 %f1283, %r349;
|
|
add.f32 %f1284, %f1281, %f1283;
|
|
setp.gt.f32 %p126, %f1282, 0f3FB504F3;
|
|
mul.f32 %f1285, %f1282, 0f3F000000;
|
|
add.f32 %f1286, %f1284, 0f3F800000;
|
|
selp.f32 %f1287, %f1286, %f1284, %p126;
|
|
selp.f32 %f1288, %f1285, %f1282, %p126;
|
|
add.f32 %f1289, %f1288, 0fBF800000;
|
|
add.f32 %f1290, %f1288, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1291, %f1290;
|
|
add.f32 %f1292, %f1289, %f1289;
|
|
mul.f32 %f1293, %f1292, %f1291;
|
|
mul.f32 %f1294, %f1293, %f1293;
|
|
mov.f32 %f1295, 0f3C4CAF63;
|
|
mov.f32 %f1296, 0f3B18F0FE;
|
|
fma.rn.f32 %f1297, %f1296, %f1294, %f1295;
|
|
mov.f32 %f1298, 0f3DAAAABD;
|
|
fma.rn.f32 %f1299, %f1297, %f1294, %f1298;
|
|
mul.rn.f32 %f1300, %f1299, %f1294;
|
|
mul.rn.f32 %f1301, %f1300, %f1293;
|
|
sub.f32 %f1302, %f1289, %f1293;
|
|
add.f32 %f1303, %f1302, %f1302;
|
|
neg.f32 %f1304, %f1293;
|
|
fma.rn.f32 %f1305, %f1304, %f1289, %f1303;
|
|
mul.rn.f32 %f1306, %f1291, %f1305;
|
|
add.f32 %f1307, %f1301, %f1293;
|
|
sub.f32 %f1308, %f1293, %f1307;
|
|
add.f32 %f1309, %f1301, %f1308;
|
|
add.f32 %f1310, %f1306, %f1309;
|
|
add.f32 %f1311, %f1307, %f1310;
|
|
sub.f32 %f1312, %f1307, %f1311;
|
|
add.f32 %f1313, %f1310, %f1312;
|
|
mov.f32 %f1314, 0f3F317200;
|
|
mul.rn.f32 %f1315, %f1287, %f1314;
|
|
mov.f32 %f1316, 0f35BFBE8E;
|
|
mul.rn.f32 %f1317, %f1287, %f1316;
|
|
add.f32 %f1318, %f1315, %f1311;
|
|
sub.f32 %f1319, %f1315, %f1318;
|
|
add.f32 %f1320, %f1311, %f1319;
|
|
add.f32 %f1321, %f1313, %f1320;
|
|
add.f32 %f1322, %f1317, %f1321;
|
|
add.f32 %f1323, %f1318, %f1322;
|
|
sub.f32 %f1324, %f1318, %f1323;
|
|
add.f32 %f1325, %f1322, %f1324;
|
|
mul.rn.f32 %f1326, %f1277, %f1323;
|
|
neg.f32 %f1327, %f1326;
|
|
fma.rn.f32 %f1328, %f1277, %f1323, %f1327;
|
|
fma.rn.f32 %f1329, %f1277, %f1325, %f1328;
|
|
fma.rn.f32 %f1330, %f1271, %f1323, %f1329;
|
|
add.rn.f32 %f1331, %f1326, %f1330;
|
|
neg.f32 %f1332, %f1331;
|
|
add.rn.f32 %f1333, %f1326, %f1332;
|
|
add.rn.f32 %f1334, %f1333, %f1330;
|
|
mov.b32 %r350, %f1331;
|
|
setp.eq.s32 %p127, %r350, 1118925336;
|
|
add.s32 %r351, %r350, -1;
|
|
mov.b32 %f1335, %r351;
|
|
add.f32 %f1336, %f1334, 0f37000000;
|
|
selp.f32 %f282, %f1336, %f1334, %p127;
|
|
selp.f32 %f1337, %f1335, %f1331, %p127;
|
|
mov.f32 %f1338, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1339, %f1337, %f1338;
|
|
cvt.rzi.f32.f32 %f1340, %f1339;
|
|
abs.f32 %f1341, %f1340;
|
|
setp.gt.f32 %p128, %f1341, 0f42FC0000;
|
|
mov.b32 %r352, %f1340;
|
|
and.b32 %r353, %r352, -2147483648;
|
|
or.b32 %r354, %r353, 1123811328;
|
|
mov.b32 %f1342, %r354;
|
|
selp.f32 %f1343, %f1342, %f1340, %p128;
|
|
mov.f32 %f1344, 0fBF317218;
|
|
fma.rn.f32 %f1345, %f1343, %f1344, %f1337;
|
|
mov.f32 %f1346, 0f3102E308;
|
|
fma.rn.f32 %f1347, %f1343, %f1346, %f1345;
|
|
mul.f32 %f1348, %f1347, 0f3FB8AA3B;
|
|
add.f32 %f1349, %f1343, 0f4B40007F;
|
|
mov.b32 %r355, %f1349;
|
|
shl.b32 %r356, %r355, 23;
|
|
mov.b32 %f1350, %r356;
|
|
ex2.approx.ftz.f32 %f1351, %f1348;
|
|
mul.f32 %f283, %f1351, %f1350;
|
|
setp.eq.f32 %p129, %f283, 0f7F800000;
|
|
mov.f32 %f1731, 0f7F800000;
|
|
@%p129 bra $L__BB0_106;
|
|
|
|
fma.rn.f32 %f1731, %f283, %f282, %f283;
|
|
|
|
$L__BB0_106:
|
|
setp.lt.f32 %p130, %f277, 0f00000000;
|
|
setp.eq.f32 %p131, %f280, 0f3F800000;
|
|
and.pred %p7, %p130, %p131;
|
|
setp.eq.f32 %p132, %f277, 0f00000000;
|
|
@%p132 bra $L__BB0_110;
|
|
bra.uni $L__BB0_107;
|
|
|
|
$L__BB0_110:
|
|
add.f32 %f1356, %f277, %f277;
|
|
selp.f32 %f1733, %f1356, 0f00000000, %p131;
|
|
bra.uni $L__BB0_111;
|
|
|
|
$L__BB0_107:
|
|
mov.b32 %r357, %f1731;
|
|
xor.b32 %r358, %r357, -2147483648;
|
|
mov.b32 %f1352, %r358;
|
|
selp.f32 %f1733, %f1352, %f1731, %p7;
|
|
setp.geu.f32 %p133, %f277, 0f00000000;
|
|
@%p133 bra $L__BB0_111;
|
|
|
|
mov.f32 %f1353, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1354, %f1353;
|
|
setp.eq.f32 %p134, %f1354, 0f3ED55555;
|
|
@%p134 bra $L__BB0_111;
|
|
|
|
mov.f32 %f1733, 0f7FFFFFFF;
|
|
|
|
$L__BB0_111:
|
|
add.f32 %f1357, %f281, 0f3ED55555;
|
|
mov.b32 %r359, %f1357;
|
|
setp.lt.s32 %p136, %r359, 2139095040;
|
|
@%p136 bra $L__BB0_116;
|
|
|
|
setp.gtu.f32 %p137, %f281, 0f7F800000;
|
|
@%p137 bra $L__BB0_115;
|
|
bra.uni $L__BB0_113;
|
|
|
|
$L__BB0_115:
|
|
add.f32 %f1733, %f277, 0f3ED55555;
|
|
bra.uni $L__BB0_116;
|
|
|
|
$L__BB0_113:
|
|
setp.neu.f32 %p138, %f281, 0f7F800000;
|
|
@%p138 bra $L__BB0_116;
|
|
|
|
selp.f32 %f1733, 0fFF800000, 0f7F800000, %p7;
|
|
|
|
$L__BB0_116:
|
|
abs.f32 %f292, %f278;
|
|
setp.lt.f32 %p139, %f292, 0f00800000;
|
|
mul.f32 %f1359, %f292, 0f4B800000;
|
|
selp.f32 %f1360, %f1359, %f292, %p139;
|
|
selp.f32 %f1361, 0fC3170000, 0fC2FE0000, %p139;
|
|
mov.b32 %r360, %f1360;
|
|
and.b32 %r361, %r360, 8388607;
|
|
or.b32 %r362, %r361, 1065353216;
|
|
mov.b32 %f1362, %r362;
|
|
shr.u32 %r363, %r360, 23;
|
|
cvt.rn.f32.u32 %f1363, %r363;
|
|
add.f32 %f1364, %f1361, %f1363;
|
|
setp.gt.f32 %p140, %f1362, 0f3FB504F3;
|
|
mul.f32 %f1365, %f1362, 0f3F000000;
|
|
add.f32 %f1366, %f1364, 0f3F800000;
|
|
selp.f32 %f1367, %f1366, %f1364, %p140;
|
|
selp.f32 %f1368, %f1365, %f1362, %p140;
|
|
add.f32 %f1369, %f1368, 0fBF800000;
|
|
add.f32 %f1370, %f1368, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1371, %f1370;
|
|
add.f32 %f1372, %f1369, %f1369;
|
|
mul.f32 %f1373, %f1372, %f1371;
|
|
mul.f32 %f1374, %f1373, %f1373;
|
|
mov.f32 %f1375, 0f3C4CAF63;
|
|
mov.f32 %f1376, 0f3B18F0FE;
|
|
fma.rn.f32 %f1377, %f1376, %f1374, %f1375;
|
|
mov.f32 %f1378, 0f3DAAAABD;
|
|
fma.rn.f32 %f1379, %f1377, %f1374, %f1378;
|
|
mul.rn.f32 %f1380, %f1379, %f1374;
|
|
mul.rn.f32 %f1381, %f1380, %f1373;
|
|
sub.f32 %f1382, %f1369, %f1373;
|
|
add.f32 %f1383, %f1382, %f1382;
|
|
neg.f32 %f1384, %f1373;
|
|
fma.rn.f32 %f1385, %f1384, %f1369, %f1383;
|
|
mul.rn.f32 %f1386, %f1371, %f1385;
|
|
add.f32 %f1387, %f1381, %f1373;
|
|
sub.f32 %f1388, %f1373, %f1387;
|
|
add.f32 %f1389, %f1381, %f1388;
|
|
add.f32 %f1390, %f1386, %f1389;
|
|
add.f32 %f1391, %f1387, %f1390;
|
|
sub.f32 %f1392, %f1387, %f1391;
|
|
add.f32 %f1393, %f1390, %f1392;
|
|
mov.f32 %f1394, 0f3F317200;
|
|
mul.rn.f32 %f1395, %f1367, %f1394;
|
|
mov.f32 %f1396, 0f35BFBE8E;
|
|
mul.rn.f32 %f1397, %f1367, %f1396;
|
|
add.f32 %f1398, %f1395, %f1391;
|
|
sub.f32 %f1399, %f1395, %f1398;
|
|
add.f32 %f1400, %f1391, %f1399;
|
|
add.f32 %f1401, %f1393, %f1400;
|
|
add.f32 %f1402, %f1397, %f1401;
|
|
add.f32 %f1403, %f1398, %f1402;
|
|
sub.f32 %f1404, %f1398, %f1403;
|
|
add.f32 %f1405, %f1402, %f1404;
|
|
mov.f32 %f1406, 0f3ED55555;
|
|
mul.rn.f32 %f1407, %f1406, %f1403;
|
|
neg.f32 %f1408, %f1407;
|
|
fma.rn.f32 %f1409, %f1406, %f1403, %f1408;
|
|
fma.rn.f32 %f1410, %f1406, %f1405, %f1409;
|
|
mov.f32 %f1411, 0f00000000;
|
|
fma.rn.f32 %f1412, %f1411, %f1403, %f1410;
|
|
add.rn.f32 %f1413, %f1407, %f1412;
|
|
neg.f32 %f1414, %f1413;
|
|
add.rn.f32 %f1415, %f1407, %f1414;
|
|
add.rn.f32 %f1416, %f1415, %f1412;
|
|
mov.b32 %r364, %f1413;
|
|
setp.eq.s32 %p141, %r364, 1118925336;
|
|
add.s32 %r365, %r364, -1;
|
|
mov.b32 %f1417, %r365;
|
|
add.f32 %f1418, %f1416, 0f37000000;
|
|
selp.f32 %f293, %f1418, %f1416, %p141;
|
|
selp.f32 %f1419, %f1417, %f1413, %p141;
|
|
mov.f32 %f1420, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1421, %f1419, %f1420;
|
|
cvt.rzi.f32.f32 %f1422, %f1421;
|
|
abs.f32 %f1423, %f1422;
|
|
setp.gt.f32 %p142, %f1423, 0f42FC0000;
|
|
mov.b32 %r366, %f1422;
|
|
and.b32 %r367, %r366, -2147483648;
|
|
or.b32 %r368, %r367, 1123811328;
|
|
mov.b32 %f1424, %r368;
|
|
selp.f32 %f1425, %f1424, %f1422, %p142;
|
|
mov.f32 %f1426, 0fBF317218;
|
|
fma.rn.f32 %f1427, %f1425, %f1426, %f1419;
|
|
mov.f32 %f1428, 0f3102E308;
|
|
fma.rn.f32 %f1429, %f1425, %f1428, %f1427;
|
|
mul.f32 %f1430, %f1429, 0f3FB8AA3B;
|
|
add.f32 %f1431, %f1425, 0f4B40007F;
|
|
mov.b32 %r369, %f1431;
|
|
shl.b32 %r370, %r369, 23;
|
|
mov.b32 %f1432, %r370;
|
|
ex2.approx.ftz.f32 %f1433, %f1430;
|
|
mul.f32 %f294, %f1433, %f1432;
|
|
setp.eq.f32 %p143, %f294, 0f7F800000;
|
|
mov.f32 %f1734, 0f7F800000;
|
|
@%p143 bra $L__BB0_118;
|
|
|
|
fma.rn.f32 %f1734, %f294, %f293, %f294;
|
|
|
|
$L__BB0_118:
|
|
setp.lt.f32 %p144, %f278, 0f00000000;
|
|
and.pred %p8, %p144, %p131;
|
|
setp.eq.f32 %p146, %f278, 0f00000000;
|
|
@%p146 bra $L__BB0_122;
|
|
bra.uni $L__BB0_119;
|
|
|
|
$L__BB0_122:
|
|
add.f32 %f1438, %f278, %f278;
|
|
selp.f32 %f1736, %f1438, 0f00000000, %p131;
|
|
bra.uni $L__BB0_123;
|
|
|
|
$L__BB0_119:
|
|
mov.b32 %r371, %f1734;
|
|
xor.b32 %r372, %r371, -2147483648;
|
|
mov.b32 %f1434, %r372;
|
|
selp.f32 %f1736, %f1434, %f1734, %p8;
|
|
setp.geu.f32 %p147, %f278, 0f00000000;
|
|
@%p147 bra $L__BB0_123;
|
|
|
|
mov.f32 %f1435, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1436, %f1435;
|
|
setp.eq.f32 %p148, %f1436, 0f3ED55555;
|
|
@%p148 bra $L__BB0_123;
|
|
|
|
mov.f32 %f1736, 0f7FFFFFFF;
|
|
|
|
$L__BB0_123:
|
|
add.f32 %f1439, %f292, 0f3ED55555;
|
|
mov.b32 %r373, %f1439;
|
|
setp.lt.s32 %p150, %r373, 2139095040;
|
|
@%p150 bra $L__BB0_128;
|
|
|
|
setp.gtu.f32 %p151, %f292, 0f7F800000;
|
|
@%p151 bra $L__BB0_127;
|
|
bra.uni $L__BB0_125;
|
|
|
|
$L__BB0_127:
|
|
add.f32 %f1736, %f278, 0f3ED55555;
|
|
bra.uni $L__BB0_128;
|
|
|
|
$L__BB0_125:
|
|
setp.neu.f32 %p152, %f292, 0f7F800000;
|
|
@%p152 bra $L__BB0_128;
|
|
|
|
selp.f32 %f1736, 0fFF800000, 0f7F800000, %p8;
|
|
|
|
$L__BB0_128:
|
|
abs.f32 %f303, %f279;
|
|
setp.lt.f32 %p153, %f303, 0f00800000;
|
|
mul.f32 %f1441, %f303, 0f4B800000;
|
|
selp.f32 %f1442, %f1441, %f303, %p153;
|
|
selp.f32 %f1443, 0fC3170000, 0fC2FE0000, %p153;
|
|
mov.b32 %r374, %f1442;
|
|
and.b32 %r375, %r374, 8388607;
|
|
or.b32 %r376, %r375, 1065353216;
|
|
mov.b32 %f1444, %r376;
|
|
shr.u32 %r377, %r374, 23;
|
|
cvt.rn.f32.u32 %f1445, %r377;
|
|
add.f32 %f1446, %f1443, %f1445;
|
|
setp.gt.f32 %p154, %f1444, 0f3FB504F3;
|
|
mul.f32 %f1447, %f1444, 0f3F000000;
|
|
add.f32 %f1448, %f1446, 0f3F800000;
|
|
selp.f32 %f1449, %f1448, %f1446, %p154;
|
|
selp.f32 %f1450, %f1447, %f1444, %p154;
|
|
add.f32 %f1451, %f1450, 0fBF800000;
|
|
add.f32 %f1452, %f1450, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1453, %f1452;
|
|
add.f32 %f1454, %f1451, %f1451;
|
|
mul.f32 %f1455, %f1454, %f1453;
|
|
mul.f32 %f1456, %f1455, %f1455;
|
|
mov.f32 %f1457, 0f3C4CAF63;
|
|
mov.f32 %f1458, 0f3B18F0FE;
|
|
fma.rn.f32 %f1459, %f1458, %f1456, %f1457;
|
|
mov.f32 %f1460, 0f3DAAAABD;
|
|
fma.rn.f32 %f1461, %f1459, %f1456, %f1460;
|
|
mul.rn.f32 %f1462, %f1461, %f1456;
|
|
mul.rn.f32 %f1463, %f1462, %f1455;
|
|
sub.f32 %f1464, %f1451, %f1455;
|
|
add.f32 %f1465, %f1464, %f1464;
|
|
neg.f32 %f1466, %f1455;
|
|
fma.rn.f32 %f1467, %f1466, %f1451, %f1465;
|
|
mul.rn.f32 %f1468, %f1453, %f1467;
|
|
add.f32 %f1469, %f1463, %f1455;
|
|
sub.f32 %f1470, %f1455, %f1469;
|
|
add.f32 %f1471, %f1463, %f1470;
|
|
add.f32 %f1472, %f1468, %f1471;
|
|
add.f32 %f1473, %f1469, %f1472;
|
|
sub.f32 %f1474, %f1469, %f1473;
|
|
add.f32 %f1475, %f1472, %f1474;
|
|
mov.f32 %f1476, 0f3F317200;
|
|
mul.rn.f32 %f1477, %f1449, %f1476;
|
|
mov.f32 %f1478, 0f35BFBE8E;
|
|
mul.rn.f32 %f1479, %f1449, %f1478;
|
|
add.f32 %f1480, %f1477, %f1473;
|
|
sub.f32 %f1481, %f1477, %f1480;
|
|
add.f32 %f1482, %f1473, %f1481;
|
|
add.f32 %f1483, %f1475, %f1482;
|
|
add.f32 %f1484, %f1479, %f1483;
|
|
add.f32 %f1485, %f1480, %f1484;
|
|
sub.f32 %f1486, %f1480, %f1485;
|
|
add.f32 %f1487, %f1484, %f1486;
|
|
mov.f32 %f1488, 0f3ED55555;
|
|
mul.rn.f32 %f1489, %f1488, %f1485;
|
|
neg.f32 %f1490, %f1489;
|
|
fma.rn.f32 %f1491, %f1488, %f1485, %f1490;
|
|
fma.rn.f32 %f1492, %f1488, %f1487, %f1491;
|
|
mov.f32 %f1493, 0f00000000;
|
|
fma.rn.f32 %f1494, %f1493, %f1485, %f1492;
|
|
add.rn.f32 %f1495, %f1489, %f1494;
|
|
neg.f32 %f1496, %f1495;
|
|
add.rn.f32 %f1497, %f1489, %f1496;
|
|
add.rn.f32 %f1498, %f1497, %f1494;
|
|
mov.b32 %r378, %f1495;
|
|
setp.eq.s32 %p155, %r378, 1118925336;
|
|
add.s32 %r379, %r378, -1;
|
|
mov.b32 %f1499, %r379;
|
|
add.f32 %f1500, %f1498, 0f37000000;
|
|
selp.f32 %f304, %f1500, %f1498, %p155;
|
|
selp.f32 %f1501, %f1499, %f1495, %p155;
|
|
mov.f32 %f1502, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1503, %f1501, %f1502;
|
|
cvt.rzi.f32.f32 %f1504, %f1503;
|
|
abs.f32 %f1505, %f1504;
|
|
setp.gt.f32 %p156, %f1505, 0f42FC0000;
|
|
mov.b32 %r380, %f1504;
|
|
and.b32 %r381, %r380, -2147483648;
|
|
or.b32 %r382, %r381, 1123811328;
|
|
mov.b32 %f1506, %r382;
|
|
selp.f32 %f1507, %f1506, %f1504, %p156;
|
|
mov.f32 %f1508, 0fBF317218;
|
|
fma.rn.f32 %f1509, %f1507, %f1508, %f1501;
|
|
mov.f32 %f1510, 0f3102E308;
|
|
fma.rn.f32 %f1511, %f1507, %f1510, %f1509;
|
|
mul.f32 %f1512, %f1511, 0f3FB8AA3B;
|
|
add.f32 %f1513, %f1507, 0f4B40007F;
|
|
mov.b32 %r383, %f1513;
|
|
shl.b32 %r384, %r383, 23;
|
|
mov.b32 %f1514, %r384;
|
|
ex2.approx.ftz.f32 %f1515, %f1512;
|
|
mul.f32 %f305, %f1515, %f1514;
|
|
setp.eq.f32 %p157, %f305, 0f7F800000;
|
|
mov.f32 %f1737, 0f7F800000;
|
|
@%p157 bra $L__BB0_130;
|
|
|
|
fma.rn.f32 %f1737, %f305, %f304, %f305;
|
|
|
|
$L__BB0_130:
|
|
setp.lt.f32 %p158, %f279, 0f00000000;
|
|
and.pred %p9, %p158, %p131;
|
|
setp.eq.f32 %p160, %f279, 0f00000000;
|
|
@%p160 bra $L__BB0_134;
|
|
bra.uni $L__BB0_131;
|
|
|
|
$L__BB0_134:
|
|
add.f32 %f1520, %f279, %f279;
|
|
selp.f32 %f1739, %f1520, 0f00000000, %p131;
|
|
bra.uni $L__BB0_135;
|
|
|
|
$L__BB0_131:
|
|
mov.b32 %r385, %f1737;
|
|
xor.b32 %r386, %r385, -2147483648;
|
|
mov.b32 %f1516, %r386;
|
|
selp.f32 %f1739, %f1516, %f1737, %p9;
|
|
setp.geu.f32 %p161, %f279, 0f00000000;
|
|
@%p161 bra $L__BB0_135;
|
|
|
|
mov.f32 %f1517, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1518, %f1517;
|
|
setp.eq.f32 %p162, %f1518, 0f3ED55555;
|
|
@%p162 bra $L__BB0_135;
|
|
|
|
mov.f32 %f1739, 0f7FFFFFFF;
|
|
|
|
$L__BB0_135:
|
|
add.f32 %f1521, %f303, 0f3ED55555;
|
|
mov.b32 %r387, %f1521;
|
|
setp.lt.s32 %p164, %r387, 2139095040;
|
|
@%p164 bra $L__BB0_140;
|
|
|
|
setp.gtu.f32 %p165, %f303, 0f7F800000;
|
|
@%p165 bra $L__BB0_139;
|
|
bra.uni $L__BB0_137;
|
|
|
|
$L__BB0_139:
|
|
add.f32 %f1739, %f279, 0f3ED55555;
|
|
bra.uni $L__BB0_140;
|
|
|
|
$L__BB0_137:
|
|
setp.neu.f32 %p166, %f303, 0f7F800000;
|
|
@%p166 bra $L__BB0_140;
|
|
|
|
selp.f32 %f1739, 0fFF800000, 0f7F800000, %p9;
|
|
|
|
$L__BB0_140:
|
|
fma.rn.f32 %f1522, %f1733, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p167, %f277, 0f3F800000;
|
|
mov.f32 %f1523, 0f3F800000;
|
|
selp.f32 %f1524, 0f3F7FFFFF, %f1522, %p167;
|
|
mul.f32 %f1525, %f277, 0f414EB852;
|
|
setp.lt.f32 %p168, %f277, 0f3B4D2E1C;
|
|
selp.f32 %f1526, %f1525, %f1524, %p168;
|
|
fma.rn.f32 %f1527, %f1736, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p169, %f278, 0f3F800000;
|
|
selp.f32 %f1528, 0f3F7FFFFF, %f1527, %p169;
|
|
mul.f32 %f1529, %f278, 0f414EB852;
|
|
setp.lt.f32 %p170, %f278, 0f3B4D2E1C;
|
|
selp.f32 %f1530, %f1529, %f1528, %p170;
|
|
fma.rn.f32 %f1531, %f1739, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p171, %f279, 0f3F800000;
|
|
selp.f32 %f1532, 0f3F7FFFFF, %f1531, %p171;
|
|
mul.f32 %f1533, %f279, 0f414EB852;
|
|
setp.lt.f32 %p172, %f279, 0f3B4D2E1C;
|
|
selp.f32 %f1534, %f1533, %f1532, %p172;
|
|
min.f32 %f1535, %f1526, %f1523;
|
|
mov.f32 %f1536, 0f00000000;
|
|
max.f32 %f1537, %f1536, %f1535;
|
|
mul.f32 %f1538, %f1537, 0f43800000;
|
|
cvt.rzi.u32.f32 %r388, %f1538;
|
|
min.u32 %r389, %r388, 255;
|
|
min.f32 %f1539, %f1530, %f1523;
|
|
max.f32 %f1540, %f1536, %f1539;
|
|
mul.f32 %f1541, %f1540, 0f43800000;
|
|
cvt.rzi.u32.f32 %r390, %f1541;
|
|
min.u32 %r391, %r390, 255;
|
|
min.f32 %f1542, %f1534, %f1523;
|
|
max.f32 %f1543, %f1536, %f1542;
|
|
mul.f32 %f1544, %f1543, 0f43800000;
|
|
cvt.rzi.u32.f32 %r392, %f1544;
|
|
min.u32 %r393, %r392, 255;
|
|
shl.b64 %rd39, %rd11, 2;
|
|
add.s64 %rd40, %rd10, %rd39;
|
|
cvt.u16.u32 %rs49, %r393;
|
|
cvt.u16.u32 %rs50, %r391;
|
|
cvt.u16.u32 %rs51, %r389;
|
|
mov.u16 %rs52, 255;
|
|
st.global.v4.u8 [%rd40], {%rs51, %rs50, %rs49, %rs52};
|
|
|
|
$L__BB0_141:
|
|
and.b32 %r394, %r425, 4;
|
|
setp.eq.s32 %p173, %r394, 0;
|
|
ld.const.u32 %r426, [params+108];
|
|
@%p173 bra $L__BB0_145;
|
|
|
|
setp.eq.s32 %p174, %r426, 0;
|
|
ld.const.u64 %rd41, [params+224];
|
|
cvta.to.global.u64 %rd42, %rd41;
|
|
ld.const.u32 %r395, [params+216];
|
|
mad.lo.s32 %r396, %r395, %r4, %r3;
|
|
mul.wide.u32 %rd43, %r396, 8;
|
|
add.s64 %rd12, %rd42, %rd43;
|
|
@%p174 bra $L__BB0_144;
|
|
|
|
ld.global.v4.u16 {%rs60, %rs61, %rs62, %rs63}, [%rd12];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1545, %rs60;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1546, %rs61;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1547, %rs62;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1548, %f1693, %f1545;
|
|
add.f32 %f1549, %f1694, %f1546;
|
|
add.f32 %f1550, %f1695, %f1547;
|
|
mov.f32 %f1551, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs58, %f1550;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs57, %f1549;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs56, %f1548;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs59, %f1551;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd12], {%rs56, %rs57, %rs58, %rs59};
|
|
bra.uni $L__BB0_145;
|
|
|
|
$L__BB0_144:
|
|
mov.f32 %f1555, 0f3F800000;
|
|
mov.u32 %r426, 0;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs67, %f1555;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs66, %f1695;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs65, %f1694;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs64, %f1693;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd12], {%rs64, %rs65, %rs66, %rs67};
|
|
|
|
$L__BB0_145:
|
|
ld.const.u64 %rd44, [params+256];
|
|
cvta.to.global.u64 %rd45, %rd44;
|
|
ld.const.u32 %r398, [params+248];
|
|
mad.lo.s32 %r399, %r398, %r4, %r3;
|
|
mul.wide.u32 %rd46, %r399, 8;
|
|
add.s64 %rd13, %rd45, %rd46;
|
|
setp.eq.s32 %p175, %r426, 0;
|
|
@%p175 bra $L__BB0_147;
|
|
|
|
ld.global.v4.u16 {%rs75, %rs76, %rs77, %rs78}, [%rd13];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1556, %rs75;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1557, %rs76;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1558, %rs77;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1559, %f1696, %f1556;
|
|
add.f32 %f1560, %f1697, %f1557;
|
|
add.f32 %f1561, %f1698, %f1558;
|
|
mov.f32 %f1562, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs73, %f1561;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs72, %f1560;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs71, %f1559;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs74, %f1562;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd13], {%rs71, %rs72, %rs73, %rs74};
|
|
bra.uni $L__BB0_148;
|
|
|
|
$L__BB0_147:
|
|
mov.f32 %f1566, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs82, %f1566;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs81, %f1698;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs80, %f1697;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs79, %f1696;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd13], {%rs79, %rs80, %rs81, %rs82};
|
|
|
|
$L__BB0_148:
|
|
ld.const.u64 %rd47, [params+272];
|
|
cvta.to.global.u64 %rd48, %rd47;
|
|
ld.const.u32 %r400, [params+264];
|
|
mad.lo.s32 %r401, %r400, %r4, %r3;
|
|
mul.wide.u32 %rd49, %r401, 8;
|
|
add.s64 %rd14, %rd48, %rd49;
|
|
@%p175 bra $L__BB0_150;
|
|
|
|
ld.global.v4.u16 {%rs90, %rs91, %rs92, %rs93}, [%rd14];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1567, %rs90;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1568, %rs91;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1569, %rs92;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1570, %f1699, %f1567;
|
|
add.f32 %f1571, %f1700, %f1568;
|
|
add.f32 %f1572, %f1701, %f1569;
|
|
mov.f32 %f1573, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs88, %f1572;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs87, %f1571;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs86, %f1570;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs89, %f1573;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd14], {%rs86, %rs87, %rs88, %rs89};
|
|
bra.uni $L__BB0_151;
|
|
|
|
$L__BB0_150:
|
|
mov.f32 %f1577, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs97, %f1577;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs96, %f1701;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs95, %f1700;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs94, %f1699;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd14], {%rs94, %rs95, %rs96, %rs97};
|
|
|
|
$L__BB0_151:
|
|
ld.const.u64 %rd50, [params+288];
|
|
cvta.to.global.u64 %rd51, %rd50;
|
|
ld.const.u32 %r402, [params+280];
|
|
mad.lo.s32 %r403, %r402, %r4, %r3;
|
|
mul.wide.u32 %rd52, %r403, 8;
|
|
add.s64 %rd15, %rd51, %rd52;
|
|
@%p175 bra $L__BB0_153;
|
|
|
|
ld.global.v4.u16 {%rs105, %rs106, %rs107, %rs108}, [%rd15];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1578, %rs105;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1579, %rs106;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1580, %rs107;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1581, %f1702, %f1578;
|
|
add.f32 %f1582, %f1703, %f1579;
|
|
add.f32 %f1583, %f1704, %f1580;
|
|
mov.f32 %f1584, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs103, %f1583;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs102, %f1582;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs101, %f1581;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs104, %f1584;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd15], {%rs101, %rs102, %rs103, %rs104};
|
|
bra.uni $L__BB0_171;
|
|
|
|
$L__BB0_153:
|
|
mov.f32 %f1588, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs112, %f1588;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs111, %f1704;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs110, %f1703;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs109, %f1702;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd15], {%rs109, %rs110, %rs111, %rs112};
|
|
|
|
$L__BB0_171:
|
|
ret;
|
|
|
|
}
|
|
|