2194 lines
62 KiB
Plaintext
2194 lines
62 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-31968024
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// Cuda compilation tools, release 12.0, V12.0.76
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// Based on NVVM 7.0.1
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//
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.version 8.0
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.target sm_52
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.address_size 64
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// .globl __raygen__oxMain
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.const .align 16 .b8 params[1184];
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.global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
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.visible .entry __raygen__oxMain()
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{
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.local .align 4 .b8 __local_depot0[28];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<195>;
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.reg .b16 %rs<62>;
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.reg .f32 %f<1315>;
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.reg .b32 %r<489>;
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.reg .f64 %fd<5>;
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.reg .b64 %rd<103>;
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mov.u64 %SPL, __local_depot0;
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add.u64 %rd1, %SPL, 0;
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// begin inline asm
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call (%r90), _optix_get_launch_index_x, ();
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// end inline asm
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// begin inline asm
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call (%r91), _optix_get_launch_index_y, ();
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// end inline asm
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ld.const.u32 %r3, [params+616];
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abs.s32 %r4, %r3;
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ld.const.u32 %r5, [params+540];
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ld.const.u64 %rd26, [params+400];
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cvta.to.global.u64 %rd27, %rd26;
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ld.const.u32 %r96, [params+392];
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mad.lo.s32 %r97, %r96, %r91, %r90;
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mul.wide.u32 %rd28, %r97, 4;
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add.s64 %rd2, %rd27, %rd28;
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ld.global.v2.u8 {%rs7, %rs61}, [%rd2];
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or.b16 %rs9, %rs7, %rs61;
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and.b16 %rs10, %rs9, 255;
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setp.eq.s16 %p10, %rs10, 0;
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@%p10 bra $L__BB0_2;
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ld.global.u8 %rs60, [%rd2+2];
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bra.uni $L__BB0_3;
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$L__BB0_2:
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ld.global.u8 %rs60, [%rd2+2];
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setp.eq.s16 %p11, %rs60, 0;
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mov.f32 %f1223, 0f00000000;
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mov.u16 %rs61, 0;
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mov.f32 %f1224, %f1223;
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mov.f32 %f1225, %f1223;
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@%p11 bra $L__BB0_4;
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$L__BB0_3:
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cvt.rn.f32.u16 %f261, %rs7;
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div.rn.f32 %f262, %f261, 0f437F0000;
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fma.rn.f32 %f263, %f262, 0f40000000, 0fBF800000;
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and.b16 %rs13, %rs61, 255;
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cvt.rn.f32.u16 %f264, %rs13;
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div.rn.f32 %f265, %f264, 0f437F0000;
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fma.rn.f32 %f266, %f265, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f267, %rs60;
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div.rn.f32 %f268, %f267, 0f437F0000;
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fma.rn.f32 %f269, %f268, 0f40000000, 0fBF800000;
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mul.f32 %f270, %f266, %f266;
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fma.rn.f32 %f271, %f263, %f263, %f270;
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fma.rn.f32 %f272, %f269, %f269, %f271;
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sqrt.rn.f32 %f273, %f272;
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rcp.rn.f32 %f274, %f273;
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mul.f32 %f1225, %f274, %f269;
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mul.f32 %f1224, %f274, %f266;
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mul.f32 %f1223, %f263, %f274;
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$L__BB0_4:
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ld.const.v2.u32 {%r98, %r99}, [params];
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add.s32 %r6, %r98, %r90;
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add.s32 %r7, %r99, %r91;
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setp.eq.f32 %p12, %f1223, 0f00000000;
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setp.eq.f32 %p13, %f1224, 0f00000000;
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and.pred %p14, %p12, %p13;
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setp.eq.f32 %p15, %f1225, 0f00000000;
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and.pred %p16, %p15, %p14;
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@%p16 bra $L__BB0_152;
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bra.uni $L__BB0_5;
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$L__BB0_152:
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ld.const.u32 %r89, [params+104];
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and.b32 %r458, %r89, 1;
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setp.eq.b32 %p186, %r458, 1;
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mov.pred %p187, 0;
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xor.pred %p188, %p186, %p187;
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not.pred %p189, %p188;
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@%p189 bra $L__BB0_154;
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ld.const.u64 %rd81, [params+144];
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cvta.to.global.u64 %rd82, %rd81;
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ld.const.u32 %r459, [params+136];
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mad.lo.s32 %r460, %r459, %r7, %r6;
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mul.wide.u32 %rd83, %r460, 4;
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add.s64 %rd84, %rd82, %rd83;
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mov.u16 %rs41, 0;
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st.global.v4.u8 [%rd84], {%rs41, %rs41, %rs41, %rs41};
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$L__BB0_154:
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and.b32 %r461, %r89, 8;
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setp.eq.s32 %p190, %r461, 0;
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@%p190 bra $L__BB0_156;
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ld.const.u64 %rd85, [params+192];
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cvta.to.global.u64 %rd86, %rd85;
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ld.const.u32 %r462, [params+184];
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mad.lo.s32 %r463, %r462, %r7, %r6;
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mov.f32 %f1205, 0f00000000;
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cvt.rzi.u32.f32 %r464, %f1205;
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mul.wide.u32 %rd87, %r463, 2;
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add.s64 %rd88, %rd86, %rd87;
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mov.u16 %rs42, 0;
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cvt.u16.u32 %rs43, %r464;
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st.global.v2.u8 [%rd88], {%rs43, %rs42};
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$L__BB0_156:
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and.b32 %r465, %r89, 4;
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setp.eq.s32 %p191, %r465, 0;
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@%p191 bra $L__BB0_160;
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ld.const.u32 %r466, [params+108];
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setp.eq.s32 %p192, %r466, 0;
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ld.const.u64 %rd89, [params+224];
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cvta.to.global.u64 %rd90, %rd89;
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ld.const.u32 %r467, [params+216];
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mad.lo.s32 %r468, %r467, %r7, %r6;
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mul.wide.u32 %rd91, %r468, 8;
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add.s64 %rd24, %rd90, %rd91;
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@%p192 bra $L__BB0_159;
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ld.global.v4.u16 {%rs50, %rs51, %rs52, %rs53}, [%rd24];
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// begin inline asm
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{ cvt.f32.f16 %f1206, %rs50;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f1207, %rs51;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f1208, %rs52;}
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// end inline asm
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add.f32 %f1209, %f1206, 0f00000000;
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add.f32 %f1210, %f1207, 0f00000000;
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add.f32 %f1211, %f1208, 0f00000000;
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// begin inline asm
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{ cvt.rn.f16.f32 %rs49, %f1211;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs48, %f1210;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs47, %f1209;}
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// end inline asm
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mov.u16 %rs54, 0;
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st.global.v4.u16 [%rd24], {%rs47, %rs48, %rs49, %rs54};
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bra.uni $L__BB0_160;
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$L__BB0_5:
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ld.const.u64 %rd29, [params+432];
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cvta.to.global.u64 %rd30, %rd29;
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ld.const.u32 %r103, [params+424];
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mad.lo.s32 %r104, %r103, %r91, %r90;
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mul.wide.u32 %rd31, %r104, 12;
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add.s64 %rd32, %rd30, %rd31;
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ld.global.f32 %f10, [%rd32];
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mul.f32 %f282, %f10, 0f3456BF95;
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ld.global.f32 %f11, [%rd32+4];
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mul.f32 %f283, %f11, 0f3456BF95;
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ld.global.f32 %f12, [%rd32+8];
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mul.f32 %f284, %f12, 0f3456BF95;
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abs.f32 %f13, %f1223;
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div.rn.f32 %f285, %f282, %f13;
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abs.f32 %f286, %f1224;
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div.rn.f32 %f287, %f283, %f286;
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abs.f32 %f14, %f1225;
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div.rn.f32 %f288, %f284, %f14;
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abs.f32 %f289, %f285;
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abs.f32 %f290, %f287;
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abs.f32 %f291, %f288;
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mov.f32 %f292, 0f38D1B717;
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max.f32 %f293, %f289, %f292;
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max.f32 %f294, %f290, %f292;
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max.f32 %f295, %f291, %f292;
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fma.rn.f32 %f15, %f1223, %f293, %f10;
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fma.rn.f32 %f16, %f1224, %f294, %f11;
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fma.rn.f32 %f17, %f1225, %f295, %f12;
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ld.const.u64 %rd33, [params+128];
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cvta.to.global.u64 %rd34, %rd33;
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ld.const.u32 %r105, [params+120];
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mad.lo.s32 %r106, %r105, %r91, %r90;
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mul.wide.u32 %rd35, %r106, 4;
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add.s64 %rd36, %rd34, %rd35;
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ld.global.u32 %r481, [%rd36];
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setp.lt.s32 %p18, %r4, 1;
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mov.pred %p17, 0;
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mov.u32 %r477, 0;
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mov.f32 %f1236, 0f00000000;
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mov.f32 %f1237, %f1236;
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mov.f32 %f1238, %f1236;
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mov.f32 %f1239, %f1236;
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mov.f32 %f1240, %f1236;
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mov.f32 %f1241, %f1236;
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mov.f32 %f1242, %f1236;
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mov.pred %p194, %p17;
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@%p18 bra $L__BB0_25;
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ld.const.f32 %f18, [params+620];
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ld.const.u64 %rd37, [params+624];
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cvta.to.global.u64 %rd3, %rd37;
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ld.const.u64 %rd38, [params+640];
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cvta.to.global.u64 %rd39, %rd38;
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ld.const.u32 %r109, [params+632];
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and.b32 %r110, %r91, 255;
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and.b32 %r111, %r90, 255;
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mad.lo.s32 %r112, %r109, %r110, %r111;
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mul.wide.u32 %rd40, %r112, 3;
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add.s64 %rd4, %rd39, %rd40;
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ld.const.f32 %f19, [params+660];
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mul.f32 %f20, %f15, 0f3456BF95;
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mul.f32 %f21, %f16, 0f3456BF95;
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mul.f32 %f22, %f17, 0f3456BF95;
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ld.const.u64 %rd5, [params+96];
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abs.f32 %f431, %f21;
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abs.f32 %f432, %f20;
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max.f32 %f433, %f432, %f431;
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abs.f32 %f434, %f22;
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max.f32 %f435, %f433, %f434;
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mov.u32 %r474, %r477;
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$L__BB0_7:
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shl.b32 %r113, %r474, 1;
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mul.wide.s32 %rd41, %r113, 12;
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add.s64 %rd6, %rd3, %rd41;
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ld.global.f32 %f303, [%rd6];
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sub.f32 %f304, %f303, %f10;
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ld.global.f32 %f305, [%rd6+4];
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sub.f32 %f306, %f305, %f11;
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ld.global.f32 %f307, [%rd6+8];
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sub.f32 %f308, %f307, %f12;
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mul.f32 %f309, %f306, %f306;
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fma.rn.f32 %f310, %f304, %f304, %f309;
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fma.rn.f32 %f311, %f308, %f308, %f310;
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sqrt.rn.f32 %f30, %f311;
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rcp.rn.f32 %f312, %f30;
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mul.f32 %f31, %f304, %f312;
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mul.f32 %f32, %f306, %f312;
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mul.f32 %f33, %f308, %f312;
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mul.f32 %f313, %f1224, %f32;
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fma.rn.f32 %f314, %f1223, %f31, %f313;
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fma.rn.f32 %f34, %f1225, %f33, %f314;
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setp.leu.f32 %p19, %f34, 0f00000000;
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@%p19 bra $L__BB0_24;
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setp.ne.s32 %p21, %r5, 0;
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mul.f32 %f315, %f30, %f30;
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div.rn.f32 %f35, %f18, %f315;
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ld.global.u8 %rs15, [%rd4];
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cvt.rn.f32.u16 %f316, %rs15;
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div.rn.f32 %f317, %f316, 0fC37F0000;
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fma.rn.f32 %f318, %f317, 0f3F333333, 0f3F800000;
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setp.gt.f32 %p22, %f35, %f318;
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and.pred %p23, %p21, %p22;
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mov.pred %p194, -1;
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@%p23 bra $L__BB0_25;
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mul.f32 %f36, %f30, %f19;
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mov.f32 %f323, 0f40800000;
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abs.f32 %f38, %f36;
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setp.lt.f32 %p24, %f38, 0f00800000;
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mul.f32 %f325, %f38, 0f4B800000;
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selp.f32 %f326, %f325, %f38, %p24;
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selp.f32 %f327, 0fC3170000, 0fC2FE0000, %p24;
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mov.b32 %r114, %f326;
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and.b32 %r115, %r114, 8388607;
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or.b32 %r116, %r115, 1065353216;
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mov.b32 %f328, %r116;
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shr.u32 %r117, %r114, 23;
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cvt.rn.f32.u32 %f329, %r117;
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add.f32 %f330, %f327, %f329;
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setp.gt.f32 %p25, %f328, 0f3FB504F3;
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mul.f32 %f331, %f328, 0f3F000000;
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add.f32 %f332, %f330, 0f3F800000;
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selp.f32 %f333, %f332, %f330, %p25;
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selp.f32 %f334, %f331, %f328, %p25;
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add.f32 %f335, %f334, 0fBF800000;
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add.f32 %f336, %f334, 0f3F800000;
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rcp.approx.ftz.f32 %f337, %f336;
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add.f32 %f338, %f335, %f335;
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mul.f32 %f339, %f338, %f337;
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mul.f32 %f340, %f339, %f339;
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mov.f32 %f341, 0f3C4CAF63;
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mov.f32 %f342, 0f3B18F0FE;
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fma.rn.f32 %f343, %f342, %f340, %f341;
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mov.f32 %f344, 0f3DAAAABD;
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fma.rn.f32 %f345, %f343, %f340, %f344;
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mul.rn.f32 %f346, %f345, %f340;
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mul.rn.f32 %f347, %f346, %f339;
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sub.f32 %f348, %f335, %f339;
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add.f32 %f349, %f348, %f348;
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neg.f32 %f350, %f339;
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fma.rn.f32 %f351, %f350, %f335, %f349;
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mul.rn.f32 %f352, %f337, %f351;
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add.f32 %f353, %f347, %f339;
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sub.f32 %f354, %f339, %f353;
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add.f32 %f355, %f347, %f354;
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add.f32 %f356, %f352, %f355;
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add.f32 %f357, %f353, %f356;
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sub.f32 %f358, %f353, %f357;
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add.f32 %f359, %f356, %f358;
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mov.f32 %f360, 0f3F317200;
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mul.rn.f32 %f361, %f333, %f360;
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mov.f32 %f362, 0f35BFBE8E;
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mul.rn.f32 %f363, %f333, %f362;
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add.f32 %f364, %f361, %f357;
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sub.f32 %f365, %f361, %f364;
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add.f32 %f366, %f357, %f365;
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add.f32 %f367, %f359, %f366;
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add.f32 %f368, %f363, %f367;
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add.f32 %f369, %f364, %f368;
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sub.f32 %f370, %f364, %f369;
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add.f32 %f371, %f368, %f370;
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mul.rn.f32 %f372, %f323, %f369;
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neg.f32 %f373, %f372;
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fma.rn.f32 %f374, %f323, %f369, %f373;
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fma.rn.f32 %f375, %f323, %f371, %f374;
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mov.f32 %f376, 0f00000000;
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fma.rn.f32 %f377, %f376, %f369, %f375;
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add.rn.f32 %f378, %f372, %f377;
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neg.f32 %f379, %f378;
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add.rn.f32 %f380, %f372, %f379;
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add.rn.f32 %f381, %f380, %f377;
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mov.b32 %r118, %f378;
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setp.eq.s32 %p26, %r118, 1118925336;
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add.s32 %r119, %r118, -1;
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mov.b32 %f382, %r119;
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add.f32 %f383, %f381, 0f37000000;
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selp.f32 %f39, %f383, %f381, %p26;
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selp.f32 %f384, %f382, %f378, %p26;
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mov.f32 %f385, 0f3FB8AA3B;
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mul.rn.f32 %f386, %f384, %f385;
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cvt.rzi.f32.f32 %f387, %f386;
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abs.f32 %f388, %f387;
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setp.gt.f32 %p27, %f388, 0f42FC0000;
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mov.b32 %r120, %f387;
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and.b32 %r121, %r120, -2147483648;
|
|
or.b32 %r122, %r121, 1123811328;
|
|
mov.b32 %f389, %r122;
|
|
selp.f32 %f390, %f389, %f387, %p27;
|
|
mov.f32 %f391, 0fBF317218;
|
|
fma.rn.f32 %f392, %f390, %f391, %f384;
|
|
mov.f32 %f393, 0f3102E308;
|
|
fma.rn.f32 %f394, %f390, %f393, %f392;
|
|
mul.f32 %f395, %f394, 0f3FB8AA3B;
|
|
add.f32 %f396, %f390, 0f4B40007F;
|
|
mov.b32 %r123, %f396;
|
|
shl.b32 %r124, %r123, 23;
|
|
mov.b32 %f397, %r124;
|
|
ex2.approx.ftz.f32 %f398, %f395;
|
|
mul.f32 %f40, %f398, %f397;
|
|
setp.eq.f32 %p28, %f40, 0f7F800000;
|
|
mov.f32 %f1233, 0f7F800000;
|
|
@%p28 bra $L__BB0_11;
|
|
|
|
fma.rn.f32 %f1233, %f40, %f39, %f40;
|
|
|
|
$L__BB0_11:
|
|
mov.f32 %f1220, 0f40000000;
|
|
cvt.rzi.f32.f32 %f1219, %f1220;
|
|
add.f32 %f1218, %f1219, %f1219;
|
|
mov.f32 %f1217, 0f40800000;
|
|
sub.f32 %f1216, %f1217, %f1218;
|
|
abs.f32 %f1215, %f1216;
|
|
setp.lt.f32 %p29, %f36, 0f00000000;
|
|
setp.eq.f32 %p30, %f1215, 0f3F800000;
|
|
and.pred %p1, %p29, %p30;
|
|
setp.eq.f32 %p31, %f36, 0f00000000;
|
|
@%p31 bra $L__BB0_15;
|
|
bra.uni $L__BB0_12;
|
|
|
|
$L__BB0_15:
|
|
add.f32 %f403, %f36, %f36;
|
|
selp.f32 %f1235, %f403, 0f00000000, %p30;
|
|
bra.uni $L__BB0_16;
|
|
|
|
$L__BB0_12:
|
|
mov.b32 %r125, %f1233;
|
|
xor.b32 %r126, %r125, -2147483648;
|
|
mov.b32 %f399, %r126;
|
|
selp.f32 %f1235, %f399, %f1233, %p1;
|
|
setp.geu.f32 %p32, %f36, 0f00000000;
|
|
@%p32 bra $L__BB0_16;
|
|
|
|
mov.f32 %f400, 0f40800000;
|
|
cvt.rzi.f32.f32 %f401, %f400;
|
|
setp.eq.f32 %p33, %f401, 0f40800000;
|
|
@%p33 bra $L__BB0_16;
|
|
|
|
mov.f32 %f1235, 0f7FFFFFFF;
|
|
|
|
$L__BB0_16:
|
|
add.f32 %f404, %f38, 0f40800000;
|
|
mov.b32 %r127, %f404;
|
|
setp.lt.s32 %p35, %r127, 2139095040;
|
|
@%p35 bra $L__BB0_21;
|
|
|
|
setp.gtu.f32 %p36, %f38, 0f7F800000;
|
|
@%p36 bra $L__BB0_20;
|
|
bra.uni $L__BB0_18;
|
|
|
|
$L__BB0_20:
|
|
add.f32 %f1235, %f36, 0f40800000;
|
|
bra.uni $L__BB0_21;
|
|
|
|
$L__BB0_18:
|
|
setp.neu.f32 %p37, %f38, 0f7F800000;
|
|
@%p37 bra $L__BB0_21;
|
|
|
|
selp.f32 %f1235, 0fFF800000, 0f7F800000, %p1;
|
|
|
|
$L__BB0_21:
|
|
shl.b32 %r472, %r474, 1;
|
|
mul.wide.s32 %rd97, %r472, 12;
|
|
add.s64 %rd96, %rd3, %rd97;
|
|
mov.f32 %f405, 0f3F800000;
|
|
sub.f32 %f406, %f405, %f1235;
|
|
setp.eq.f32 %p38, %f36, 0f3F800000;
|
|
selp.f32 %f407, 0f00000000, %f406, %p38;
|
|
cvt.sat.f32.f32 %f408, %f407;
|
|
mul.f32 %f409, %f35, %f408;
|
|
ld.global.f32 %f410, [%rd96+12];
|
|
mul.f32 %f411, %f31, %f410;
|
|
ld.global.f32 %f412, [%rd96+16];
|
|
mul.f32 %f413, %f32, %f412;
|
|
neg.f32 %f414, %f413;
|
|
sub.f32 %f415, %f414, %f411;
|
|
ld.global.f32 %f416, [%rd96+20];
|
|
mul.f32 %f417, %f33, %f416;
|
|
sub.f32 %f418, %f415, %f417;
|
|
cvt.sat.f32.f32 %f419, %f418;
|
|
mul.f32 %f49, %f409, %f419;
|
|
cvt.sat.f32.f32 %f50, %f34;
|
|
mul.f32 %f420, %f49, %f50;
|
|
setp.leu.f32 %p39, %f420, 0f3727C5AC;
|
|
@%p39 bra $L__BB0_23;
|
|
|
|
mul.f32 %f430, %f49, 0f3EA2F983;
|
|
mov.f32 %f436, 0f38D1B717;
|
|
max.f32 %f427, %f435, %f436;
|
|
sub.f32 %f428, %f30, %f427;
|
|
mov.f32 %f429, 0f00000000;
|
|
mov.u32 %r164, 2;
|
|
mov.u32 %r165, 1;
|
|
mov.u32 %r166, 3;
|
|
mov.u32 %r169, 1065353216;
|
|
mov.u32 %r198, 0;
|
|
// begin inline asm
|
|
call(%r128,%r129,%r130,%r131,%r132,%r133,%r134,%r135,%r136,%r137,%r138,%r139,%r140,%r141,%r142,%r143,%r144,%r145,%r146,%r147,%r148,%r149,%r150,%r151,%r152,%r153,%r154,%r155,%r156,%r157,%r158,%r159),_optix_trace_typed_32,(%r198,%rd5,%f15,%f16,%f17,%f31,%f32,%f33,%f427,%f428,%f429,%r165,%r198,%r165,%r164,%r165,%r166,%r169,%r169,%r169,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198);
|
|
// end inline asm
|
|
mov.b32 %f437, %r128;
|
|
mov.b32 %f438, %r129;
|
|
mov.b32 %f439, %r130;
|
|
mul.f32 %f440, %f430, %f437;
|
|
mul.f32 %f441, %f430, %f438;
|
|
mul.f32 %f442, %f430, %f439;
|
|
fma.rn.f32 %f1239, %f50, %f440, %f1239;
|
|
fma.rn.f32 %f1240, %f50, %f441, %f1240;
|
|
fma.rn.f32 %f1241, %f50, %f442, %f1241;
|
|
add.f32 %f1242, %f1242, %f437;
|
|
fma.rn.f32 %f1236, %f31, %f437, %f1236;
|
|
fma.rn.f32 %f1237, %f32, %f438, %f1237;
|
|
fma.rn.f32 %f1238, %f33, %f439, %f1238;
|
|
|
|
$L__BB0_23:
|
|
add.s32 %r477, %r477, 1;
|
|
|
|
$L__BB0_24:
|
|
add.s32 %r474, %r474, 1;
|
|
setp.lt.s32 %p41, %r474, %r4;
|
|
mov.pred %p194, %p17;
|
|
@%p41 bra $L__BB0_7;
|
|
|
|
$L__BB0_25:
|
|
cvt.rn.f32.s32 %f443, %r477;
|
|
mov.f32 %f444, 0f3F800000;
|
|
max.f32 %f445, %f443, %f444;
|
|
rcp.rn.f32 %f446, %f445;
|
|
mul.f32 %f1290, %f1239, %f446;
|
|
mul.f32 %f1291, %f1240, %f446;
|
|
mul.f32 %f1292, %f1241, %f446;
|
|
div.rn.f32 %f1293, %f1242, %f445;
|
|
not.pred %p42, %p194;
|
|
@%p42 bra $L__BB0_58;
|
|
|
|
abs.f32 %f1222, %f1225;
|
|
abs.f32 %f1221, %f1223;
|
|
setp.gt.f32 %p43, %f1221, %f1222;
|
|
selp.f32 %f454, 0f00000000, %f1224, %p43;
|
|
mov.f32 %f1236, 0f00000000;
|
|
neg.f32 %f455, %f1225;
|
|
selp.f32 %f456, %f1223, %f455, %p43;
|
|
neg.f32 %f457, %f1224;
|
|
selp.f32 %f458, %f457, 0f00000000, %p43;
|
|
mul.f32 %f459, %f456, %f456;
|
|
fma.rn.f32 %f460, %f458, %f458, %f459;
|
|
fma.rn.f32 %f461, %f454, %f454, %f460;
|
|
sqrt.rn.f32 %f462, %f461;
|
|
rcp.rn.f32 %f463, %f462;
|
|
mul.f32 %f83, %f458, %f463;
|
|
mul.f32 %f84, %f456, %f463;
|
|
mul.f32 %f85, %f454, %f463;
|
|
setp.lt.s32 %p44, %r5, 1;
|
|
mov.f32 %f1237, %f1236;
|
|
mov.f32 %f1238, %f1236;
|
|
mov.f32 %f1267, %f1236;
|
|
mov.f32 %f1266, %f1236;
|
|
mov.f32 %f1265, %f1236;
|
|
mov.f32 %f1264, %f1236;
|
|
@%p44 bra $L__BB0_57;
|
|
|
|
cvt.rn.f32.s32 %f471, %r5;
|
|
rcp.rn.f32 %f86, %f471;
|
|
mul.f32 %f87, %f15, 0f3456BF95;
|
|
mul.f32 %f88, %f16, 0f3456BF95;
|
|
mul.f32 %f89, %f17, 0f3456BF95;
|
|
ld.const.u64 %rd7, [params+96];
|
|
mul.f32 %f472, %f1223, %f84;
|
|
mul.f32 %f473, %f1224, %f83;
|
|
sub.f32 %f90, %f473, %f472;
|
|
mul.f32 %f474, %f1225, %f83;
|
|
mul.f32 %f475, %f1223, %f85;
|
|
sub.f32 %f91, %f475, %f474;
|
|
mul.f32 %f476, %f1224, %f85;
|
|
mul.f32 %f477, %f1225, %f84;
|
|
sub.f32 %f92, %f477, %f476;
|
|
mov.u32 %r199, 0;
|
|
add.s64 %rd8, %rd1, 24;
|
|
mov.u64 %rd43, __cudart_i2opi_f;
|
|
abs.f32 %f543, %f88;
|
|
abs.f32 %f544, %f87;
|
|
max.f32 %f545, %f544, %f543;
|
|
abs.f32 %f546, %f89;
|
|
max.f32 %f547, %f545, %f546;
|
|
mov.u32 %r478, %r199;
|
|
|
|
$L__BB0_28:
|
|
cvt.rn.f32.s32 %f100, %r478;
|
|
mov.u32 %r480, %r199;
|
|
|
|
$L__BB0_29:
|
|
mad.lo.s32 %r201, %r481, 1664525, 1013904223;
|
|
and.b32 %r202, %r201, 16777215;
|
|
cvt.rn.f32.u32 %f478, %r202;
|
|
fma.rn.f32 %f479, %f478, 0f33800000, %f100;
|
|
mul.f32 %f108, %f86, %f479;
|
|
mad.lo.s32 %r481, %r201, 1664525, 1013904223;
|
|
and.b32 %r203, %r481, 16777215;
|
|
cvt.rn.f32.u32 %f480, %r203;
|
|
cvt.rn.f32.s32 %f481, %r480;
|
|
fma.rn.f32 %f482, %f480, 0f33800000, %f481;
|
|
mul.f32 %f483, %f86, %f482;
|
|
mul.f32 %f484, %f108, %f108;
|
|
mov.f32 %f485, 0f3F800000;
|
|
sub.f32 %f486, %f485, %f484;
|
|
mov.f32 %f487, 0f00000000;
|
|
max.f32 %f488, %f487, %f486;
|
|
sqrt.rn.f32 %f109, %f488;
|
|
mul.f32 %f110, %f483, 0f40C90FDB;
|
|
mul.f32 %f489, %f110, 0f3F22F983;
|
|
cvt.rni.s32.f32 %r488, %f489;
|
|
cvt.rn.f32.s32 %f490, %r488;
|
|
mov.f32 %f491, 0fBFC90FDA;
|
|
fma.rn.f32 %f492, %f490, %f491, %f110;
|
|
mov.f32 %f493, 0fB3A22168;
|
|
fma.rn.f32 %f494, %f490, %f493, %f492;
|
|
mov.f32 %f495, 0fA7C234C5;
|
|
fma.rn.f32 %f1274, %f490, %f495, %f494;
|
|
abs.f32 %f112, %f110;
|
|
setp.ltu.f32 %p45, %f112, 0f47CE4780;
|
|
mov.u32 %r485, %r488;
|
|
mov.f32 %f1271, %f1274;
|
|
@%p45 bra $L__BB0_37;
|
|
|
|
setp.eq.f32 %p46, %f112, 0f7F800000;
|
|
@%p46 bra $L__BB0_36;
|
|
bra.uni $L__BB0_31;
|
|
|
|
$L__BB0_36:
|
|
mov.f32 %f498, 0f00000000;
|
|
mul.rn.f32 %f1271, %f110, %f498;
|
|
mov.u32 %r485, 0;
|
|
bra.uni $L__BB0_37;
|
|
|
|
$L__BB0_31:
|
|
mov.b32 %r21, %f110;
|
|
bfe.u32 %r205, %r21, 23, 8;
|
|
add.s32 %r22, %r205, -128;
|
|
shl.b32 %r206, %r21, 8;
|
|
or.b32 %r23, %r206, -2147483648;
|
|
shr.u32 %r24, %r22, 5;
|
|
mov.u64 %rd100, 0;
|
|
mov.u32 %r482, 0;
|
|
mov.u64 %rd98, %rd1;
|
|
mov.u64 %rd99, %rd43;
|
|
|
|
$L__BB0_32:
|
|
.pragma "nounroll";
|
|
ld.global.nc.u32 %r207, [%rd99];
|
|
mad.wide.u32 %rd45, %r207, %r23, %rd100;
|
|
shr.u64 %rd100, %rd45, 32;
|
|
st.local.u32 [%rd98], %rd45;
|
|
add.s64 %rd99, %rd99, 4;
|
|
add.s64 %rd98, %rd98, 4;
|
|
add.s32 %r482, %r482, 1;
|
|
setp.ne.s32 %p47, %r482, 6;
|
|
@%p47 bra $L__BB0_32;
|
|
|
|
st.local.u32 [%rd8], %rd100;
|
|
mov.u32 %r208, 4;
|
|
sub.s32 %r27, %r208, %r24;
|
|
mov.u32 %r209, 6;
|
|
sub.s32 %r210, %r209, %r24;
|
|
mul.wide.s32 %rd46, %r210, 4;
|
|
add.s64 %rd47, %rd1, %rd46;
|
|
ld.local.u32 %r483, [%rd47];
|
|
ld.local.u32 %r484, [%rd47+-4];
|
|
and.b32 %r30, %r22, 31;
|
|
setp.eq.s32 %p48, %r30, 0;
|
|
@%p48 bra $L__BB0_35;
|
|
|
|
mov.u32 %r211, 32;
|
|
sub.s32 %r212, %r211, %r30;
|
|
shr.u32 %r213, %r484, %r212;
|
|
shl.b32 %r214, %r483, %r30;
|
|
add.s32 %r483, %r213, %r214;
|
|
mul.wide.s32 %rd48, %r27, 4;
|
|
add.s64 %rd49, %rd1, %rd48;
|
|
ld.local.u32 %r215, [%rd49];
|
|
shr.u32 %r216, %r215, %r212;
|
|
shl.b32 %r217, %r484, %r30;
|
|
add.s32 %r484, %r216, %r217;
|
|
|
|
$L__BB0_35:
|
|
and.b32 %r218, %r21, -2147483648;
|
|
shr.u32 %r219, %r484, 30;
|
|
shl.b32 %r220, %r483, 2;
|
|
or.b32 %r221, %r219, %r220;
|
|
shr.u32 %r222, %r221, 31;
|
|
shr.u32 %r223, %r483, 30;
|
|
add.s32 %r224, %r222, %r223;
|
|
neg.s32 %r225, %r224;
|
|
setp.eq.s32 %p49, %r218, 0;
|
|
selp.b32 %r485, %r224, %r225, %p49;
|
|
setp.ne.s32 %p50, %r222, 0;
|
|
xor.b32 %r226, %r218, -2147483648;
|
|
selp.b32 %r227, %r226, %r218, %p50;
|
|
selp.b32 %r228, -1, 0, %p50;
|
|
xor.b32 %r229, %r221, %r228;
|
|
shl.b32 %r230, %r484, 2;
|
|
xor.b32 %r231, %r230, %r228;
|
|
cvt.u64.u32 %rd50, %r229;
|
|
cvt.u64.u32 %rd51, %r231;
|
|
bfi.b64 %rd52, %rd50, %rd51, 32, 32;
|
|
cvt.rn.f64.s64 %fd1, %rd52;
|
|
mul.f64 %fd2, %fd1, 0d3BF921FB54442D19;
|
|
cvt.rn.f32.f64 %f496, %fd2;
|
|
setp.eq.s32 %p51, %r227, 0;
|
|
neg.f32 %f497, %f496;
|
|
selp.f32 %f1271, %f496, %f497, %p51;
|
|
|
|
$L__BB0_37:
|
|
add.s32 %r37, %r485, 1;
|
|
and.b32 %r38, %r37, 1;
|
|
setp.eq.s32 %p52, %r38, 0;
|
|
selp.f32 %f116, %f1271, 0f3F800000, %p52;
|
|
mul.rn.f32 %f117, %f1271, %f1271;
|
|
mov.f32 %f1272, 0fB94D4153;
|
|
@%p52 bra $L__BB0_39;
|
|
|
|
mov.f32 %f500, 0fBAB607ED;
|
|
mov.f32 %f501, 0f37CBAC00;
|
|
fma.rn.f32 %f1272, %f501, %f117, %f500;
|
|
|
|
$L__BB0_39:
|
|
selp.f32 %f502, 0f3C0885E4, 0f3D2AAABB, %p52;
|
|
fma.rn.f32 %f503, %f1272, %f117, %f502;
|
|
selp.f32 %f504, 0fBE2AAAA8, 0fBEFFFFFF, %p52;
|
|
fma.rn.f32 %f505, %f503, %f117, %f504;
|
|
mov.f32 %f506, 0f00000000;
|
|
fma.rn.f32 %f507, %f117, %f116, %f506;
|
|
fma.rn.f32 %f1273, %f505, %f507, %f116;
|
|
and.b32 %r233, %r37, 2;
|
|
setp.eq.s32 %p54, %r233, 0;
|
|
@%p54 bra $L__BB0_41;
|
|
|
|
mov.f32 %f509, 0fBF800000;
|
|
fma.rn.f32 %f1273, %f1273, %f509, %f506;
|
|
|
|
$L__BB0_41:
|
|
@%p45 bra $L__BB0_49;
|
|
|
|
setp.eq.f32 %p56, %f112, 0f7F800000;
|
|
@%p56 bra $L__BB0_48;
|
|
bra.uni $L__BB0_43;
|
|
|
|
$L__BB0_48:
|
|
mov.f32 %f512, 0f00000000;
|
|
mul.rn.f32 %f1274, %f110, %f512;
|
|
mov.u32 %r488, 0;
|
|
bra.uni $L__BB0_49;
|
|
|
|
$L__BB0_43:
|
|
mov.b32 %r39, %f110;
|
|
bfe.u32 %r234, %r39, 23, 8;
|
|
add.s32 %r40, %r234, -128;
|
|
shl.b32 %r235, %r39, 8;
|
|
or.b32 %r41, %r235, -2147483648;
|
|
shr.u32 %r42, %r40, 5;
|
|
mov.u64 %rd101, 0;
|
|
mov.u64 %rd102, %rd101;
|
|
|
|
$L__BB0_44:
|
|
.pragma "nounroll";
|
|
shl.b64 %rd55, %rd101, 2;
|
|
mov.u64 %rd56, __cudart_i2opi_f;
|
|
add.s64 %rd57, %rd56, %rd55;
|
|
ld.global.nc.u32 %r236, [%rd57];
|
|
mad.wide.u32 %rd58, %r236, %r41, %rd102;
|
|
shr.u64 %rd102, %rd58, 32;
|
|
add.s64 %rd59, %rd1, %rd55;
|
|
st.local.u32 [%rd59], %rd58;
|
|
cvt.u32.u64 %r237, %rd101;
|
|
add.s32 %r238, %r237, 1;
|
|
cvt.s64.s32 %rd101, %r238;
|
|
setp.ne.s32 %p57, %r238, 6;
|
|
@%p57 bra $L__BB0_44;
|
|
|
|
st.local.u32 [%rd8], %rd102;
|
|
mov.u32 %r239, 4;
|
|
sub.s32 %r43, %r239, %r42;
|
|
mov.u32 %r240, 6;
|
|
sub.s32 %r241, %r240, %r42;
|
|
mul.wide.s32 %rd60, %r241, 4;
|
|
add.s64 %rd61, %rd1, %rd60;
|
|
ld.local.u32 %r486, [%rd61];
|
|
ld.local.u32 %r487, [%rd61+-4];
|
|
and.b32 %r46, %r40, 31;
|
|
setp.eq.s32 %p58, %r46, 0;
|
|
@%p58 bra $L__BB0_47;
|
|
|
|
mov.u32 %r242, 32;
|
|
sub.s32 %r243, %r242, %r46;
|
|
shr.u32 %r244, %r487, %r243;
|
|
shl.b32 %r245, %r486, %r46;
|
|
add.s32 %r486, %r244, %r245;
|
|
mul.wide.s32 %rd62, %r43, 4;
|
|
add.s64 %rd63, %rd1, %rd62;
|
|
ld.local.u32 %r246, [%rd63];
|
|
shr.u32 %r247, %r246, %r243;
|
|
shl.b32 %r248, %r487, %r46;
|
|
add.s32 %r487, %r247, %r248;
|
|
|
|
$L__BB0_47:
|
|
and.b32 %r249, %r39, -2147483648;
|
|
shr.u32 %r250, %r487, 30;
|
|
shl.b32 %r251, %r486, 2;
|
|
or.b32 %r252, %r250, %r251;
|
|
shr.u32 %r253, %r252, 31;
|
|
shr.u32 %r254, %r486, 30;
|
|
add.s32 %r255, %r253, %r254;
|
|
neg.s32 %r256, %r255;
|
|
setp.eq.s32 %p59, %r249, 0;
|
|
selp.b32 %r488, %r255, %r256, %p59;
|
|
setp.ne.s32 %p60, %r253, 0;
|
|
xor.b32 %r257, %r249, -2147483648;
|
|
selp.b32 %r258, %r257, %r249, %p60;
|
|
selp.b32 %r259, -1, 0, %p60;
|
|
xor.b32 %r260, %r252, %r259;
|
|
shl.b32 %r261, %r487, 2;
|
|
xor.b32 %r262, %r261, %r259;
|
|
cvt.u64.u32 %rd64, %r260;
|
|
cvt.u64.u32 %rd65, %r262;
|
|
bfi.b64 %rd66, %rd64, %rd65, 32, 32;
|
|
cvt.rn.f64.s64 %fd3, %rd66;
|
|
mul.f64 %fd4, %fd3, 0d3BF921FB54442D19;
|
|
cvt.rn.f32.f64 %f510, %fd4;
|
|
setp.eq.s32 %p61, %r258, 0;
|
|
neg.f32 %f511, %f510;
|
|
selp.f32 %f1274, %f510, %f511, %p61;
|
|
|
|
$L__BB0_49:
|
|
mul.f32 %f126, %f109, %f1273;
|
|
and.b32 %r53, %r488, 1;
|
|
setp.eq.s32 %p62, %r53, 0;
|
|
selp.f32 %f127, %f1274, 0f3F800000, %p62;
|
|
mul.rn.f32 %f128, %f1274, %f1274;
|
|
mov.f32 %f1275, 0fB94D4153;
|
|
@%p62 bra $L__BB0_51;
|
|
|
|
mov.f32 %f514, 0fBAB607ED;
|
|
mov.f32 %f515, 0f37CBAC00;
|
|
fma.rn.f32 %f1275, %f515, %f128, %f514;
|
|
|
|
$L__BB0_51:
|
|
selp.f32 %f516, 0f3C0885E4, 0f3D2AAABB, %p62;
|
|
fma.rn.f32 %f517, %f1275, %f128, %f516;
|
|
selp.f32 %f518, 0fBE2AAAA8, 0fBEFFFFFF, %p62;
|
|
fma.rn.f32 %f519, %f517, %f128, %f518;
|
|
mov.f32 %f1277, 0f00000000;
|
|
fma.rn.f32 %f521, %f128, %f127, %f1277;
|
|
fma.rn.f32 %f1276, %f519, %f521, %f127;
|
|
and.b32 %r264, %r488, 2;
|
|
setp.eq.s32 %p64, %r264, 0;
|
|
@%p64 bra $L__BB0_53;
|
|
|
|
mov.f32 %f522, 0f00000000;
|
|
mov.f32 %f523, 0fBF800000;
|
|
fma.rn.f32 %f1276, %f1276, %f523, %f522;
|
|
|
|
$L__BB0_53:
|
|
mul.f32 %f536, %f109, %f1276;
|
|
mul.f32 %f537, %f83, %f536;
|
|
mul.f32 %f538, %f84, %f536;
|
|
mul.f32 %f539, %f85, %f536;
|
|
fma.rn.f32 %f540, %f92, %f126, %f537;
|
|
fma.rn.f32 %f541, %f91, %f126, %f538;
|
|
fma.rn.f32 %f542, %f90, %f126, %f539;
|
|
fma.rn.f32 %f134, %f1223, %f108, %f540;
|
|
fma.rn.f32 %f135, %f1224, %f108, %f541;
|
|
fma.rn.f32 %f136, %f1225, %f108, %f542;
|
|
mov.f32 %f548, 0f38D1B717;
|
|
max.f32 %f530, %f547, %f548;
|
|
mov.f32 %f531, 0f6C4ECB8F;
|
|
mov.u32 %r298, 1;
|
|
mov.u32 %r301, 2;
|
|
mov.u32 %r303, 4;
|
|
mov.u32 %r306, 1065353216;
|
|
mov.u32 %r307, 2139095039;
|
|
mov.u32 %r335, 0;
|
|
// begin inline asm
|
|
call(%r265,%r266,%r267,%r268,%r269,%r270,%r271,%r272,%r273,%r274,%r275,%r276,%r277,%r278,%r279,%r280,%r281,%r282,%r283,%r284,%r285,%r286,%r287,%r288,%r289,%r290,%r291,%r292,%r293,%r294,%r295,%r296),_optix_trace_typed_32,(%r335,%rd7,%f15,%f16,%f17,%f134,%f135,%f136,%f530,%f531,%f1277,%r298,%r335,%r335,%r301,%r335,%r303,%r306,%r306,%r306,%r307,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335);
|
|
// end inline asm
|
|
mov.b32 %f137, %r268;
|
|
setp.ge.f32 %p65, %f137, 0f00000000;
|
|
mov.f32 %f1278, %f1277;
|
|
mov.f32 %f1279, %f1277;
|
|
@%p65 bra $L__BB0_55;
|
|
|
|
mov.b32 %f1279, %r265;
|
|
mov.b32 %f1278, %r266;
|
|
mov.b32 %f1277, %r267;
|
|
|
|
$L__BB0_55:
|
|
setp.ltu.f32 %p66, %f137, 0f00000000;
|
|
selp.f32 %f549, 0f3F800000, 0f00000000, %p66;
|
|
fma.rn.f32 %f1236, %f134, %f549, %f1236;
|
|
fma.rn.f32 %f1237, %f135, %f549, %f1237;
|
|
fma.rn.f32 %f1238, %f136, %f549, %f1238;
|
|
add.f32 %f1264, %f1264, %f549;
|
|
mul.f32 %f550, %f1224, %f135;
|
|
fma.rn.f32 %f551, %f1223, %f134, %f550;
|
|
fma.rn.f32 %f552, %f1225, %f136, %f551;
|
|
cvt.sat.f32.f32 %f553, %f552;
|
|
fma.rn.f32 %f1267, %f1279, %f553, %f1267;
|
|
fma.rn.f32 %f1266, %f1278, %f553, %f1266;
|
|
fma.rn.f32 %f1265, %f1277, %f553, %f1265;
|
|
add.s32 %r480, %r480, 1;
|
|
setp.lt.s32 %p67, %r480, %r5;
|
|
@%p67 bra $L__BB0_29;
|
|
|
|
add.s32 %r478, %r478, 1;
|
|
setp.lt.s32 %p68, %r478, %r5;
|
|
@%p68 bra $L__BB0_28;
|
|
|
|
$L__BB0_57:
|
|
mul.lo.s32 %r336, %r5, %r5;
|
|
cvt.rn.f32.s32 %f554, %r336;
|
|
rcp.rn.f32 %f555, %f554;
|
|
mul.f32 %f556, %f555, %f1267;
|
|
mul.f32 %f557, %f555, %f1266;
|
|
mul.f32 %f558, %f555, %f1265;
|
|
div.rn.f32 %f1293, %f1264, %f554;
|
|
fma.rn.f32 %f1290, %f555, %f1267, %f556;
|
|
fma.rn.f32 %f1291, %f555, %f1266, %f557;
|
|
fma.rn.f32 %f1292, %f555, %f1265, %f558;
|
|
|
|
$L__BB0_58:
|
|
ld.const.u32 %r473, [params+616];
|
|
setp.lt.s32 %p69, %r473, 0;
|
|
selp.f32 %f169, %f1290, %f1293, %p69;
|
|
ld.const.u32 %r88, [params+104];
|
|
and.b32 %r337, %r88, 8;
|
|
setp.eq.s32 %p70, %r337, 0;
|
|
@%p70 bra $L__BB0_72;
|
|
|
|
ld.const.u64 %rd68, [params+192];
|
|
cvta.to.global.u64 %rd19, %rd68;
|
|
ld.const.u32 %r338, [params+184];
|
|
mad.lo.s32 %r339, %r338, %r7, %r6;
|
|
cvt.u64.u32 %rd20, %r339;
|
|
mov.f32 %f560, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f561, %f560;
|
|
add.f32 %f562, %f561, %f561;
|
|
mov.f32 %f563, 0f3EE8BA2E;
|
|
sub.f32 %f564, %f563, %f562;
|
|
abs.f32 %f170, %f564;
|
|
abs.f32 %f171, %f169;
|
|
setp.lt.f32 %p71, %f171, 0f00800000;
|
|
mul.f32 %f565, %f171, 0f4B800000;
|
|
selp.f32 %f566, %f565, %f171, %p71;
|
|
selp.f32 %f567, 0fC3170000, 0fC2FE0000, %p71;
|
|
mov.b32 %r340, %f566;
|
|
and.b32 %r341, %r340, 8388607;
|
|
or.b32 %r342, %r341, 1065353216;
|
|
mov.b32 %f568, %r342;
|
|
shr.u32 %r343, %r340, 23;
|
|
cvt.rn.f32.u32 %f569, %r343;
|
|
add.f32 %f570, %f567, %f569;
|
|
setp.gt.f32 %p72, %f568, 0f3FB504F3;
|
|
mul.f32 %f571, %f568, 0f3F000000;
|
|
add.f32 %f572, %f570, 0f3F800000;
|
|
selp.f32 %f573, %f572, %f570, %p72;
|
|
selp.f32 %f574, %f571, %f568, %p72;
|
|
add.f32 %f575, %f574, 0fBF800000;
|
|
add.f32 %f576, %f574, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f577, %f576;
|
|
add.f32 %f578, %f575, %f575;
|
|
mul.f32 %f579, %f578, %f577;
|
|
mul.f32 %f580, %f579, %f579;
|
|
mov.f32 %f581, 0f3C4CAF63;
|
|
mov.f32 %f582, 0f3B18F0FE;
|
|
fma.rn.f32 %f583, %f582, %f580, %f581;
|
|
mov.f32 %f584, 0f3DAAAABD;
|
|
fma.rn.f32 %f585, %f583, %f580, %f584;
|
|
mul.rn.f32 %f586, %f585, %f580;
|
|
mul.rn.f32 %f587, %f586, %f579;
|
|
sub.f32 %f588, %f575, %f579;
|
|
add.f32 %f589, %f588, %f588;
|
|
neg.f32 %f590, %f579;
|
|
fma.rn.f32 %f591, %f590, %f575, %f589;
|
|
mul.rn.f32 %f592, %f577, %f591;
|
|
add.f32 %f593, %f587, %f579;
|
|
sub.f32 %f594, %f579, %f593;
|
|
add.f32 %f595, %f587, %f594;
|
|
add.f32 %f596, %f592, %f595;
|
|
add.f32 %f597, %f593, %f596;
|
|
sub.f32 %f598, %f593, %f597;
|
|
add.f32 %f599, %f596, %f598;
|
|
mov.f32 %f600, 0f3F317200;
|
|
mul.rn.f32 %f601, %f573, %f600;
|
|
mov.f32 %f602, 0f35BFBE8E;
|
|
mul.rn.f32 %f603, %f573, %f602;
|
|
add.f32 %f604, %f601, %f597;
|
|
sub.f32 %f605, %f601, %f604;
|
|
add.f32 %f606, %f597, %f605;
|
|
add.f32 %f607, %f599, %f606;
|
|
add.f32 %f608, %f603, %f607;
|
|
add.f32 %f609, %f604, %f608;
|
|
sub.f32 %f610, %f604, %f609;
|
|
add.f32 %f611, %f608, %f610;
|
|
mul.rn.f32 %f612, %f563, %f609;
|
|
neg.f32 %f613, %f612;
|
|
fma.rn.f32 %f614, %f563, %f609, %f613;
|
|
fma.rn.f32 %f615, %f563, %f611, %f614;
|
|
mov.f32 %f616, 0f00000000;
|
|
fma.rn.f32 %f617, %f616, %f609, %f615;
|
|
add.rn.f32 %f618, %f612, %f617;
|
|
neg.f32 %f619, %f618;
|
|
add.rn.f32 %f620, %f612, %f619;
|
|
add.rn.f32 %f621, %f620, %f617;
|
|
mov.b32 %r344, %f618;
|
|
setp.eq.s32 %p73, %r344, 1118925336;
|
|
add.s32 %r345, %r344, -1;
|
|
mov.b32 %f622, %r345;
|
|
add.f32 %f623, %f621, 0f37000000;
|
|
selp.f32 %f172, %f623, %f621, %p73;
|
|
selp.f32 %f624, %f622, %f618, %p73;
|
|
mov.f32 %f625, 0f3FB8AA3B;
|
|
mul.rn.f32 %f626, %f624, %f625;
|
|
cvt.rzi.f32.f32 %f627, %f626;
|
|
abs.f32 %f628, %f627;
|
|
setp.gt.f32 %p74, %f628, 0f42FC0000;
|
|
mov.b32 %r346, %f627;
|
|
and.b32 %r347, %r346, -2147483648;
|
|
or.b32 %r348, %r347, 1123811328;
|
|
mov.b32 %f629, %r348;
|
|
selp.f32 %f630, %f629, %f627, %p74;
|
|
mov.f32 %f631, 0fBF317218;
|
|
fma.rn.f32 %f632, %f630, %f631, %f624;
|
|
mov.f32 %f633, 0f3102E308;
|
|
fma.rn.f32 %f634, %f630, %f633, %f632;
|
|
mul.f32 %f635, %f634, 0f3FB8AA3B;
|
|
add.f32 %f636, %f630, 0f4B40007F;
|
|
mov.b32 %r349, %f636;
|
|
shl.b32 %r350, %r349, 23;
|
|
mov.b32 %f637, %r350;
|
|
ex2.approx.ftz.f32 %f638, %f635;
|
|
mul.f32 %f173, %f638, %f637;
|
|
setp.eq.f32 %p75, %f173, 0f7F800000;
|
|
mov.f32 %f1294, 0f7F800000;
|
|
@%p75 bra $L__BB0_61;
|
|
|
|
fma.rn.f32 %f1294, %f173, %f172, %f173;
|
|
|
|
$L__BB0_61:
|
|
setp.lt.f32 %p76, %f169, 0f00000000;
|
|
setp.eq.f32 %p77, %f170, 0f3F800000;
|
|
and.pred %p3, %p76, %p77;
|
|
setp.eq.f32 %p78, %f169, 0f00000000;
|
|
@%p78 bra $L__BB0_65;
|
|
bra.uni $L__BB0_62;
|
|
|
|
$L__BB0_65:
|
|
add.f32 %f643, %f169, %f169;
|
|
selp.f32 %f1296, %f643, 0f00000000, %p77;
|
|
bra.uni $L__BB0_66;
|
|
|
|
$L__BB0_159:
|
|
mov.f32 %f1214, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs57, %f1214;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs56, %f1214;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs55, %f1214;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs58, 0;
|
|
st.global.v4.u16 [%rd24], {%rs55, %rs56, %rs57, %rs58};
|
|
|
|
$L__BB0_160:
|
|
and.b32 %r469, %r89, 64;
|
|
setp.eq.s32 %p193, %r469, 0;
|
|
@%p193 bra $L__BB0_162;
|
|
|
|
ld.const.u64 %rd92, [params+208];
|
|
cvta.to.global.u64 %rd93, %rd92;
|
|
ld.const.u32 %r470, [params+200];
|
|
mad.lo.s32 %r471, %r470, %r7, %r6;
|
|
mul.wide.u32 %rd94, %r471, 4;
|
|
add.s64 %rd95, %rd93, %rd94;
|
|
mov.u16 %rs59, 0;
|
|
st.global.v4.u8 [%rd95], {%rs59, %rs59, %rs59, %rs59};
|
|
bra.uni $L__BB0_162;
|
|
|
|
$L__BB0_62:
|
|
mov.b32 %r351, %f1294;
|
|
xor.b32 %r352, %r351, -2147483648;
|
|
mov.b32 %f639, %r352;
|
|
selp.f32 %f1296, %f639, %f1294, %p3;
|
|
setp.geu.f32 %p79, %f169, 0f00000000;
|
|
@%p79 bra $L__BB0_66;
|
|
|
|
mov.f32 %f640, 0f3EE8BA2E;
|
|
cvt.rzi.f32.f32 %f641, %f640;
|
|
setp.eq.f32 %p80, %f641, 0f3EE8BA2E;
|
|
@%p80 bra $L__BB0_66;
|
|
|
|
mov.f32 %f1296, 0f7FFFFFFF;
|
|
|
|
$L__BB0_66:
|
|
add.f32 %f644, %f171, 0f3EE8BA2E;
|
|
mov.b32 %r353, %f644;
|
|
setp.lt.s32 %p82, %r353, 2139095040;
|
|
@%p82 bra $L__BB0_71;
|
|
|
|
setp.gtu.f32 %p83, %f171, 0f7F800000;
|
|
@%p83 bra $L__BB0_70;
|
|
bra.uni $L__BB0_68;
|
|
|
|
$L__BB0_70:
|
|
add.f32 %f1296, %f169, 0f3EE8BA2E;
|
|
bra.uni $L__BB0_71;
|
|
|
|
$L__BB0_68:
|
|
setp.neu.f32 %p84, %f171, 0f7F800000;
|
|
@%p84 bra $L__BB0_71;
|
|
|
|
selp.f32 %f1296, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
$L__BB0_71:
|
|
mul.f32 %f645, %f1296, 0f437F0000;
|
|
setp.eq.f32 %p85, %f169, 0f3F800000;
|
|
selp.f32 %f646, 0f437F0000, %f645, %p85;
|
|
cvt.rzi.u32.f32 %r354, %f646;
|
|
shl.b64 %rd69, %rd20, 1;
|
|
add.s64 %rd70, %rd19, %rd69;
|
|
cvt.u16.u32 %rs16, %r354;
|
|
mov.u16 %rs17, 255;
|
|
st.global.v2.u8 [%rd70], {%rs16, %rs17};
|
|
|
|
$L__BB0_72:
|
|
ld.const.v2.f32 {%f647, %f648}, [params+648];
|
|
mul.f32 %f182, %f1290, %f647;
|
|
mul.f32 %f183, %f1291, %f648;
|
|
ld.const.f32 %f651, [params+656];
|
|
mul.f32 %f184, %f1292, %f651;
|
|
and.b32 %r355, %r88, 1;
|
|
setp.eq.b32 %p86, %r355, 1;
|
|
mov.pred %p87, 0;
|
|
xor.pred %p88, %p86, %p87;
|
|
not.pred %p89, %p88;
|
|
@%p89 bra $L__BB0_146;
|
|
|
|
mov.f32 %f653, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f654, %f653;
|
|
add.f32 %f655, %f654, %f654;
|
|
mov.f32 %f656, 0f3EE66666;
|
|
sub.f32 %f657, %f656, %f655;
|
|
abs.f32 %f185, %f657;
|
|
abs.f32 %f186, %f182;
|
|
setp.lt.f32 %p90, %f186, 0f00800000;
|
|
mul.f32 %f658, %f186, 0f4B800000;
|
|
selp.f32 %f659, %f658, %f186, %p90;
|
|
selp.f32 %f660, 0fC3170000, 0fC2FE0000, %p90;
|
|
mov.b32 %r356, %f659;
|
|
and.b32 %r357, %r356, 8388607;
|
|
or.b32 %r358, %r357, 1065353216;
|
|
mov.b32 %f661, %r358;
|
|
shr.u32 %r359, %r356, 23;
|
|
cvt.rn.f32.u32 %f662, %r359;
|
|
add.f32 %f663, %f660, %f662;
|
|
setp.gt.f32 %p91, %f661, 0f3FB504F3;
|
|
mul.f32 %f664, %f661, 0f3F000000;
|
|
add.f32 %f665, %f663, 0f3F800000;
|
|
selp.f32 %f666, %f665, %f663, %p91;
|
|
selp.f32 %f667, %f664, %f661, %p91;
|
|
add.f32 %f668, %f667, 0fBF800000;
|
|
add.f32 %f669, %f667, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f670, %f669;
|
|
add.f32 %f671, %f668, %f668;
|
|
mul.f32 %f672, %f671, %f670;
|
|
mul.f32 %f673, %f672, %f672;
|
|
mov.f32 %f674, 0f3C4CAF63;
|
|
mov.f32 %f675, 0f3B18F0FE;
|
|
fma.rn.f32 %f676, %f675, %f673, %f674;
|
|
mov.f32 %f677, 0f3DAAAABD;
|
|
fma.rn.f32 %f678, %f676, %f673, %f677;
|
|
mul.rn.f32 %f679, %f678, %f673;
|
|
mul.rn.f32 %f680, %f679, %f672;
|
|
sub.f32 %f681, %f668, %f672;
|
|
add.f32 %f682, %f681, %f681;
|
|
neg.f32 %f683, %f672;
|
|
fma.rn.f32 %f684, %f683, %f668, %f682;
|
|
mul.rn.f32 %f685, %f670, %f684;
|
|
add.f32 %f686, %f680, %f672;
|
|
sub.f32 %f687, %f672, %f686;
|
|
add.f32 %f688, %f680, %f687;
|
|
add.f32 %f689, %f685, %f688;
|
|
add.f32 %f690, %f686, %f689;
|
|
sub.f32 %f691, %f686, %f690;
|
|
add.f32 %f692, %f689, %f691;
|
|
mov.f32 %f693, 0f3F317200;
|
|
mul.rn.f32 %f694, %f666, %f693;
|
|
mov.f32 %f695, 0f35BFBE8E;
|
|
mul.rn.f32 %f696, %f666, %f695;
|
|
add.f32 %f697, %f694, %f690;
|
|
sub.f32 %f698, %f694, %f697;
|
|
add.f32 %f699, %f690, %f698;
|
|
add.f32 %f700, %f692, %f699;
|
|
add.f32 %f701, %f696, %f700;
|
|
add.f32 %f702, %f697, %f701;
|
|
sub.f32 %f703, %f697, %f702;
|
|
add.f32 %f704, %f701, %f703;
|
|
mul.rn.f32 %f705, %f656, %f702;
|
|
neg.f32 %f706, %f705;
|
|
fma.rn.f32 %f707, %f656, %f702, %f706;
|
|
fma.rn.f32 %f708, %f656, %f704, %f707;
|
|
mov.f32 %f709, 0f00000000;
|
|
fma.rn.f32 %f710, %f709, %f702, %f708;
|
|
add.rn.f32 %f711, %f705, %f710;
|
|
neg.f32 %f712, %f711;
|
|
add.rn.f32 %f713, %f705, %f712;
|
|
add.rn.f32 %f714, %f713, %f710;
|
|
mov.b32 %r360, %f711;
|
|
setp.eq.s32 %p92, %r360, 1118925336;
|
|
add.s32 %r361, %r360, -1;
|
|
mov.b32 %f715, %r361;
|
|
add.f32 %f716, %f714, 0f37000000;
|
|
selp.f32 %f187, %f716, %f714, %p92;
|
|
selp.f32 %f717, %f715, %f711, %p92;
|
|
mov.f32 %f718, 0f3FB8AA3B;
|
|
mul.rn.f32 %f719, %f717, %f718;
|
|
cvt.rzi.f32.f32 %f720, %f719;
|
|
abs.f32 %f721, %f720;
|
|
setp.gt.f32 %p93, %f721, 0f42FC0000;
|
|
mov.b32 %r362, %f720;
|
|
and.b32 %r363, %r362, -2147483648;
|
|
or.b32 %r364, %r363, 1123811328;
|
|
mov.b32 %f722, %r364;
|
|
selp.f32 %f723, %f722, %f720, %p93;
|
|
mov.f32 %f724, 0fBF317218;
|
|
fma.rn.f32 %f725, %f723, %f724, %f717;
|
|
mov.f32 %f726, 0f3102E308;
|
|
fma.rn.f32 %f727, %f723, %f726, %f725;
|
|
mul.f32 %f728, %f727, 0f3FB8AA3B;
|
|
add.f32 %f729, %f723, 0f4B40007F;
|
|
mov.b32 %r365, %f729;
|
|
shl.b32 %r366, %r365, 23;
|
|
mov.b32 %f730, %r366;
|
|
ex2.approx.ftz.f32 %f731, %f728;
|
|
mul.f32 %f188, %f731, %f730;
|
|
setp.eq.f32 %p94, %f188, 0f7F800000;
|
|
mov.f32 %f1297, 0f7F800000;
|
|
@%p94 bra $L__BB0_75;
|
|
|
|
fma.rn.f32 %f1297, %f188, %f187, %f188;
|
|
|
|
$L__BB0_75:
|
|
setp.lt.f32 %p95, %f182, 0f00000000;
|
|
setp.eq.f32 %p96, %f185, 0f3F800000;
|
|
and.pred %p4, %p95, %p96;
|
|
setp.eq.f32 %p97, %f182, 0f00000000;
|
|
@%p97 bra $L__BB0_79;
|
|
bra.uni $L__BB0_76;
|
|
|
|
$L__BB0_79:
|
|
add.f32 %f736, %f182, %f182;
|
|
selp.f32 %f1299, %f736, 0f00000000, %p96;
|
|
bra.uni $L__BB0_80;
|
|
|
|
$L__BB0_76:
|
|
mov.b32 %r367, %f1297;
|
|
xor.b32 %r368, %r367, -2147483648;
|
|
mov.b32 %f732, %r368;
|
|
selp.f32 %f1299, %f732, %f1297, %p4;
|
|
setp.geu.f32 %p98, %f182, 0f00000000;
|
|
@%p98 bra $L__BB0_80;
|
|
|
|
mov.f32 %f733, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f734, %f733;
|
|
setp.eq.f32 %p99, %f734, 0f3EE66666;
|
|
@%p99 bra $L__BB0_80;
|
|
|
|
mov.f32 %f1299, 0f7FFFFFFF;
|
|
|
|
$L__BB0_80:
|
|
add.f32 %f737, %f186, 0f3EE66666;
|
|
mov.b32 %r369, %f737;
|
|
setp.lt.s32 %p101, %r369, 2139095040;
|
|
@%p101 bra $L__BB0_85;
|
|
|
|
setp.gtu.f32 %p102, %f186, 0f7F800000;
|
|
@%p102 bra $L__BB0_84;
|
|
bra.uni $L__BB0_82;
|
|
|
|
$L__BB0_84:
|
|
add.f32 %f1299, %f182, 0f3EE66666;
|
|
bra.uni $L__BB0_85;
|
|
|
|
$L__BB0_82:
|
|
setp.neu.f32 %p103, %f186, 0f7F800000;
|
|
@%p103 bra $L__BB0_85;
|
|
|
|
selp.f32 %f1299, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
$L__BB0_85:
|
|
setp.eq.f32 %p104, %f182, 0f3F800000;
|
|
selp.f32 %f197, 0f3F800000, %f1299, %p104;
|
|
abs.f32 %f198, %f183;
|
|
setp.lt.f32 %p105, %f198, 0f00800000;
|
|
mul.f32 %f739, %f198, 0f4B800000;
|
|
selp.f32 %f740, %f739, %f198, %p105;
|
|
selp.f32 %f741, 0fC3170000, 0fC2FE0000, %p105;
|
|
mov.b32 %r370, %f740;
|
|
and.b32 %r371, %r370, 8388607;
|
|
or.b32 %r372, %r371, 1065353216;
|
|
mov.b32 %f742, %r372;
|
|
shr.u32 %r373, %r370, 23;
|
|
cvt.rn.f32.u32 %f743, %r373;
|
|
add.f32 %f744, %f741, %f743;
|
|
setp.gt.f32 %p106, %f742, 0f3FB504F3;
|
|
mul.f32 %f745, %f742, 0f3F000000;
|
|
add.f32 %f746, %f744, 0f3F800000;
|
|
selp.f32 %f747, %f746, %f744, %p106;
|
|
selp.f32 %f748, %f745, %f742, %p106;
|
|
add.f32 %f749, %f748, 0fBF800000;
|
|
add.f32 %f750, %f748, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f751, %f750;
|
|
add.f32 %f752, %f749, %f749;
|
|
mul.f32 %f753, %f752, %f751;
|
|
mul.f32 %f754, %f753, %f753;
|
|
mov.f32 %f755, 0f3C4CAF63;
|
|
mov.f32 %f756, 0f3B18F0FE;
|
|
fma.rn.f32 %f757, %f756, %f754, %f755;
|
|
mov.f32 %f758, 0f3DAAAABD;
|
|
fma.rn.f32 %f759, %f757, %f754, %f758;
|
|
mul.rn.f32 %f760, %f759, %f754;
|
|
mul.rn.f32 %f761, %f760, %f753;
|
|
sub.f32 %f762, %f749, %f753;
|
|
add.f32 %f763, %f762, %f762;
|
|
neg.f32 %f764, %f753;
|
|
fma.rn.f32 %f765, %f764, %f749, %f763;
|
|
mul.rn.f32 %f766, %f751, %f765;
|
|
add.f32 %f767, %f761, %f753;
|
|
sub.f32 %f768, %f753, %f767;
|
|
add.f32 %f769, %f761, %f768;
|
|
add.f32 %f770, %f766, %f769;
|
|
add.f32 %f771, %f767, %f770;
|
|
sub.f32 %f772, %f767, %f771;
|
|
add.f32 %f773, %f770, %f772;
|
|
mov.f32 %f774, 0f3F317200;
|
|
mul.rn.f32 %f775, %f747, %f774;
|
|
mov.f32 %f776, 0f35BFBE8E;
|
|
mul.rn.f32 %f777, %f747, %f776;
|
|
add.f32 %f778, %f775, %f771;
|
|
sub.f32 %f779, %f775, %f778;
|
|
add.f32 %f780, %f771, %f779;
|
|
add.f32 %f781, %f773, %f780;
|
|
add.f32 %f782, %f777, %f781;
|
|
add.f32 %f783, %f778, %f782;
|
|
sub.f32 %f784, %f778, %f783;
|
|
add.f32 %f785, %f782, %f784;
|
|
mov.f32 %f786, 0f3EE66666;
|
|
mul.rn.f32 %f787, %f786, %f783;
|
|
neg.f32 %f788, %f787;
|
|
fma.rn.f32 %f789, %f786, %f783, %f788;
|
|
fma.rn.f32 %f790, %f786, %f785, %f789;
|
|
mov.f32 %f791, 0f00000000;
|
|
fma.rn.f32 %f792, %f791, %f783, %f790;
|
|
add.rn.f32 %f793, %f787, %f792;
|
|
neg.f32 %f794, %f793;
|
|
add.rn.f32 %f795, %f787, %f794;
|
|
add.rn.f32 %f796, %f795, %f792;
|
|
mov.b32 %r374, %f793;
|
|
setp.eq.s32 %p107, %r374, 1118925336;
|
|
add.s32 %r375, %r374, -1;
|
|
mov.b32 %f797, %r375;
|
|
add.f32 %f798, %f796, 0f37000000;
|
|
selp.f32 %f199, %f798, %f796, %p107;
|
|
selp.f32 %f799, %f797, %f793, %p107;
|
|
mov.f32 %f800, 0f3FB8AA3B;
|
|
mul.rn.f32 %f801, %f799, %f800;
|
|
cvt.rzi.f32.f32 %f802, %f801;
|
|
abs.f32 %f803, %f802;
|
|
setp.gt.f32 %p108, %f803, 0f42FC0000;
|
|
mov.b32 %r376, %f802;
|
|
and.b32 %r377, %r376, -2147483648;
|
|
or.b32 %r378, %r377, 1123811328;
|
|
mov.b32 %f804, %r378;
|
|
selp.f32 %f805, %f804, %f802, %p108;
|
|
mov.f32 %f806, 0fBF317218;
|
|
fma.rn.f32 %f807, %f805, %f806, %f799;
|
|
mov.f32 %f808, 0f3102E308;
|
|
fma.rn.f32 %f809, %f805, %f808, %f807;
|
|
mul.f32 %f810, %f809, 0f3FB8AA3B;
|
|
add.f32 %f811, %f805, 0f4B40007F;
|
|
mov.b32 %r379, %f811;
|
|
shl.b32 %r380, %r379, 23;
|
|
mov.b32 %f812, %r380;
|
|
ex2.approx.ftz.f32 %f813, %f810;
|
|
mul.f32 %f200, %f813, %f812;
|
|
setp.eq.f32 %p109, %f200, 0f7F800000;
|
|
mov.f32 %f1300, 0f7F800000;
|
|
@%p109 bra $L__BB0_87;
|
|
|
|
fma.rn.f32 %f1300, %f200, %f199, %f200;
|
|
|
|
$L__BB0_87:
|
|
setp.lt.f32 %p110, %f183, 0f00000000;
|
|
and.pred %p5, %p110, %p96;
|
|
setp.eq.f32 %p112, %f183, 0f00000000;
|
|
@%p112 bra $L__BB0_91;
|
|
bra.uni $L__BB0_88;
|
|
|
|
$L__BB0_91:
|
|
add.f32 %f818, %f183, %f183;
|
|
selp.f32 %f1302, %f818, 0f00000000, %p96;
|
|
bra.uni $L__BB0_92;
|
|
|
|
$L__BB0_88:
|
|
mov.b32 %r381, %f1300;
|
|
xor.b32 %r382, %r381, -2147483648;
|
|
mov.b32 %f814, %r382;
|
|
selp.f32 %f1302, %f814, %f1300, %p5;
|
|
setp.geu.f32 %p113, %f183, 0f00000000;
|
|
@%p113 bra $L__BB0_92;
|
|
|
|
mov.f32 %f815, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f816, %f815;
|
|
setp.eq.f32 %p114, %f816, 0f3EE66666;
|
|
@%p114 bra $L__BB0_92;
|
|
|
|
mov.f32 %f1302, 0f7FFFFFFF;
|
|
|
|
$L__BB0_92:
|
|
add.f32 %f819, %f198, 0f3EE66666;
|
|
mov.b32 %r383, %f819;
|
|
setp.lt.s32 %p116, %r383, 2139095040;
|
|
@%p116 bra $L__BB0_97;
|
|
|
|
setp.gtu.f32 %p117, %f198, 0f7F800000;
|
|
@%p117 bra $L__BB0_96;
|
|
bra.uni $L__BB0_94;
|
|
|
|
$L__BB0_96:
|
|
add.f32 %f1302, %f183, 0f3EE66666;
|
|
bra.uni $L__BB0_97;
|
|
|
|
$L__BB0_94:
|
|
setp.neu.f32 %p118, %f198, 0f7F800000;
|
|
@%p118 bra $L__BB0_97;
|
|
|
|
selp.f32 %f1302, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
$L__BB0_97:
|
|
setp.eq.f32 %p119, %f183, 0f3F800000;
|
|
selp.f32 %f209, 0f3F800000, %f1302, %p119;
|
|
abs.f32 %f210, %f184;
|
|
setp.lt.f32 %p120, %f210, 0f00800000;
|
|
mul.f32 %f821, %f210, 0f4B800000;
|
|
selp.f32 %f822, %f821, %f210, %p120;
|
|
selp.f32 %f823, 0fC3170000, 0fC2FE0000, %p120;
|
|
mov.b32 %r384, %f822;
|
|
and.b32 %r385, %r384, 8388607;
|
|
or.b32 %r386, %r385, 1065353216;
|
|
mov.b32 %f824, %r386;
|
|
shr.u32 %r387, %r384, 23;
|
|
cvt.rn.f32.u32 %f825, %r387;
|
|
add.f32 %f826, %f823, %f825;
|
|
setp.gt.f32 %p121, %f824, 0f3FB504F3;
|
|
mul.f32 %f827, %f824, 0f3F000000;
|
|
add.f32 %f828, %f826, 0f3F800000;
|
|
selp.f32 %f829, %f828, %f826, %p121;
|
|
selp.f32 %f830, %f827, %f824, %p121;
|
|
add.f32 %f831, %f830, 0fBF800000;
|
|
add.f32 %f832, %f830, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f833, %f832;
|
|
add.f32 %f834, %f831, %f831;
|
|
mul.f32 %f835, %f834, %f833;
|
|
mul.f32 %f836, %f835, %f835;
|
|
mov.f32 %f837, 0f3C4CAF63;
|
|
mov.f32 %f838, 0f3B18F0FE;
|
|
fma.rn.f32 %f839, %f838, %f836, %f837;
|
|
mov.f32 %f840, 0f3DAAAABD;
|
|
fma.rn.f32 %f841, %f839, %f836, %f840;
|
|
mul.rn.f32 %f842, %f841, %f836;
|
|
mul.rn.f32 %f843, %f842, %f835;
|
|
sub.f32 %f844, %f831, %f835;
|
|
add.f32 %f845, %f844, %f844;
|
|
neg.f32 %f846, %f835;
|
|
fma.rn.f32 %f847, %f846, %f831, %f845;
|
|
mul.rn.f32 %f848, %f833, %f847;
|
|
add.f32 %f849, %f843, %f835;
|
|
sub.f32 %f850, %f835, %f849;
|
|
add.f32 %f851, %f843, %f850;
|
|
add.f32 %f852, %f848, %f851;
|
|
add.f32 %f853, %f849, %f852;
|
|
sub.f32 %f854, %f849, %f853;
|
|
add.f32 %f855, %f852, %f854;
|
|
mov.f32 %f856, 0f3F317200;
|
|
mul.rn.f32 %f857, %f829, %f856;
|
|
mov.f32 %f858, 0f35BFBE8E;
|
|
mul.rn.f32 %f859, %f829, %f858;
|
|
add.f32 %f860, %f857, %f853;
|
|
sub.f32 %f861, %f857, %f860;
|
|
add.f32 %f862, %f853, %f861;
|
|
add.f32 %f863, %f855, %f862;
|
|
add.f32 %f864, %f859, %f863;
|
|
add.f32 %f865, %f860, %f864;
|
|
sub.f32 %f866, %f860, %f865;
|
|
add.f32 %f867, %f864, %f866;
|
|
mov.f32 %f868, 0f3EE66666;
|
|
mul.rn.f32 %f869, %f868, %f865;
|
|
neg.f32 %f870, %f869;
|
|
fma.rn.f32 %f871, %f868, %f865, %f870;
|
|
fma.rn.f32 %f872, %f868, %f867, %f871;
|
|
mov.f32 %f873, 0f00000000;
|
|
fma.rn.f32 %f874, %f873, %f865, %f872;
|
|
add.rn.f32 %f875, %f869, %f874;
|
|
neg.f32 %f876, %f875;
|
|
add.rn.f32 %f877, %f869, %f876;
|
|
add.rn.f32 %f878, %f877, %f874;
|
|
mov.b32 %r388, %f875;
|
|
setp.eq.s32 %p122, %r388, 1118925336;
|
|
add.s32 %r389, %r388, -1;
|
|
mov.b32 %f879, %r389;
|
|
add.f32 %f880, %f878, 0f37000000;
|
|
selp.f32 %f211, %f880, %f878, %p122;
|
|
selp.f32 %f881, %f879, %f875, %p122;
|
|
mov.f32 %f882, 0f3FB8AA3B;
|
|
mul.rn.f32 %f883, %f881, %f882;
|
|
cvt.rzi.f32.f32 %f884, %f883;
|
|
abs.f32 %f885, %f884;
|
|
setp.gt.f32 %p123, %f885, 0f42FC0000;
|
|
mov.b32 %r390, %f884;
|
|
and.b32 %r391, %r390, -2147483648;
|
|
or.b32 %r392, %r391, 1123811328;
|
|
mov.b32 %f886, %r392;
|
|
selp.f32 %f887, %f886, %f884, %p123;
|
|
mov.f32 %f888, 0fBF317218;
|
|
fma.rn.f32 %f889, %f887, %f888, %f881;
|
|
mov.f32 %f890, 0f3102E308;
|
|
fma.rn.f32 %f891, %f887, %f890, %f889;
|
|
mul.f32 %f892, %f891, 0f3FB8AA3B;
|
|
add.f32 %f893, %f887, 0f4B40007F;
|
|
mov.b32 %r393, %f893;
|
|
shl.b32 %r394, %r393, 23;
|
|
mov.b32 %f894, %r394;
|
|
ex2.approx.ftz.f32 %f895, %f892;
|
|
mul.f32 %f212, %f895, %f894;
|
|
setp.eq.f32 %p124, %f212, 0f7F800000;
|
|
mov.f32 %f1303, 0f7F800000;
|
|
@%p124 bra $L__BB0_99;
|
|
|
|
fma.rn.f32 %f1303, %f212, %f211, %f212;
|
|
|
|
$L__BB0_99:
|
|
setp.lt.f32 %p125, %f184, 0f00000000;
|
|
and.pred %p6, %p125, %p96;
|
|
setp.eq.f32 %p127, %f184, 0f00000000;
|
|
@%p127 bra $L__BB0_103;
|
|
bra.uni $L__BB0_100;
|
|
|
|
$L__BB0_103:
|
|
add.f32 %f900, %f184, %f184;
|
|
selp.f32 %f1305, %f900, 0f00000000, %p96;
|
|
bra.uni $L__BB0_104;
|
|
|
|
$L__BB0_100:
|
|
mov.b32 %r395, %f1303;
|
|
xor.b32 %r396, %r395, -2147483648;
|
|
mov.b32 %f896, %r396;
|
|
selp.f32 %f1305, %f896, %f1303, %p6;
|
|
setp.geu.f32 %p128, %f184, 0f00000000;
|
|
@%p128 bra $L__BB0_104;
|
|
|
|
mov.f32 %f897, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f898, %f897;
|
|
setp.eq.f32 %p129, %f898, 0f3EE66666;
|
|
@%p129 bra $L__BB0_104;
|
|
|
|
mov.f32 %f1305, 0f7FFFFFFF;
|
|
|
|
$L__BB0_104:
|
|
add.f32 %f901, %f210, 0f3EE66666;
|
|
mov.b32 %r397, %f901;
|
|
setp.lt.s32 %p131, %r397, 2139095040;
|
|
@%p131 bra $L__BB0_109;
|
|
|
|
setp.gtu.f32 %p132, %f210, 0f7F800000;
|
|
@%p132 bra $L__BB0_108;
|
|
bra.uni $L__BB0_106;
|
|
|
|
$L__BB0_108:
|
|
add.f32 %f1305, %f184, 0f3EE66666;
|
|
bra.uni $L__BB0_109;
|
|
|
|
$L__BB0_106:
|
|
setp.neu.f32 %p133, %f210, 0f7F800000;
|
|
@%p133 bra $L__BB0_109;
|
|
|
|
selp.f32 %f1305, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
$L__BB0_109:
|
|
setp.eq.f32 %p134, %f184, 0f3F800000;
|
|
mov.f32 %f903, 0f3F800000;
|
|
selp.f32 %f904, 0f3F800000, %f1305, %p134;
|
|
ld.const.u64 %rd71, [params+144];
|
|
cvta.to.global.u64 %rd21, %rd71;
|
|
ld.const.u32 %r398, [params+136];
|
|
mad.lo.s32 %r399, %r398, %r7, %r6;
|
|
cvt.u64.u32 %rd22, %r399;
|
|
min.f32 %f905, %f197, %f903;
|
|
mov.f32 %f906, 0f00000000;
|
|
max.f32 %f221, %f906, %f905;
|
|
min.f32 %f907, %f209, %f903;
|
|
max.f32 %f222, %f906, %f907;
|
|
min.f32 %f908, %f904, %f903;
|
|
max.f32 %f223, %f906, %f908;
|
|
mov.f32 %f909, 0f3E555555;
|
|
cvt.rzi.f32.f32 %f910, %f909;
|
|
add.f32 %f911, %f910, %f910;
|
|
mov.f32 %f912, 0f3ED55555;
|
|
sub.f32 %f913, %f912, %f911;
|
|
abs.f32 %f224, %f913;
|
|
abs.f32 %f225, %f221;
|
|
setp.lt.f32 %p135, %f225, 0f00800000;
|
|
mul.f32 %f914, %f225, 0f4B800000;
|
|
selp.f32 %f915, %f914, %f225, %p135;
|
|
selp.f32 %f916, 0fC3170000, 0fC2FE0000, %p135;
|
|
mov.b32 %r400, %f915;
|
|
and.b32 %r401, %r400, 8388607;
|
|
or.b32 %r402, %r401, 1065353216;
|
|
mov.b32 %f917, %r402;
|
|
shr.u32 %r403, %r400, 23;
|
|
cvt.rn.f32.u32 %f918, %r403;
|
|
add.f32 %f919, %f916, %f918;
|
|
setp.gt.f32 %p136, %f917, 0f3FB504F3;
|
|
mul.f32 %f920, %f917, 0f3F000000;
|
|
add.f32 %f921, %f919, 0f3F800000;
|
|
selp.f32 %f922, %f921, %f919, %p136;
|
|
selp.f32 %f923, %f920, %f917, %p136;
|
|
add.f32 %f924, %f923, 0fBF800000;
|
|
add.f32 %f925, %f923, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f926, %f925;
|
|
add.f32 %f927, %f924, %f924;
|
|
mul.f32 %f928, %f927, %f926;
|
|
mul.f32 %f929, %f928, %f928;
|
|
mov.f32 %f930, 0f3C4CAF63;
|
|
mov.f32 %f931, 0f3B18F0FE;
|
|
fma.rn.f32 %f932, %f931, %f929, %f930;
|
|
mov.f32 %f933, 0f3DAAAABD;
|
|
fma.rn.f32 %f934, %f932, %f929, %f933;
|
|
mul.rn.f32 %f935, %f934, %f929;
|
|
mul.rn.f32 %f936, %f935, %f928;
|
|
sub.f32 %f937, %f924, %f928;
|
|
add.f32 %f938, %f937, %f937;
|
|
neg.f32 %f939, %f928;
|
|
fma.rn.f32 %f940, %f939, %f924, %f938;
|
|
mul.rn.f32 %f941, %f926, %f940;
|
|
add.f32 %f942, %f936, %f928;
|
|
sub.f32 %f943, %f928, %f942;
|
|
add.f32 %f944, %f936, %f943;
|
|
add.f32 %f945, %f941, %f944;
|
|
add.f32 %f946, %f942, %f945;
|
|
sub.f32 %f947, %f942, %f946;
|
|
add.f32 %f948, %f945, %f947;
|
|
mov.f32 %f949, 0f3F317200;
|
|
mul.rn.f32 %f950, %f922, %f949;
|
|
mov.f32 %f951, 0f35BFBE8E;
|
|
mul.rn.f32 %f952, %f922, %f951;
|
|
add.f32 %f953, %f950, %f946;
|
|
sub.f32 %f954, %f950, %f953;
|
|
add.f32 %f955, %f946, %f954;
|
|
add.f32 %f956, %f948, %f955;
|
|
add.f32 %f957, %f952, %f956;
|
|
add.f32 %f958, %f953, %f957;
|
|
sub.f32 %f959, %f953, %f958;
|
|
add.f32 %f960, %f957, %f959;
|
|
mul.rn.f32 %f961, %f912, %f958;
|
|
neg.f32 %f962, %f961;
|
|
fma.rn.f32 %f963, %f912, %f958, %f962;
|
|
fma.rn.f32 %f964, %f912, %f960, %f963;
|
|
fma.rn.f32 %f965, %f906, %f958, %f964;
|
|
add.rn.f32 %f966, %f961, %f965;
|
|
neg.f32 %f967, %f966;
|
|
add.rn.f32 %f968, %f961, %f967;
|
|
add.rn.f32 %f969, %f968, %f965;
|
|
mov.b32 %r404, %f966;
|
|
setp.eq.s32 %p137, %r404, 1118925336;
|
|
add.s32 %r405, %r404, -1;
|
|
mov.b32 %f970, %r405;
|
|
add.f32 %f971, %f969, 0f37000000;
|
|
selp.f32 %f226, %f971, %f969, %p137;
|
|
selp.f32 %f972, %f970, %f966, %p137;
|
|
mov.f32 %f973, 0f3FB8AA3B;
|
|
mul.rn.f32 %f974, %f972, %f973;
|
|
cvt.rzi.f32.f32 %f975, %f974;
|
|
abs.f32 %f976, %f975;
|
|
setp.gt.f32 %p138, %f976, 0f42FC0000;
|
|
mov.b32 %r406, %f975;
|
|
and.b32 %r407, %r406, -2147483648;
|
|
or.b32 %r408, %r407, 1123811328;
|
|
mov.b32 %f977, %r408;
|
|
selp.f32 %f978, %f977, %f975, %p138;
|
|
mov.f32 %f979, 0fBF317218;
|
|
fma.rn.f32 %f980, %f978, %f979, %f972;
|
|
mov.f32 %f981, 0f3102E308;
|
|
fma.rn.f32 %f982, %f978, %f981, %f980;
|
|
mul.f32 %f983, %f982, 0f3FB8AA3B;
|
|
add.f32 %f984, %f978, 0f4B40007F;
|
|
mov.b32 %r409, %f984;
|
|
shl.b32 %r410, %r409, 23;
|
|
mov.b32 %f985, %r410;
|
|
ex2.approx.ftz.f32 %f986, %f983;
|
|
mul.f32 %f227, %f986, %f985;
|
|
setp.eq.f32 %p139, %f227, 0f7F800000;
|
|
mov.f32 %f1306, 0f7F800000;
|
|
@%p139 bra $L__BB0_111;
|
|
|
|
fma.rn.f32 %f1306, %f227, %f226, %f227;
|
|
|
|
$L__BB0_111:
|
|
setp.lt.f32 %p140, %f221, 0f00000000;
|
|
setp.eq.f32 %p141, %f224, 0f3F800000;
|
|
and.pred %p7, %p140, %p141;
|
|
setp.eq.f32 %p142, %f221, 0f00000000;
|
|
@%p142 bra $L__BB0_115;
|
|
bra.uni $L__BB0_112;
|
|
|
|
$L__BB0_115:
|
|
add.f32 %f991, %f221, %f221;
|
|
selp.f32 %f1308, %f991, 0f00000000, %p141;
|
|
bra.uni $L__BB0_116;
|
|
|
|
$L__BB0_112:
|
|
mov.b32 %r411, %f1306;
|
|
xor.b32 %r412, %r411, -2147483648;
|
|
mov.b32 %f987, %r412;
|
|
selp.f32 %f1308, %f987, %f1306, %p7;
|
|
setp.geu.f32 %p143, %f221, 0f00000000;
|
|
@%p143 bra $L__BB0_116;
|
|
|
|
mov.f32 %f988, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f989, %f988;
|
|
setp.eq.f32 %p144, %f989, 0f3ED55555;
|
|
@%p144 bra $L__BB0_116;
|
|
|
|
mov.f32 %f1308, 0f7FFFFFFF;
|
|
|
|
$L__BB0_116:
|
|
add.f32 %f992, %f225, 0f3ED55555;
|
|
mov.b32 %r413, %f992;
|
|
setp.lt.s32 %p146, %r413, 2139095040;
|
|
@%p146 bra $L__BB0_121;
|
|
|
|
setp.gtu.f32 %p147, %f225, 0f7F800000;
|
|
@%p147 bra $L__BB0_120;
|
|
bra.uni $L__BB0_118;
|
|
|
|
$L__BB0_120:
|
|
add.f32 %f1308, %f221, 0f3ED55555;
|
|
bra.uni $L__BB0_121;
|
|
|
|
$L__BB0_118:
|
|
setp.neu.f32 %p148, %f225, 0f7F800000;
|
|
@%p148 bra $L__BB0_121;
|
|
|
|
selp.f32 %f1308, 0fFF800000, 0f7F800000, %p7;
|
|
|
|
$L__BB0_121:
|
|
abs.f32 %f236, %f222;
|
|
setp.lt.f32 %p149, %f236, 0f00800000;
|
|
mul.f32 %f994, %f236, 0f4B800000;
|
|
selp.f32 %f995, %f994, %f236, %p149;
|
|
selp.f32 %f996, 0fC3170000, 0fC2FE0000, %p149;
|
|
mov.b32 %r414, %f995;
|
|
and.b32 %r415, %r414, 8388607;
|
|
or.b32 %r416, %r415, 1065353216;
|
|
mov.b32 %f997, %r416;
|
|
shr.u32 %r417, %r414, 23;
|
|
cvt.rn.f32.u32 %f998, %r417;
|
|
add.f32 %f999, %f996, %f998;
|
|
setp.gt.f32 %p150, %f997, 0f3FB504F3;
|
|
mul.f32 %f1000, %f997, 0f3F000000;
|
|
add.f32 %f1001, %f999, 0f3F800000;
|
|
selp.f32 %f1002, %f1001, %f999, %p150;
|
|
selp.f32 %f1003, %f1000, %f997, %p150;
|
|
add.f32 %f1004, %f1003, 0fBF800000;
|
|
add.f32 %f1005, %f1003, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1006, %f1005;
|
|
add.f32 %f1007, %f1004, %f1004;
|
|
mul.f32 %f1008, %f1007, %f1006;
|
|
mul.f32 %f1009, %f1008, %f1008;
|
|
mov.f32 %f1010, 0f3C4CAF63;
|
|
mov.f32 %f1011, 0f3B18F0FE;
|
|
fma.rn.f32 %f1012, %f1011, %f1009, %f1010;
|
|
mov.f32 %f1013, 0f3DAAAABD;
|
|
fma.rn.f32 %f1014, %f1012, %f1009, %f1013;
|
|
mul.rn.f32 %f1015, %f1014, %f1009;
|
|
mul.rn.f32 %f1016, %f1015, %f1008;
|
|
sub.f32 %f1017, %f1004, %f1008;
|
|
add.f32 %f1018, %f1017, %f1017;
|
|
neg.f32 %f1019, %f1008;
|
|
fma.rn.f32 %f1020, %f1019, %f1004, %f1018;
|
|
mul.rn.f32 %f1021, %f1006, %f1020;
|
|
add.f32 %f1022, %f1016, %f1008;
|
|
sub.f32 %f1023, %f1008, %f1022;
|
|
add.f32 %f1024, %f1016, %f1023;
|
|
add.f32 %f1025, %f1021, %f1024;
|
|
add.f32 %f1026, %f1022, %f1025;
|
|
sub.f32 %f1027, %f1022, %f1026;
|
|
add.f32 %f1028, %f1025, %f1027;
|
|
mov.f32 %f1029, 0f3F317200;
|
|
mul.rn.f32 %f1030, %f1002, %f1029;
|
|
mov.f32 %f1031, 0f35BFBE8E;
|
|
mul.rn.f32 %f1032, %f1002, %f1031;
|
|
add.f32 %f1033, %f1030, %f1026;
|
|
sub.f32 %f1034, %f1030, %f1033;
|
|
add.f32 %f1035, %f1026, %f1034;
|
|
add.f32 %f1036, %f1028, %f1035;
|
|
add.f32 %f1037, %f1032, %f1036;
|
|
add.f32 %f1038, %f1033, %f1037;
|
|
sub.f32 %f1039, %f1033, %f1038;
|
|
add.f32 %f1040, %f1037, %f1039;
|
|
mov.f32 %f1041, 0f3ED55555;
|
|
mul.rn.f32 %f1042, %f1041, %f1038;
|
|
neg.f32 %f1043, %f1042;
|
|
fma.rn.f32 %f1044, %f1041, %f1038, %f1043;
|
|
fma.rn.f32 %f1045, %f1041, %f1040, %f1044;
|
|
mov.f32 %f1046, 0f00000000;
|
|
fma.rn.f32 %f1047, %f1046, %f1038, %f1045;
|
|
add.rn.f32 %f1048, %f1042, %f1047;
|
|
neg.f32 %f1049, %f1048;
|
|
add.rn.f32 %f1050, %f1042, %f1049;
|
|
add.rn.f32 %f1051, %f1050, %f1047;
|
|
mov.b32 %r418, %f1048;
|
|
setp.eq.s32 %p151, %r418, 1118925336;
|
|
add.s32 %r419, %r418, -1;
|
|
mov.b32 %f1052, %r419;
|
|
add.f32 %f1053, %f1051, 0f37000000;
|
|
selp.f32 %f237, %f1053, %f1051, %p151;
|
|
selp.f32 %f1054, %f1052, %f1048, %p151;
|
|
mov.f32 %f1055, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1056, %f1054, %f1055;
|
|
cvt.rzi.f32.f32 %f1057, %f1056;
|
|
abs.f32 %f1058, %f1057;
|
|
setp.gt.f32 %p152, %f1058, 0f42FC0000;
|
|
mov.b32 %r420, %f1057;
|
|
and.b32 %r421, %r420, -2147483648;
|
|
or.b32 %r422, %r421, 1123811328;
|
|
mov.b32 %f1059, %r422;
|
|
selp.f32 %f1060, %f1059, %f1057, %p152;
|
|
mov.f32 %f1061, 0fBF317218;
|
|
fma.rn.f32 %f1062, %f1060, %f1061, %f1054;
|
|
mov.f32 %f1063, 0f3102E308;
|
|
fma.rn.f32 %f1064, %f1060, %f1063, %f1062;
|
|
mul.f32 %f1065, %f1064, 0f3FB8AA3B;
|
|
add.f32 %f1066, %f1060, 0f4B40007F;
|
|
mov.b32 %r423, %f1066;
|
|
shl.b32 %r424, %r423, 23;
|
|
mov.b32 %f1067, %r424;
|
|
ex2.approx.ftz.f32 %f1068, %f1065;
|
|
mul.f32 %f238, %f1068, %f1067;
|
|
setp.eq.f32 %p153, %f238, 0f7F800000;
|
|
mov.f32 %f1309, 0f7F800000;
|
|
@%p153 bra $L__BB0_123;
|
|
|
|
fma.rn.f32 %f1309, %f238, %f237, %f238;
|
|
|
|
$L__BB0_123:
|
|
setp.lt.f32 %p154, %f222, 0f00000000;
|
|
and.pred %p8, %p154, %p141;
|
|
setp.eq.f32 %p156, %f222, 0f00000000;
|
|
@%p156 bra $L__BB0_127;
|
|
bra.uni $L__BB0_124;
|
|
|
|
$L__BB0_127:
|
|
add.f32 %f1073, %f222, %f222;
|
|
selp.f32 %f1311, %f1073, 0f00000000, %p141;
|
|
bra.uni $L__BB0_128;
|
|
|
|
$L__BB0_124:
|
|
mov.b32 %r425, %f1309;
|
|
xor.b32 %r426, %r425, -2147483648;
|
|
mov.b32 %f1069, %r426;
|
|
selp.f32 %f1311, %f1069, %f1309, %p8;
|
|
setp.geu.f32 %p157, %f222, 0f00000000;
|
|
@%p157 bra $L__BB0_128;
|
|
|
|
mov.f32 %f1070, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1071, %f1070;
|
|
setp.eq.f32 %p158, %f1071, 0f3ED55555;
|
|
@%p158 bra $L__BB0_128;
|
|
|
|
mov.f32 %f1311, 0f7FFFFFFF;
|
|
|
|
$L__BB0_128:
|
|
add.f32 %f1074, %f236, 0f3ED55555;
|
|
mov.b32 %r427, %f1074;
|
|
setp.lt.s32 %p160, %r427, 2139095040;
|
|
@%p160 bra $L__BB0_133;
|
|
|
|
setp.gtu.f32 %p161, %f236, 0f7F800000;
|
|
@%p161 bra $L__BB0_132;
|
|
bra.uni $L__BB0_130;
|
|
|
|
$L__BB0_132:
|
|
add.f32 %f1311, %f222, 0f3ED55555;
|
|
bra.uni $L__BB0_133;
|
|
|
|
$L__BB0_130:
|
|
setp.neu.f32 %p162, %f236, 0f7F800000;
|
|
@%p162 bra $L__BB0_133;
|
|
|
|
selp.f32 %f1311, 0fFF800000, 0f7F800000, %p8;
|
|
|
|
$L__BB0_133:
|
|
abs.f32 %f247, %f223;
|
|
setp.lt.f32 %p163, %f247, 0f00800000;
|
|
mul.f32 %f1076, %f247, 0f4B800000;
|
|
selp.f32 %f1077, %f1076, %f247, %p163;
|
|
selp.f32 %f1078, 0fC3170000, 0fC2FE0000, %p163;
|
|
mov.b32 %r428, %f1077;
|
|
and.b32 %r429, %r428, 8388607;
|
|
or.b32 %r430, %r429, 1065353216;
|
|
mov.b32 %f1079, %r430;
|
|
shr.u32 %r431, %r428, 23;
|
|
cvt.rn.f32.u32 %f1080, %r431;
|
|
add.f32 %f1081, %f1078, %f1080;
|
|
setp.gt.f32 %p164, %f1079, 0f3FB504F3;
|
|
mul.f32 %f1082, %f1079, 0f3F000000;
|
|
add.f32 %f1083, %f1081, 0f3F800000;
|
|
selp.f32 %f1084, %f1083, %f1081, %p164;
|
|
selp.f32 %f1085, %f1082, %f1079, %p164;
|
|
add.f32 %f1086, %f1085, 0fBF800000;
|
|
add.f32 %f1087, %f1085, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1088, %f1087;
|
|
add.f32 %f1089, %f1086, %f1086;
|
|
mul.f32 %f1090, %f1089, %f1088;
|
|
mul.f32 %f1091, %f1090, %f1090;
|
|
mov.f32 %f1092, 0f3C4CAF63;
|
|
mov.f32 %f1093, 0f3B18F0FE;
|
|
fma.rn.f32 %f1094, %f1093, %f1091, %f1092;
|
|
mov.f32 %f1095, 0f3DAAAABD;
|
|
fma.rn.f32 %f1096, %f1094, %f1091, %f1095;
|
|
mul.rn.f32 %f1097, %f1096, %f1091;
|
|
mul.rn.f32 %f1098, %f1097, %f1090;
|
|
sub.f32 %f1099, %f1086, %f1090;
|
|
add.f32 %f1100, %f1099, %f1099;
|
|
neg.f32 %f1101, %f1090;
|
|
fma.rn.f32 %f1102, %f1101, %f1086, %f1100;
|
|
mul.rn.f32 %f1103, %f1088, %f1102;
|
|
add.f32 %f1104, %f1098, %f1090;
|
|
sub.f32 %f1105, %f1090, %f1104;
|
|
add.f32 %f1106, %f1098, %f1105;
|
|
add.f32 %f1107, %f1103, %f1106;
|
|
add.f32 %f1108, %f1104, %f1107;
|
|
sub.f32 %f1109, %f1104, %f1108;
|
|
add.f32 %f1110, %f1107, %f1109;
|
|
mov.f32 %f1111, 0f3F317200;
|
|
mul.rn.f32 %f1112, %f1084, %f1111;
|
|
mov.f32 %f1113, 0f35BFBE8E;
|
|
mul.rn.f32 %f1114, %f1084, %f1113;
|
|
add.f32 %f1115, %f1112, %f1108;
|
|
sub.f32 %f1116, %f1112, %f1115;
|
|
add.f32 %f1117, %f1108, %f1116;
|
|
add.f32 %f1118, %f1110, %f1117;
|
|
add.f32 %f1119, %f1114, %f1118;
|
|
add.f32 %f1120, %f1115, %f1119;
|
|
sub.f32 %f1121, %f1115, %f1120;
|
|
add.f32 %f1122, %f1119, %f1121;
|
|
mov.f32 %f1123, 0f3ED55555;
|
|
mul.rn.f32 %f1124, %f1123, %f1120;
|
|
neg.f32 %f1125, %f1124;
|
|
fma.rn.f32 %f1126, %f1123, %f1120, %f1125;
|
|
fma.rn.f32 %f1127, %f1123, %f1122, %f1126;
|
|
mov.f32 %f1128, 0f00000000;
|
|
fma.rn.f32 %f1129, %f1128, %f1120, %f1127;
|
|
add.rn.f32 %f1130, %f1124, %f1129;
|
|
neg.f32 %f1131, %f1130;
|
|
add.rn.f32 %f1132, %f1124, %f1131;
|
|
add.rn.f32 %f1133, %f1132, %f1129;
|
|
mov.b32 %r432, %f1130;
|
|
setp.eq.s32 %p165, %r432, 1118925336;
|
|
add.s32 %r433, %r432, -1;
|
|
mov.b32 %f1134, %r433;
|
|
add.f32 %f1135, %f1133, 0f37000000;
|
|
selp.f32 %f248, %f1135, %f1133, %p165;
|
|
selp.f32 %f1136, %f1134, %f1130, %p165;
|
|
mov.f32 %f1137, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1138, %f1136, %f1137;
|
|
cvt.rzi.f32.f32 %f1139, %f1138;
|
|
abs.f32 %f1140, %f1139;
|
|
setp.gt.f32 %p166, %f1140, 0f42FC0000;
|
|
mov.b32 %r434, %f1139;
|
|
and.b32 %r435, %r434, -2147483648;
|
|
or.b32 %r436, %r435, 1123811328;
|
|
mov.b32 %f1141, %r436;
|
|
selp.f32 %f1142, %f1141, %f1139, %p166;
|
|
mov.f32 %f1143, 0fBF317218;
|
|
fma.rn.f32 %f1144, %f1142, %f1143, %f1136;
|
|
mov.f32 %f1145, 0f3102E308;
|
|
fma.rn.f32 %f1146, %f1142, %f1145, %f1144;
|
|
mul.f32 %f1147, %f1146, 0f3FB8AA3B;
|
|
add.f32 %f1148, %f1142, 0f4B40007F;
|
|
mov.b32 %r437, %f1148;
|
|
shl.b32 %r438, %r437, 23;
|
|
mov.b32 %f1149, %r438;
|
|
ex2.approx.ftz.f32 %f1150, %f1147;
|
|
mul.f32 %f249, %f1150, %f1149;
|
|
setp.eq.f32 %p167, %f249, 0f7F800000;
|
|
mov.f32 %f1312, 0f7F800000;
|
|
@%p167 bra $L__BB0_135;
|
|
|
|
fma.rn.f32 %f1312, %f249, %f248, %f249;
|
|
|
|
$L__BB0_135:
|
|
setp.lt.f32 %p168, %f223, 0f00000000;
|
|
and.pred %p9, %p168, %p141;
|
|
setp.eq.f32 %p170, %f223, 0f00000000;
|
|
@%p170 bra $L__BB0_139;
|
|
bra.uni $L__BB0_136;
|
|
|
|
$L__BB0_139:
|
|
add.f32 %f1155, %f223, %f223;
|
|
selp.f32 %f1314, %f1155, 0f00000000, %p141;
|
|
bra.uni $L__BB0_140;
|
|
|
|
$L__BB0_136:
|
|
mov.b32 %r439, %f1312;
|
|
xor.b32 %r440, %r439, -2147483648;
|
|
mov.b32 %f1151, %r440;
|
|
selp.f32 %f1314, %f1151, %f1312, %p9;
|
|
setp.geu.f32 %p171, %f223, 0f00000000;
|
|
@%p171 bra $L__BB0_140;
|
|
|
|
mov.f32 %f1152, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1153, %f1152;
|
|
setp.eq.f32 %p172, %f1153, 0f3ED55555;
|
|
@%p172 bra $L__BB0_140;
|
|
|
|
mov.f32 %f1314, 0f7FFFFFFF;
|
|
|
|
$L__BB0_140:
|
|
add.f32 %f1156, %f247, 0f3ED55555;
|
|
mov.b32 %r441, %f1156;
|
|
setp.lt.s32 %p174, %r441, 2139095040;
|
|
@%p174 bra $L__BB0_145;
|
|
|
|
setp.gtu.f32 %p175, %f247, 0f7F800000;
|
|
@%p175 bra $L__BB0_144;
|
|
bra.uni $L__BB0_142;
|
|
|
|
$L__BB0_144:
|
|
add.f32 %f1314, %f223, 0f3ED55555;
|
|
bra.uni $L__BB0_145;
|
|
|
|
$L__BB0_142:
|
|
setp.neu.f32 %p176, %f247, 0f7F800000;
|
|
@%p176 bra $L__BB0_145;
|
|
|
|
selp.f32 %f1314, 0fFF800000, 0f7F800000, %p9;
|
|
|
|
$L__BB0_145:
|
|
fma.rn.f32 %f1157, %f1308, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p177, %f221, 0f3F800000;
|
|
mov.f32 %f1158, 0f3F800000;
|
|
selp.f32 %f1159, 0f3F7FFFFF, %f1157, %p177;
|
|
mul.f32 %f1160, %f221, 0f414EB852;
|
|
setp.lt.f32 %p178, %f221, 0f3B4D2E1C;
|
|
selp.f32 %f1161, %f1160, %f1159, %p178;
|
|
fma.rn.f32 %f1162, %f1311, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p179, %f222, 0f3F800000;
|
|
selp.f32 %f1163, 0f3F7FFFFF, %f1162, %p179;
|
|
mul.f32 %f1164, %f222, 0f414EB852;
|
|
setp.lt.f32 %p180, %f222, 0f3B4D2E1C;
|
|
selp.f32 %f1165, %f1164, %f1163, %p180;
|
|
fma.rn.f32 %f1166, %f1314, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p181, %f223, 0f3F800000;
|
|
selp.f32 %f1167, 0f3F7FFFFF, %f1166, %p181;
|
|
mul.f32 %f1168, %f223, 0f414EB852;
|
|
setp.lt.f32 %p182, %f223, 0f3B4D2E1C;
|
|
selp.f32 %f1169, %f1168, %f1167, %p182;
|
|
min.f32 %f1170, %f1161, %f1158;
|
|
mov.f32 %f1171, 0f00000000;
|
|
max.f32 %f1172, %f1171, %f1170;
|
|
mul.f32 %f1173, %f1172, 0f43800000;
|
|
cvt.rzi.u32.f32 %r442, %f1173;
|
|
min.u32 %r443, %r442, 255;
|
|
min.f32 %f1174, %f1165, %f1158;
|
|
max.f32 %f1175, %f1171, %f1174;
|
|
mul.f32 %f1176, %f1175, 0f43800000;
|
|
cvt.rzi.u32.f32 %r444, %f1176;
|
|
min.u32 %r445, %r444, 255;
|
|
min.f32 %f1177, %f1169, %f1158;
|
|
max.f32 %f1178, %f1171, %f1177;
|
|
mul.f32 %f1179, %f1178, 0f43800000;
|
|
cvt.rzi.u32.f32 %r446, %f1179;
|
|
min.u32 %r447, %r446, 255;
|
|
shl.b64 %rd72, %rd22, 2;
|
|
add.s64 %rd73, %rd21, %rd72;
|
|
cvt.u16.u32 %rs18, %r447;
|
|
cvt.u16.u32 %rs19, %r445;
|
|
cvt.u16.u32 %rs20, %r443;
|
|
mov.u16 %rs21, 255;
|
|
st.global.v4.u8 [%rd73], {%rs20, %rs19, %rs18, %rs21};
|
|
|
|
$L__BB0_146:
|
|
and.b32 %r448, %r88, 4;
|
|
setp.eq.s32 %p183, %r448, 0;
|
|
@%p183 bra $L__BB0_150;
|
|
|
|
ld.const.u32 %r449, [params+108];
|
|
setp.eq.s32 %p184, %r449, 0;
|
|
ld.const.u64 %rd74, [params+224];
|
|
cvta.to.global.u64 %rd75, %rd74;
|
|
ld.const.u32 %r450, [params+216];
|
|
mad.lo.s32 %r451, %r450, %r7, %r6;
|
|
mul.wide.u32 %rd76, %r451, 8;
|
|
add.s64 %rd23, %rd75, %rd76;
|
|
@%p184 bra $L__BB0_149;
|
|
|
|
ld.global.v4.u16 {%rs29, %rs30, %rs31, %rs32}, [%rd23];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1180, %rs29;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1181, %rs30;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1182, %rs31;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1183, %f182, %f1180;
|
|
add.f32 %f1184, %f183, %f1181;
|
|
add.f32 %f1185, %f184, %f1182;
|
|
mov.f32 %f1186, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs27, %f1185;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs26, %f1184;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs25, %f1183;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs28, %f1186;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd23], {%rs25, %rs26, %rs27, %rs28};
|
|
bra.uni $L__BB0_150;
|
|
|
|
$L__BB0_149:
|
|
mov.f32 %f1190, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs36, %f1190;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs35, %f184;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs34, %f183;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs33, %f182;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd23], {%rs33, %rs34, %rs35, %rs36};
|
|
|
|
$L__BB0_150:
|
|
and.b32 %r452, %r88, 64;
|
|
setp.eq.s32 %p185, %r452, 0;
|
|
@%p185 bra $L__BB0_162;
|
|
|
|
mul.f32 %f1191, %f1237, %f1237;
|
|
fma.rn.f32 %f1192, %f1236, %f1236, %f1191;
|
|
fma.rn.f32 %f1193, %f1238, %f1238, %f1192;
|
|
sqrt.rn.f32 %f1194, %f1193;
|
|
rcp.rn.f32 %f1195, %f1194;
|
|
mul.f32 %f1196, %f1236, %f1195;
|
|
mul.f32 %f1197, %f1237, %f1195;
|
|
mul.f32 %f1198, %f1238, %f1195;
|
|
ld.const.u64 %rd77, [params+208];
|
|
cvta.to.global.u64 %rd78, %rd77;
|
|
ld.const.u32 %r453, [params+200];
|
|
mad.lo.s32 %r454, %r453, %r7, %r6;
|
|
fma.rn.f32 %f1199, %f1196, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f1200, %f1199, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r455, %f1200;
|
|
fma.rn.f32 %f1201, %f1197, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f1202, %f1201, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r456, %f1202;
|
|
fma.rn.f32 %f1203, %f1198, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f1204, %f1203, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r457, %f1204;
|
|
mul.wide.u32 %rd79, %r454, 4;
|
|
add.s64 %rd80, %rd78, %rd79;
|
|
cvt.u16.u32 %rs37, %r457;
|
|
cvt.u16.u32 %rs38, %r456;
|
|
cvt.u16.u32 %rs39, %r455;
|
|
mov.u16 %rs40, 255;
|
|
st.global.v4.u8 [%rd80], {%rs39, %rs38, %rs37, %rs40};
|
|
|
|
$L__BB0_162:
|
|
ret;
|
|
|
|
}
|
|
|