1893 lines
57 KiB
Plaintext
1893 lines
57 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-23083092
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// Cuda compilation tools, release 9.1, V9.1.85
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// Based on LLVM 3.4svn
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//
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.version 6.1
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.target sm_30
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.address_size 64
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// .globl _Z6oxMainv
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.global .align 8 .b8 pixelID[8];
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.global .align 8 .b8 resolution[8];
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.global .align 4 .b8 normal[12];
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.global .align 4 .b8 camPos[12];
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.global .align 4 .b8 root[4];
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.global .align 4 .u32 imageEnabled;
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.global .texref lightmap;
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.global .align 16 .b8 tileInfo[16];
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.global .align 4 .u32 additive;
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.global .align 1 .b8 image[1];
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.global .align 1 .b8 image_HDR[1];
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.global .align 1 .b8 image_HDR2[1];
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.global .align 1 .b8 image_Mask[1];
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.global .align 1 .b8 image_Dir[1];
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.global .align 1 .b8 uvpos[1];
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.global .align 1 .b8 uvnormal[1];
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.global .align 4 .u32 ignoreNormal;
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.global .align 1 .b8 localLights[1];
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
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.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
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.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
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.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
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.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
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.visible .entry _Z6oxMainv(
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)
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{
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.local .align 4 .b8 __local_depot0[4];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<134>;
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.reg .b16 %rs<63>;
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.reg .f32 %f<1233>;
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.reg .b32 %r<201>;
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.reg .b64 %rd<126>;
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mov.u64 %rd125, __local_depot0;
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cvta.local.u64 %SP, %rd125;
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ld.global.v2.u32 {%r30, %r31}, [pixelID];
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cvt.u64.u32 %rd10, %r30;
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cvt.u64.u32 %rd11, %r31;
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mov.u64 %rd14, uvnormal;
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cvta.global.u64 %rd9, %rd14;
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mov.u32 %r28, 2;
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mov.u32 %r29, 4;
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mov.u64 %rd13, 0;
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// inline asm
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call (%rd8), _rt_buffer_get_64, (%rd9, %r28, %r29, %rd10, %rd11, %rd13, %rd13);
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// inline asm
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ld.u32 %r1, [%rd8];
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shr.u32 %r34, %r1, 16;
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cvt.u16.u32 %rs1, %r34;
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and.b16 %rs5, %rs1, 255;
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cvt.u16.u32 %rs6, %r1;
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or.b16 %rs7, %rs6, %rs5;
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setp.eq.s16 %p8, %rs7, 0;
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mov.f32 %f1170, 0f00000000;
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mov.f32 %f1171, %f1170;
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mov.f32 %f1172, %f1170;
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@%p8 bra BB0_2;
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ld.u8 %rs8, [%rd8+1];
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and.b16 %rs10, %rs6, 255;
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cvt.rn.f32.u16 %f216, %rs10;
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div.rn.f32 %f217, %f216, 0f437F0000;
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fma.rn.f32 %f218, %f217, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f219, %rs8;
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div.rn.f32 %f220, %f219, 0f437F0000;
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fma.rn.f32 %f221, %f220, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f222, %rs5;
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div.rn.f32 %f223, %f222, 0f437F0000;
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fma.rn.f32 %f224, %f223, 0f40000000, 0fBF800000;
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mul.f32 %f225, %f221, %f221;
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fma.rn.f32 %f226, %f218, %f218, %f225;
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fma.rn.f32 %f227, %f224, %f224, %f226;
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sqrt.rn.f32 %f228, %f227;
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rcp.rn.f32 %f229, %f228;
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mul.f32 %f1170, %f218, %f229;
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mul.f32 %f1171, %f221, %f229;
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mul.f32 %f1172, %f224, %f229;
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BB0_2:
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ld.global.v2.u32 {%r35, %r36}, [pixelID];
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ld.global.v2.u32 {%r38, %r39}, [tileInfo];
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add.s32 %r2, %r35, %r38;
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add.s32 %r3, %r36, %r39;
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setp.eq.f32 %p9, %f1171, 0f00000000;
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setp.eq.f32 %p10, %f1170, 0f00000000;
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and.pred %p11, %p10, %p9;
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setp.eq.f32 %p12, %f1172, 0f00000000;
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and.pred %p13, %p11, %p12;
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@%p13 bra BB0_103;
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bra.uni BB0_3;
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BB0_103:
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ld.global.u32 %r200, [imageEnabled];
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and.b32 %r175, %r200, 1;
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setp.eq.b32 %p128, %r175, 1;
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@!%p128 bra BB0_105;
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bra.uni BB0_104;
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BB0_104:
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cvt.u64.u32 %rd86, %r2;
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cvt.u64.u32 %rd87, %r3;
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mov.u64 %rd90, image;
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cvta.global.u64 %rd85, %rd90;
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// inline asm
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call (%rd84), _rt_buffer_get_64, (%rd85, %r28, %r29, %rd86, %rd87, %rd13, %rd13);
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// inline asm
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mov.u16 %rs43, 0;
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st.v4.u8 [%rd84], {%rs43, %rs43, %rs43, %rs43};
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ld.global.u32 %r200, [imageEnabled];
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BB0_105:
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and.b32 %r178, %r200, 8;
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setp.eq.s32 %p129, %r178, 0;
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@%p129 bra BB0_107;
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cvt.u64.u32 %rd93, %r2;
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cvt.u64.u32 %rd94, %r3;
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mov.u64 %rd97, image_Mask;
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cvta.global.u64 %rd92, %rd97;
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// inline asm
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call (%rd91), _rt_buffer_get_64, (%rd92, %r28, %r28, %rd93, %rd94, %rd13, %rd13);
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// inline asm
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mov.f32 %f1159, 0f00000000;
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cvt.rzi.u32.f32 %r181, %f1159;
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cvt.u16.u32 %rs44, %r181;
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mov.u16 %rs45, 0;
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st.v2.u8 [%rd91], {%rs44, %rs45};
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ld.global.u32 %r200, [imageEnabled];
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BB0_107:
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and.b32 %r182, %r200, 4;
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setp.eq.s32 %p130, %r182, 0;
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@%p130 bra BB0_111;
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ld.global.u32 %r183, [additive];
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setp.eq.s32 %p131, %r183, 0;
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cvt.u64.u32 %rd6, %r2;
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cvt.u64.u32 %rd7, %r3;
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@%p131 bra BB0_110;
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mov.u64 %rd110, image_HDR;
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cvta.global.u64 %rd99, %rd110;
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mov.u32 %r187, 8;
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// inline asm
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call (%rd98), _rt_buffer_get_64, (%rd99, %r28, %r187, %rd6, %rd7, %rd13, %rd13);
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// inline asm
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ld.v4.u16 {%rs52, %rs53, %rs54, %rs55}, [%rd98];
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// inline asm
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{ cvt.f32.f16 %f1160, %rs52;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f1161, %rs53;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f1162, %rs54;}
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// inline asm
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// inline asm
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call (%rd104), _rt_buffer_get_64, (%rd99, %r28, %r187, %rd6, %rd7, %rd13, %rd13);
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// inline asm
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add.f32 %f1163, %f1160, 0f00000000;
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add.f32 %f1164, %f1161, 0f00000000;
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add.f32 %f1165, %f1162, 0f00000000;
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// inline asm
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{ cvt.rn.f16.f32 %rs51, %f1165;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs50, %f1164;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs49, %f1163;}
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// inline asm
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mov.u16 %rs56, 0;
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st.v4.u16 [%rd104], {%rs49, %rs50, %rs51, %rs56};
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bra.uni BB0_111;
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BB0_3:
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ld.global.v2.u32 {%r47, %r48}, [pixelID];
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cvt.u64.u32 %rd17, %r47;
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cvt.u64.u32 %rd18, %r48;
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mov.u64 %rd26, uvpos;
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cvta.global.u64 %rd16, %rd26;
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mov.u32 %r44, 12;
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// inline asm
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call (%rd15), _rt_buffer_get_64, (%rd16, %r28, %r44, %rd17, %rd18, %rd13, %rd13);
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// inline asm
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ld.f32 %f9, [%rd15+8];
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ld.f32 %f8, [%rd15+4];
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ld.f32 %f7, [%rd15];
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mul.f32 %f237, %f7, 0f3456BF95;
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mul.f32 %f238, %f8, 0f3456BF95;
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mul.f32 %f239, %f9, 0f3456BF95;
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abs.f32 %f240, %f1170;
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div.rn.f32 %f241, %f237, %f240;
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abs.f32 %f242, %f1171;
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div.rn.f32 %f243, %f238, %f242;
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abs.f32 %f244, %f1172;
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div.rn.f32 %f245, %f239, %f244;
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abs.f32 %f246, %f241;
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abs.f32 %f247, %f243;
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abs.f32 %f248, %f245;
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mov.f32 %f249, 0f38D1B717;
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max.f32 %f250, %f246, %f249;
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max.f32 %f251, %f247, %f249;
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max.f32 %f252, %f248, %f249;
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fma.rn.f32 %f10, %f1170, %f250, %f7;
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fma.rn.f32 %f11, %f1171, %f251, %f8;
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fma.rn.f32 %f12, %f1172, %f252, %f9;
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mov.u64 %rd27, localLights;
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cvta.global.u64 %rd25, %rd27;
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mov.u32 %r45, 1;
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mov.u32 %r46, 96;
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// inline asm
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call (%rd21, %rd22, %rd23, %rd24), _rt_buffer_get_size_64, (%rd25, %r45, %r46);
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// inline asm
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cvt.u32.u64 %r4, %rd21;
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setp.eq.s32 %p14, %r4, 0;
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mov.f32 %f1173, 0f00000000;
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mov.f32 %f18, %f1173;
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mov.f32 %f19, %f1173;
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mov.f32 %f20, %f1173;
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mov.f32 %f1177, %f1173;
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mov.f32 %f1178, %f1173;
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mov.f32 %f1179, %f1173;
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@%p14 bra BB0_49;
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mov.f32 %f260, 0f40000000;
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cvt.rzi.f32.f32 %f261, %f260;
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add.f32 %f262, %f261, %f261;
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mov.f32 %f263, 0f40800000;
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sub.f32 %f264, %f263, %f262;
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abs.f32 %f13, %f264;
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mul.f32 %f14, %f10, 0f3456BF95;
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mul.f32 %f15, %f11, 0f3456BF95;
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mul.f32 %f16, %f12, 0f3456BF95;
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mov.f32 %f259, 0f00000000;
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mov.u32 %r192, 0;
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abs.f32 %f444, %f14;
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abs.f32 %f445, %f15;
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max.f32 %f446, %f444, %f445;
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abs.f32 %f447, %f16;
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max.f32 %f448, %f446, %f447;
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mov.f32 %f1173, %f259;
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mov.f32 %f18, %f259;
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mov.f32 %f19, %f259;
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mov.f32 %f20, %f259;
|
|
mov.f32 %f1177, %f259;
|
|
mov.f32 %f1178, %f259;
|
|
mov.f32 %f1179, %f259;
|
|
|
|
BB0_5:
|
|
cvt.u64.u32 %rd30, %r192;
|
|
// inline asm
|
|
call (%rd28), _rt_buffer_get_64, (%rd25, %r45, %r46, %rd30, %rd13, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.f32 {%f267, %f268, %f269, %f270}, [%rd28+80];
|
|
ld.v4.f32 {%f271, %f272, %f273, %f274}, [%rd28+64];
|
|
ld.v4.f32 {%f275, %f276, %f277, %f278}, [%rd28+48];
|
|
ld.v4.f32 {%f279, %f1188, %f1189, %f282}, [%rd28+32];
|
|
ld.v4.f32 {%f283, %f284, %f285, %f286}, [%rd28+16];
|
|
ld.v4.f32 {%f287, %f288, %f289, %f290}, [%rd28];
|
|
mov.b32 %r6, %f270;
|
|
sub.f32 %f48, %f288, %f7;
|
|
sub.f32 %f50, %f289, %f8;
|
|
sub.f32 %f52, %f290, %f9;
|
|
mul.f32 %f292, %f50, %f50;
|
|
fma.rn.f32 %f293, %f48, %f48, %f292;
|
|
fma.rn.f32 %f294, %f52, %f52, %f293;
|
|
sqrt.rn.f32 %f53, %f294;
|
|
rcp.rn.f32 %f295, %f53;
|
|
mul.f32 %f54, %f48, %f295;
|
|
mul.f32 %f55, %f50, %f295;
|
|
mul.f32 %f56, %f52, %f295;
|
|
mul.f32 %f57, %f53, %f286;
|
|
abs.f32 %f58, %f57;
|
|
setp.lt.f32 %p15, %f58, 0f00800000;
|
|
mul.f32 %f296, %f58, 0f4B800000;
|
|
selp.f32 %f297, 0fC3170000, 0fC2FE0000, %p15;
|
|
selp.f32 %f298, %f296, %f58, %p15;
|
|
mov.b32 %r54, %f298;
|
|
and.b32 %r55, %r54, 8388607;
|
|
or.b32 %r56, %r55, 1065353216;
|
|
mov.b32 %f299, %r56;
|
|
shr.u32 %r57, %r54, 23;
|
|
cvt.rn.f32.u32 %f300, %r57;
|
|
add.f32 %f301, %f297, %f300;
|
|
setp.gt.f32 %p16, %f299, 0f3FB504F3;
|
|
mul.f32 %f302, %f299, 0f3F000000;
|
|
add.f32 %f303, %f301, 0f3F800000;
|
|
selp.f32 %f304, %f302, %f299, %p16;
|
|
selp.f32 %f305, %f303, %f301, %p16;
|
|
add.f32 %f306, %f304, 0fBF800000;
|
|
add.f32 %f266, %f304, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f265,%f266;
|
|
// inline asm
|
|
add.f32 %f307, %f306, %f306;
|
|
mul.f32 %f308, %f265, %f307;
|
|
mul.f32 %f309, %f308, %f308;
|
|
mov.f32 %f310, 0f3C4CAF63;
|
|
mov.f32 %f311, 0f3B18F0FE;
|
|
fma.rn.f32 %f312, %f311, %f309, %f310;
|
|
mov.f32 %f313, 0f3DAAAABD;
|
|
fma.rn.f32 %f314, %f312, %f309, %f313;
|
|
mul.rn.f32 %f315, %f314, %f309;
|
|
mul.rn.f32 %f316, %f315, %f308;
|
|
sub.f32 %f317, %f306, %f308;
|
|
neg.f32 %f318, %f308;
|
|
add.f32 %f319, %f317, %f317;
|
|
fma.rn.f32 %f320, %f318, %f306, %f319;
|
|
mul.rn.f32 %f321, %f265, %f320;
|
|
add.f32 %f322, %f316, %f308;
|
|
sub.f32 %f323, %f308, %f322;
|
|
add.f32 %f324, %f316, %f323;
|
|
add.f32 %f325, %f321, %f324;
|
|
add.f32 %f326, %f322, %f325;
|
|
sub.f32 %f327, %f322, %f326;
|
|
add.f32 %f328, %f325, %f327;
|
|
mov.f32 %f329, 0f3F317200;
|
|
mul.rn.f32 %f330, %f305, %f329;
|
|
mov.f32 %f331, 0f35BFBE8E;
|
|
mul.rn.f32 %f332, %f305, %f331;
|
|
add.f32 %f333, %f330, %f326;
|
|
sub.f32 %f334, %f330, %f333;
|
|
add.f32 %f335, %f326, %f334;
|
|
add.f32 %f336, %f328, %f335;
|
|
add.f32 %f337, %f332, %f336;
|
|
add.f32 %f338, %f333, %f337;
|
|
sub.f32 %f339, %f333, %f338;
|
|
add.f32 %f340, %f337, %f339;
|
|
mul.rn.f32 %f59, %f263, %f338;
|
|
neg.f32 %f342, %f59;
|
|
fma.rn.f32 %f343, %f263, %f338, %f342;
|
|
fma.rn.f32 %f344, %f263, %f340, %f343;
|
|
fma.rn.f32 %f60, %f259, %f338, %f344;
|
|
add.rn.f32 %f61, %f59, %f60;
|
|
mov.b32 %r58, %f61;
|
|
setp.eq.s32 %p1, %r58, 1118925336;
|
|
add.s32 %r59, %r58, -1;
|
|
mov.b32 %f346, %r59;
|
|
selp.f32 %f347, %f346, %f61, %p1;
|
|
mul.f32 %f348, %f347, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f349, %f348;
|
|
mov.f32 %f350, 0fBF317200;
|
|
fma.rn.f32 %f351, %f349, %f350, %f347;
|
|
mov.f32 %f352, 0fB5BFBE8E;
|
|
fma.rn.f32 %f353, %f349, %f352, %f351;
|
|
mul.f32 %f354, %f353, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f355, %f354;
|
|
add.f32 %f356, %f349, 0f00000000;
|
|
ex2.approx.f32 %f357, %f356;
|
|
mul.f32 %f358, %f355, %f357;
|
|
setp.lt.f32 %p17, %f347, 0fC2D20000;
|
|
selp.f32 %f359, 0f00000000, %f358, %p17;
|
|
setp.gt.f32 %p18, %f347, 0f42D20000;
|
|
selp.f32 %f1180, 0f7F800000, %f359, %p18;
|
|
setp.eq.f32 %p19, %f1180, 0f7F800000;
|
|
@%p19 bra BB0_7;
|
|
|
|
neg.f32 %f360, %f61;
|
|
add.rn.f32 %f361, %f59, %f360;
|
|
add.rn.f32 %f362, %f361, %f60;
|
|
add.f32 %f363, %f362, 0f37000000;
|
|
selp.f32 %f364, %f363, %f362, %p1;
|
|
fma.rn.f32 %f1180, %f1180, %f364, %f1180;
|
|
|
|
BB0_7:
|
|
setp.lt.f32 %p20, %f57, 0f00000000;
|
|
setp.eq.f32 %p21, %f13, 0f3F800000;
|
|
and.pred %p2, %p20, %p21;
|
|
mov.b32 %r60, %f1180;
|
|
xor.b32 %r61, %r60, -2147483648;
|
|
mov.b32 %f365, %r61;
|
|
selp.f32 %f1182, %f365, %f1180, %p2;
|
|
setp.eq.f32 %p22, %f57, 0f00000000;
|
|
@%p22 bra BB0_10;
|
|
bra.uni BB0_8;
|
|
|
|
BB0_10:
|
|
add.f32 %f368, %f57, %f57;
|
|
selp.f32 %f1182, %f368, 0f00000000, %p21;
|
|
bra.uni BB0_11;
|
|
|
|
BB0_8:
|
|
setp.geu.f32 %p23, %f57, 0f00000000;
|
|
@%p23 bra BB0_11;
|
|
|
|
cvt.rzi.f32.f32 %f367, %f263;
|
|
setp.neu.f32 %p24, %f367, 0f40800000;
|
|
selp.f32 %f1182, 0f7FFFFFFF, %f1182, %p24;
|
|
|
|
BB0_11:
|
|
add.f32 %f369, %f58, 0f40800000;
|
|
mov.b32 %r62, %f369;
|
|
setp.lt.s32 %p26, %r62, 2139095040;
|
|
@%p26 bra BB0_16;
|
|
|
|
setp.gtu.f32 %p27, %f58, 0f7F800000;
|
|
@%p27 bra BB0_15;
|
|
bra.uni BB0_13;
|
|
|
|
BB0_15:
|
|
add.f32 %f1182, %f57, 0f40800000;
|
|
bra.uni BB0_16;
|
|
|
|
BB0_13:
|
|
setp.neu.f32 %p28, %f58, 0f7F800000;
|
|
@%p28 bra BB0_16;
|
|
|
|
selp.f32 %f1182, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
BB0_16:
|
|
mul.f32 %f370, %f53, %f284;
|
|
mov.f32 %f1202, 0f3F800000;
|
|
sub.f32 %f372, %f1202, %f1182;
|
|
setp.eq.f32 %p29, %f57, 0f3F800000;
|
|
selp.f32 %f373, 0f00000000, %f372, %p29;
|
|
cvt.sat.f32.f32 %f374, %f373;
|
|
fma.rn.f32 %f375, %f370, %f370, %f285;
|
|
div.rn.f32 %f87, %f374, %f375;
|
|
mul.f32 %f376, %f1171, %f55;
|
|
fma.rn.f32 %f377, %f1170, %f54, %f376;
|
|
fma.rn.f32 %f378, %f1172, %f56, %f377;
|
|
ld.global.u32 %r63, [ignoreNormal];
|
|
setp.eq.s32 %p30, %r63, 0;
|
|
selp.f32 %f379, %f378, 0f3F800000, %p30;
|
|
cvt.sat.f32.f32 %f88, %f379;
|
|
setp.eq.f32 %p31, %f287, 0f3F800000;
|
|
@%p31 bra BB0_23;
|
|
bra.uni BB0_17;
|
|
|
|
BB0_23:
|
|
setp.leu.f32 %p35, %f282, 0f00000000;
|
|
@%p35 bra BB0_19;
|
|
|
|
setp.geu.f32 %p36, %f278, 0f00000000;
|
|
@%p36 bra BB0_25;
|
|
|
|
sub.f32 %f1169, %f290, %f9;
|
|
sub.f32 %f1168, %f288, %f7;
|
|
sub.f32 %f1167, %f289, %f8;
|
|
mul.f32 %f402, %f268, %f1167;
|
|
fma.rn.f32 %f403, %f267, %f1168, %f402;
|
|
fma.rn.f32 %f404, %f269, %f1169, %f403;
|
|
rcp.rn.f32 %f405, %f404;
|
|
mul.f32 %f1183, %f1168, %f405;
|
|
mul.f32 %f1184, %f1167, %f405;
|
|
mul.f32 %f1185, %f1169, %f405;
|
|
neg.f32 %f278, %f278;
|
|
bra.uni BB0_27;
|
|
|
|
BB0_17:
|
|
setp.eq.f32 %p32, %f287, 0f40000000;
|
|
@%p32 bra BB0_21;
|
|
bra.uni BB0_18;
|
|
|
|
BB0_21:
|
|
setp.leu.f32 %p34, %f282, 0f00000000;
|
|
@%p34 bra BB0_19;
|
|
|
|
mul.f32 %f396, %f276, %f55;
|
|
fma.rn.f32 %f397, %f275, %f54, %f396;
|
|
mul.f32 %f398, %f272, %f55;
|
|
fma.rn.f32 %f399, %f271, %f54, %f398;
|
|
mul.f32 %f400, %f268, %f55;
|
|
fma.rn.f32 %f401, %f267, %f54, %f400;
|
|
fma.rn.f32 %f393, %f277, %f56, %f397;
|
|
fma.rn.f32 %f394, %f273, %f56, %f399;
|
|
fma.rn.f32 %f395, %f269, %f56, %f401;
|
|
cvt.rzi.s32.f32 %r64, %f282;
|
|
mov.u32 %r65, 6;
|
|
mov.u32 %r66, 0;
|
|
// inline asm
|
|
call (%f389, %f390, %f391, %f392), _rt_texture_get_base_id, (%r64, %r65, %f393, %f394, %f395, %r66);
|
|
// inline asm
|
|
mul.f32 %f1187, %f279, %f389;
|
|
mul.f32 %f1188, %f1188, %f390;
|
|
mul.f32 %f1189, %f1189, %f391;
|
|
bra.uni BB0_28;
|
|
|
|
BB0_18:
|
|
setp.neu.f32 %p33, %f287, 0f40800000;
|
|
@%p33 bra BB0_19;
|
|
|
|
mul.f32 %f380, %f267, %f54;
|
|
mul.f32 %f381, %f268, %f55;
|
|
neg.f32 %f382, %f381;
|
|
sub.f32 %f383, %f382, %f380;
|
|
mul.f32 %f384, %f269, %f56;
|
|
sub.f32 %f385, %f383, %f384;
|
|
fma.rn.f32 %f386, %f282, %f385, %f278;
|
|
cvt.sat.f32.f32 %f387, %f386;
|
|
mul.f32 %f388, %f387, %f387;
|
|
mul.f32 %f1190, %f87, %f388;
|
|
mov.f32 %f1187, %f279;
|
|
bra.uni BB0_29;
|
|
|
|
BB0_19:
|
|
mov.f32 %f1187, %f279;
|
|
bra.uni BB0_28;
|
|
|
|
BB0_25:
|
|
mov.f32 %f1183, %f54;
|
|
mov.f32 %f1184, %f55;
|
|
mov.f32 %f1185, %f56;
|
|
|
|
BB0_27:
|
|
mul.f32 %f414, %f269, %f56;
|
|
mul.f32 %f415, %f268, %f55;
|
|
neg.f32 %f416, %f415;
|
|
mul.f32 %f417, %f267, %f54;
|
|
sub.f32 %f418, %f416, %f417;
|
|
sub.f32 %f419, %f418, %f414;
|
|
setp.gt.f32 %p37, %f419, 0f00000000;
|
|
selp.f32 %f420, 0f3F800000, 0f00000000, %p37;
|
|
mul.f32 %f421, %f276, %f1184;
|
|
fma.rn.f32 %f422, %f275, %f1183, %f421;
|
|
mul.f32 %f423, %f272, %f1184;
|
|
fma.rn.f32 %f424, %f271, %f1183, %f423;
|
|
fma.rn.f32 %f425, %f277, %f1185, %f422;
|
|
fma.rn.f32 %f426, %f273, %f1185, %f424;
|
|
fma.rn.f32 %f427, %f278, %f425, 0f3F000000;
|
|
mov.f32 %f428, 0f3F800000;
|
|
sub.f32 %f410, %f428, %f427;
|
|
fma.rn.f32 %f411, %f278, %f426, 0f3F000000;
|
|
cvt.rzi.s32.f32 %r67, %f282;
|
|
mov.f32 %f413, 0f00000000;
|
|
// inline asm
|
|
call (%f406, %f407, %f408, %f409), _rt_texture_get_f_id, (%r67, %r28, %f410, %f411, %f413, %f413);
|
|
// inline asm
|
|
mul.f32 %f429, %f420, %f406;
|
|
mul.f32 %f430, %f420, %f407;
|
|
mul.f32 %f431, %f420, %f408;
|
|
mul.f32 %f1187, %f279, %f429;
|
|
mul.f32 %f1188, %f1188, %f430;
|
|
mul.f32 %f1189, %f1189, %f431;
|
|
|
|
BB0_28:
|
|
mov.f32 %f1190, %f87;
|
|
|
|
BB0_29:
|
|
max.f32 %f438, %f1187, %f1188;
|
|
max.f32 %f439, %f438, %f1189;
|
|
mul.f32 %f108, %f88, %f1190;
|
|
mul.f32 %f440, %f108, %f439;
|
|
setp.lt.f32 %p39, %f440, 0f3727C5AC;
|
|
mov.pred %p133, -1;
|
|
mov.f32 %f115, 0f00000000;
|
|
mov.f32 %f116, %f115;
|
|
mov.f32 %f117, %f115;
|
|
mov.f32 %f118, %f115;
|
|
mov.f32 %f119, %f115;
|
|
mov.f32 %f120, %f115;
|
|
@%p39 bra BB0_31;
|
|
|
|
mul.f32 %f115, %f1187, %f108;
|
|
mul.f32 %f116, %f1188, %f108;
|
|
mul.f32 %f117, %f1189, %f108;
|
|
ld.global.u8 %rs12, [imageEnabled];
|
|
and.b16 %rs13, %rs12, 64;
|
|
setp.eq.s16 %p41, %rs13, 0;
|
|
selp.f32 %f118, 0f00000000, %f54, %p41;
|
|
selp.f32 %f119, 0f00000000, %f55, %p41;
|
|
selp.f32 %f120, 0f00000000, %f56, %p41;
|
|
mov.pred %p133, 0;
|
|
|
|
BB0_31:
|
|
@%p133 bra BB0_48;
|
|
|
|
setp.eq.s32 %p42, %r6, 0;
|
|
mov.u16 %rs62, 0;
|
|
@%p42 bra BB0_43;
|
|
|
|
abs.s32 %r8, %r6;
|
|
mov.f32 %f1201, 0f00000000;
|
|
setp.lt.s32 %p43, %r8, 1;
|
|
@%p43 bra BB0_42;
|
|
|
|
max.f32 %f122, %f448, %f249;
|
|
and.b32 %r9, %r8, 3;
|
|
setp.eq.s32 %p44, %r9, 0;
|
|
add.u64 %rd35, %SP, 0;
|
|
cvta.to.local.u64 %rd2, %rd35;
|
|
mov.f32 %f1201, 0f00000000;
|
|
mov.u32 %r196, 0;
|
|
@%p44 bra BB0_40;
|
|
|
|
setp.eq.s32 %p45, %r9, 1;
|
|
mov.f32 %f1198, 0f00000000;
|
|
mov.u32 %r194, 0;
|
|
@%p45 bra BB0_39;
|
|
|
|
setp.eq.s32 %p46, %r9, 2;
|
|
mov.f32 %f1197, 0f00000000;
|
|
mov.u32 %r193, 0;
|
|
@%p46 bra BB0_38;
|
|
|
|
sub.f32 %f460, %f288, %f283;
|
|
sub.f32 %f461, %f289, %f283;
|
|
sub.f32 %f462, %f290, %f283;
|
|
sub.f32 %f463, %f460, %f7;
|
|
sub.f32 %f464, %f461, %f8;
|
|
sub.f32 %f465, %f462, %f9;
|
|
mul.f32 %f466, %f464, %f464;
|
|
fma.rn.f32 %f467, %f463, %f463, %f466;
|
|
fma.rn.f32 %f468, %f465, %f465, %f467;
|
|
sqrt.rn.f32 %f459, %f468;
|
|
rcp.rn.f32 %f469, %f459;
|
|
mul.f32 %f455, %f469, %f463;
|
|
mul.f32 %f456, %f469, %f464;
|
|
mul.f32 %f457, %f469, %f465;
|
|
ld.global.u32 %r76, [imageEnabled];
|
|
and.b32 %r77, %r76, 32;
|
|
setp.eq.s32 %p47, %r77, 0;
|
|
selp.f32 %f470, 0f3F800000, 0f41200000, %p47;
|
|
mul.f32 %f458, %f470, %f122;
|
|
mov.u32 %r78, 1065353216;
|
|
st.local.u32 [%rd2], %r78;
|
|
ld.global.u32 %r72, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r72, %f10, %f11, %f12, %f455, %f456, %f457, %r45, %f458, %f459, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f471, [%rd2];
|
|
add.f32 %f1197, %f471, 0f00000000;
|
|
mov.u32 %r193, %r45;
|
|
|
|
BB0_38:
|
|
cvt.rn.f32.s32 %f480, %r193;
|
|
mul.f32 %f481, %f480, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f482, %f481;
|
|
sub.f32 %f483, %f481, %f482;
|
|
mul.f32 %f484, %f480, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f485, %f484;
|
|
sub.f32 %f486, %f484, %f485;
|
|
mul.f32 %f487, %f480, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f488, %f487;
|
|
sub.f32 %f489, %f487, %f488;
|
|
add.f32 %f490, %f486, 0f4199851F;
|
|
add.f32 %f491, %f489, 0f4199851F;
|
|
add.f32 %f492, %f483, 0f4199851F;
|
|
mul.f32 %f493, %f486, %f491;
|
|
fma.rn.f32 %f494, %f483, %f490, %f493;
|
|
fma.rn.f32 %f495, %f492, %f489, %f494;
|
|
add.f32 %f496, %f483, %f495;
|
|
add.f32 %f497, %f486, %f495;
|
|
add.f32 %f498, %f489, %f495;
|
|
add.f32 %f499, %f496, %f497;
|
|
mul.f32 %f500, %f498, %f499;
|
|
cvt.rmi.f32.f32 %f501, %f500;
|
|
sub.f32 %f502, %f500, %f501;
|
|
add.f32 %f503, %f496, %f498;
|
|
mul.f32 %f504, %f497, %f503;
|
|
cvt.rmi.f32.f32 %f505, %f504;
|
|
sub.f32 %f506, %f504, %f505;
|
|
add.f32 %f507, %f497, %f498;
|
|
mul.f32 %f508, %f496, %f507;
|
|
cvt.rmi.f32.f32 %f509, %f508;
|
|
sub.f32 %f510, %f508, %f509;
|
|
fma.rn.f32 %f511, %f502, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f512, %f506, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f513, %f510, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f514, %f283, %f511, %f288;
|
|
fma.rn.f32 %f515, %f283, %f512, %f289;
|
|
fma.rn.f32 %f516, %f283, %f513, %f290;
|
|
sub.f32 %f517, %f514, %f7;
|
|
sub.f32 %f518, %f515, %f8;
|
|
sub.f32 %f519, %f516, %f9;
|
|
mul.f32 %f520, %f518, %f518;
|
|
fma.rn.f32 %f521, %f517, %f517, %f520;
|
|
fma.rn.f32 %f522, %f519, %f519, %f521;
|
|
sqrt.rn.f32 %f479, %f522;
|
|
rcp.rn.f32 %f523, %f479;
|
|
mul.f32 %f475, %f523, %f517;
|
|
mul.f32 %f476, %f523, %f518;
|
|
mul.f32 %f477, %f523, %f519;
|
|
ld.global.u32 %r82, [imageEnabled];
|
|
and.b32 %r83, %r82, 32;
|
|
setp.eq.s32 %p48, %r83, 0;
|
|
selp.f32 %f524, 0f3F800000, 0f41200000, %p48;
|
|
mul.f32 %f478, %f524, %f122;
|
|
mov.u32 %r84, 1065353216;
|
|
st.local.u32 [%rd2], %r84;
|
|
ld.global.u32 %r79, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r79, %f10, %f11, %f12, %f475, %f476, %f477, %r45, %f478, %f479, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f525, [%rd2];
|
|
add.f32 %f1198, %f1197, %f525;
|
|
add.s32 %r194, %r193, 1;
|
|
|
|
BB0_39:
|
|
cvt.rn.f32.s32 %f534, %r194;
|
|
mul.f32 %f535, %f534, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f536, %f535;
|
|
sub.f32 %f537, %f535, %f536;
|
|
mul.f32 %f538, %f534, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f539, %f538;
|
|
sub.f32 %f540, %f538, %f539;
|
|
mul.f32 %f541, %f534, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f542, %f541;
|
|
sub.f32 %f543, %f541, %f542;
|
|
add.f32 %f544, %f540, 0f4199851F;
|
|
add.f32 %f545, %f543, 0f4199851F;
|
|
add.f32 %f546, %f537, 0f4199851F;
|
|
mul.f32 %f547, %f540, %f545;
|
|
fma.rn.f32 %f548, %f537, %f544, %f547;
|
|
fma.rn.f32 %f549, %f546, %f543, %f548;
|
|
add.f32 %f550, %f537, %f549;
|
|
add.f32 %f551, %f540, %f549;
|
|
add.f32 %f552, %f543, %f549;
|
|
add.f32 %f553, %f550, %f551;
|
|
mul.f32 %f554, %f552, %f553;
|
|
cvt.rmi.f32.f32 %f555, %f554;
|
|
sub.f32 %f556, %f554, %f555;
|
|
add.f32 %f557, %f550, %f552;
|
|
mul.f32 %f558, %f551, %f557;
|
|
cvt.rmi.f32.f32 %f559, %f558;
|
|
sub.f32 %f560, %f558, %f559;
|
|
add.f32 %f561, %f551, %f552;
|
|
mul.f32 %f562, %f550, %f561;
|
|
cvt.rmi.f32.f32 %f563, %f562;
|
|
sub.f32 %f564, %f562, %f563;
|
|
fma.rn.f32 %f565, %f556, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f566, %f560, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f567, %f564, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f568, %f283, %f565, %f288;
|
|
fma.rn.f32 %f569, %f283, %f566, %f289;
|
|
fma.rn.f32 %f570, %f283, %f567, %f290;
|
|
sub.f32 %f571, %f568, %f7;
|
|
sub.f32 %f572, %f569, %f8;
|
|
sub.f32 %f573, %f570, %f9;
|
|
mul.f32 %f574, %f572, %f572;
|
|
fma.rn.f32 %f575, %f571, %f571, %f574;
|
|
fma.rn.f32 %f576, %f573, %f573, %f575;
|
|
sqrt.rn.f32 %f533, %f576;
|
|
rcp.rn.f32 %f577, %f533;
|
|
mul.f32 %f529, %f577, %f571;
|
|
mul.f32 %f530, %f577, %f572;
|
|
mul.f32 %f531, %f577, %f573;
|
|
ld.global.u32 %r88, [imageEnabled];
|
|
and.b32 %r89, %r88, 32;
|
|
setp.eq.s32 %p49, %r89, 0;
|
|
selp.f32 %f578, 0f3F800000, 0f41200000, %p49;
|
|
mul.f32 %f532, %f578, %f122;
|
|
mov.u32 %r90, 1065353216;
|
|
st.local.u32 [%rd2], %r90;
|
|
ld.global.u32 %r85, [root];
|
|
mov.u32 %r86, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r85, %f10, %f11, %f12, %f529, %f530, %f531, %r86, %f532, %f533, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f579, [%rd2];
|
|
add.f32 %f1201, %f1198, %f579;
|
|
add.s32 %r196, %r194, 1;
|
|
|
|
BB0_40:
|
|
setp.lt.u32 %p50, %r8, 4;
|
|
@%p50 bra BB0_42;
|
|
|
|
BB0_41:
|
|
cvt.rn.f32.s32 %f612, %r196;
|
|
mul.f32 %f613, %f612, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f614, %f613;
|
|
sub.f32 %f615, %f613, %f614;
|
|
mul.f32 %f616, %f612, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f617, %f616;
|
|
sub.f32 %f618, %f616, %f617;
|
|
mul.f32 %f619, %f612, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f620, %f619;
|
|
sub.f32 %f621, %f619, %f620;
|
|
add.f32 %f622, %f618, 0f4199851F;
|
|
add.f32 %f623, %f621, 0f4199851F;
|
|
add.f32 %f624, %f615, 0f4199851F;
|
|
mul.f32 %f625, %f618, %f623;
|
|
fma.rn.f32 %f626, %f615, %f622, %f625;
|
|
fma.rn.f32 %f627, %f624, %f621, %f626;
|
|
add.f32 %f628, %f615, %f627;
|
|
add.f32 %f629, %f618, %f627;
|
|
add.f32 %f630, %f621, %f627;
|
|
add.f32 %f631, %f628, %f629;
|
|
mul.f32 %f632, %f630, %f631;
|
|
cvt.rmi.f32.f32 %f633, %f632;
|
|
sub.f32 %f634, %f632, %f633;
|
|
add.f32 %f635, %f628, %f630;
|
|
mul.f32 %f636, %f629, %f635;
|
|
cvt.rmi.f32.f32 %f637, %f636;
|
|
sub.f32 %f638, %f636, %f637;
|
|
add.f32 %f639, %f629, %f630;
|
|
mul.f32 %f640, %f628, %f639;
|
|
cvt.rmi.f32.f32 %f641, %f640;
|
|
sub.f32 %f642, %f640, %f641;
|
|
fma.rn.f32 %f643, %f634, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f644, %f638, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f645, %f642, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f646, %f283, %f643, %f288;
|
|
fma.rn.f32 %f647, %f283, %f644, %f289;
|
|
fma.rn.f32 %f648, %f283, %f645, %f290;
|
|
sub.f32 %f649, %f646, %f7;
|
|
sub.f32 %f650, %f647, %f8;
|
|
sub.f32 %f651, %f648, %f9;
|
|
mul.f32 %f652, %f650, %f650;
|
|
fma.rn.f32 %f653, %f649, %f649, %f652;
|
|
fma.rn.f32 %f654, %f651, %f651, %f653;
|
|
sqrt.rn.f32 %f587, %f654;
|
|
rcp.rn.f32 %f655, %f587;
|
|
mul.f32 %f583, %f655, %f649;
|
|
mul.f32 %f584, %f655, %f650;
|
|
mul.f32 %f585, %f655, %f651;
|
|
ld.global.u32 %r103, [imageEnabled];
|
|
and.b32 %r104, %r103, 32;
|
|
setp.eq.s32 %p51, %r104, 0;
|
|
selp.f32 %f656, 0f3F800000, 0f41200000, %p51;
|
|
mul.f32 %f586, %f656, %f122;
|
|
mov.u32 %r105, 1065353216;
|
|
st.local.u32 [%rd2], %r105;
|
|
ld.global.u32 %r91, [root];
|
|
mov.u32 %r101, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r91, %f10, %f11, %f12, %f583, %f584, %f585, %r101, %f586, %f587, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f657, [%rd2];
|
|
add.f32 %f658, %f1201, %f657;
|
|
add.s32 %r106, %r196, 1;
|
|
cvt.rn.f32.s32 %f659, %r106;
|
|
mul.f32 %f660, %f659, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f661, %f660;
|
|
sub.f32 %f662, %f660, %f661;
|
|
mul.f32 %f663, %f659, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f664, %f663;
|
|
sub.f32 %f665, %f663, %f664;
|
|
mul.f32 %f666, %f659, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f667, %f666;
|
|
sub.f32 %f668, %f666, %f667;
|
|
add.f32 %f669, %f665, 0f4199851F;
|
|
add.f32 %f670, %f668, 0f4199851F;
|
|
add.f32 %f671, %f662, 0f4199851F;
|
|
mul.f32 %f672, %f665, %f670;
|
|
fma.rn.f32 %f673, %f662, %f669, %f672;
|
|
fma.rn.f32 %f674, %f671, %f668, %f673;
|
|
add.f32 %f675, %f662, %f674;
|
|
add.f32 %f676, %f665, %f674;
|
|
add.f32 %f677, %f668, %f674;
|
|
add.f32 %f678, %f675, %f676;
|
|
mul.f32 %f679, %f677, %f678;
|
|
cvt.rmi.f32.f32 %f680, %f679;
|
|
sub.f32 %f681, %f679, %f680;
|
|
add.f32 %f682, %f675, %f677;
|
|
mul.f32 %f683, %f676, %f682;
|
|
cvt.rmi.f32.f32 %f684, %f683;
|
|
sub.f32 %f685, %f683, %f684;
|
|
add.f32 %f686, %f676, %f677;
|
|
mul.f32 %f687, %f675, %f686;
|
|
cvt.rmi.f32.f32 %f688, %f687;
|
|
sub.f32 %f689, %f687, %f688;
|
|
fma.rn.f32 %f690, %f681, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f691, %f685, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f692, %f689, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f693, %f283, %f690, %f288;
|
|
fma.rn.f32 %f694, %f283, %f691, %f289;
|
|
fma.rn.f32 %f695, %f283, %f692, %f290;
|
|
sub.f32 %f696, %f693, %f7;
|
|
sub.f32 %f697, %f694, %f8;
|
|
sub.f32 %f698, %f695, %f9;
|
|
mul.f32 %f699, %f697, %f697;
|
|
fma.rn.f32 %f700, %f696, %f696, %f699;
|
|
fma.rn.f32 %f701, %f698, %f698, %f700;
|
|
sqrt.rn.f32 %f595, %f701;
|
|
rcp.rn.f32 %f702, %f595;
|
|
mul.f32 %f591, %f702, %f696;
|
|
mul.f32 %f592, %f702, %f697;
|
|
mul.f32 %f593, %f702, %f698;
|
|
ld.global.u32 %r107, [imageEnabled];
|
|
and.b32 %r108, %r107, 32;
|
|
setp.eq.s32 %p52, %r108, 0;
|
|
selp.f32 %f703, 0f3F800000, 0f41200000, %p52;
|
|
mul.f32 %f594, %f703, %f122;
|
|
st.local.u32 [%rd2], %r105;
|
|
ld.global.u32 %r94, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r94, %f10, %f11, %f12, %f591, %f592, %f593, %r101, %f594, %f595, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f704, [%rd2];
|
|
add.f32 %f705, %f658, %f704;
|
|
add.s32 %r109, %r196, 2;
|
|
cvt.rn.f32.s32 %f706, %r109;
|
|
mul.f32 %f707, %f706, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f708, %f707;
|
|
sub.f32 %f709, %f707, %f708;
|
|
mul.f32 %f710, %f706, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f711, %f710;
|
|
sub.f32 %f712, %f710, %f711;
|
|
mul.f32 %f713, %f706, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f714, %f713;
|
|
sub.f32 %f715, %f713, %f714;
|
|
add.f32 %f716, %f712, 0f4199851F;
|
|
add.f32 %f717, %f715, 0f4199851F;
|
|
add.f32 %f718, %f709, 0f4199851F;
|
|
mul.f32 %f719, %f712, %f717;
|
|
fma.rn.f32 %f720, %f709, %f716, %f719;
|
|
fma.rn.f32 %f721, %f718, %f715, %f720;
|
|
add.f32 %f722, %f709, %f721;
|
|
add.f32 %f723, %f712, %f721;
|
|
add.f32 %f724, %f715, %f721;
|
|
add.f32 %f725, %f722, %f723;
|
|
mul.f32 %f726, %f724, %f725;
|
|
cvt.rmi.f32.f32 %f727, %f726;
|
|
sub.f32 %f728, %f726, %f727;
|
|
add.f32 %f729, %f722, %f724;
|
|
mul.f32 %f730, %f723, %f729;
|
|
cvt.rmi.f32.f32 %f731, %f730;
|
|
sub.f32 %f732, %f730, %f731;
|
|
add.f32 %f733, %f723, %f724;
|
|
mul.f32 %f734, %f722, %f733;
|
|
cvt.rmi.f32.f32 %f735, %f734;
|
|
sub.f32 %f736, %f734, %f735;
|
|
fma.rn.f32 %f737, %f728, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f738, %f732, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f739, %f736, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f740, %f283, %f737, %f288;
|
|
fma.rn.f32 %f741, %f283, %f738, %f289;
|
|
fma.rn.f32 %f742, %f283, %f739, %f290;
|
|
sub.f32 %f743, %f740, %f7;
|
|
sub.f32 %f744, %f741, %f8;
|
|
sub.f32 %f745, %f742, %f9;
|
|
mul.f32 %f746, %f744, %f744;
|
|
fma.rn.f32 %f747, %f743, %f743, %f746;
|
|
fma.rn.f32 %f748, %f745, %f745, %f747;
|
|
sqrt.rn.f32 %f603, %f748;
|
|
rcp.rn.f32 %f749, %f603;
|
|
mul.f32 %f599, %f749, %f743;
|
|
mul.f32 %f600, %f749, %f744;
|
|
mul.f32 %f601, %f749, %f745;
|
|
ld.global.u32 %r110, [imageEnabled];
|
|
and.b32 %r111, %r110, 32;
|
|
setp.eq.s32 %p53, %r111, 0;
|
|
selp.f32 %f750, 0f3F800000, 0f41200000, %p53;
|
|
mul.f32 %f602, %f750, %f122;
|
|
st.local.u32 [%rd2], %r105;
|
|
ld.global.u32 %r97, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r97, %f10, %f11, %f12, %f599, %f600, %f601, %r101, %f602, %f603, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f751, [%rd2];
|
|
add.f32 %f752, %f705, %f751;
|
|
add.s32 %r112, %r196, 3;
|
|
cvt.rn.f32.s32 %f753, %r112;
|
|
mul.f32 %f754, %f753, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f755, %f754;
|
|
sub.f32 %f756, %f754, %f755;
|
|
mul.f32 %f757, %f753, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f758, %f757;
|
|
sub.f32 %f759, %f757, %f758;
|
|
mul.f32 %f760, %f753, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f761, %f760;
|
|
sub.f32 %f762, %f760, %f761;
|
|
add.f32 %f763, %f759, 0f4199851F;
|
|
add.f32 %f764, %f762, 0f4199851F;
|
|
add.f32 %f765, %f756, 0f4199851F;
|
|
mul.f32 %f766, %f759, %f764;
|
|
fma.rn.f32 %f767, %f756, %f763, %f766;
|
|
fma.rn.f32 %f768, %f765, %f762, %f767;
|
|
add.f32 %f769, %f756, %f768;
|
|
add.f32 %f770, %f759, %f768;
|
|
add.f32 %f771, %f762, %f768;
|
|
add.f32 %f772, %f769, %f770;
|
|
mul.f32 %f773, %f771, %f772;
|
|
cvt.rmi.f32.f32 %f774, %f773;
|
|
sub.f32 %f775, %f773, %f774;
|
|
add.f32 %f776, %f769, %f771;
|
|
mul.f32 %f777, %f770, %f776;
|
|
cvt.rmi.f32.f32 %f778, %f777;
|
|
sub.f32 %f779, %f777, %f778;
|
|
add.f32 %f780, %f770, %f771;
|
|
mul.f32 %f781, %f769, %f780;
|
|
cvt.rmi.f32.f32 %f782, %f781;
|
|
sub.f32 %f783, %f781, %f782;
|
|
fma.rn.f32 %f784, %f775, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f785, %f779, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f786, %f783, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f787, %f283, %f784, %f288;
|
|
fma.rn.f32 %f788, %f283, %f785, %f289;
|
|
fma.rn.f32 %f789, %f283, %f786, %f290;
|
|
sub.f32 %f790, %f787, %f7;
|
|
sub.f32 %f791, %f788, %f8;
|
|
sub.f32 %f792, %f789, %f9;
|
|
mul.f32 %f793, %f791, %f791;
|
|
fma.rn.f32 %f794, %f790, %f790, %f793;
|
|
fma.rn.f32 %f795, %f792, %f792, %f794;
|
|
sqrt.rn.f32 %f611, %f795;
|
|
rcp.rn.f32 %f796, %f611;
|
|
mul.f32 %f607, %f796, %f790;
|
|
mul.f32 %f608, %f796, %f791;
|
|
mul.f32 %f609, %f796, %f792;
|
|
ld.global.u32 %r113, [imageEnabled];
|
|
and.b32 %r114, %r113, 32;
|
|
setp.eq.s32 %p54, %r114, 0;
|
|
selp.f32 %f797, 0f3F800000, 0f41200000, %p54;
|
|
mul.f32 %f610, %f797, %f122;
|
|
st.local.u32 [%rd2], %r105;
|
|
ld.global.u32 %r100, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r100, %f10, %f11, %f12, %f607, %f608, %f609, %r101, %f610, %f611, %rd35, %r29);
|
|
// inline asm
|
|
ld.local.f32 %f798, [%rd2];
|
|
add.f32 %f1201, %f752, %f798;
|
|
add.s32 %r196, %r196, 4;
|
|
setp.lt.s32 %p55, %r196, %r8;
|
|
@%p55 bra BB0_41;
|
|
|
|
BB0_42:
|
|
cvt.rn.f32.s32 %f799, %r8;
|
|
div.rn.f32 %f1202, %f1201, %f799;
|
|
shr.u32 %r115, %r6, 31;
|
|
cvt.u16.u32 %rs62, %r115;
|
|
|
|
BB0_43:
|
|
fma.rn.f32 %f1179, %f115, %f1202, %f1179;
|
|
fma.rn.f32 %f1178, %f116, %f1202, %f1178;
|
|
fma.rn.f32 %f1177, %f117, %f1202, %f1177;
|
|
ld.global.u8 %rs15, [imageEnabled];
|
|
and.b16 %rs16, %rs15, 64;
|
|
setp.eq.s16 %p56, %rs16, 0;
|
|
@%p56 bra BB0_45;
|
|
|
|
mul.f32 %f800, %f116, 0f3F372474;
|
|
fma.rn.f32 %f801, %f115, 0f3E59999A, %f800;
|
|
fma.rn.f32 %f802, %f117, 0f3D93A92A, %f801;
|
|
fma.rn.f32 %f20, %f118, %f802, %f20;
|
|
fma.rn.f32 %f19, %f119, %f802, %f19;
|
|
fma.rn.f32 %f18, %f802, %f120, %f18;
|
|
|
|
BB0_45:
|
|
setp.eq.s16 %p57, %rs62, 0;
|
|
@%p57 bra BB0_47;
|
|
|
|
div.rn.f32 %f803, %f115, %f279;
|
|
div.rn.f32 %f804, %f803, %f87;
|
|
cvt.sat.f32.f32 %f805, %f804;
|
|
mul.f32 %f1202, %f1202, %f805;
|
|
|
|
BB0_47:
|
|
add.f32 %f1173, %f1173, %f1202;
|
|
|
|
BB0_48:
|
|
add.s32 %r192, %r192, 1;
|
|
setp.lt.u32 %p58, %r192, %r4;
|
|
@%p58 bra BB0_5;
|
|
|
|
BB0_49:
|
|
ld.global.u32 %r198, [imageEnabled];
|
|
and.b32 %r116, %r198, 8;
|
|
setp.eq.s32 %p59, %r116, 0;
|
|
@%p59 bra BB0_62;
|
|
|
|
cvt.sat.f32.f32 %f160, %f1173;
|
|
cvt.u64.u32 %rd46, %r3;
|
|
cvt.u64.u32 %rd45, %r2;
|
|
mov.u64 %rd49, image_Mask;
|
|
cvta.global.u64 %rd44, %rd49;
|
|
// inline asm
|
|
call (%rd43), _rt_buffer_get_64, (%rd44, %r28, %r28, %rd45, %rd46, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f808, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f809, %f808;
|
|
fma.rn.f32 %f810, %f809, 0fC0000000, 0f3EE8BA2E;
|
|
abs.f32 %f161, %f810;
|
|
abs.f32 %f162, %f160;
|
|
setp.lt.f32 %p60, %f162, 0f00800000;
|
|
mul.f32 %f811, %f162, 0f4B800000;
|
|
selp.f32 %f812, 0fC3170000, 0fC2FE0000, %p60;
|
|
selp.f32 %f813, %f811, %f162, %p60;
|
|
mov.b32 %r119, %f813;
|
|
and.b32 %r120, %r119, 8388607;
|
|
or.b32 %r121, %r120, 1065353216;
|
|
mov.b32 %f814, %r121;
|
|
shr.u32 %r122, %r119, 23;
|
|
cvt.rn.f32.u32 %f815, %r122;
|
|
add.f32 %f816, %f812, %f815;
|
|
setp.gt.f32 %p61, %f814, 0f3FB504F3;
|
|
mul.f32 %f817, %f814, 0f3F000000;
|
|
add.f32 %f818, %f816, 0f3F800000;
|
|
selp.f32 %f819, %f817, %f814, %p61;
|
|
selp.f32 %f820, %f818, %f816, %p61;
|
|
add.f32 %f821, %f819, 0fBF800000;
|
|
add.f32 %f807, %f819, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f806,%f807;
|
|
// inline asm
|
|
add.f32 %f822, %f821, %f821;
|
|
mul.f32 %f823, %f806, %f822;
|
|
mul.f32 %f824, %f823, %f823;
|
|
mov.f32 %f825, 0f3C4CAF63;
|
|
mov.f32 %f826, 0f3B18F0FE;
|
|
fma.rn.f32 %f827, %f826, %f824, %f825;
|
|
mov.f32 %f828, 0f3DAAAABD;
|
|
fma.rn.f32 %f829, %f827, %f824, %f828;
|
|
mul.rn.f32 %f830, %f829, %f824;
|
|
mul.rn.f32 %f831, %f830, %f823;
|
|
sub.f32 %f832, %f821, %f823;
|
|
neg.f32 %f833, %f823;
|
|
add.f32 %f834, %f832, %f832;
|
|
fma.rn.f32 %f835, %f833, %f821, %f834;
|
|
mul.rn.f32 %f836, %f806, %f835;
|
|
add.f32 %f837, %f831, %f823;
|
|
sub.f32 %f838, %f823, %f837;
|
|
add.f32 %f839, %f831, %f838;
|
|
add.f32 %f840, %f836, %f839;
|
|
add.f32 %f841, %f837, %f840;
|
|
sub.f32 %f842, %f837, %f841;
|
|
add.f32 %f843, %f840, %f842;
|
|
mov.f32 %f844, 0f3F317200;
|
|
mul.rn.f32 %f845, %f820, %f844;
|
|
mov.f32 %f846, 0f35BFBE8E;
|
|
mul.rn.f32 %f847, %f820, %f846;
|
|
add.f32 %f848, %f845, %f841;
|
|
sub.f32 %f849, %f845, %f848;
|
|
add.f32 %f850, %f841, %f849;
|
|
add.f32 %f851, %f843, %f850;
|
|
add.f32 %f852, %f847, %f851;
|
|
add.f32 %f853, %f848, %f852;
|
|
sub.f32 %f854, %f848, %f853;
|
|
add.f32 %f855, %f852, %f854;
|
|
mov.f32 %f856, 0f3EE8BA2E;
|
|
mul.rn.f32 %f857, %f856, %f853;
|
|
neg.f32 %f858, %f857;
|
|
fma.rn.f32 %f859, %f856, %f853, %f858;
|
|
fma.rn.f32 %f860, %f856, %f855, %f859;
|
|
mov.f32 %f861, 0f00000000;
|
|
fma.rn.f32 %f862, %f861, %f853, %f860;
|
|
add.rn.f32 %f863, %f857, %f862;
|
|
neg.f32 %f864, %f863;
|
|
add.rn.f32 %f865, %f857, %f864;
|
|
add.rn.f32 %f866, %f865, %f862;
|
|
mov.b32 %r123, %f863;
|
|
setp.eq.s32 %p62, %r123, 1118925336;
|
|
add.s32 %r124, %r123, -1;
|
|
mov.b32 %f867, %r124;
|
|
add.f32 %f868, %f866, 0f37000000;
|
|
selp.f32 %f869, %f867, %f863, %p62;
|
|
selp.f32 %f163, %f868, %f866, %p62;
|
|
mul.f32 %f870, %f869, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f871, %f870;
|
|
mov.f32 %f872, 0fBF317200;
|
|
fma.rn.f32 %f873, %f871, %f872, %f869;
|
|
mov.f32 %f874, 0fB5BFBE8E;
|
|
fma.rn.f32 %f875, %f871, %f874, %f873;
|
|
mul.f32 %f876, %f875, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f877, %f876;
|
|
add.f32 %f878, %f871, 0f00000000;
|
|
ex2.approx.f32 %f879, %f878;
|
|
mul.f32 %f880, %f877, %f879;
|
|
setp.lt.f32 %p63, %f869, 0fC2D20000;
|
|
selp.f32 %f881, 0f00000000, %f880, %p63;
|
|
setp.gt.f32 %p64, %f869, 0f42D20000;
|
|
selp.f32 %f1221, 0f7F800000, %f881, %p64;
|
|
setp.eq.f32 %p65, %f1221, 0f7F800000;
|
|
@%p65 bra BB0_52;
|
|
|
|
fma.rn.f32 %f1221, %f1221, %f163, %f1221;
|
|
|
|
BB0_52:
|
|
setp.lt.f32 %p66, %f160, 0f00000000;
|
|
setp.eq.f32 %p67, %f161, 0f3F800000;
|
|
and.pred %p4, %p66, %p67;
|
|
mov.b32 %r125, %f1221;
|
|
xor.b32 %r126, %r125, -2147483648;
|
|
mov.b32 %f882, %r126;
|
|
selp.f32 %f1223, %f882, %f1221, %p4;
|
|
setp.eq.f32 %p68, %f160, 0f00000000;
|
|
@%p68 bra BB0_55;
|
|
bra.uni BB0_53;
|
|
|
|
BB0_55:
|
|
add.f32 %f885, %f160, %f160;
|
|
selp.f32 %f1223, %f885, 0f00000000, %p67;
|
|
bra.uni BB0_56;
|
|
|
|
BB0_110:
|
|
mov.u64 %rd117, image_HDR;
|
|
cvta.global.u64 %rd112, %rd117;
|
|
mov.u32 %r189, 8;
|
|
// inline asm
|
|
call (%rd111), _rt_buffer_get_64, (%rd112, %r28, %r189, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f1166, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs57, %f1166;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs58, 0;
|
|
st.v4.u16 [%rd111], {%rs57, %rs57, %rs57, %rs58};
|
|
|
|
BB0_111:
|
|
ld.global.u8 %rs59, [imageEnabled];
|
|
and.b16 %rs60, %rs59, 64;
|
|
setp.eq.s16 %p132, %rs60, 0;
|
|
@%p132 bra BB0_113;
|
|
|
|
cvt.u64.u32 %rd120, %r2;
|
|
cvt.u64.u32 %rd121, %r3;
|
|
mov.u64 %rd124, image_Dir;
|
|
cvta.global.u64 %rd119, %rd124;
|
|
// inline asm
|
|
call (%rd118), _rt_buffer_get_64, (%rd119, %r28, %r29, %rd120, %rd121, %rd13, %rd13);
|
|
// inline asm
|
|
mov.u16 %rs61, 0;
|
|
st.v4.u8 [%rd118], {%rs61, %rs61, %rs61, %rs61};
|
|
bra.uni BB0_113;
|
|
|
|
BB0_53:
|
|
setp.geu.f32 %p69, %f160, 0f00000000;
|
|
@%p69 bra BB0_56;
|
|
|
|
cvt.rzi.f32.f32 %f884, %f856;
|
|
setp.neu.f32 %p70, %f884, 0f3EE8BA2E;
|
|
selp.f32 %f1223, 0f7FFFFFFF, %f1223, %p70;
|
|
|
|
BB0_56:
|
|
add.f32 %f886, %f162, 0f3EE8BA2E;
|
|
mov.b32 %r127, %f886;
|
|
setp.lt.s32 %p72, %r127, 2139095040;
|
|
@%p72 bra BB0_61;
|
|
|
|
setp.gtu.f32 %p73, %f162, 0f7F800000;
|
|
@%p73 bra BB0_60;
|
|
bra.uni BB0_58;
|
|
|
|
BB0_60:
|
|
add.f32 %f1223, %f160, 0f3EE8BA2E;
|
|
bra.uni BB0_61;
|
|
|
|
BB0_58:
|
|
setp.neu.f32 %p74, %f162, 0f7F800000;
|
|
@%p74 bra BB0_61;
|
|
|
|
selp.f32 %f1223, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
BB0_61:
|
|
mul.f32 %f887, %f1223, 0f437F0000;
|
|
setp.eq.f32 %p75, %f160, 0f3F800000;
|
|
selp.f32 %f888, 0f437F0000, %f887, %p75;
|
|
cvt.rzi.u32.f32 %r128, %f888;
|
|
cvt.u16.u32 %rs17, %r128;
|
|
mov.u16 %rs18, 255;
|
|
st.v2.u8 [%rd43], {%rs17, %rs18};
|
|
ld.global.u32 %r198, [imageEnabled];
|
|
|
|
BB0_62:
|
|
and.b32 %r129, %r198, 1;
|
|
setp.eq.b32 %p76, %r129, 1;
|
|
@!%p76 bra BB0_97;
|
|
bra.uni BB0_63;
|
|
|
|
BB0_63:
|
|
mov.f32 %f891, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f892, %f891;
|
|
fma.rn.f32 %f893, %f892, 0fC0000000, 0f3EE66666;
|
|
abs.f32 %f174, %f893;
|
|
abs.f32 %f175, %f1179;
|
|
setp.lt.f32 %p77, %f175, 0f00800000;
|
|
mul.f32 %f894, %f175, 0f4B800000;
|
|
selp.f32 %f895, 0fC3170000, 0fC2FE0000, %p77;
|
|
selp.f32 %f896, %f894, %f175, %p77;
|
|
mov.b32 %r130, %f896;
|
|
and.b32 %r131, %r130, 8388607;
|
|
or.b32 %r132, %r131, 1065353216;
|
|
mov.b32 %f897, %r132;
|
|
shr.u32 %r133, %r130, 23;
|
|
cvt.rn.f32.u32 %f898, %r133;
|
|
add.f32 %f899, %f895, %f898;
|
|
setp.gt.f32 %p78, %f897, 0f3FB504F3;
|
|
mul.f32 %f900, %f897, 0f3F000000;
|
|
add.f32 %f901, %f899, 0f3F800000;
|
|
selp.f32 %f902, %f900, %f897, %p78;
|
|
selp.f32 %f903, %f901, %f899, %p78;
|
|
add.f32 %f904, %f902, 0fBF800000;
|
|
add.f32 %f890, %f902, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f889,%f890;
|
|
// inline asm
|
|
add.f32 %f905, %f904, %f904;
|
|
mul.f32 %f906, %f889, %f905;
|
|
mul.f32 %f907, %f906, %f906;
|
|
mov.f32 %f908, 0f3C4CAF63;
|
|
mov.f32 %f909, 0f3B18F0FE;
|
|
fma.rn.f32 %f910, %f909, %f907, %f908;
|
|
mov.f32 %f911, 0f3DAAAABD;
|
|
fma.rn.f32 %f912, %f910, %f907, %f911;
|
|
mul.rn.f32 %f913, %f912, %f907;
|
|
mul.rn.f32 %f914, %f913, %f906;
|
|
sub.f32 %f915, %f904, %f906;
|
|
neg.f32 %f916, %f906;
|
|
add.f32 %f917, %f915, %f915;
|
|
fma.rn.f32 %f918, %f916, %f904, %f917;
|
|
mul.rn.f32 %f919, %f889, %f918;
|
|
add.f32 %f920, %f914, %f906;
|
|
sub.f32 %f921, %f906, %f920;
|
|
add.f32 %f922, %f914, %f921;
|
|
add.f32 %f923, %f919, %f922;
|
|
add.f32 %f924, %f920, %f923;
|
|
sub.f32 %f925, %f920, %f924;
|
|
add.f32 %f926, %f923, %f925;
|
|
mov.f32 %f927, 0f3F317200;
|
|
mul.rn.f32 %f928, %f903, %f927;
|
|
mov.f32 %f929, 0f35BFBE8E;
|
|
mul.rn.f32 %f930, %f903, %f929;
|
|
add.f32 %f931, %f928, %f924;
|
|
sub.f32 %f932, %f928, %f931;
|
|
add.f32 %f933, %f924, %f932;
|
|
add.f32 %f934, %f926, %f933;
|
|
add.f32 %f935, %f930, %f934;
|
|
add.f32 %f936, %f931, %f935;
|
|
sub.f32 %f937, %f931, %f936;
|
|
add.f32 %f938, %f935, %f937;
|
|
mov.f32 %f939, 0f3EE66666;
|
|
mul.rn.f32 %f940, %f939, %f936;
|
|
neg.f32 %f941, %f940;
|
|
fma.rn.f32 %f942, %f939, %f936, %f941;
|
|
fma.rn.f32 %f943, %f939, %f938, %f942;
|
|
mov.f32 %f944, 0f00000000;
|
|
fma.rn.f32 %f945, %f944, %f936, %f943;
|
|
add.rn.f32 %f946, %f940, %f945;
|
|
neg.f32 %f947, %f946;
|
|
add.rn.f32 %f948, %f940, %f947;
|
|
add.rn.f32 %f949, %f948, %f945;
|
|
mov.b32 %r134, %f946;
|
|
setp.eq.s32 %p79, %r134, 1118925336;
|
|
add.s32 %r135, %r134, -1;
|
|
mov.b32 %f950, %r135;
|
|
add.f32 %f951, %f949, 0f37000000;
|
|
selp.f32 %f952, %f950, %f946, %p79;
|
|
selp.f32 %f176, %f951, %f949, %p79;
|
|
mul.f32 %f953, %f952, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f954, %f953;
|
|
mov.f32 %f955, 0fBF317200;
|
|
fma.rn.f32 %f956, %f954, %f955, %f952;
|
|
mov.f32 %f957, 0fB5BFBE8E;
|
|
fma.rn.f32 %f958, %f954, %f957, %f956;
|
|
mul.f32 %f959, %f958, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f960, %f959;
|
|
add.f32 %f961, %f954, 0f00000000;
|
|
ex2.approx.f32 %f962, %f961;
|
|
mul.f32 %f963, %f960, %f962;
|
|
setp.lt.f32 %p80, %f952, 0fC2D20000;
|
|
selp.f32 %f964, 0f00000000, %f963, %p80;
|
|
setp.gt.f32 %p81, %f952, 0f42D20000;
|
|
selp.f32 %f1224, 0f7F800000, %f964, %p81;
|
|
setp.eq.f32 %p82, %f1224, 0f7F800000;
|
|
@%p82 bra BB0_65;
|
|
|
|
fma.rn.f32 %f1224, %f1224, %f176, %f1224;
|
|
|
|
BB0_65:
|
|
setp.lt.f32 %p83, %f1179, 0f00000000;
|
|
setp.eq.f32 %p84, %f174, 0f3F800000;
|
|
and.pred %p5, %p83, %p84;
|
|
mov.b32 %r136, %f1224;
|
|
xor.b32 %r137, %r136, -2147483648;
|
|
mov.b32 %f965, %r137;
|
|
selp.f32 %f1226, %f965, %f1224, %p5;
|
|
setp.eq.f32 %p85, %f1179, 0f00000000;
|
|
@%p85 bra BB0_68;
|
|
bra.uni BB0_66;
|
|
|
|
BB0_68:
|
|
add.f32 %f968, %f1179, %f1179;
|
|
selp.f32 %f1226, %f968, 0f00000000, %p84;
|
|
bra.uni BB0_69;
|
|
|
|
BB0_66:
|
|
setp.geu.f32 %p86, %f1179, 0f00000000;
|
|
@%p86 bra BB0_69;
|
|
|
|
cvt.rzi.f32.f32 %f967, %f939;
|
|
setp.neu.f32 %p87, %f967, 0f3EE66666;
|
|
selp.f32 %f1226, 0f7FFFFFFF, %f1226, %p87;
|
|
|
|
BB0_69:
|
|
add.f32 %f969, %f175, 0f3EE66666;
|
|
mov.b32 %r138, %f969;
|
|
setp.lt.s32 %p89, %r138, 2139095040;
|
|
@%p89 bra BB0_74;
|
|
|
|
setp.gtu.f32 %p90, %f175, 0f7F800000;
|
|
@%p90 bra BB0_73;
|
|
bra.uni BB0_71;
|
|
|
|
BB0_73:
|
|
add.f32 %f1226, %f1179, 0f3EE66666;
|
|
bra.uni BB0_74;
|
|
|
|
BB0_71:
|
|
setp.neu.f32 %p91, %f175, 0f7F800000;
|
|
@%p91 bra BB0_74;
|
|
|
|
selp.f32 %f1226, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
BB0_74:
|
|
setp.eq.f32 %p92, %f1179, 0f3F800000;
|
|
selp.f32 %f187, 0f3F800000, %f1226, %p92;
|
|
abs.f32 %f188, %f1178;
|
|
setp.lt.f32 %p93, %f188, 0f00800000;
|
|
mul.f32 %f972, %f188, 0f4B800000;
|
|
selp.f32 %f973, 0fC3170000, 0fC2FE0000, %p93;
|
|
selp.f32 %f974, %f972, %f188, %p93;
|
|
mov.b32 %r139, %f974;
|
|
and.b32 %r140, %r139, 8388607;
|
|
or.b32 %r141, %r140, 1065353216;
|
|
mov.b32 %f975, %r141;
|
|
shr.u32 %r142, %r139, 23;
|
|
cvt.rn.f32.u32 %f976, %r142;
|
|
add.f32 %f977, %f973, %f976;
|
|
setp.gt.f32 %p94, %f975, 0f3FB504F3;
|
|
mul.f32 %f978, %f975, 0f3F000000;
|
|
add.f32 %f979, %f977, 0f3F800000;
|
|
selp.f32 %f980, %f978, %f975, %p94;
|
|
selp.f32 %f981, %f979, %f977, %p94;
|
|
add.f32 %f982, %f980, 0fBF800000;
|
|
add.f32 %f971, %f980, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f970,%f971;
|
|
// inline asm
|
|
add.f32 %f983, %f982, %f982;
|
|
mul.f32 %f984, %f970, %f983;
|
|
mul.f32 %f985, %f984, %f984;
|
|
fma.rn.f32 %f988, %f909, %f985, %f908;
|
|
fma.rn.f32 %f990, %f988, %f985, %f911;
|
|
mul.rn.f32 %f991, %f990, %f985;
|
|
mul.rn.f32 %f992, %f991, %f984;
|
|
sub.f32 %f993, %f982, %f984;
|
|
neg.f32 %f994, %f984;
|
|
add.f32 %f995, %f993, %f993;
|
|
fma.rn.f32 %f996, %f994, %f982, %f995;
|
|
mul.rn.f32 %f997, %f970, %f996;
|
|
add.f32 %f998, %f992, %f984;
|
|
sub.f32 %f999, %f984, %f998;
|
|
add.f32 %f1000, %f992, %f999;
|
|
add.f32 %f1001, %f997, %f1000;
|
|
add.f32 %f1002, %f998, %f1001;
|
|
sub.f32 %f1003, %f998, %f1002;
|
|
add.f32 %f1004, %f1001, %f1003;
|
|
mul.rn.f32 %f1006, %f981, %f927;
|
|
mul.rn.f32 %f1008, %f981, %f929;
|
|
add.f32 %f1009, %f1006, %f1002;
|
|
sub.f32 %f1010, %f1006, %f1009;
|
|
add.f32 %f1011, %f1002, %f1010;
|
|
add.f32 %f1012, %f1004, %f1011;
|
|
add.f32 %f1013, %f1008, %f1012;
|
|
add.f32 %f1014, %f1009, %f1013;
|
|
sub.f32 %f1015, %f1009, %f1014;
|
|
add.f32 %f1016, %f1013, %f1015;
|
|
mul.rn.f32 %f1018, %f939, %f1014;
|
|
neg.f32 %f1019, %f1018;
|
|
fma.rn.f32 %f1020, %f939, %f1014, %f1019;
|
|
fma.rn.f32 %f1021, %f939, %f1016, %f1020;
|
|
fma.rn.f32 %f1023, %f944, %f1014, %f1021;
|
|
add.rn.f32 %f1024, %f1018, %f1023;
|
|
neg.f32 %f1025, %f1024;
|
|
add.rn.f32 %f1026, %f1018, %f1025;
|
|
add.rn.f32 %f1027, %f1026, %f1023;
|
|
mov.b32 %r143, %f1024;
|
|
setp.eq.s32 %p95, %r143, 1118925336;
|
|
add.s32 %r144, %r143, -1;
|
|
mov.b32 %f1028, %r144;
|
|
add.f32 %f1029, %f1027, 0f37000000;
|
|
selp.f32 %f1030, %f1028, %f1024, %p95;
|
|
selp.f32 %f189, %f1029, %f1027, %p95;
|
|
mul.f32 %f1031, %f1030, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1032, %f1031;
|
|
fma.rn.f32 %f1034, %f1032, %f955, %f1030;
|
|
fma.rn.f32 %f1036, %f1032, %f957, %f1034;
|
|
mul.f32 %f1037, %f1036, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1038, %f1037;
|
|
add.f32 %f1039, %f1032, 0f00000000;
|
|
ex2.approx.f32 %f1040, %f1039;
|
|
mul.f32 %f1041, %f1038, %f1040;
|
|
setp.lt.f32 %p96, %f1030, 0fC2D20000;
|
|
selp.f32 %f1042, 0f00000000, %f1041, %p96;
|
|
setp.gt.f32 %p97, %f1030, 0f42D20000;
|
|
selp.f32 %f1227, 0f7F800000, %f1042, %p97;
|
|
setp.eq.f32 %p98, %f1227, 0f7F800000;
|
|
@%p98 bra BB0_76;
|
|
|
|
fma.rn.f32 %f1227, %f1227, %f189, %f1227;
|
|
|
|
BB0_76:
|
|
setp.lt.f32 %p99, %f1178, 0f00000000;
|
|
and.pred %p6, %p99, %p84;
|
|
mov.b32 %r145, %f1227;
|
|
xor.b32 %r146, %r145, -2147483648;
|
|
mov.b32 %f1043, %r146;
|
|
selp.f32 %f1229, %f1043, %f1227, %p6;
|
|
setp.eq.f32 %p101, %f1178, 0f00000000;
|
|
@%p101 bra BB0_79;
|
|
bra.uni BB0_77;
|
|
|
|
BB0_79:
|
|
add.f32 %f1046, %f1178, %f1178;
|
|
selp.f32 %f1229, %f1046, 0f00000000, %p84;
|
|
bra.uni BB0_80;
|
|
|
|
BB0_77:
|
|
setp.geu.f32 %p102, %f1178, 0f00000000;
|
|
@%p102 bra BB0_80;
|
|
|
|
cvt.rzi.f32.f32 %f1045, %f939;
|
|
setp.neu.f32 %p103, %f1045, 0f3EE66666;
|
|
selp.f32 %f1229, 0f7FFFFFFF, %f1229, %p103;
|
|
|
|
BB0_80:
|
|
add.f32 %f1047, %f188, 0f3EE66666;
|
|
mov.b32 %r147, %f1047;
|
|
setp.lt.s32 %p105, %r147, 2139095040;
|
|
@%p105 bra BB0_85;
|
|
|
|
setp.gtu.f32 %p106, %f188, 0f7F800000;
|
|
@%p106 bra BB0_84;
|
|
bra.uni BB0_82;
|
|
|
|
BB0_84:
|
|
add.f32 %f1229, %f1178, 0f3EE66666;
|
|
bra.uni BB0_85;
|
|
|
|
BB0_82:
|
|
setp.neu.f32 %p107, %f188, 0f7F800000;
|
|
@%p107 bra BB0_85;
|
|
|
|
selp.f32 %f1229, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
BB0_85:
|
|
setp.eq.f32 %p108, %f1178, 0f3F800000;
|
|
selp.f32 %f200, 0f3F800000, %f1229, %p108;
|
|
abs.f32 %f201, %f1177;
|
|
setp.lt.f32 %p109, %f201, 0f00800000;
|
|
mul.f32 %f1050, %f201, 0f4B800000;
|
|
selp.f32 %f1051, 0fC3170000, 0fC2FE0000, %p109;
|
|
selp.f32 %f1052, %f1050, %f201, %p109;
|
|
mov.b32 %r148, %f1052;
|
|
and.b32 %r149, %r148, 8388607;
|
|
or.b32 %r150, %r149, 1065353216;
|
|
mov.b32 %f1053, %r150;
|
|
shr.u32 %r151, %r148, 23;
|
|
cvt.rn.f32.u32 %f1054, %r151;
|
|
add.f32 %f1055, %f1051, %f1054;
|
|
setp.gt.f32 %p110, %f1053, 0f3FB504F3;
|
|
mul.f32 %f1056, %f1053, 0f3F000000;
|
|
add.f32 %f1057, %f1055, 0f3F800000;
|
|
selp.f32 %f1058, %f1056, %f1053, %p110;
|
|
selp.f32 %f1059, %f1057, %f1055, %p110;
|
|
add.f32 %f1060, %f1058, 0fBF800000;
|
|
add.f32 %f1049, %f1058, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1048,%f1049;
|
|
// inline asm
|
|
add.f32 %f1061, %f1060, %f1060;
|
|
mul.f32 %f1062, %f1048, %f1061;
|
|
mul.f32 %f1063, %f1062, %f1062;
|
|
fma.rn.f32 %f1066, %f909, %f1063, %f908;
|
|
fma.rn.f32 %f1068, %f1066, %f1063, %f911;
|
|
mul.rn.f32 %f1069, %f1068, %f1063;
|
|
mul.rn.f32 %f1070, %f1069, %f1062;
|
|
sub.f32 %f1071, %f1060, %f1062;
|
|
neg.f32 %f1072, %f1062;
|
|
add.f32 %f1073, %f1071, %f1071;
|
|
fma.rn.f32 %f1074, %f1072, %f1060, %f1073;
|
|
mul.rn.f32 %f1075, %f1048, %f1074;
|
|
add.f32 %f1076, %f1070, %f1062;
|
|
sub.f32 %f1077, %f1062, %f1076;
|
|
add.f32 %f1078, %f1070, %f1077;
|
|
add.f32 %f1079, %f1075, %f1078;
|
|
add.f32 %f1080, %f1076, %f1079;
|
|
sub.f32 %f1081, %f1076, %f1080;
|
|
add.f32 %f1082, %f1079, %f1081;
|
|
mul.rn.f32 %f1084, %f1059, %f927;
|
|
mul.rn.f32 %f1086, %f1059, %f929;
|
|
add.f32 %f1087, %f1084, %f1080;
|
|
sub.f32 %f1088, %f1084, %f1087;
|
|
add.f32 %f1089, %f1080, %f1088;
|
|
add.f32 %f1090, %f1082, %f1089;
|
|
add.f32 %f1091, %f1086, %f1090;
|
|
add.f32 %f1092, %f1087, %f1091;
|
|
sub.f32 %f1093, %f1087, %f1092;
|
|
add.f32 %f1094, %f1091, %f1093;
|
|
mul.rn.f32 %f1096, %f939, %f1092;
|
|
neg.f32 %f1097, %f1096;
|
|
fma.rn.f32 %f1098, %f939, %f1092, %f1097;
|
|
fma.rn.f32 %f1099, %f939, %f1094, %f1098;
|
|
fma.rn.f32 %f1101, %f944, %f1092, %f1099;
|
|
add.rn.f32 %f1102, %f1096, %f1101;
|
|
neg.f32 %f1103, %f1102;
|
|
add.rn.f32 %f1104, %f1096, %f1103;
|
|
add.rn.f32 %f1105, %f1104, %f1101;
|
|
mov.b32 %r152, %f1102;
|
|
setp.eq.s32 %p111, %r152, 1118925336;
|
|
add.s32 %r153, %r152, -1;
|
|
mov.b32 %f1106, %r153;
|
|
add.f32 %f1107, %f1105, 0f37000000;
|
|
selp.f32 %f1108, %f1106, %f1102, %p111;
|
|
selp.f32 %f202, %f1107, %f1105, %p111;
|
|
mul.f32 %f1109, %f1108, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1110, %f1109;
|
|
fma.rn.f32 %f1112, %f1110, %f955, %f1108;
|
|
fma.rn.f32 %f1114, %f1110, %f957, %f1112;
|
|
mul.f32 %f1115, %f1114, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1116, %f1115;
|
|
add.f32 %f1117, %f1110, 0f00000000;
|
|
ex2.approx.f32 %f1118, %f1117;
|
|
mul.f32 %f1119, %f1116, %f1118;
|
|
setp.lt.f32 %p112, %f1108, 0fC2D20000;
|
|
selp.f32 %f1120, 0f00000000, %f1119, %p112;
|
|
setp.gt.f32 %p113, %f1108, 0f42D20000;
|
|
selp.f32 %f1230, 0f7F800000, %f1120, %p113;
|
|
setp.eq.f32 %p114, %f1230, 0f7F800000;
|
|
@%p114 bra BB0_87;
|
|
|
|
fma.rn.f32 %f1230, %f1230, %f202, %f1230;
|
|
|
|
BB0_87:
|
|
setp.lt.f32 %p115, %f1177, 0f00000000;
|
|
and.pred %p7, %p115, %p84;
|
|
mov.b32 %r154, %f1230;
|
|
xor.b32 %r155, %r154, -2147483648;
|
|
mov.b32 %f1121, %r155;
|
|
selp.f32 %f1232, %f1121, %f1230, %p7;
|
|
setp.eq.f32 %p117, %f1177, 0f00000000;
|
|
@%p117 bra BB0_90;
|
|
bra.uni BB0_88;
|
|
|
|
BB0_90:
|
|
add.f32 %f1124, %f1177, %f1177;
|
|
selp.f32 %f1232, %f1124, 0f00000000, %p84;
|
|
bra.uni BB0_91;
|
|
|
|
BB0_88:
|
|
setp.geu.f32 %p118, %f1177, 0f00000000;
|
|
@%p118 bra BB0_91;
|
|
|
|
cvt.rzi.f32.f32 %f1123, %f939;
|
|
setp.neu.f32 %p119, %f1123, 0f3EE66666;
|
|
selp.f32 %f1232, 0f7FFFFFFF, %f1232, %p119;
|
|
|
|
BB0_91:
|
|
add.f32 %f1125, %f201, 0f3EE66666;
|
|
mov.b32 %r156, %f1125;
|
|
setp.lt.s32 %p121, %r156, 2139095040;
|
|
@%p121 bra BB0_96;
|
|
|
|
setp.gtu.f32 %p122, %f201, 0f7F800000;
|
|
@%p122 bra BB0_95;
|
|
bra.uni BB0_93;
|
|
|
|
BB0_95:
|
|
add.f32 %f1232, %f1177, 0f3EE66666;
|
|
bra.uni BB0_96;
|
|
|
|
BB0_93:
|
|
setp.neu.f32 %p123, %f201, 0f7F800000;
|
|
@%p123 bra BB0_96;
|
|
|
|
selp.f32 %f1232, 0fFF800000, 0f7F800000, %p7;
|
|
|
|
BB0_96:
|
|
setp.eq.f32 %p124, %f1177, 0f3F800000;
|
|
selp.f32 %f1126, 0f3F800000, %f1232, %p124;
|
|
cvt.u64.u32 %rd53, %r3;
|
|
cvt.u64.u32 %rd52, %r2;
|
|
mov.u64 %rd56, image;
|
|
cvta.global.u64 %rd51, %rd56;
|
|
// inline asm
|
|
call (%rd50), _rt_buffer_get_64, (%rd51, %r28, %r29, %rd52, %rd53, %rd13, %rd13);
|
|
// inline asm
|
|
cvt.sat.f32.f32 %f1127, %f1126;
|
|
mul.f32 %f1128, %f1127, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r159, %f1128;
|
|
cvt.sat.f32.f32 %f1129, %f200;
|
|
mul.f32 %f1130, %f1129, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r160, %f1130;
|
|
cvt.sat.f32.f32 %f1131, %f187;
|
|
mul.f32 %f1132, %f1131, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r161, %f1132;
|
|
cvt.u16.u32 %rs19, %r159;
|
|
cvt.u16.u32 %rs20, %r161;
|
|
cvt.u16.u32 %rs21, %r160;
|
|
mov.u16 %rs22, 255;
|
|
st.v4.u8 [%rd50], {%rs19, %rs21, %rs20, %rs22};
|
|
ld.global.u32 %r198, [imageEnabled];
|
|
|
|
BB0_97:
|
|
and.b32 %r162, %r198, 4;
|
|
setp.eq.s32 %p125, %r162, 0;
|
|
@%p125 bra BB0_101;
|
|
|
|
ld.global.u32 %r163, [additive];
|
|
setp.eq.s32 %p126, %r163, 0;
|
|
cvt.u64.u32 %rd4, %r2;
|
|
cvt.u64.u32 %rd5, %r3;
|
|
mov.f32 %f1133, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs23, %f1133;}
|
|
|
|
// inline asm
|
|
@%p126 bra BB0_100;
|
|
|
|
mov.u64 %rd69, image_HDR;
|
|
cvta.global.u64 %rd58, %rd69;
|
|
mov.u32 %r167, 8;
|
|
// inline asm
|
|
call (%rd57), _rt_buffer_get_64, (%rd58, %r28, %r167, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs30, %rs31, %rs32, %rs33}, [%rd57];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1134, %rs30;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1135, %rs31;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1136, %rs32;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd63), _rt_buffer_get_64, (%rd58, %r28, %r167, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1137, %f1179, %f1134;
|
|
add.f32 %f1138, %f1178, %f1135;
|
|
add.f32 %f1139, %f1177, %f1136;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs29, %f1139;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs28, %f1138;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs27, %f1137;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd63], {%rs27, %rs28, %rs29, %rs23};
|
|
bra.uni BB0_101;
|
|
|
|
BB0_100:
|
|
mov.u64 %rd76, image_HDR;
|
|
cvta.global.u64 %rd71, %rd76;
|
|
mov.u32 %r169, 8;
|
|
// inline asm
|
|
call (%rd70), _rt_buffer_get_64, (%rd71, %r28, %r169, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs36, %f1177;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs35, %f1178;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs34, %f1179;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd70], {%rs34, %rs35, %rs36, %rs23};
|
|
|
|
BB0_101:
|
|
ld.global.u8 %rs37, [imageEnabled];
|
|
and.b16 %rs38, %rs37, 64;
|
|
setp.eq.s16 %p127, %rs38, 0;
|
|
@%p127 bra BB0_113;
|
|
|
|
mul.f32 %f1143, %f19, %f19;
|
|
fma.rn.f32 %f1144, %f20, %f20, %f1143;
|
|
fma.rn.f32 %f1145, %f18, %f18, %f1144;
|
|
sqrt.rn.f32 %f1146, %f1145;
|
|
rcp.rn.f32 %f1147, %f1146;
|
|
mul.f32 %f1148, %f20, %f1147;
|
|
mul.f32 %f1149, %f19, %f1147;
|
|
mul.f32 %f1150, %f18, %f1147;
|
|
cvt.u64.u32 %rd80, %r3;
|
|
cvt.u64.u32 %rd79, %r2;
|
|
mov.u64 %rd83, image_Dir;
|
|
cvta.global.u64 %rd78, %rd83;
|
|
// inline asm
|
|
call (%rd77), _rt_buffer_get_64, (%rd78, %r28, %r29, %rd79, %rd80, %rd13, %rd13);
|
|
// inline asm
|
|
fma.rn.f32 %f1151, %f1148, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f1152, %f1151, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r172, %f1152;
|
|
fma.rn.f32 %f1153, %f1149, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f1154, %f1153, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r173, %f1154;
|
|
fma.rn.f32 %f1155, %f1150, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f1156, %f1155, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r174, %f1156;
|
|
cvt.u16.u32 %rs39, %r174;
|
|
cvt.u16.u32 %rs40, %r173;
|
|
cvt.u16.u32 %rs41, %r172;
|
|
mov.u16 %rs42, 255;
|
|
st.v4.u8 [%rd77], {%rs41, %rs40, %rs39, %rs42};
|
|
|
|
BB0_113:
|
|
ret;
|
|
}
|
|
|
|
|