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2026-08-06 18:56:32 +03:00

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//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//
.version 6.1
.target sm_30
.address_size 64
// .globl _Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image[1];
.global .align 1 .b8 image_HDR[1];
.global .align 1 .b8 image_HDR2[1];
.global .align 1 .b8 image_RNM0[1];
.global .align 1 .b8 image_RNM1[1];
.global .align 1 .b8 image_RNM2[1];
.global .align 1 .b8 uvtangent[1];
.global .align 1 .b8 uvpos[1];
.global .align 1 .b8 uvnormal[1];
.global .align 1 .b8 rnd_seeds[1];
.global .texref sky;
.global .align 4 .b8 skyColor[12];
.global .align 4 .u32 samples;
.global .align 4 .u32 hemispherical;
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8skyColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo13hemisphericalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8skyColorE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename13hemisphericalE[4] = {105, 110, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8skyColorE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum13hemisphericalE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8skyColorE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic13hemisphericalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8skyColorE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation13hemisphericalE[1];
.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
.visible .entry _Z6oxMainv(
)
{
.local .align 4 .b8 __local_depot0[40];
.reg .b64 %SP;
.reg .b64 %SPL;
.reg .pred %p<113>;
.reg .b16 %rs<153>;
.reg .f32 %f<991>;
.reg .b32 %r<404>;
.reg .b64 %rd<285>;
mov.u64 %rd284, __local_depot0;
cvta.local.u64 %SP, %rd284;
ld.global.u32 %r1, [samples];
ld.global.v2.u32 {%r99, %r100}, [pixelID];
cvt.u64.u32 %rd24, %r99;
cvt.u64.u32 %rd25, %r100;
mov.u64 %rd28, uvnormal;
cvta.global.u64 %rd23, %rd28;
mov.u32 %r97, 2;
mov.u32 %r98, 4;
mov.u64 %rd27, 0;
// inline asm
call (%rd22), _rt_buffer_get_64, (%rd23, %r97, %r98, %rd24, %rd25, %rd27, %rd27);
// inline asm
ld.u32 %r2, [%rd22];
shr.u32 %r103, %r2, 16;
cvt.u16.u32 %rs1, %r103;
and.b16 %rs6, %rs1, 255;
cvt.u16.u32 %rs7, %r2;
or.b16 %rs8, %rs7, %rs6;
setp.eq.s16 %p4, %rs8, 0;
mov.f32 %f910, 0f00000000;
mov.f32 %f911, %f910;
mov.f32 %f912, %f910;
@%p4 bra BB0_2;
ld.u8 %rs9, [%rd22+1];
and.b16 %rs11, %rs7, 255;
cvt.rn.f32.u16 %f218, %rs11;
div.rn.f32 %f219, %f218, 0f437F0000;
fma.rn.f32 %f220, %f219, 0f40000000, 0fBF800000;
cvt.rn.f32.u16 %f221, %rs9;
div.rn.f32 %f222, %f221, 0f437F0000;
fma.rn.f32 %f223, %f222, 0f40000000, 0fBF800000;
cvt.rn.f32.u16 %f224, %rs6;
div.rn.f32 %f225, %f224, 0f437F0000;
fma.rn.f32 %f226, %f225, 0f40000000, 0fBF800000;
mul.f32 %f227, %f223, %f223;
fma.rn.f32 %f228, %f220, %f220, %f227;
fma.rn.f32 %f229, %f226, %f226, %f228;
sqrt.rn.f32 %f230, %f229;
rcp.rn.f32 %f231, %f230;
mul.f32 %f910, %f220, %f231;
mul.f32 %f911, %f223, %f231;
mul.f32 %f912, %f226, %f231;
BB0_2:
ld.global.v2.u32 {%r104, %r105}, [pixelID];
ld.global.v2.u32 {%r107, %r108}, [tileInfo];
add.s32 %r3, %r104, %r107;
add.s32 %r4, %r105, %r108;
setp.eq.f32 %p5, %f911, 0f00000000;
setp.eq.f32 %p6, %f910, 0f00000000;
and.pred %p7, %p6, %p5;
setp.eq.f32 %p8, %f912, 0f00000000;
and.pred %p9, %p7, %p8;
@%p9 bra BB0_110;
bra.uni BB0_3;
BB0_110:
ld.global.u32 %r403, [imageEnabled];
and.b32 %r306, %r403, 1;
setp.eq.b32 %p106, %r306, 1;
@!%p106 bra BB0_112;
bra.uni BB0_111;
BB0_111:
cvt.u64.u32 %rd176, %r4;
cvt.u64.u32 %rd175, %r3;
mov.u64 %rd179, image;
cvta.global.u64 %rd174, %rd179;
mov.u64 %rd178, 0;
// inline asm
call (%rd173), _rt_buffer_get_64, (%rd174, %r97, %r98, %rd175, %rd176, %rd178, %rd178);
// inline asm
mov.u16 %rs100, 0;
st.v4.u8 [%rd173], {%rs100, %rs100, %rs100, %rs100};
ld.global.u32 %r403, [imageEnabled];
BB0_112:
cvt.u64.u32 %rd20, %r3;
cvt.u64.u32 %rd21, %r4;
and.b32 %r309, %r403, 4;
setp.eq.s32 %p107, %r309, 0;
@%p107 bra BB0_116;
ld.global.u32 %r310, [additive];
setp.eq.s32 %p108, %r310, 0;
@%p108 bra BB0_115;
mov.u64 %rd192, image_HDR;
cvta.global.u64 %rd181, %rd192;
mov.u32 %r314, 8;
mov.u64 %rd191, 0;
// inline asm
call (%rd180), _rt_buffer_get_64, (%rd181, %r97, %r314, %rd20, %rd21, %rd191, %rd191);
// inline asm
ld.v4.u16 {%rs107, %rs108, %rs109, %rs110}, [%rd180];
// inline asm
{ cvt.f32.f16 %f817, %rs107;}
// inline asm
// inline asm
{ cvt.f32.f16 %f818, %rs108;}
// inline asm
// inline asm
{ cvt.f32.f16 %f819, %rs109;}
// inline asm
// inline asm
call (%rd186), _rt_buffer_get_64, (%rd181, %r97, %r314, %rd20, %rd21, %rd191, %rd191);
// inline asm
add.f32 %f820, %f817, 0f00000000;
add.f32 %f821, %f818, 0f00000000;
add.f32 %f822, %f819, 0f00000000;
// inline asm
{ cvt.rn.f16.f32 %rs106, %f822;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs105, %f821;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs104, %f820;}
// inline asm
mov.u16 %rs111, 0;
st.v4.u16 [%rd186], {%rs104, %rs105, %rs106, %rs111};
bra.uni BB0_116;
BB0_3:
ld.global.v2.u32 {%r118, %r119}, [pixelID];
cvt.u64.u32 %rd31, %r118;
cvt.u64.u32 %rd32, %r119;
mov.u64 %rd47, uvpos;
cvta.global.u64 %rd30, %rd47;
mov.u32 %r113, 12;
// inline asm
call (%rd29), _rt_buffer_get_64, (%rd30, %r97, %r113, %rd31, %rd32, %rd27, %rd27);
// inline asm
ld.f32 %f235, [%rd29+8];
ld.f32 %f236, [%rd29+4];
ld.f32 %f237, [%rd29];
mul.f32 %f238, %f237, 0f3456BF95;
mul.f32 %f239, %f236, 0f3456BF95;
mul.f32 %f240, %f235, 0f3456BF95;
abs.f32 %f241, %f910;
div.rn.f32 %f242, %f238, %f241;
abs.f32 %f243, %f911;
div.rn.f32 %f244, %f239, %f243;
abs.f32 %f245, %f912;
div.rn.f32 %f246, %f240, %f245;
abs.f32 %f247, %f242;
abs.f32 %f248, %f244;
abs.f32 %f249, %f246;
mov.f32 %f250, 0f38D1B717;
max.f32 %f251, %f247, %f250;
max.f32 %f252, %f248, %f250;
max.f32 %f253, %f249, %f250;
fma.rn.f32 %f7, %f910, %f251, %f237;
fma.rn.f32 %f8, %f911, %f252, %f236;
fma.rn.f32 %f9, %f912, %f253, %f235;
ld.global.u32 %r5, [hemispherical];
setp.gt.f32 %p10, %f241, %f245;
neg.f32 %f254, %f911;
selp.f32 %f255, %f254, 0f00000000, %p10;
neg.f32 %f256, %f912;
selp.f32 %f257, %f910, %f256, %p10;
selp.f32 %f258, 0f00000000, %f911, %p10;
mul.f32 %f259, %f257, %f257;
fma.rn.f32 %f260, %f255, %f255, %f259;
fma.rn.f32 %f261, %f258, %f258, %f260;
sqrt.rn.f32 %f262, %f261;
rcp.rn.f32 %f263, %f262;
mul.f32 %f10, %f255, %f263;
mul.f32 %f11, %f257, %f263;
mul.f32 %f12, %f258, %f263;
ld.global.v2.u32 {%r122, %r123}, [pixelID];
cvt.u64.u32 %rd37, %r122;
cvt.u64.u32 %rd38, %r123;
mov.u64 %rd48, rnd_seeds;
cvta.global.u64 %rd36, %rd48;
// inline asm
call (%rd35), _rt_buffer_get_64, (%rd36, %r97, %r98, %rd37, %rd38, %rd27, %rd27);
// inline asm
ld.u32 %r381, [%rd35];
ld.global.v2.u32 {%r126, %r127}, [pixelID];
cvt.u64.u32 %rd43, %r126;
cvt.u64.u32 %rd44, %r127;
mov.u64 %rd49, uvtangent;
cvta.global.u64 %rd42, %rd49;
// inline asm
call (%rd41), _rt_buffer_get_64, (%rd42, %r97, %r98, %rd43, %rd44, %rd27, %rd27);
// inline asm
ld.u32 %r7, [%rd41];
shr.u32 %r8, %r7, 16;
cvt.u16.u32 %rs13, %r8;
and.b16 %rs14, %rs13, 255;
cvt.u16.u32 %rs15, %r7;
or.b16 %rs16, %rs15, %rs14;
setp.eq.s16 %p11, %rs16, 0;
mov.f32 %f913, 0f00000000;
mov.f32 %f914, %f913;
mov.f32 %f915, %f913;
@%p11 bra BB0_5;
ld.u8 %rs17, [%rd41+1];
and.b16 %rs19, %rs15, 255;
cvt.rn.f32.u16 %f264, %rs19;
div.rn.f32 %f265, %f264, 0f437F0000;
fma.rn.f32 %f266, %f265, 0f40000000, 0fBF800000;
cvt.rn.f32.u16 %f267, %rs17;
div.rn.f32 %f268, %f267, 0f437F0000;
fma.rn.f32 %f269, %f268, 0f40000000, 0fBF800000;
cvt.rn.f32.u16 %f270, %rs14;
div.rn.f32 %f271, %f270, 0f437F0000;
fma.rn.f32 %f272, %f271, 0f40000000, 0fBF800000;
mul.f32 %f273, %f269, %f269;
fma.rn.f32 %f274, %f266, %f266, %f273;
fma.rn.f32 %f275, %f272, %f272, %f274;
sqrt.rn.f32 %f276, %f275;
rcp.rn.f32 %f277, %f276;
mul.f32 %f913, %f266, %f277;
mul.f32 %f914, %f269, %f277;
mul.f32 %f915, %f272, %f277;
BB0_5:
mov.f32 %f916, 0f00000000;
mov.u32 %r375, 4;
mov.u64 %rd276, 0;
mov.u32 %r374, 2;
mul.f32 %f281, %f912, %f914;
mul.f32 %f282, %f911, %f915;
sub.f32 %f283, %f282, %f281;
mul.f32 %f284, %f910, %f915;
mul.f32 %f285, %f912, %f913;
sub.f32 %f286, %f285, %f284;
mul.f32 %f287, %f911, %f913;
mul.f32 %f288, %f910, %f914;
sub.f32 %f289, %f288, %f287;
setp.lt.u32 %p12, %r7, 16777216;
selp.f32 %f290, 0fBF800000, 0f3F800000, %p12;
mul.f32 %f291, %f283, %f290;
mul.f32 %f292, %f286, %f290;
mul.f32 %f293, %f289, %f290;
mul.f32 %f294, %f291, 0f00000000;
mul.f32 %f295, %f292, 0f00000000;
mul.f32 %f296, %f293, 0f00000000;
fma.rn.f32 %f297, %f913, 0f3F5105EC, %f294;
fma.rn.f32 %f298, %f914, 0f3F5105EC, %f295;
fma.rn.f32 %f299, %f915, 0f3F5105EC, %f296;
mul.f32 %f19, %f910, 0f3F13CD3A;
add.f32 %f20, %f19, %f297;
mul.f32 %f21, %f911, 0f3F13CD3A;
add.f32 %f22, %f21, %f298;
mul.f32 %f23, %f912, 0f3F13CD3A;
add.f32 %f24, %f23, %f299;
ld.global.v2.u32 {%r132, %r133}, [pixelID];
cvt.u64.u32 %rd52, %r132;
cvt.u64.u32 %rd53, %r133;
// inline asm
call (%rd50), _rt_buffer_get_64, (%rd42, %r374, %r375, %rd52, %rd53, %rd276, %rd276);
// inline asm
ld.u32 %r9, [%rd50];
shr.u32 %r10, %r9, 16;
cvt.u16.u32 %rs22, %r10;
and.b16 %rs23, %rs22, 255;
cvt.u16.u32 %rs24, %r9;
or.b16 %rs25, %rs24, %rs23;
setp.eq.s16 %p13, %rs25, 0;
mov.f32 %f917, %f916;
mov.f32 %f918, %f916;
@%p13 bra BB0_7;
ld.u8 %rs26, [%rd50+1];
and.b16 %rs28, %rs24, 255;
cvt.rn.f32.u16 %f300, %rs28;
div.rn.f32 %f301, %f300, 0f437F0000;
fma.rn.f32 %f302, %f301, 0f40000000, 0fBF800000;
cvt.rn.f32.u16 %f303, %rs26;
div.rn.f32 %f304, %f303, 0f437F0000;
fma.rn.f32 %f305, %f304, 0f40000000, 0fBF800000;
cvt.rn.f32.u16 %f306, %rs23;
div.rn.f32 %f307, %f306, 0f437F0000;
fma.rn.f32 %f308, %f307, 0f40000000, 0fBF800000;
mul.f32 %f309, %f305, %f305;
fma.rn.f32 %f310, %f302, %f302, %f309;
fma.rn.f32 %f311, %f308, %f308, %f310;
sqrt.rn.f32 %f312, %f311;
rcp.rn.f32 %f313, %f312;
mul.f32 %f916, %f302, %f313;
mul.f32 %f917, %f305, %f313;
mul.f32 %f918, %f308, %f313;
BB0_7:
mul.f32 %f903, %f911, 0f3F13CD3A;
mul.f32 %f902, %f910, 0f3F13CD3A;
mov.u64 %rd279, uvtangent;
cvta.global.u64 %rd278, %rd279;
mov.f32 %f919, 0f00000000;
mov.u32 %r377, 4;
mov.u64 %rd277, 0;
mov.u32 %r376, 2;
mul.f32 %f317, %f912, %f917;
mul.f32 %f318, %f911, %f918;
sub.f32 %f319, %f318, %f317;
mul.f32 %f320, %f910, %f918;
mul.f32 %f321, %f912, %f916;
sub.f32 %f322, %f321, %f320;
mul.f32 %f323, %f911, %f916;
mul.f32 %f324, %f910, %f917;
sub.f32 %f325, %f324, %f323;
setp.lt.u32 %p14, %r9, 16777216;
selp.f32 %f326, 0fBF800000, 0f3F800000, %p14;
mul.f32 %f327, %f319, %f326;
mul.f32 %f328, %f322, %f326;
mul.f32 %f329, %f325, %f326;
mul.f32 %f330, %f327, 0f3F3504F3;
mul.f32 %f331, %f328, 0f3F3504F3;
mul.f32 %f332, %f329, 0f3F3504F3;
fma.rn.f32 %f333, %f916, 0fBED105EC, %f330;
fma.rn.f32 %f334, %f917, 0fBED105EC, %f331;
fma.rn.f32 %f335, %f918, 0fBED105EC, %f332;
add.f32 %f31, %f902, %f333;
add.f32 %f32, %f903, %f334;
add.f32 %f33, %f23, %f335;
ld.global.v2.u32 {%r138, %r139}, [pixelID];
cvt.u64.u32 %rd59, %r138;
cvt.u64.u32 %rd60, %r139;
// inline asm
call (%rd57), _rt_buffer_get_64, (%rd278, %r376, %r377, %rd59, %rd60, %rd277, %rd277);
// inline asm
ld.u32 %r11, [%rd57];
shr.u32 %r12, %r11, 16;
cvt.u16.u32 %rs31, %r12;
and.b16 %rs32, %rs31, 255;
cvt.u16.u32 %rs33, %r11;
or.b16 %rs34, %rs33, %rs32;
setp.eq.s16 %p15, %rs34, 0;
mov.f32 %f920, %f919;
mov.f32 %f921, %f919;
@%p15 bra BB0_9;
ld.u8 %rs35, [%rd57+1];
and.b16 %rs37, %rs33, 255;
cvt.rn.f32.u16 %f336, %rs37;
div.rn.f32 %f337, %f336, 0f437F0000;
fma.rn.f32 %f338, %f337, 0f40000000, 0fBF800000;
cvt.rn.f32.u16 %f339, %rs35;
div.rn.f32 %f340, %f339, 0f437F0000;
fma.rn.f32 %f341, %f340, 0f40000000, 0fBF800000;
cvt.rn.f32.u16 %f342, %rs32;
div.rn.f32 %f343, %f342, 0f437F0000;
fma.rn.f32 %f344, %f343, 0f40000000, 0fBF800000;
mul.f32 %f345, %f341, %f341;
fma.rn.f32 %f346, %f338, %f338, %f345;
fma.rn.f32 %f347, %f344, %f344, %f346;
sqrt.rn.f32 %f348, %f347;
rcp.rn.f32 %f349, %f348;
mul.f32 %f919, %f338, %f349;
mul.f32 %f920, %f341, %f349;
mul.f32 %f921, %f344, %f349;
BB0_9:
mul.f32 %f906, %f912, 0f3F13CD3A;
mul.f32 %f905, %f911, 0f3F13CD3A;
mul.f32 %f904, %f910, 0f3F13CD3A;
mov.f32 %f969, 0f00000000;
mul.f32 %f362, %f912, %f920;
mul.f32 %f363, %f911, %f921;
sub.f32 %f364, %f363, %f362;
mul.f32 %f365, %f910, %f921;
mul.f32 %f366, %f912, %f919;
sub.f32 %f367, %f366, %f365;
mul.f32 %f368, %f911, %f919;
mul.f32 %f369, %f910, %f920;
sub.f32 %f370, %f369, %f368;
setp.lt.u32 %p16, %r11, 16777216;
selp.f32 %f371, 0fBF800000, 0f3F800000, %p16;
mul.f32 %f372, %f364, %f371;
mul.f32 %f373, %f367, %f371;
mul.f32 %f374, %f370, %f371;
mul.f32 %f375, %f372, 0fBF3504F3;
mul.f32 %f376, %f373, 0fBF3504F3;
mul.f32 %f377, %f374, 0fBF3504F3;
fma.rn.f32 %f378, %f919, 0fBED105EC, %f375;
fma.rn.f32 %f379, %f920, 0fBED105EC, %f376;
fma.rn.f32 %f380, %f921, 0fBED105EC, %f377;
add.f32 %f40, %f904, %f378;
add.f32 %f41, %f905, %f379;
add.f32 %f42, %f906, %f380;
setp.lt.s32 %p17, %r1, 1;
mov.f32 %f968, %f969;
mov.f32 %f967, %f969;
mov.f32 %f966, %f969;
mov.f32 %f965, %f969;
mov.f32 %f964, %f969;
mov.f32 %f963, %f969;
mov.f32 %f962, %f969;
mov.f32 %f961, %f969;
mov.f32 %f960, %f969;
mov.f32 %f959, %f969;
mov.f32 %f958, %f969;
@%p17 bra BB0_62;
cvt.rn.f32.s32 %f393, %r1;
rcp.rn.f32 %f43, %f393;
mul.f32 %f44, %f7, 0f3456BF95;
mul.f32 %f45, %f8, 0f3456BF95;
mul.f32 %f46, %f9, 0f3456BF95;
mul.f32 %f394, %f912, %f11;
mul.f32 %f395, %f911, %f12;
sub.f32 %f47, %f394, %f395;
mul.f32 %f396, %f910, %f12;
mul.f32 %f397, %f912, %f10;
sub.f32 %f48, %f396, %f397;
mul.f32 %f398, %f911, %f10;
mul.f32 %f399, %f910, %f11;
sub.f32 %f49, %f398, %f399;
mov.f32 %f969, 0f00000000;
mov.u32 %r142, 0;
abs.f32 %f473, %f45;
abs.f32 %f474, %f44;
max.f32 %f475, %f474, %f473;
abs.f32 %f476, %f46;
max.f32 %f477, %f475, %f476;
mov.u32 %r378, %r142;
mov.f32 %f968, %f969;
mov.f32 %f967, %f969;
mov.f32 %f966, %f969;
mov.f32 %f965, %f969;
mov.f32 %f964, %f969;
mov.f32 %f963, %f969;
mov.f32 %f962, %f969;
mov.f32 %f961, %f969;
mov.f32 %f960, %f969;
mov.f32 %f959, %f969;
mov.f32 %f958, %f969;
BB0_11:
mov.u32 %r380, %r142;
BB0_12:
mov.u32 %r16, %r381;
cvt.rn.f32.s32 %f853, %r378;
mad.lo.s32 %r144, %r16, 1664525, 1013904223;
and.b32 %r145, %r144, 16777215;
cvt.rn.f32.u32 %f400, %r145;
fma.rn.f32 %f401, %f400, 0f33800000, %f853;
mul.f32 %f75, %f43, %f401;
mad.lo.s32 %r17, %r144, 1664525, 1013904223;
and.b32 %r146, %r17, 16777215;
cvt.rn.f32.u32 %f402, %r146;
cvt.rn.f32.s32 %f403, %r380;
fma.rn.f32 %f404, %f402, 0f33800000, %f403;
mul.f32 %f405, %f43, %f404;
mul.f32 %f406, %f75, %f75;
mov.f32 %f407, 0f3F800000;
sub.f32 %f408, %f407, %f406;
mov.f32 %f409, 0f00000000;
max.f32 %f410, %f409, %f408;
sqrt.rn.f32 %f76, %f410;
mul.f32 %f952, %f405, 0f40C90FDB;
abs.f32 %f78, %f952;
setp.neu.f32 %p18, %f78, 0f7F800000;
mov.f32 %f946, %f952;
@%p18 bra BB0_14;
mov.f32 %f854, 0f00000000;
mul.rn.f32 %f946, %f952, %f854;
BB0_14:
mul.f32 %f412, %f946, 0f3F22F983;
cvt.rni.s32.f32 %r391, %f412;
cvt.rn.f32.s32 %f413, %r391;
neg.f32 %f414, %f413;
mov.f32 %f415, 0f3FC90FDA;
fma.rn.f32 %f416, %f414, %f415, %f946;
mov.f32 %f417, 0f33A22168;
fma.rn.f32 %f418, %f414, %f417, %f416;
mov.f32 %f419, 0f27C234C5;
fma.rn.f32 %f947, %f414, %f419, %f418;
abs.f32 %f420, %f946;
setp.leu.f32 %p19, %f420, 0f47CE4780;
@%p19 bra BB0_25;
add.u64 %rd65, %SP, 12;
cvta.to.local.u64 %rd280, %rd65;
mov.u32 %r382, 0;
mov.u64 %rd281, 0;
mov.u32 %r383, %r382;
BB0_16:
.pragma "nounroll";
mov.b32 %r340, %f946;
shl.b32 %r339, %r340, 8;
or.b32 %r338, %r339, -2147483648;
add.u64 %rd261, %SP, 12;
cvta.to.local.u64 %rd260, %rd261;
shl.b64 %rd66, %rd281, 2;
mov.u64 %rd67, __cudart_i2opi_f;
add.s64 %rd68, %rd67, %rd66;
ld.const.u32 %r152, [%rd68];
// inline asm
{
mad.lo.cc.u32 %r150, %r152, %r338, %r383;
madc.hi.u32 %r383, %r152, %r338, 0;
}
// inline asm
st.local.u32 [%rd280], %r150;
add.s32 %r382, %r382, 1;
cvt.s64.s32 %rd281, %r382;
mul.wide.s32 %rd71, %r382, 4;
add.s64 %rd280, %rd260, %rd71;
setp.ne.s32 %p20, %r382, 6;
@%p20 bra BB0_16;
mov.b32 %r342, %f946;
shr.u32 %r341, %r342, 23;
add.u64 %rd262, %SP, 12;
and.b32 %r155, %r341, 255;
add.s32 %r156, %r155, -128;
shr.u32 %r157, %r156, 5;
cvta.to.local.u64 %rd73, %rd262;
st.local.u32 [%rd73+24], %r383;
mov.u32 %r158, 6;
sub.s32 %r159, %r158, %r157;
mul.wide.s32 %rd74, %r159, 4;
add.s64 %rd10, %rd73, %rd74;
ld.local.u32 %r384, [%rd10];
ld.local.u32 %r385, [%rd10+-4];
and.b32 %r29, %r341, 31;
setp.eq.s32 %p21, %r29, 0;
@%p21 bra BB0_19;
mov.u32 %r160, 32;
sub.s32 %r161, %r160, %r29;
shr.u32 %r162, %r385, %r161;
shl.b32 %r163, %r384, %r29;
add.s32 %r384, %r162, %r163;
ld.local.u32 %r164, [%rd10+-8];
shr.u32 %r165, %r164, %r161;
shl.b32 %r166, %r385, %r29;
add.s32 %r385, %r165, %r166;
BB0_19:
mov.b32 %r350, %f946;
and.b32 %r387, %r350, -2147483648;
shr.u32 %r167, %r385, 30;
shl.b32 %r168, %r384, 2;
add.s32 %r386, %r167, %r168;
shl.b32 %r35, %r385, 2;
shr.u32 %r169, %r386, 31;
shr.u32 %r170, %r384, 30;
add.s32 %r36, %r169, %r170;
setp.eq.s32 %p22, %r169, 0;
@%p22 bra BB0_20;
bra.uni BB0_21;
BB0_20:
mov.u32 %r388, %r35;
bra.uni BB0_22;
BB0_21:
mov.b32 %r352, %f946;
and.b32 %r351, %r352, -2147483648;
not.b32 %r171, %r386;
neg.s32 %r388, %r35;
setp.eq.s32 %p23, %r35, 0;
selp.u32 %r172, 1, 0, %p23;
add.s32 %r386, %r172, %r171;
xor.b32 %r387, %r351, -2147483648;
BB0_22:
mov.b32 %r354, %f946;
and.b32 %r353, %r354, -2147483648;
clz.b32 %r390, %r386;
setp.eq.s32 %p24, %r390, 0;
shl.b32 %r173, %r386, %r390;
mov.u32 %r174, 32;
sub.s32 %r175, %r174, %r390;
shr.u32 %r176, %r388, %r175;
add.s32 %r177, %r176, %r173;
selp.b32 %r44, %r386, %r177, %p24;
mov.u32 %r178, -921707870;
mul.hi.u32 %r389, %r44, %r178;
setp.eq.s32 %p25, %r353, 0;
neg.s32 %r179, %r36;
selp.b32 %r391, %r36, %r179, %p25;
setp.lt.s32 %p26, %r389, 1;
@%p26 bra BB0_24;
mul.lo.s32 %r180, %r44, -921707870;
shr.u32 %r181, %r180, 31;
shl.b32 %r182, %r389, 1;
add.s32 %r389, %r181, %r182;
add.s32 %r390, %r390, 1;
BB0_24:
mov.u32 %r183, 126;
sub.s32 %r184, %r183, %r390;
shl.b32 %r185, %r184, 23;
add.s32 %r186, %r389, 1;
shr.u32 %r187, %r186, 7;
add.s32 %r188, %r187, 1;
shr.u32 %r189, %r188, 1;
add.s32 %r190, %r189, %r185;
or.b32 %r191, %r190, %r387;
mov.b32 %f947, %r191;
BB0_25:
add.s32 %r52, %r391, 1;
and.b32 %r53, %r52, 1;
setp.eq.s32 %p27, %r53, 0;
@%p27 bra BB0_27;
bra.uni BB0_26;
BB0_27:
mul.rn.f32 %f862, %f947, %f947;
mov.f32 %f423, 0f3C08839E;
mov.f32 %f424, 0fB94CA1F9;
fma.rn.f32 %f948, %f424, %f862, %f423;
bra.uni BB0_28;
BB0_26:
mul.rn.f32 %f858, %f947, %f947;
mov.f32 %f421, 0fBAB6061A;
mov.f32 %f422, 0f37CCF5CE;
fma.rn.f32 %f948, %f422, %f858, %f421;
BB0_28:
@%p27 bra BB0_30;
bra.uni BB0_29;
BB0_30:
mul.rn.f32 %f861, %f947, %f947;
mov.f32 %f857, 0f00000000;
mov.f32 %f428, 0fBE2AAAA3;
fma.rn.f32 %f429, %f948, %f861, %f428;
fma.rn.f32 %f949, %f429, %f861, %f857;
bra.uni BB0_31;
BB0_29:
mul.rn.f32 %f859, %f947, %f947;
mov.f32 %f425, 0f3D2AAAA5;
fma.rn.f32 %f426, %f948, %f859, %f425;
mov.f32 %f427, 0fBF000000;
fma.rn.f32 %f949, %f426, %f859, %f427;
BB0_31:
fma.rn.f32 %f950, %f949, %f947, %f947;
@%p27 bra BB0_33;
mul.rn.f32 %f860, %f947, %f947;
mov.f32 %f845, 0f3F800000;
fma.rn.f32 %f950, %f949, %f860, %f845;
BB0_33:
add.s32 %r364, %r391, 1;
and.b32 %r192, %r364, 2;
setp.eq.s32 %p30, %r192, 0;
@%p30 bra BB0_35;
mov.f32 %f846, 0f00000000;
mov.f32 %f433, 0fBF800000;
fma.rn.f32 %f950, %f950, %f433, %f846;
BB0_35:
abs.f32 %f847, %f952;
setp.neu.f32 %p112, %f847, 0f7F800000;
@%p112 bra BB0_37;
mov.f32 %f856, 0f00000000;
mul.rn.f32 %f952, %f952, %f856;
BB0_37:
mov.f32 %f850, 0f27C234C5;
mov.f32 %f849, 0f33A22168;
mov.f32 %f848, 0f3FC90FDA;
mul.f32 %f435, %f952, 0f3F22F983;
cvt.rni.s32.f32 %r401, %f435;
cvt.rn.f32.s32 %f436, %r401;
neg.f32 %f437, %f436;
fma.rn.f32 %f439, %f437, %f848, %f952;
fma.rn.f32 %f441, %f437, %f849, %f439;
fma.rn.f32 %f953, %f437, %f850, %f441;
abs.f32 %f443, %f952;
setp.leu.f32 %p32, %f443, 0f47CE4780;
@%p32 bra BB0_48;
mov.u64 %rd283, 0;
add.u64 %rd76, %SP, 12;
cvta.to.local.u64 %rd282, %rd76;
mov.b32 %r55, %f952;
shl.b32 %r195, %r55, 8;
or.b32 %r57, %r195, -2147483648;
mov.u32 %r392, 0;
mov.u32 %r393, %r392;
BB0_39:
.pragma "nounroll";
add.u64 %rd264, %SP, 12;
cvta.to.local.u64 %rd263, %rd264;
shl.b64 %rd77, %rd283, 2;
mov.u64 %rd78, __cudart_i2opi_f;
add.s64 %rd79, %rd78, %rd77;
ld.const.u32 %r198, [%rd79];
// inline asm
{
mad.lo.cc.u32 %r196, %r198, %r57, %r393;
madc.hi.u32 %r393, %r198, %r57, 0;
}
// inline asm
st.local.u32 [%rd282], %r196;
add.s32 %r392, %r392, 1;
cvt.s64.s32 %rd283, %r392;
mul.wide.s32 %rd80, %r392, 4;
add.s64 %rd282, %rd263, %rd80;
setp.ne.s32 %p33, %r392, 6;
@%p33 bra BB0_39;
mov.b32 %r366, %f952;
shr.u32 %r365, %r366, 23;
add.u64 %rd265, %SP, 12;
and.b32 %r201, %r365, 255;
add.s32 %r202, %r201, -128;
shr.u32 %r203, %r202, 5;
cvta.to.local.u64 %rd82, %rd265;
st.local.u32 [%rd82+24], %r393;
mov.u32 %r204, 6;
sub.s32 %r205, %r204, %r203;
mul.wide.s32 %rd83, %r205, 4;
add.s64 %rd17, %rd82, %rd83;
ld.local.u32 %r394, [%rd17];
ld.local.u32 %r395, [%rd17+-4];
and.b32 %r65, %r365, 31;
setp.eq.s32 %p34, %r65, 0;
@%p34 bra BB0_42;
mov.u32 %r206, 32;
sub.s32 %r207, %r206, %r65;
shr.u32 %r208, %r395, %r207;
shl.b32 %r209, %r394, %r65;
add.s32 %r394, %r208, %r209;
ld.local.u32 %r210, [%rd17+-8];
shr.u32 %r211, %r210, %r207;
shl.b32 %r212, %r395, %r65;
add.s32 %r395, %r211, %r212;
BB0_42:
mov.b32 %r369, %f952;
and.b32 %r397, %r369, -2147483648;
shr.u32 %r213, %r395, 30;
shl.b32 %r214, %r394, 2;
add.s32 %r396, %r213, %r214;
shl.b32 %r71, %r395, 2;
shr.u32 %r215, %r396, 31;
shr.u32 %r216, %r394, 30;
add.s32 %r72, %r215, %r216;
setp.eq.s32 %p35, %r215, 0;
@%p35 bra BB0_43;
bra.uni BB0_44;
BB0_43:
mov.u32 %r398, %r71;
bra.uni BB0_45;
BB0_44:
mov.b32 %r371, %f952;
and.b32 %r370, %r371, -2147483648;
not.b32 %r217, %r396;
neg.s32 %r398, %r71;
setp.eq.s32 %p36, %r71, 0;
selp.u32 %r218, 1, 0, %p36;
add.s32 %r396, %r218, %r217;
xor.b32 %r397, %r370, -2147483648;
BB0_45:
mov.b32 %r373, %f952;
and.b32 %r372, %r373, -2147483648;
clz.b32 %r400, %r396;
setp.eq.s32 %p37, %r400, 0;
shl.b32 %r219, %r396, %r400;
mov.u32 %r220, 32;
sub.s32 %r221, %r220, %r400;
shr.u32 %r222, %r398, %r221;
add.s32 %r223, %r222, %r219;
selp.b32 %r80, %r396, %r223, %p37;
mov.u32 %r224, -921707870;
mul.hi.u32 %r399, %r80, %r224;
setp.eq.s32 %p38, %r372, 0;
neg.s32 %r225, %r72;
selp.b32 %r401, %r72, %r225, %p38;
setp.lt.s32 %p39, %r399, 1;
@%p39 bra BB0_47;
mul.lo.s32 %r226, %r80, -921707870;
shr.u32 %r227, %r226, 31;
shl.b32 %r228, %r399, 1;
add.s32 %r399, %r227, %r228;
add.s32 %r400, %r400, 1;
BB0_47:
mov.u32 %r229, 126;
sub.s32 %r230, %r229, %r400;
shl.b32 %r231, %r230, 23;
add.s32 %r232, %r399, 1;
shr.u32 %r233, %r232, 7;
add.s32 %r234, %r233, 1;
shr.u32 %r235, %r234, 1;
add.s32 %r236, %r235, %r231;
or.b32 %r237, %r236, %r397;
mov.b32 %f953, %r237;
BB0_48:
and.b32 %r88, %r401, 1;
setp.eq.s32 %p40, %r88, 0;
@%p40 bra BB0_50;
bra.uni BB0_49;
BB0_50:
mul.rn.f32 %f867, %f953, %f953;
mov.f32 %f446, 0f3C08839E;
mov.f32 %f447, 0fB94CA1F9;
fma.rn.f32 %f954, %f447, %f867, %f446;
bra.uni BB0_51;
BB0_49:
mul.rn.f32 %f863, %f953, %f953;
mov.f32 %f444, 0fBAB6061A;
mov.f32 %f445, 0f37CCF5CE;
fma.rn.f32 %f954, %f445, %f863, %f444;
BB0_51:
@%p40 bra BB0_53;
bra.uni BB0_52;
BB0_53:
mul.rn.f32 %f866, %f953, %f953;
mov.f32 %f855, 0f00000000;
mov.f32 %f451, 0fBE2AAAA3;
fma.rn.f32 %f452, %f954, %f866, %f451;
fma.rn.f32 %f955, %f452, %f866, %f855;
bra.uni BB0_54;
BB0_52:
mul.rn.f32 %f864, %f953, %f953;
mov.f32 %f448, 0f3D2AAAA5;
fma.rn.f32 %f449, %f954, %f864, %f448;
mov.f32 %f450, 0fBF000000;
fma.rn.f32 %f955, %f449, %f864, %f450;
BB0_54:
fma.rn.f32 %f956, %f955, %f953, %f953;
@%p40 bra BB0_56;
mul.rn.f32 %f865, %f953, %f953;
mov.f32 %f851, 0f3F800000;
fma.rn.f32 %f956, %f955, %f865, %f851;
BB0_56:
and.b32 %r238, %r401, 2;
setp.eq.s32 %p43, %r238, 0;
@%p43 bra BB0_58;
mov.f32 %f852, 0f00000000;
mov.f32 %f456, 0fBF800000;
fma.rn.f32 %f956, %f956, %f456, %f852;
BB0_58:
mul.f32 %f457, %f76, %f950;
mul.f32 %f458, %f76, %f956;
mul.f32 %f459, %f10, %f458;
mul.f32 %f460, %f11, %f458;
mul.f32 %f461, %f12, %f458;
fma.rn.f32 %f462, %f47, %f457, %f459;
fma.rn.f32 %f463, %f48, %f457, %f460;
fma.rn.f32 %f464, %f49, %f457, %f461;
fma.rn.f32 %f113, %f910, %f75, %f462;
fma.rn.f32 %f114, %f911, %f75, %f463;
fma.rn.f32 %f115, %f912, %f75, %f464;
setp.gt.f32 %p44, %f114, 0f00000000;
setp.eq.s32 %p45, %r5, 0;
or.pred %p46, %p45, %p44;
@!%p46 bra BB0_60;
bra.uni BB0_59;
BB0_59:
add.u64 %rd84, %SP, 0;
cvta.to.local.u64 %rd85, %rd84;
max.f32 %f471, %f477, %f250;
mov.u32 %r242, 1065353216;
st.local.u32 [%rd85+8], %r242;
st.local.u32 [%rd85+4], %r242;
st.local.u32 [%rd85], %r242;
ld.global.u32 %r239, [root];
mov.u32 %r240, 1;
mov.f32 %f472, 0f6C4ECB8F;
// inline asm
call _rt_trace_64, (%r239, %f7, %f8, %f9, %f113, %f114, %f115, %r240, %f471, %f472, %rd84, %r113);
// inline asm
mul.f32 %f479, %f22, %f114;
fma.rn.f32 %f480, %f20, %f113, %f479;
fma.rn.f32 %f481, %f24, %f115, %f480;
cvt.sat.f32.f32 %f482, %f481;
ld.local.f32 %f483, [%rd85];
ld.local.f32 %f484, [%rd85+4];
ld.local.f32 %f485, [%rd85+8];
fma.rn.f32 %f964, %f482, %f483, %f964;
fma.rn.f32 %f965, %f482, %f484, %f965;
fma.rn.f32 %f966, %f482, %f485, %f966;
mul.f32 %f486, %f32, %f114;
fma.rn.f32 %f487, %f31, %f113, %f486;
fma.rn.f32 %f488, %f33, %f115, %f487;
cvt.sat.f32.f32 %f489, %f488;
fma.rn.f32 %f961, %f489, %f483, %f961;
fma.rn.f32 %f962, %f489, %f484, %f962;
fma.rn.f32 %f963, %f489, %f485, %f963;
mul.f32 %f490, %f41, %f114;
fma.rn.f32 %f491, %f40, %f113, %f490;
fma.rn.f32 %f492, %f42, %f115, %f491;
cvt.sat.f32.f32 %f493, %f492;
fma.rn.f32 %f958, %f493, %f483, %f958;
fma.rn.f32 %f959, %f493, %f484, %f959;
fma.rn.f32 %f960, %f493, %f485, %f960;
mul.f32 %f494, %f911, %f114;
fma.rn.f32 %f495, %f910, %f113, %f494;
fma.rn.f32 %f496, %f912, %f115, %f495;
cvt.sat.f32.f32 %f497, %f496;
fma.rn.f32 %f967, %f497, %f483, %f967;
fma.rn.f32 %f968, %f497, %f484, %f968;
fma.rn.f32 %f969, %f497, %f485, %f969;
BB0_60:
mad.lo.s32 %r345, %r16, 1664525, 1013904223;
mad.lo.s32 %r381, %r345, 1664525, 1013904223;
add.s32 %r380, %r380, 1;
setp.lt.s32 %p47, %r380, %r1;
@%p47 bra BB0_12;
mad.lo.s32 %r347, %r16, 1664525, 1013904223;
mad.lo.s32 %r381, %r347, 1664525, 1013904223;
add.s32 %r378, %r378, 1;
setp.lt.s32 %p48, %r378, %r1;
@%p48 bra BB0_11;
BB0_62:
mul.lo.s32 %r243, %r1, %r1;
cvt.rn.f32.s32 %f498, %r243;
rcp.rn.f32 %f499, %f498;
mul.f32 %f500, %f967, %f499;
mul.f32 %f501, %f968, %f499;
mul.f32 %f502, %f969, %f499;
mul.f32 %f152, %f964, %f499;
mul.f32 %f153, %f965, %f499;
mul.f32 %f154, %f966, %f499;
mul.f32 %f155, %f961, %f499;
mul.f32 %f156, %f962, %f499;
mul.f32 %f157, %f963, %f499;
mul.f32 %f158, %f958, %f499;
mul.f32 %f159, %f959, %f499;
mul.f32 %f160, %f960, %f499;
fma.rn.f32 %f161, %f967, %f499, %f500;
fma.rn.f32 %f162, %f968, %f499, %f501;
fma.rn.f32 %f163, %f969, %f499, %f502;
ld.global.f32 %f503, [skyColor];
mul.f32 %f164, %f503, %f161;
ld.global.f32 %f504, [skyColor+4];
mul.f32 %f165, %f504, %f162;
ld.global.f32 %f505, [skyColor+8];
mul.f32 %f166, %f163, %f505;
ld.global.u32 %r402, [imageEnabled];
and.b32 %r244, %r402, 1;
setp.eq.b32 %p49, %r244, 1;
@!%p49 bra BB0_97;
bra.uni BB0_63;
BB0_63:
abs.f32 %f168, %f164;
setp.lt.f32 %p50, %f168, 0f00800000;
mul.f32 %f511, %f168, 0f4B800000;
selp.f32 %f512, 0fC3170000, 0fC2FE0000, %p50;
selp.f32 %f513, %f511, %f168, %p50;
mov.b32 %r245, %f513;
and.b32 %r246, %r245, 8388607;
or.b32 %r247, %r246, 1065353216;
mov.b32 %f514, %r247;
shr.u32 %r248, %r245, 23;
cvt.rn.f32.u32 %f515, %r248;
add.f32 %f516, %f512, %f515;
setp.gt.f32 %p51, %f514, 0f3FB504F3;
mul.f32 %f517, %f514, 0f3F000000;
add.f32 %f518, %f516, 0f3F800000;
selp.f32 %f519, %f517, %f514, %p51;
selp.f32 %f520, %f518, %f516, %p51;
add.f32 %f521, %f519, 0fBF800000;
add.f32 %f507, %f519, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f506,%f507;
// inline asm
add.f32 %f522, %f521, %f521;
mul.f32 %f523, %f506, %f522;
mul.f32 %f524, %f523, %f523;
mov.f32 %f525, 0f3C4CAF63;
mov.f32 %f526, 0f3B18F0FE;
fma.rn.f32 %f527, %f526, %f524, %f525;
mov.f32 %f528, 0f3DAAAABD;
fma.rn.f32 %f529, %f527, %f524, %f528;
mul.rn.f32 %f530, %f529, %f524;
mul.rn.f32 %f531, %f530, %f523;
sub.f32 %f532, %f521, %f523;
neg.f32 %f533, %f523;
add.f32 %f534, %f532, %f532;
fma.rn.f32 %f535, %f533, %f521, %f534;
mul.rn.f32 %f536, %f506, %f535;
add.f32 %f537, %f531, %f523;
sub.f32 %f538, %f523, %f537;
add.f32 %f539, %f531, %f538;
add.f32 %f540, %f536, %f539;
add.f32 %f541, %f537, %f540;
sub.f32 %f542, %f537, %f541;
add.f32 %f543, %f540, %f542;
mov.f32 %f544, 0f3F317200;
mul.rn.f32 %f545, %f520, %f544;
mov.f32 %f546, 0f35BFBE8E;
mul.rn.f32 %f547, %f520, %f546;
add.f32 %f548, %f545, %f541;
sub.f32 %f549, %f545, %f548;
add.f32 %f550, %f541, %f549;
add.f32 %f551, %f543, %f550;
add.f32 %f552, %f547, %f551;
add.f32 %f553, %f548, %f552;
sub.f32 %f554, %f548, %f553;
add.f32 %f555, %f552, %f554;
mov.f32 %f556, 0f3EE66666;
mul.rn.f32 %f557, %f556, %f553;
neg.f32 %f558, %f557;
fma.rn.f32 %f559, %f556, %f553, %f558;
fma.rn.f32 %f560, %f556, %f555, %f559;
mov.f32 %f561, 0f00000000;
fma.rn.f32 %f562, %f561, %f553, %f560;
add.rn.f32 %f563, %f557, %f562;
neg.f32 %f564, %f563;
add.rn.f32 %f565, %f557, %f564;
add.rn.f32 %f566, %f565, %f562;
mov.b32 %r249, %f563;
setp.eq.s32 %p52, %r249, 1118925336;
add.s32 %r250, %r249, -1;
mov.b32 %f567, %r250;
add.f32 %f568, %f566, 0f37000000;
selp.f32 %f569, %f567, %f563, %p52;
selp.f32 %f169, %f568, %f566, %p52;
mul.f32 %f570, %f569, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f571, %f570;
mov.f32 %f572, 0fBF317200;
fma.rn.f32 %f573, %f571, %f572, %f569;
mov.f32 %f574, 0fB5BFBE8E;
fma.rn.f32 %f575, %f571, %f574, %f573;
mul.f32 %f576, %f575, 0f3FB8AA3B;
ex2.approx.ftz.f32 %f577, %f576;
add.f32 %f578, %f571, 0f00000000;
ex2.approx.f32 %f579, %f578;
mul.f32 %f580, %f577, %f579;
setp.lt.f32 %p53, %f569, 0fC2D20000;
selp.f32 %f581, 0f00000000, %f580, %p53;
setp.gt.f32 %p54, %f569, 0f42D20000;
selp.f32 %f982, 0f7F800000, %f581, %p54;
setp.eq.f32 %p55, %f982, 0f7F800000;
@%p55 bra BB0_65;
fma.rn.f32 %f982, %f982, %f169, %f982;
BB0_65:
mov.f32 %f871, 0f3E666666;
cvt.rzi.f32.f32 %f870, %f871;
fma.rn.f32 %f869, %f870, 0fC0000000, 0f3EE66666;
abs.f32 %f868, %f869;
setp.lt.f32 %p56, %f164, 0f00000000;
setp.eq.f32 %p57, %f868, 0f3F800000;
and.pred %p1, %p56, %p57;
mov.b32 %r251, %f982;
xor.b32 %r252, %r251, -2147483648;
mov.b32 %f582, %r252;
selp.f32 %f984, %f582, %f982, %p1;
setp.eq.f32 %p58, %f164, 0f00000000;
@%p58 bra BB0_68;
bra.uni BB0_66;
BB0_68:
add.f32 %f585, %f164, %f164;
selp.f32 %f984, %f585, 0f00000000, %p57;
bra.uni BB0_69;
BB0_115:
mov.u64 %rd199, image_HDR;
cvta.global.u64 %rd194, %rd199;
mov.u32 %r316, 8;
mov.u64 %rd198, 0;
// inline asm
call (%rd193), _rt_buffer_get_64, (%rd194, %r97, %r316, %rd20, %rd21, %rd198, %rd198);
// inline asm
mov.f32 %f823, 0f00000000;
// inline asm
{ cvt.rn.f16.f32 %rs112, %f823;}
// inline asm
mov.u16 %rs113, 0;
st.v4.u16 [%rd193], {%rs112, %rs112, %rs112, %rs113};
BB0_116:
ld.global.u32 %r317, [additive];
setp.eq.s32 %p109, %r317, 0;
@%p109 bra BB0_118;
mov.u64 %rd212, image_RNM0;
cvta.global.u64 %rd201, %rd212;
mov.u32 %r321, 8;
mov.u64 %rd211, 0;
// inline asm
call (%rd200), _rt_buffer_get_64, (%rd201, %r97, %r321, %rd20, %rd21, %rd211, %rd211);
// inline asm
ld.v4.u16 {%rs120, %rs121, %rs122, %rs123}, [%rd200];
// inline asm
{ cvt.f32.f16 %f824, %rs120;}
// inline asm
// inline asm
{ cvt.f32.f16 %f825, %rs121;}
// inline asm
// inline asm
{ cvt.f32.f16 %f826, %rs122;}
// inline asm
// inline asm
call (%rd206), _rt_buffer_get_64, (%rd201, %r97, %r321, %rd20, %rd21, %rd211, %rd211);
// inline asm
add.f32 %f827, %f824, 0f00000000;
add.f32 %f828, %f825, 0f00000000;
add.f32 %f829, %f826, 0f00000000;
// inline asm
{ cvt.rn.f16.f32 %rs119, %f829;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs118, %f828;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs117, %f827;}
// inline asm
mov.u16 %rs124, 0;
st.v4.u16 [%rd206], {%rs117, %rs118, %rs119, %rs124};
bra.uni BB0_119;
BB0_118:
mov.u64 %rd219, image_RNM0;
cvta.global.u64 %rd214, %rd219;
mov.u32 %r323, 8;
mov.u64 %rd218, 0;
// inline asm
call (%rd213), _rt_buffer_get_64, (%rd214, %r97, %r323, %rd20, %rd21, %rd218, %rd218);
// inline asm
mov.f32 %f830, 0f00000000;
// inline asm
{ cvt.rn.f16.f32 %rs125, %f830;}
// inline asm
mov.u16 %rs126, 0;
st.v4.u16 [%rd213], {%rs125, %rs125, %rs125, %rs126};
BB0_119:
ld.global.u32 %r324, [additive];
setp.eq.s32 %p110, %r324, 0;
@%p110 bra BB0_121;
mov.u64 %rd232, image_RNM1;
cvta.global.u64 %rd221, %rd232;
mov.u32 %r328, 8;
mov.u64 %rd231, 0;
// inline asm
call (%rd220), _rt_buffer_get_64, (%rd221, %r97, %r328, %rd20, %rd21, %rd231, %rd231);
// inline asm
ld.v4.u16 {%rs133, %rs134, %rs135, %rs136}, [%rd220];
// inline asm
{ cvt.f32.f16 %f831, %rs133;}
// inline asm
// inline asm
{ cvt.f32.f16 %f832, %rs134;}
// inline asm
// inline asm
{ cvt.f32.f16 %f833, %rs135;}
// inline asm
// inline asm
call (%rd226), _rt_buffer_get_64, (%rd221, %r97, %r328, %rd20, %rd21, %rd231, %rd231);
// inline asm
add.f32 %f834, %f831, 0f00000000;
add.f32 %f835, %f832, 0f00000000;
add.f32 %f836, %f833, 0f00000000;
// inline asm
{ cvt.rn.f16.f32 %rs132, %f836;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs131, %f835;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs130, %f834;}
// inline asm
mov.u16 %rs137, 0;
st.v4.u16 [%rd226], {%rs130, %rs131, %rs132, %rs137};
bra.uni BB0_122;
BB0_121:
mov.u64 %rd239, image_RNM1;
cvta.global.u64 %rd234, %rd239;
mov.u32 %r330, 8;
mov.u64 %rd238, 0;
// inline asm
call (%rd233), _rt_buffer_get_64, (%rd234, %r97, %r330, %rd20, %rd21, %rd238, %rd238);
// inline asm
mov.f32 %f837, 0f00000000;
// inline asm
{ cvt.rn.f16.f32 %rs138, %f837;}
// inline asm
mov.u16 %rs139, 0;
st.v4.u16 [%rd233], {%rs138, %rs138, %rs138, %rs139};
BB0_122:
ld.global.u32 %r331, [additive];
setp.eq.s32 %p111, %r331, 0;
@%p111 bra BB0_124;
mov.u64 %rd252, image_RNM2;
cvta.global.u64 %rd241, %rd252;
mov.u32 %r335, 8;
mov.u64 %rd251, 0;
// inline asm
call (%rd240), _rt_buffer_get_64, (%rd241, %r97, %r335, %rd20, %rd21, %rd251, %rd251);
// inline asm
ld.v4.u16 {%rs146, %rs147, %rs148, %rs149}, [%rd240];
// inline asm
{ cvt.f32.f16 %f838, %rs146;}
// inline asm
// inline asm
{ cvt.f32.f16 %f839, %rs147;}
// inline asm
// inline asm
{ cvt.f32.f16 %f840, %rs148;}
// inline asm
// inline asm
call (%rd246), _rt_buffer_get_64, (%rd241, %r97, %r335, %rd20, %rd21, %rd251, %rd251);
// inline asm
add.f32 %f841, %f838, 0f00000000;
add.f32 %f842, %f839, 0f00000000;
add.f32 %f843, %f840, 0f00000000;
// inline asm
{ cvt.rn.f16.f32 %rs145, %f843;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs144, %f842;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs143, %f841;}
// inline asm
mov.u16 %rs150, 0;
st.v4.u16 [%rd246], {%rs143, %rs144, %rs145, %rs150};
bra.uni BB0_125;
BB0_124:
mov.u64 %rd259, image_RNM2;
cvta.global.u64 %rd254, %rd259;
mov.u32 %r337, 8;
mov.u64 %rd258, 0;
// inline asm
call (%rd253), _rt_buffer_get_64, (%rd254, %r97, %r337, %rd20, %rd21, %rd258, %rd258);
// inline asm
mov.f32 %f844, 0f00000000;
// inline asm
{ cvt.rn.f16.f32 %rs151, %f844;}
// inline asm
mov.u16 %rs152, 0;
st.v4.u16 [%rd253], {%rs151, %rs151, %rs151, %rs152};
bra.uni BB0_125;
BB0_66:
setp.geu.f32 %p59, %f164, 0f00000000;
@%p59 bra BB0_69;
mov.f32 %f895, 0f3EE66666;
cvt.rzi.f32.f32 %f584, %f895;
setp.neu.f32 %p60, %f584, 0f3EE66666;
selp.f32 %f984, 0f7FFFFFFF, %f984, %p60;
BB0_69:
abs.f32 %f872, %f164;
add.f32 %f586, %f872, 0f3EE66666;
mov.b32 %r253, %f586;
setp.lt.s32 %p62, %r253, 2139095040;
@%p62 bra BB0_74;
abs.f32 %f893, %f164;
setp.gtu.f32 %p63, %f893, 0f7F800000;
@%p63 bra BB0_73;
bra.uni BB0_71;
BB0_73:
add.f32 %f984, %f164, 0f3EE66666;
bra.uni BB0_74;
BB0_71:
abs.f32 %f894, %f164;
setp.neu.f32 %p64, %f894, 0f7F800000;
@%p64 bra BB0_74;
selp.f32 %f984, 0fFF800000, 0f7F800000, %p1;
BB0_74:
mov.f32 %f881, 0fB5BFBE8E;
mov.f32 %f880, 0fBF317200;
mov.f32 %f879, 0f00000000;
mov.f32 %f878, 0f35BFBE8E;
mov.f32 %f877, 0f3F317200;
mov.f32 %f876, 0f3DAAAABD;
mov.f32 %f875, 0f3C4CAF63;
mov.f32 %f874, 0f3B18F0FE;
mov.f32 %f873, 0f3EE66666;
setp.eq.f32 %p65, %f164, 0f3F800000;
selp.f32 %f180, 0f3F800000, %f984, %p65;
abs.f32 %f181, %f165;
setp.lt.f32 %p66, %f181, 0f00800000;
mul.f32 %f589, %f181, 0f4B800000;
selp.f32 %f590, 0fC3170000, 0fC2FE0000, %p66;
selp.f32 %f591, %f589, %f181, %p66;
mov.b32 %r254, %f591;
and.b32 %r255, %r254, 8388607;
or.b32 %r256, %r255, 1065353216;
mov.b32 %f592, %r256;
shr.u32 %r257, %r254, 23;
cvt.rn.f32.u32 %f593, %r257;
add.f32 %f594, %f590, %f593;
setp.gt.f32 %p67, %f592, 0f3FB504F3;
mul.f32 %f595, %f592, 0f3F000000;
add.f32 %f596, %f594, 0f3F800000;
selp.f32 %f597, %f595, %f592, %p67;
selp.f32 %f598, %f596, %f594, %p67;
add.f32 %f599, %f597, 0fBF800000;
add.f32 %f588, %f597, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f587,%f588;
// inline asm
add.f32 %f600, %f599, %f599;
mul.f32 %f601, %f587, %f600;
mul.f32 %f602, %f601, %f601;
fma.rn.f32 %f605, %f874, %f602, %f875;
fma.rn.f32 %f607, %f605, %f602, %f876;
mul.rn.f32 %f608, %f607, %f602;
mul.rn.f32 %f609, %f608, %f601;
sub.f32 %f610, %f599, %f601;
neg.f32 %f611, %f601;
add.f32 %f612, %f610, %f610;
fma.rn.f32 %f613, %f611, %f599, %f612;
mul.rn.f32 %f614, %f587, %f613;
add.f32 %f615, %f609, %f601;
sub.f32 %f616, %f601, %f615;
add.f32 %f617, %f609, %f616;
add.f32 %f618, %f614, %f617;
add.f32 %f619, %f615, %f618;
sub.f32 %f620, %f615, %f619;
add.f32 %f621, %f618, %f620;
mul.rn.f32 %f623, %f598, %f877;
mul.rn.f32 %f625, %f598, %f878;
add.f32 %f626, %f623, %f619;
sub.f32 %f627, %f623, %f626;
add.f32 %f628, %f619, %f627;
add.f32 %f629, %f621, %f628;
add.f32 %f630, %f625, %f629;
add.f32 %f631, %f626, %f630;
sub.f32 %f632, %f626, %f631;
add.f32 %f633, %f630, %f632;
mul.rn.f32 %f635, %f873, %f631;
neg.f32 %f636, %f635;
fma.rn.f32 %f637, %f873, %f631, %f636;
fma.rn.f32 %f638, %f873, %f633, %f637;
fma.rn.f32 %f640, %f879, %f631, %f638;
add.rn.f32 %f641, %f635, %f640;
neg.f32 %f642, %f641;
add.rn.f32 %f643, %f635, %f642;
add.rn.f32 %f644, %f643, %f640;
mov.b32 %r258, %f641;
setp.eq.s32 %p68, %r258, 1118925336;
add.s32 %r259, %r258, -1;
mov.b32 %f645, %r259;
add.f32 %f646, %f644, 0f37000000;
selp.f32 %f647, %f645, %f641, %p68;
selp.f32 %f182, %f646, %f644, %p68;
mul.f32 %f648, %f647, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f649, %f648;
fma.rn.f32 %f651, %f649, %f880, %f647;
fma.rn.f32 %f653, %f649, %f881, %f651;
mul.f32 %f654, %f653, 0f3FB8AA3B;
ex2.approx.ftz.f32 %f655, %f654;
add.f32 %f656, %f649, 0f00000000;
ex2.approx.f32 %f657, %f656;
mul.f32 %f658, %f655, %f657;
setp.lt.f32 %p69, %f647, 0fC2D20000;
selp.f32 %f659, 0f00000000, %f658, %p69;
setp.gt.f32 %p70, %f647, 0f42D20000;
selp.f32 %f985, 0f7F800000, %f659, %p70;
setp.eq.f32 %p71, %f985, 0f7F800000;
@%p71 bra BB0_76;
fma.rn.f32 %f985, %f985, %f182, %f985;
BB0_76:
setp.lt.f32 %p72, %f165, 0f00000000;
and.pred %p2, %p72, %p57;
mov.b32 %r260, %f985;
xor.b32 %r261, %r260, -2147483648;
mov.b32 %f660, %r261;
selp.f32 %f987, %f660, %f985, %p2;
setp.eq.f32 %p74, %f165, 0f00000000;
@%p74 bra BB0_79;
bra.uni BB0_77;
BB0_79:
add.f32 %f663, %f165, %f165;
selp.f32 %f987, %f663, 0f00000000, %p57;
bra.uni BB0_80;
BB0_77:
setp.geu.f32 %p75, %f165, 0f00000000;
@%p75 bra BB0_80;
mov.f32 %f892, 0f3EE66666;
cvt.rzi.f32.f32 %f662, %f892;
setp.neu.f32 %p76, %f662, 0f3EE66666;
selp.f32 %f987, 0f7FFFFFFF, %f987, %p76;
BB0_80:
abs.f32 %f896, %f165;
add.f32 %f664, %f896, 0f3EE66666;
mov.b32 %r262, %f664;
setp.lt.s32 %p78, %r262, 2139095040;
@%p78 bra BB0_85;
abs.f32 %f897, %f165;
setp.gtu.f32 %p79, %f897, 0f7F800000;
@%p79 bra BB0_84;
bra.uni BB0_82;
BB0_84:
add.f32 %f987, %f165, 0f3EE66666;
bra.uni BB0_85;
BB0_82:
abs.f32 %f898, %f165;
setp.neu.f32 %p80, %f898, 0f7F800000;
@%p80 bra BB0_85;
selp.f32 %f987, 0fFF800000, 0f7F800000, %p2;
BB0_85:
mov.f32 %f890, 0fB5BFBE8E;
mov.f32 %f889, 0fBF317200;
mov.f32 %f888, 0f00000000;
mov.f32 %f887, 0f35BFBE8E;
mov.f32 %f886, 0f3F317200;
mov.f32 %f885, 0f3DAAAABD;
mov.f32 %f884, 0f3C4CAF63;
mov.f32 %f883, 0f3B18F0FE;
mov.f32 %f882, 0f3EE66666;
setp.eq.f32 %p81, %f165, 0f3F800000;
selp.f32 %f193, 0f3F800000, %f987, %p81;
abs.f32 %f194, %f166;
setp.lt.f32 %p82, %f194, 0f00800000;
mul.f32 %f667, %f194, 0f4B800000;
selp.f32 %f668, 0fC3170000, 0fC2FE0000, %p82;
selp.f32 %f669, %f667, %f194, %p82;
mov.b32 %r263, %f669;
and.b32 %r264, %r263, 8388607;
or.b32 %r265, %r264, 1065353216;
mov.b32 %f670, %r265;
shr.u32 %r266, %r263, 23;
cvt.rn.f32.u32 %f671, %r266;
add.f32 %f672, %f668, %f671;
setp.gt.f32 %p83, %f670, 0f3FB504F3;
mul.f32 %f673, %f670, 0f3F000000;
add.f32 %f674, %f672, 0f3F800000;
selp.f32 %f675, %f673, %f670, %p83;
selp.f32 %f676, %f674, %f672, %p83;
add.f32 %f677, %f675, 0fBF800000;
add.f32 %f666, %f675, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f665,%f666;
// inline asm
add.f32 %f678, %f677, %f677;
mul.f32 %f679, %f665, %f678;
mul.f32 %f680, %f679, %f679;
fma.rn.f32 %f683, %f883, %f680, %f884;
fma.rn.f32 %f685, %f683, %f680, %f885;
mul.rn.f32 %f686, %f685, %f680;
mul.rn.f32 %f687, %f686, %f679;
sub.f32 %f688, %f677, %f679;
neg.f32 %f689, %f679;
add.f32 %f690, %f688, %f688;
fma.rn.f32 %f691, %f689, %f677, %f690;
mul.rn.f32 %f692, %f665, %f691;
add.f32 %f693, %f687, %f679;
sub.f32 %f694, %f679, %f693;
add.f32 %f695, %f687, %f694;
add.f32 %f696, %f692, %f695;
add.f32 %f697, %f693, %f696;
sub.f32 %f698, %f693, %f697;
add.f32 %f699, %f696, %f698;
mul.rn.f32 %f701, %f676, %f886;
mul.rn.f32 %f703, %f676, %f887;
add.f32 %f704, %f701, %f697;
sub.f32 %f705, %f701, %f704;
add.f32 %f706, %f697, %f705;
add.f32 %f707, %f699, %f706;
add.f32 %f708, %f703, %f707;
add.f32 %f709, %f704, %f708;
sub.f32 %f710, %f704, %f709;
add.f32 %f711, %f708, %f710;
mul.rn.f32 %f713, %f882, %f709;
neg.f32 %f714, %f713;
fma.rn.f32 %f715, %f882, %f709, %f714;
fma.rn.f32 %f716, %f882, %f711, %f715;
fma.rn.f32 %f718, %f888, %f709, %f716;
add.rn.f32 %f719, %f713, %f718;
neg.f32 %f720, %f719;
add.rn.f32 %f721, %f713, %f720;
add.rn.f32 %f722, %f721, %f718;
mov.b32 %r267, %f719;
setp.eq.s32 %p84, %r267, 1118925336;
add.s32 %r268, %r267, -1;
mov.b32 %f723, %r268;
add.f32 %f724, %f722, 0f37000000;
selp.f32 %f725, %f723, %f719, %p84;
selp.f32 %f195, %f724, %f722, %p84;
mul.f32 %f726, %f725, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f727, %f726;
fma.rn.f32 %f729, %f727, %f889, %f725;
fma.rn.f32 %f731, %f727, %f890, %f729;
mul.f32 %f732, %f731, 0f3FB8AA3B;
ex2.approx.ftz.f32 %f733, %f732;
add.f32 %f734, %f727, 0f00000000;
ex2.approx.f32 %f735, %f734;
mul.f32 %f736, %f733, %f735;
setp.lt.f32 %p85, %f725, 0fC2D20000;
selp.f32 %f737, 0f00000000, %f736, %p85;
setp.gt.f32 %p86, %f725, 0f42D20000;
selp.f32 %f988, 0f7F800000, %f737, %p86;
setp.eq.f32 %p87, %f988, 0f7F800000;
@%p87 bra BB0_87;
fma.rn.f32 %f988, %f988, %f195, %f988;
BB0_87:
setp.lt.f32 %p88, %f166, 0f00000000;
and.pred %p3, %p88, %p57;
mov.b32 %r269, %f988;
xor.b32 %r270, %r269, -2147483648;
mov.b32 %f738, %r270;
selp.f32 %f990, %f738, %f988, %p3;
setp.eq.f32 %p90, %f166, 0f00000000;
@%p90 bra BB0_90;
bra.uni BB0_88;
BB0_90:
add.f32 %f741, %f166, %f166;
selp.f32 %f990, %f741, 0f00000000, %p57;
bra.uni BB0_91;
BB0_88:
setp.geu.f32 %p91, %f166, 0f00000000;
@%p91 bra BB0_91;
mov.f32 %f891, 0f3EE66666;
cvt.rzi.f32.f32 %f740, %f891;
setp.neu.f32 %p92, %f740, 0f3EE66666;
selp.f32 %f990, 0f7FFFFFFF, %f990, %p92;
BB0_91:
abs.f32 %f907, %f166;
add.f32 %f742, %f907, 0f3EE66666;
mov.b32 %r271, %f742;
setp.lt.s32 %p94, %r271, 2139095040;
@%p94 bra BB0_96;
abs.f32 %f908, %f166;
setp.gtu.f32 %p95, %f908, 0f7F800000;
@%p95 bra BB0_95;
bra.uni BB0_93;
BB0_95:
add.f32 %f990, %f166, 0f3EE66666;
bra.uni BB0_96;
BB0_93:
abs.f32 %f909, %f166;
setp.neu.f32 %p96, %f909, 0f7F800000;
@%p96 bra BB0_96;
selp.f32 %f990, 0fFF800000, 0f7F800000, %p3;
BB0_96:
mov.u64 %rd266, 0;
mov.u32 %r355, 2;
mov.u32 %r348, 4;
setp.eq.f32 %p97, %f166, 0f3F800000;
selp.f32 %f743, 0f3F800000, %f990, %p97;
cvt.u64.u32 %rd89, %r4;
cvt.u64.u32 %rd88, %r3;
mov.u64 %rd92, image;
cvta.global.u64 %rd87, %rd92;
// inline asm
call (%rd86), _rt_buffer_get_64, (%rd87, %r355, %r348, %rd88, %rd89, %rd266, %rd266);
// inline asm
cvt.sat.f32.f32 %f744, %f743;
mul.f32 %f745, %f744, 0f437FFD71;
cvt.rzi.u32.f32 %r274, %f745;
cvt.sat.f32.f32 %f746, %f193;
mul.f32 %f747, %f746, 0f437FFD71;
cvt.rzi.u32.f32 %r275, %f747;
cvt.sat.f32.f32 %f748, %f180;
mul.f32 %f749, %f748, 0f437FFD71;
cvt.rzi.u32.f32 %r276, %f749;
cvt.u16.u32 %rs40, %r274;
cvt.u16.u32 %rs41, %r276;
cvt.u16.u32 %rs42, %r275;
mov.u16 %rs43, 255;
st.v4.u8 [%rd86], {%rs40, %rs42, %rs41, %rs43};
ld.global.u32 %r402, [imageEnabled];
BB0_97:
cvt.u64.u32 %rd18, %r3;
cvt.u64.u32 %rd19, %r4;
and.b32 %r277, %r402, 4;
setp.eq.s32 %p98, %r277, 0;
@%p98 bra BB0_101;
ld.global.u32 %r278, [additive];
setp.eq.s32 %p99, %r278, 0;
mov.f32 %f750, 0f3F800000;
// inline asm
{ cvt.rn.f16.f32 %rs44, %f750;}
// inline asm
@%p99 bra BB0_100;
mov.u64 %rd267, 0;
mov.u32 %r356, 2;
mov.u64 %rd105, image_HDR;
cvta.global.u64 %rd94, %rd105;
mov.u32 %r282, 8;
// inline asm
call (%rd93), _rt_buffer_get_64, (%rd94, %r356, %r282, %rd18, %rd19, %rd267, %rd267);
// inline asm
ld.v4.u16 {%rs51, %rs52, %rs53, %rs54}, [%rd93];
// inline asm
{ cvt.f32.f16 %f751, %rs51;}
// inline asm
// inline asm
{ cvt.f32.f16 %f752, %rs52;}
// inline asm
// inline asm
{ cvt.f32.f16 %f753, %rs53;}
// inline asm
// inline asm
call (%rd99), _rt_buffer_get_64, (%rd94, %r356, %r282, %rd18, %rd19, %rd267, %rd267);
// inline asm
add.f32 %f754, %f164, %f751;
add.f32 %f755, %f165, %f752;
add.f32 %f756, %f166, %f753;
// inline asm
{ cvt.rn.f16.f32 %rs50, %f756;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs49, %f755;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs48, %f754;}
// inline asm
st.v4.u16 [%rd99], {%rs48, %rs49, %rs50, %rs44};
bra.uni BB0_101;
BB0_100:
mov.u64 %rd268, 0;
mov.u32 %r357, 2;
mov.u64 %rd112, image_HDR;
cvta.global.u64 %rd107, %rd112;
mov.u32 %r284, 8;
// inline asm
call (%rd106), _rt_buffer_get_64, (%rd107, %r357, %r284, %rd18, %rd19, %rd268, %rd268);
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs57, %f166;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs56, %f165;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs55, %f164;}
// inline asm
st.v4.u16 [%rd106], {%rs55, %rs56, %rs57, %rs44};
BB0_101:
add.f32 %f761, %f152, %f155;
add.f32 %f762, %f158, %f761;
add.f32 %f763, %f153, %f156;
add.f32 %f764, %f159, %f763;
add.f32 %f765, %f154, %f157;
add.f32 %f766, %f160, %f765;
mul.f32 %f767, %f762, 0f3F13CD3A;
mul.f32 %f768, %f764, 0f3F13CD3A;
mul.f32 %f769, %f766, 0f3F13CD3A;
div.rn.f32 %f770, %f161, %f767;
div.rn.f32 %f771, %f162, %f768;
div.rn.f32 %f772, %f163, %f769;
setp.eq.f32 %p100, %f161, 0f00000000;
selp.f32 %f773, 0f00000000, %f770, %p100;
setp.eq.f32 %p101, %f162, 0f00000000;
selp.f32 %f774, 0f00000000, %f771, %p101;
setp.eq.f32 %p102, %f163, 0f00000000;
selp.f32 %f775, 0f00000000, %f772, %p102;
mul.f32 %f776, %f152, %f773;
mul.f32 %f777, %f153, %f774;
mul.f32 %f778, %f154, %f775;
mul.f32 %f779, %f155, %f773;
mul.f32 %f780, %f156, %f774;
mul.f32 %f781, %f157, %f775;
mul.f32 %f782, %f158, %f773;
mul.f32 %f783, %f159, %f774;
mul.f32 %f784, %f160, %f775;
ld.global.f32 %f785, [skyColor];
mul.f32 %f206, %f776, %f785;
ld.global.f32 %f786, [skyColor+4];
mul.f32 %f207, %f777, %f786;
ld.global.f32 %f787, [skyColor+8];
mul.f32 %f208, %f778, %f787;
mul.f32 %f209, %f779, %f785;
mul.f32 %f210, %f780, %f786;
mul.f32 %f211, %f781, %f787;
mul.f32 %f212, %f782, %f785;
mul.f32 %f213, %f783, %f786;
mul.f32 %f214, %f784, %f787;
ld.global.u32 %r285, [additive];
setp.eq.s32 %p103, %r285, 0;
mov.f32 %f760, 0f3F800000;
// inline asm
{ cvt.rn.f16.f32 %rs58, %f760;}
// inline asm
@%p103 bra BB0_103;
mov.u64 %rd269, 0;
mov.u32 %r358, 2;
mov.u64 %rd125, image_RNM0;
cvta.global.u64 %rd114, %rd125;
mov.u32 %r289, 8;
// inline asm
call (%rd113), _rt_buffer_get_64, (%rd114, %r358, %r289, %rd18, %rd19, %rd269, %rd269);
// inline asm
ld.v4.u16 {%rs65, %rs66, %rs67, %rs68}, [%rd113];
// inline asm
{ cvt.f32.f16 %f788, %rs65;}
// inline asm
// inline asm
{ cvt.f32.f16 %f789, %rs66;}
// inline asm
// inline asm
{ cvt.f32.f16 %f790, %rs67;}
// inline asm
// inline asm
call (%rd119), _rt_buffer_get_64, (%rd114, %r358, %r289, %rd18, %rd19, %rd269, %rd269);
// inline asm
add.f32 %f791, %f206, %f788;
add.f32 %f792, %f207, %f789;
add.f32 %f793, %f208, %f790;
// inline asm
{ cvt.rn.f16.f32 %rs64, %f793;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs63, %f792;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs62, %f791;}
// inline asm
st.v4.u16 [%rd119], {%rs62, %rs63, %rs64, %rs58};
bra.uni BB0_104;
BB0_103:
mov.u64 %rd274, 0;
mov.u32 %r363, 2;
mov.u64 %rd132, image_RNM0;
cvta.global.u64 %rd127, %rd132;
mov.u32 %r291, 8;
// inline asm
call (%rd126), _rt_buffer_get_64, (%rd127, %r363, %r291, %rd18, %rd19, %rd274, %rd274);
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs71, %f208;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs70, %f207;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs69, %f206;}
// inline asm
st.v4.u16 [%rd126], {%rs69, %rs70, %rs71, %rs58};
BB0_104:
ld.global.u32 %r292, [additive];
setp.eq.s32 %p104, %r292, 0;
// inline asm
{ cvt.rn.f16.f32 %rs72, %f760;}
// inline asm
@%p104 bra BB0_106;
mov.u64 %rd270, 0;
mov.u32 %r359, 2;
mov.u64 %rd145, image_RNM1;
cvta.global.u64 %rd134, %rd145;
mov.u32 %r296, 8;
// inline asm
call (%rd133), _rt_buffer_get_64, (%rd134, %r359, %r296, %rd18, %rd19, %rd270, %rd270);
// inline asm
ld.v4.u16 {%rs79, %rs80, %rs81, %rs82}, [%rd133];
// inline asm
{ cvt.f32.f16 %f798, %rs79;}
// inline asm
// inline asm
{ cvt.f32.f16 %f799, %rs80;}
// inline asm
// inline asm
{ cvt.f32.f16 %f800, %rs81;}
// inline asm
// inline asm
call (%rd139), _rt_buffer_get_64, (%rd134, %r359, %r296, %rd18, %rd19, %rd270, %rd270);
// inline asm
add.f32 %f801, %f209, %f798;
add.f32 %f802, %f210, %f799;
add.f32 %f803, %f211, %f800;
// inline asm
{ cvt.rn.f16.f32 %rs78, %f803;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs77, %f802;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs76, %f801;}
// inline asm
st.v4.u16 [%rd139], {%rs76, %rs77, %rs78, %rs72};
bra.uni BB0_107;
BB0_106:
mov.u64 %rd273, 0;
mov.u32 %r362, 2;
mov.u64 %rd152, image_RNM1;
cvta.global.u64 %rd147, %rd152;
mov.u32 %r298, 8;
// inline asm
call (%rd146), _rt_buffer_get_64, (%rd147, %r362, %r298, %rd18, %rd19, %rd273, %rd273);
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs85, %f211;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs84, %f210;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs83, %f209;}
// inline asm
st.v4.u16 [%rd146], {%rs83, %rs84, %rs85, %rs72};
BB0_107:
ld.global.u32 %r299, [additive];
setp.eq.s32 %p105, %r299, 0;
// inline asm
{ cvt.rn.f16.f32 %rs86, %f760;}
// inline asm
@%p105 bra BB0_109;
mov.u64 %rd271, 0;
mov.u32 %r360, 2;
mov.u64 %rd165, image_RNM2;
cvta.global.u64 %rd154, %rd165;
mov.u32 %r303, 8;
// inline asm
call (%rd153), _rt_buffer_get_64, (%rd154, %r360, %r303, %rd18, %rd19, %rd271, %rd271);
// inline asm
ld.v4.u16 {%rs93, %rs94, %rs95, %rs96}, [%rd153];
// inline asm
{ cvt.f32.f16 %f808, %rs93;}
// inline asm
// inline asm
{ cvt.f32.f16 %f809, %rs94;}
// inline asm
// inline asm
{ cvt.f32.f16 %f810, %rs95;}
// inline asm
// inline asm
call (%rd159), _rt_buffer_get_64, (%rd154, %r360, %r303, %rd18, %rd19, %rd271, %rd271);
// inline asm
add.f32 %f811, %f212, %f808;
add.f32 %f812, %f213, %f809;
add.f32 %f813, %f214, %f810;
// inline asm
{ cvt.rn.f16.f32 %rs92, %f813;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs91, %f812;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs90, %f811;}
// inline asm
st.v4.u16 [%rd159], {%rs90, %rs91, %rs92, %rs86};
bra.uni BB0_125;
BB0_109:
mov.u64 %rd272, 0;
mov.u32 %r361, 2;
mov.u64 %rd172, image_RNM2;
cvta.global.u64 %rd167, %rd172;
mov.u32 %r305, 8;
// inline asm
call (%rd166), _rt_buffer_get_64, (%rd167, %r361, %r305, %rd18, %rd19, %rd272, %rd272);
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs99, %f214;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs98, %f213;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs97, %f212;}
// inline asm
st.v4.u16 [%rd166], {%rs97, %rs98, %rs99, %rs86};
BB0_125:
ret;
}