2442 lines
69 KiB
Plaintext
2442 lines
69 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-23083092
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// Cuda compilation tools, release 9.1, V9.1.85
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// Based on LLVM 3.4svn
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//
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.version 6.1
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.target sm_30
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.address_size 64
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// .globl _Z6oxMainv
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.global .align 8 .b8 pixelID[8];
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.global .align 8 .b8 resolution[8];
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.global .align 4 .b8 normal[12];
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.global .align 4 .b8 camPos[12];
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.global .align 4 .b8 root[4];
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.global .align 4 .u32 imageEnabled;
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.global .texref lightmap;
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.global .align 16 .b8 tileInfo[16];
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.global .align 4 .u32 additive;
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.global .align 1 .b8 image[1];
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.global .align 1 .b8 image_HDR[1];
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.global .align 1 .b8 image_HDR2[1];
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.global .align 1 .b8 image_Mask[1];
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.global .align 1 .b8 image_RNM0[1];
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.global .align 1 .b8 image_RNM1[1];
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.global .align 1 .b8 image_RNM2[1];
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.global .align 1 .b8 uvtangent[1];
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.global .align 1 .b8 uvpos[1];
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.global .align 1 .b8 uvnormal[1];
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.global .align 1 .b8 rnd_seeds[1];
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.global .align 4 .b8 directDir[12];
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.global .align 4 .b8 directColor[12];
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.global .align 4 .f32 shadowSpread;
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.global .align 4 .u32 samples;
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.global .align 4 .u32 ignoreNormal;
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo9directDirE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo11directColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12shadowSpreadE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
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.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename9directDirE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename11directColorE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename12shadowSpreadE[6] = {102, 108, 111, 97, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
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.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum9directDirE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum11directColorE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12shadowSpreadE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
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.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
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.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic9directDirE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic11directColorE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12shadowSpreadE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation9directDirE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation11directColorE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12shadowSpreadE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
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.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
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.visible .entry _Z6oxMainv(
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)
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{
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.local .align 4 .b8 __local_depot0[40];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<148>;
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.reg .b16 %rs<157>;
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.reg .f32 %f<1140>;
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.reg .b32 %r<410>;
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.reg .b64 %rd<283>;
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mov.u64 %rd282, __local_depot0;
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cvta.local.u64 %SP, %rd282;
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ld.global.v2.u32 {%r107, %r108}, [pixelID];
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cvt.u64.u32 %rd28, %r107;
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cvt.u64.u32 %rd29, %r108;
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mov.u64 %rd32, uvnormal;
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cvta.global.u64 %rd27, %rd32;
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mov.u32 %r105, 2;
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mov.u32 %r106, 4;
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mov.u64 %rd31, 0;
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// inline asm
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call (%rd26), _rt_buffer_get_64, (%rd27, %r105, %r106, %rd28, %rd29, %rd31, %rd31);
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// inline asm
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ld.u32 %r1, [%rd26];
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shr.u32 %r111, %r1, 16;
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cvt.u16.u32 %rs1, %r111;
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and.b16 %rs6, %rs1, 255;
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cvt.u16.u32 %rs7, %r1;
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or.b16 %rs8, %rs7, %rs6;
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setp.eq.s16 %p6, %rs8, 0;
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mov.f32 %f1086, 0f00000000;
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mov.f32 %f1087, %f1086;
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mov.f32 %f1088, %f1086;
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@%p6 bra BB0_2;
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ld.u8 %rs9, [%rd26+1];
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and.b16 %rs11, %rs7, 255;
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cvt.rn.f32.u16 %f198, %rs11;
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div.rn.f32 %f199, %f198, 0f437F0000;
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fma.rn.f32 %f200, %f199, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f201, %rs9;
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div.rn.f32 %f202, %f201, 0f437F0000;
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fma.rn.f32 %f203, %f202, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f204, %rs6;
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div.rn.f32 %f205, %f204, 0f437F0000;
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fma.rn.f32 %f206, %f205, 0f40000000, 0fBF800000;
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mul.f32 %f207, %f203, %f203;
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fma.rn.f32 %f208, %f200, %f200, %f207;
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fma.rn.f32 %f209, %f206, %f206, %f208;
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sqrt.rn.f32 %f210, %f209;
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rcp.rn.f32 %f211, %f210;
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mul.f32 %f1086, %f200, %f211;
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mul.f32 %f1087, %f203, %f211;
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mul.f32 %f1088, %f206, %f211;
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BB0_2:
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ld.global.v2.u32 {%r112, %r113}, [pixelID];
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ld.global.v2.u32 {%r115, %r116}, [tileInfo];
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add.s32 %r2, %r112, %r115;
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add.s32 %r3, %r113, %r116;
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setp.eq.f32 %p7, %f1087, 0f00000000;
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setp.eq.f32 %p8, %f1086, 0f00000000;
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and.pred %p9, %p8, %p7;
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setp.eq.f32 %p10, %f1088, 0f00000000;
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and.pred %p11, %p9, %p10;
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@%p11 bra BB0_136;
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bra.uni BB0_3;
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BB0_136:
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ld.global.u32 %r409, [imageEnabled];
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and.b32 %r338, %r409, 1;
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setp.eq.b32 %p141, %r338, 1;
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@!%p141 bra BB0_138;
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bra.uni BB0_137;
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BB0_137:
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cvt.u64.u32 %rd186, %r2;
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cvt.u64.u32 %rd187, %r3;
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mov.u64 %rd190, image;
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cvta.global.u64 %rd185, %rd190;
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mov.u64 %rd189, 0;
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// inline asm
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call (%rd184), _rt_buffer_get_64, (%rd185, %r105, %r106, %rd186, %rd187, %rd189, %rd189);
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// inline asm
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mov.u16 %rs102, 0;
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st.v4.u8 [%rd184], {%rs102, %rs102, %rs102, %rs102};
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ld.global.u32 %r409, [imageEnabled];
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BB0_138:
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and.b32 %r341, %r409, 8;
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setp.eq.s32 %p142, %r341, 0;
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@%p142 bra BB0_140;
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cvt.u64.u32 %rd194, %r3;
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cvt.u64.u32 %rd193, %r2;
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mov.u64 %rd197, image_Mask;
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cvta.global.u64 %rd192, %rd197;
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mov.u64 %rd196, 0;
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// inline asm
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call (%rd191), _rt_buffer_get_64, (%rd192, %r105, %r105, %rd193, %rd194, %rd196, %rd196);
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// inline asm
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mov.f32 %f989, 0f00000000;
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cvt.rzi.u32.f32 %r344, %f989;
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cvt.u16.u32 %rs103, %r344;
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mov.u16 %rs104, 0;
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st.v2.u8 [%rd191], {%rs103, %rs104};
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ld.global.u32 %r409, [imageEnabled];
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BB0_140:
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cvt.u64.u32 %rd24, %r2;
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cvt.u64.u32 %rd25, %r3;
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and.b32 %r345, %r409, 4;
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setp.eq.s32 %p143, %r345, 0;
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@%p143 bra BB0_144;
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ld.global.u32 %r346, [additive];
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setp.eq.s32 %p144, %r346, 0;
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@%p144 bra BB0_143;
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mov.u64 %rd210, image_HDR;
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cvta.global.u64 %rd199, %rd210;
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mov.u32 %r350, 8;
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mov.u64 %rd209, 0;
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// inline asm
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call (%rd198), _rt_buffer_get_64, (%rd199, %r105, %r350, %rd24, %rd25, %rd209, %rd209);
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// inline asm
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ld.v4.u16 {%rs111, %rs112, %rs113, %rs114}, [%rd198];
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// inline asm
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{ cvt.f32.f16 %f990, %rs111;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f991, %rs112;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f992, %rs113;}
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// inline asm
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// inline asm
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call (%rd204), _rt_buffer_get_64, (%rd199, %r105, %r350, %rd24, %rd25, %rd209, %rd209);
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// inline asm
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add.f32 %f993, %f990, 0f00000000;
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add.f32 %f994, %f991, 0f00000000;
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add.f32 %f995, %f992, 0f00000000;
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// inline asm
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{ cvt.rn.f16.f32 %rs110, %f995;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs109, %f994;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs108, %f993;}
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// inline asm
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mov.u16 %rs115, 0;
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st.v4.u16 [%rd204], {%rs108, %rs109, %rs110, %rs115};
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bra.uni BB0_144;
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BB0_3:
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ld.global.f32 %f8, [directDir+4];
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ld.global.f32 %f9, [directDir+8];
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ld.global.f32 %f7, [directDir];
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ld.global.v2.u32 {%r124, %r125}, [pixelID];
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cvt.u64.u32 %rd35, %r124;
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cvt.u64.u32 %rd36, %r125;
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mov.u64 %rd45, uvpos;
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cvta.global.u64 %rd34, %rd45;
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mov.u32 %r121, 12;
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// inline asm
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call (%rd33), _rt_buffer_get_64, (%rd34, %r105, %r121, %rd35, %rd36, %rd31, %rd31);
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// inline asm
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ld.f32 %f215, [%rd33+8];
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ld.f32 %f216, [%rd33+4];
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ld.f32 %f217, [%rd33];
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mul.f32 %f218, %f217, 0f3456BF95;
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mul.f32 %f219, %f216, 0f3456BF95;
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mul.f32 %f220, %f215, 0f3456BF95;
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abs.f32 %f221, %f1086;
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div.rn.f32 %f222, %f218, %f221;
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abs.f32 %f223, %f1087;
|
|
div.rn.f32 %f224, %f219, %f223;
|
|
abs.f32 %f225, %f1088;
|
|
div.rn.f32 %f226, %f220, %f225;
|
|
abs.f32 %f227, %f222;
|
|
abs.f32 %f228, %f224;
|
|
abs.f32 %f229, %f226;
|
|
mov.f32 %f230, 0f38D1B717;
|
|
max.f32 %f231, %f227, %f230;
|
|
max.f32 %f232, %f228, %f230;
|
|
max.f32 %f233, %f229, %f230;
|
|
fma.rn.f32 %f10, %f1086, %f231, %f217;
|
|
fma.rn.f32 %f11, %f1087, %f232, %f216;
|
|
fma.rn.f32 %f12, %f1088, %f233, %f215;
|
|
abs.f32 %f234, %f7;
|
|
abs.f32 %f235, %f9;
|
|
setp.gt.f32 %p12, %f234, %f235;
|
|
neg.f32 %f236, %f8;
|
|
neg.f32 %f237, %f9;
|
|
selp.f32 %f238, %f236, 0f00000000, %p12;
|
|
selp.f32 %f239, %f7, %f237, %p12;
|
|
selp.f32 %f240, 0f00000000, %f8, %p12;
|
|
mul.f32 %f241, %f239, %f239;
|
|
fma.rn.f32 %f242, %f238, %f238, %f241;
|
|
fma.rn.f32 %f243, %f240, %f240, %f242;
|
|
sqrt.rn.f32 %f244, %f243;
|
|
rcp.rn.f32 %f245, %f244;
|
|
mul.f32 %f13, %f238, %f245;
|
|
mul.f32 %f14, %f239, %f245;
|
|
mul.f32 %f15, %f240, %f245;
|
|
ld.global.v2.u32 {%r128, %r129}, [pixelID];
|
|
cvt.u64.u32 %rd41, %r128;
|
|
cvt.u64.u32 %rd42, %r129;
|
|
mov.u64 %rd46, rnd_seeds;
|
|
cvta.global.u64 %rd40, %rd46;
|
|
// inline asm
|
|
call (%rd39), _rt_buffer_get_64, (%rd40, %r105, %r106, %rd41, %rd42, %rd31, %rd31);
|
|
// inline asm
|
|
ld.global.u32 %r378, [samples];
|
|
mov.f32 %f1107, 0f00000000;
|
|
setp.lt.s32 %p13, %r378, 1;
|
|
@%p13 bra BB0_4;
|
|
|
|
cvt.rn.f32.s32 %f249, %r378;
|
|
rcp.rn.f32 %f16, %f249;
|
|
ld.u32 %r404, [%rd39];
|
|
mul.f32 %f17, %f10, 0f3456BF95;
|
|
mul.f32 %f18, %f11, 0f3456BF95;
|
|
mul.f32 %f19, %f12, 0f3456BF95;
|
|
mul.f32 %f250, %f7, %f14;
|
|
mul.f32 %f251, %f8, %f13;
|
|
sub.f32 %f20, %f251, %f250;
|
|
mul.f32 %f252, %f9, %f13;
|
|
mul.f32 %f253, %f7, %f15;
|
|
sub.f32 %f21, %f253, %f252;
|
|
mul.f32 %f254, %f8, %f15;
|
|
mul.f32 %f255, %f9, %f14;
|
|
sub.f32 %f22, %f255, %f254;
|
|
mov.f32 %f1107, 0f00000000;
|
|
mov.u32 %r379, 0;
|
|
abs.f32 %f256, %f18;
|
|
abs.f32 %f257, %f17;
|
|
max.f32 %f258, %f257, %f256;
|
|
abs.f32 %f259, %f19;
|
|
max.f32 %f260, %f258, %f259;
|
|
mov.f32 %f1108, %f1107;
|
|
mov.f32 %f1109, %f1107;
|
|
|
|
BB0_6:
|
|
setp.lt.s32 %p14, %r378, 1;
|
|
@%p14 bra BB0_55;
|
|
|
|
cvt.rn.f32.s32 %f26, %r379;
|
|
max.f32 %f27, %f260, %f230;
|
|
mov.u32 %r381, 0;
|
|
|
|
BB0_8:
|
|
mad.lo.s32 %r134, %r404, 1664525, 1013904223;
|
|
and.b32 %r135, %r134, 16777215;
|
|
cvt.rn.f32.u32 %f262, %r135;
|
|
fma.rn.f32 %f263, %f262, 0f33800000, %f26;
|
|
mul.f32 %f264, %f16, %f263;
|
|
mad.lo.s32 %r404, %r134, 1664525, 1013904223;
|
|
and.b32 %r136, %r404, 16777215;
|
|
cvt.rn.f32.u32 %f265, %r136;
|
|
cvt.rn.f32.s32 %f266, %r381;
|
|
fma.rn.f32 %f267, %f265, 0f33800000, %f266;
|
|
mul.f32 %f268, %f16, %f267;
|
|
sqrt.rn.f32 %f31, %f264;
|
|
mul.f32 %f1101, %f268, 0f40C90FDB;
|
|
abs.f32 %f33, %f1101;
|
|
setp.neu.f32 %p15, %f33, 0f7F800000;
|
|
mov.f32 %f1095, %f1101;
|
|
@%p15 bra BB0_10;
|
|
|
|
mov.f32 %f269, 0f00000000;
|
|
mul.rn.f32 %f1095, %f1101, %f269;
|
|
|
|
BB0_10:
|
|
mul.f32 %f270, %f1095, 0f3F22F983;
|
|
cvt.rni.s32.f32 %r392, %f270;
|
|
cvt.rn.f32.s32 %f271, %r392;
|
|
neg.f32 %f272, %f271;
|
|
mov.f32 %f273, 0f3FC90FDA;
|
|
fma.rn.f32 %f274, %f272, %f273, %f1095;
|
|
mov.f32 %f275, 0f33A22168;
|
|
fma.rn.f32 %f276, %f272, %f275, %f274;
|
|
mov.f32 %f277, 0f27C234C5;
|
|
fma.rn.f32 %f1096, %f272, %f277, %f276;
|
|
abs.f32 %f278, %f1095;
|
|
setp.leu.f32 %p16, %f278, 0f47CE4780;
|
|
@%p16 bra BB0_21;
|
|
|
|
add.u64 %rd48, %SP, 12;
|
|
cvta.to.local.u64 %rd3, %rd48;
|
|
mov.b32 %r13, %f1095;
|
|
shr.u32 %r14, %r13, 23;
|
|
shl.b32 %r139, %r13, 8;
|
|
or.b32 %r15, %r139, -2147483648;
|
|
mov.u32 %r383, 0;
|
|
mov.u64 %rd279, 0;
|
|
mov.u64 %rd278, %rd3;
|
|
mov.u32 %r384, %r383;
|
|
|
|
BB0_12:
|
|
.pragma "nounroll";
|
|
shl.b64 %rd49, %rd279, 2;
|
|
mov.u64 %rd50, __cudart_i2opi_f;
|
|
add.s64 %rd51, %rd50, %rd49;
|
|
ld.const.u32 %r142, [%rd51];
|
|
// inline asm
|
|
{
|
|
mad.lo.cc.u32 %r140, %r142, %r15, %r384;
|
|
madc.hi.u32 %r384, %r142, %r15, 0;
|
|
}
|
|
// inline asm
|
|
st.local.u32 [%rd278], %r140;
|
|
add.s32 %r383, %r383, 1;
|
|
cvt.s64.s32 %rd279, %r383;
|
|
mul.wide.s32 %rd54, %r383, 4;
|
|
add.s64 %rd278, %rd3, %rd54;
|
|
setp.ne.s32 %p17, %r383, 6;
|
|
@%p17 bra BB0_12;
|
|
|
|
and.b32 %r145, %r14, 255;
|
|
add.s32 %r146, %r145, -128;
|
|
shr.u32 %r147, %r146, 5;
|
|
and.b32 %r20, %r13, -2147483648;
|
|
cvta.to.local.u64 %rd56, %rd48;
|
|
st.local.u32 [%rd56+24], %r384;
|
|
mov.u32 %r148, 6;
|
|
sub.s32 %r149, %r148, %r147;
|
|
mul.wide.s32 %rd57, %r149, 4;
|
|
add.s64 %rd8, %rd56, %rd57;
|
|
ld.local.u32 %r385, [%rd8];
|
|
ld.local.u32 %r386, [%rd8+-4];
|
|
and.b32 %r23, %r14, 31;
|
|
setp.eq.s32 %p18, %r23, 0;
|
|
@%p18 bra BB0_15;
|
|
|
|
mov.u32 %r150, 32;
|
|
sub.s32 %r151, %r150, %r23;
|
|
shr.u32 %r152, %r386, %r151;
|
|
shl.b32 %r153, %r385, %r23;
|
|
add.s32 %r385, %r152, %r153;
|
|
ld.local.u32 %r154, [%rd8+-8];
|
|
shr.u32 %r155, %r154, %r151;
|
|
shl.b32 %r156, %r386, %r23;
|
|
add.s32 %r386, %r155, %r156;
|
|
|
|
BB0_15:
|
|
shr.u32 %r157, %r386, 30;
|
|
shl.b32 %r158, %r385, 2;
|
|
add.s32 %r387, %r157, %r158;
|
|
shl.b32 %r29, %r386, 2;
|
|
shr.u32 %r159, %r387, 31;
|
|
shr.u32 %r160, %r385, 30;
|
|
add.s32 %r30, %r159, %r160;
|
|
setp.eq.s32 %p19, %r159, 0;
|
|
@%p19 bra BB0_16;
|
|
bra.uni BB0_17;
|
|
|
|
BB0_16:
|
|
mov.u32 %r388, %r20;
|
|
mov.u32 %r389, %r29;
|
|
bra.uni BB0_18;
|
|
|
|
BB0_17:
|
|
not.b32 %r161, %r387;
|
|
neg.s32 %r389, %r29;
|
|
setp.eq.s32 %p20, %r29, 0;
|
|
selp.u32 %r162, 1, 0, %p20;
|
|
add.s32 %r387, %r162, %r161;
|
|
xor.b32 %r388, %r20, -2147483648;
|
|
|
|
BB0_18:
|
|
clz.b32 %r391, %r387;
|
|
setp.eq.s32 %p21, %r391, 0;
|
|
shl.b32 %r163, %r387, %r391;
|
|
mov.u32 %r164, 32;
|
|
sub.s32 %r165, %r164, %r391;
|
|
shr.u32 %r166, %r389, %r165;
|
|
add.s32 %r167, %r166, %r163;
|
|
selp.b32 %r38, %r387, %r167, %p21;
|
|
mov.u32 %r168, -921707870;
|
|
mul.hi.u32 %r390, %r38, %r168;
|
|
setp.eq.s32 %p22, %r20, 0;
|
|
neg.s32 %r169, %r30;
|
|
selp.b32 %r392, %r30, %r169, %p22;
|
|
setp.lt.s32 %p23, %r390, 1;
|
|
@%p23 bra BB0_20;
|
|
|
|
mul.lo.s32 %r170, %r38, -921707870;
|
|
shr.u32 %r171, %r170, 31;
|
|
shl.b32 %r172, %r390, 1;
|
|
add.s32 %r390, %r171, %r172;
|
|
add.s32 %r391, %r391, 1;
|
|
|
|
BB0_20:
|
|
mov.u32 %r173, 126;
|
|
sub.s32 %r174, %r173, %r391;
|
|
shl.b32 %r175, %r174, 23;
|
|
add.s32 %r176, %r390, 1;
|
|
shr.u32 %r177, %r176, 7;
|
|
add.s32 %r178, %r177, 1;
|
|
shr.u32 %r179, %r178, 1;
|
|
add.s32 %r180, %r179, %r175;
|
|
or.b32 %r181, %r180, %r388;
|
|
mov.b32 %f1096, %r181;
|
|
|
|
BB0_21:
|
|
mul.rn.f32 %f39, %f1096, %f1096;
|
|
add.s32 %r46, %r392, 1;
|
|
and.b32 %r47, %r46, 1;
|
|
setp.eq.s32 %p24, %r47, 0;
|
|
@%p24 bra BB0_23;
|
|
bra.uni BB0_22;
|
|
|
|
BB0_23:
|
|
mov.f32 %f281, 0f3C08839E;
|
|
mov.f32 %f282, 0fB94CA1F9;
|
|
fma.rn.f32 %f1097, %f282, %f39, %f281;
|
|
bra.uni BB0_24;
|
|
|
|
BB0_22:
|
|
mov.f32 %f279, 0fBAB6061A;
|
|
mov.f32 %f280, 0f37CCF5CE;
|
|
fma.rn.f32 %f1097, %f280, %f39, %f279;
|
|
|
|
BB0_24:
|
|
@%p24 bra BB0_26;
|
|
bra.uni BB0_25;
|
|
|
|
BB0_26:
|
|
mov.f32 %f286, 0fBE2AAAA3;
|
|
fma.rn.f32 %f287, %f1097, %f39, %f286;
|
|
mov.f32 %f288, 0f00000000;
|
|
fma.rn.f32 %f1098, %f287, %f39, %f288;
|
|
bra.uni BB0_27;
|
|
|
|
BB0_25:
|
|
mov.f32 %f283, 0f3D2AAAA5;
|
|
fma.rn.f32 %f284, %f1097, %f39, %f283;
|
|
mov.f32 %f285, 0fBF000000;
|
|
fma.rn.f32 %f1098, %f284, %f39, %f285;
|
|
|
|
BB0_27:
|
|
fma.rn.f32 %f1099, %f1098, %f1096, %f1096;
|
|
@%p24 bra BB0_29;
|
|
|
|
mov.f32 %f289, 0f3F800000;
|
|
fma.rn.f32 %f1099, %f1098, %f39, %f289;
|
|
|
|
BB0_29:
|
|
and.b32 %r182, %r46, 2;
|
|
setp.eq.s32 %p27, %r182, 0;
|
|
@%p27 bra BB0_31;
|
|
|
|
mov.f32 %f290, 0f00000000;
|
|
mov.f32 %f291, 0fBF800000;
|
|
fma.rn.f32 %f1099, %f1099, %f291, %f290;
|
|
|
|
BB0_31:
|
|
@%p15 bra BB0_33;
|
|
|
|
mov.f32 %f292, 0f00000000;
|
|
mul.rn.f32 %f1101, %f1101, %f292;
|
|
|
|
BB0_33:
|
|
mul.f32 %f293, %f1101, 0f3F22F983;
|
|
cvt.rni.s32.f32 %r402, %f293;
|
|
cvt.rn.f32.s32 %f294, %r402;
|
|
neg.f32 %f295, %f294;
|
|
fma.rn.f32 %f297, %f295, %f273, %f1101;
|
|
fma.rn.f32 %f299, %f295, %f275, %f297;
|
|
fma.rn.f32 %f1102, %f295, %f277, %f299;
|
|
abs.f32 %f301, %f1101;
|
|
setp.leu.f32 %p29, %f301, 0f47CE4780;
|
|
@%p29 bra BB0_44;
|
|
|
|
add.u64 %rd59, %SP, 12;
|
|
cvta.to.local.u64 %rd9, %rd59;
|
|
mov.b32 %r49, %f1101;
|
|
shr.u32 %r50, %r49, 23;
|
|
shl.b32 %r185, %r49, 8;
|
|
or.b32 %r51, %r185, -2147483648;
|
|
mov.u32 %r393, 0;
|
|
mov.u64 %rd280, %rd9;
|
|
mov.u64 %rd281, %rd31;
|
|
mov.u32 %r394, %r393;
|
|
|
|
BB0_35:
|
|
.pragma "nounroll";
|
|
shl.b64 %rd60, %rd281, 2;
|
|
mov.u64 %rd61, __cudart_i2opi_f;
|
|
add.s64 %rd62, %rd61, %rd60;
|
|
ld.const.u32 %r188, [%rd62];
|
|
// inline asm
|
|
{
|
|
mad.lo.cc.u32 %r186, %r188, %r51, %r394;
|
|
madc.hi.u32 %r394, %r188, %r51, 0;
|
|
}
|
|
// inline asm
|
|
st.local.u32 [%rd280], %r186;
|
|
add.s32 %r393, %r393, 1;
|
|
cvt.s64.s32 %rd281, %r393;
|
|
mul.wide.s32 %rd63, %r393, 4;
|
|
add.s64 %rd280, %rd9, %rd63;
|
|
setp.ne.s32 %p30, %r393, 6;
|
|
@%p30 bra BB0_35;
|
|
|
|
and.b32 %r191, %r50, 255;
|
|
add.s32 %r192, %r191, -128;
|
|
shr.u32 %r193, %r192, 5;
|
|
and.b32 %r56, %r49, -2147483648;
|
|
cvta.to.local.u64 %rd65, %rd59;
|
|
st.local.u32 [%rd65+24], %r394;
|
|
mov.u32 %r194, 6;
|
|
sub.s32 %r195, %r194, %r193;
|
|
mul.wide.s32 %rd66, %r195, 4;
|
|
add.s64 %rd15, %rd65, %rd66;
|
|
ld.local.u32 %r395, [%rd15];
|
|
ld.local.u32 %r396, [%rd15+-4];
|
|
and.b32 %r59, %r50, 31;
|
|
setp.eq.s32 %p31, %r59, 0;
|
|
@%p31 bra BB0_38;
|
|
|
|
mov.u32 %r196, 32;
|
|
sub.s32 %r197, %r196, %r59;
|
|
shr.u32 %r198, %r396, %r197;
|
|
shl.b32 %r199, %r395, %r59;
|
|
add.s32 %r395, %r198, %r199;
|
|
ld.local.u32 %r200, [%rd15+-8];
|
|
shr.u32 %r201, %r200, %r197;
|
|
shl.b32 %r202, %r396, %r59;
|
|
add.s32 %r396, %r201, %r202;
|
|
|
|
BB0_38:
|
|
shr.u32 %r203, %r396, 30;
|
|
shl.b32 %r204, %r395, 2;
|
|
add.s32 %r397, %r203, %r204;
|
|
shl.b32 %r65, %r396, 2;
|
|
shr.u32 %r205, %r397, 31;
|
|
shr.u32 %r206, %r395, 30;
|
|
add.s32 %r66, %r205, %r206;
|
|
setp.eq.s32 %p32, %r205, 0;
|
|
@%p32 bra BB0_39;
|
|
bra.uni BB0_40;
|
|
|
|
BB0_39:
|
|
mov.u32 %r398, %r56;
|
|
mov.u32 %r399, %r65;
|
|
bra.uni BB0_41;
|
|
|
|
BB0_40:
|
|
not.b32 %r207, %r397;
|
|
neg.s32 %r399, %r65;
|
|
setp.eq.s32 %p33, %r65, 0;
|
|
selp.u32 %r208, 1, 0, %p33;
|
|
add.s32 %r397, %r208, %r207;
|
|
xor.b32 %r398, %r56, -2147483648;
|
|
|
|
BB0_41:
|
|
clz.b32 %r401, %r397;
|
|
setp.eq.s32 %p34, %r401, 0;
|
|
shl.b32 %r209, %r397, %r401;
|
|
mov.u32 %r210, 32;
|
|
sub.s32 %r211, %r210, %r401;
|
|
shr.u32 %r212, %r399, %r211;
|
|
add.s32 %r213, %r212, %r209;
|
|
selp.b32 %r74, %r397, %r213, %p34;
|
|
mov.u32 %r214, -921707870;
|
|
mul.hi.u32 %r400, %r74, %r214;
|
|
setp.eq.s32 %p35, %r56, 0;
|
|
neg.s32 %r215, %r66;
|
|
selp.b32 %r402, %r66, %r215, %p35;
|
|
setp.lt.s32 %p36, %r400, 1;
|
|
@%p36 bra BB0_43;
|
|
|
|
mul.lo.s32 %r216, %r74, -921707870;
|
|
shr.u32 %r217, %r216, 31;
|
|
shl.b32 %r218, %r400, 1;
|
|
add.s32 %r400, %r217, %r218;
|
|
add.s32 %r401, %r401, 1;
|
|
|
|
BB0_43:
|
|
mov.u32 %r219, 126;
|
|
sub.s32 %r220, %r219, %r401;
|
|
shl.b32 %r221, %r220, 23;
|
|
add.s32 %r222, %r400, 1;
|
|
shr.u32 %r223, %r222, 7;
|
|
add.s32 %r224, %r223, 1;
|
|
shr.u32 %r225, %r224, 1;
|
|
add.s32 %r226, %r225, %r221;
|
|
or.b32 %r227, %r226, %r398;
|
|
mov.b32 %f1102, %r227;
|
|
|
|
BB0_44:
|
|
mul.rn.f32 %f56, %f1102, %f1102;
|
|
and.b32 %r82, %r402, 1;
|
|
setp.eq.s32 %p37, %r82, 0;
|
|
@%p37 bra BB0_46;
|
|
bra.uni BB0_45;
|
|
|
|
BB0_46:
|
|
mov.f32 %f304, 0f3C08839E;
|
|
mov.f32 %f305, 0fB94CA1F9;
|
|
fma.rn.f32 %f1103, %f305, %f56, %f304;
|
|
bra.uni BB0_47;
|
|
|
|
BB0_45:
|
|
mov.f32 %f302, 0fBAB6061A;
|
|
mov.f32 %f303, 0f37CCF5CE;
|
|
fma.rn.f32 %f1103, %f303, %f56, %f302;
|
|
|
|
BB0_47:
|
|
@%p37 bra BB0_49;
|
|
bra.uni BB0_48;
|
|
|
|
BB0_49:
|
|
mov.f32 %f309, 0fBE2AAAA3;
|
|
fma.rn.f32 %f310, %f1103, %f56, %f309;
|
|
mov.f32 %f311, 0f00000000;
|
|
fma.rn.f32 %f1104, %f310, %f56, %f311;
|
|
bra.uni BB0_50;
|
|
|
|
BB0_48:
|
|
mov.f32 %f306, 0f3D2AAAA5;
|
|
fma.rn.f32 %f307, %f1103, %f56, %f306;
|
|
mov.f32 %f308, 0fBF000000;
|
|
fma.rn.f32 %f1104, %f307, %f56, %f308;
|
|
|
|
BB0_50:
|
|
fma.rn.f32 %f1105, %f1104, %f1102, %f1102;
|
|
@%p37 bra BB0_52;
|
|
|
|
mov.f32 %f312, 0f3F800000;
|
|
fma.rn.f32 %f1105, %f1104, %f56, %f312;
|
|
|
|
BB0_52:
|
|
and.b32 %r228, %r402, 2;
|
|
setp.eq.s32 %p40, %r228, 0;
|
|
@%p40 bra BB0_54;
|
|
|
|
mov.f32 %f313, 0f00000000;
|
|
mov.f32 %f314, 0fBF800000;
|
|
fma.rn.f32 %f1105, %f1105, %f314, %f313;
|
|
|
|
BB0_54:
|
|
mul.f32 %f323, %f31, %f1099;
|
|
add.u64 %rd67, %SP, 0;
|
|
cvta.to.local.u64 %rd68, %rd67;
|
|
mul.f32 %f324, %f323, %f323;
|
|
mov.f32 %f325, 0f3F800000;
|
|
sub.f32 %f326, %f325, %f324;
|
|
mul.f32 %f327, %f31, %f1105;
|
|
mul.f32 %f328, %f327, %f327;
|
|
sub.f32 %f329, %f326, %f328;
|
|
mov.f32 %f330, 0f00000000;
|
|
max.f32 %f331, %f330, %f329;
|
|
sqrt.rn.f32 %f332, %f331;
|
|
mul.f32 %f333, %f13, %f327;
|
|
mul.f32 %f334, %f14, %f327;
|
|
mul.f32 %f335, %f15, %f327;
|
|
fma.rn.f32 %f336, %f22, %f323, %f333;
|
|
fma.rn.f32 %f337, %f21, %f323, %f334;
|
|
fma.rn.f32 %f338, %f20, %f323, %f335;
|
|
fma.rn.f32 %f339, %f7, %f332, %f336;
|
|
fma.rn.f32 %f340, %f8, %f332, %f337;
|
|
fma.rn.f32 %f341, %f9, %f332, %f338;
|
|
add.f32 %f342, %f7, %f339;
|
|
add.f32 %f343, %f8, %f340;
|
|
add.f32 %f344, %f9, %f341;
|
|
ld.global.f32 %f345, [shadowSpread];
|
|
mul.f32 %f346, %f345, %f342;
|
|
mul.f32 %f347, %f345, %f343;
|
|
mul.f32 %f348, %f345, %f344;
|
|
sub.f32 %f349, %f346, %f7;
|
|
sub.f32 %f350, %f347, %f8;
|
|
sub.f32 %f351, %f348, %f9;
|
|
mul.f32 %f352, %f350, %f350;
|
|
fma.rn.f32 %f353, %f349, %f349, %f352;
|
|
fma.rn.f32 %f354, %f351, %f351, %f353;
|
|
sqrt.rn.f32 %f355, %f354;
|
|
rcp.rn.f32 %f356, %f355;
|
|
mul.f32 %f318, %f356, %f349;
|
|
mul.f32 %f319, %f356, %f350;
|
|
mul.f32 %f320, %f356, %f351;
|
|
ld.global.u32 %r232, [imageEnabled];
|
|
and.b32 %r233, %r232, 32;
|
|
setp.eq.s32 %p41, %r233, 0;
|
|
selp.f32 %f357, 0f3F800000, 0f41200000, %p41;
|
|
mul.f32 %f321, %f357, %f27;
|
|
mov.u32 %r234, 1065353216;
|
|
st.local.u32 [%rd68+8], %r234;
|
|
st.local.u32 [%rd68+4], %r234;
|
|
st.local.u32 [%rd68], %r234;
|
|
ld.global.u32 %r229, [root];
|
|
mov.u32 %r230, 1;
|
|
mov.f32 %f322, 0f6C4ECB8F;
|
|
// inline asm
|
|
call _rt_trace_64, (%r229, %f10, %f11, %f12, %f318, %f319, %f320, %r230, %f321, %f322, %rd67, %r121);
|
|
// inline asm
|
|
ld.local.f32 %f358, [%rd68];
|
|
add.f32 %f1109, %f1109, %f358;
|
|
ld.local.f32 %f359, [%rd68+4];
|
|
add.f32 %f1108, %f1108, %f359;
|
|
ld.local.f32 %f360, [%rd68+8];
|
|
add.f32 %f1107, %f1107, %f360;
|
|
ld.global.u32 %r378, [samples];
|
|
add.s32 %r381, %r381, 1;
|
|
setp.lt.s32 %p42, %r381, %r378;
|
|
@%p42 bra BB0_8;
|
|
|
|
BB0_55:
|
|
add.s32 %r379, %r379, 1;
|
|
setp.lt.s32 %p43, %r379, %r378;
|
|
@%p43 bra BB0_6;
|
|
bra.uni BB0_56;
|
|
|
|
BB0_4:
|
|
mov.f32 %f1108, %f1107;
|
|
mov.f32 %f1109, %f1107;
|
|
|
|
BB0_56:
|
|
mul.f32 %f364, %f1088, %f9;
|
|
mul.f32 %f365, %f1087, %f8;
|
|
neg.f32 %f366, %f365;
|
|
mul.f32 %f367, %f1086, %f7;
|
|
sub.f32 %f368, %f366, %f367;
|
|
sub.f32 %f77, %f368, %f364;
|
|
setp.eq.s32 %p44, %r378, 0;
|
|
mov.f32 %f1113, 0f3F800000;
|
|
mov.f32 %f1114, %f1113;
|
|
mov.f32 %f1115, %f1113;
|
|
@%p44 bra BB0_58;
|
|
|
|
mul.lo.s32 %r235, %r378, %r378;
|
|
cvt.rn.f32.s32 %f369, %r235;
|
|
rcp.rn.f32 %f370, %f369;
|
|
mul.f32 %f1113, %f1109, %f370;
|
|
mul.f32 %f1114, %f1108, %f370;
|
|
mul.f32 %f1115, %f1107, %f370;
|
|
|
|
BB0_58:
|
|
ld.global.f32 %f373, [directColor];
|
|
mul.f32 %f84, %f1113, %f373;
|
|
ld.global.f32 %f374, [directColor+4];
|
|
mul.f32 %f85, %f1114, %f374;
|
|
ld.global.f32 %f375, [directColor+8];
|
|
mul.f32 %f86, %f1115, %f375;
|
|
cvt.sat.f32.f32 %f376, %f77;
|
|
mul.f32 %f87, %f84, %f376;
|
|
mul.f32 %f88, %f85, %f376;
|
|
mul.f32 %f89, %f86, %f376;
|
|
fma.rn.f32 %f377, %f77, 0f3F000000, 0f3F000000;
|
|
cvt.sat.f32.f32 %f378, %f377;
|
|
add.f32 %f90, %f378, %f378;
|
|
mov.f32 %f382, 0f41A00000;
|
|
abs.f32 %f92, %f90;
|
|
setp.lt.f32 %p45, %f92, 0f00800000;
|
|
mul.f32 %f384, %f92, 0f4B800000;
|
|
selp.f32 %f385, 0fC3170000, 0fC2FE0000, %p45;
|
|
selp.f32 %f386, %f384, %f92, %p45;
|
|
mov.b32 %r236, %f386;
|
|
and.b32 %r237, %r236, 8388607;
|
|
or.b32 %r238, %r237, 1065353216;
|
|
mov.b32 %f387, %r238;
|
|
shr.u32 %r239, %r236, 23;
|
|
cvt.rn.f32.u32 %f388, %r239;
|
|
add.f32 %f389, %f385, %f388;
|
|
setp.gt.f32 %p46, %f387, 0f3FB504F3;
|
|
mul.f32 %f390, %f387, 0f3F000000;
|
|
add.f32 %f391, %f389, 0f3F800000;
|
|
selp.f32 %f392, %f390, %f387, %p46;
|
|
selp.f32 %f393, %f391, %f389, %p46;
|
|
add.f32 %f394, %f392, 0fBF800000;
|
|
add.f32 %f372, %f392, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f371,%f372;
|
|
// inline asm
|
|
add.f32 %f395, %f394, %f394;
|
|
mul.f32 %f396, %f371, %f395;
|
|
mul.f32 %f397, %f396, %f396;
|
|
mov.f32 %f398, 0f3C4CAF63;
|
|
mov.f32 %f399, 0f3B18F0FE;
|
|
fma.rn.f32 %f400, %f399, %f397, %f398;
|
|
mov.f32 %f401, 0f3DAAAABD;
|
|
fma.rn.f32 %f402, %f400, %f397, %f401;
|
|
mul.rn.f32 %f403, %f402, %f397;
|
|
mul.rn.f32 %f404, %f403, %f396;
|
|
sub.f32 %f405, %f394, %f396;
|
|
neg.f32 %f406, %f396;
|
|
add.f32 %f407, %f405, %f405;
|
|
fma.rn.f32 %f408, %f406, %f394, %f407;
|
|
mul.rn.f32 %f409, %f371, %f408;
|
|
add.f32 %f410, %f404, %f396;
|
|
sub.f32 %f411, %f396, %f410;
|
|
add.f32 %f412, %f404, %f411;
|
|
add.f32 %f413, %f409, %f412;
|
|
add.f32 %f414, %f410, %f413;
|
|
sub.f32 %f415, %f410, %f414;
|
|
add.f32 %f416, %f413, %f415;
|
|
mov.f32 %f417, 0f3F317200;
|
|
mul.rn.f32 %f418, %f393, %f417;
|
|
mov.f32 %f419, 0f35BFBE8E;
|
|
mul.rn.f32 %f420, %f393, %f419;
|
|
add.f32 %f421, %f418, %f414;
|
|
sub.f32 %f422, %f418, %f421;
|
|
add.f32 %f423, %f414, %f422;
|
|
add.f32 %f424, %f416, %f423;
|
|
add.f32 %f425, %f420, %f424;
|
|
add.f32 %f426, %f421, %f425;
|
|
sub.f32 %f427, %f421, %f426;
|
|
add.f32 %f428, %f425, %f427;
|
|
mul.rn.f32 %f429, %f382, %f426;
|
|
neg.f32 %f430, %f429;
|
|
fma.rn.f32 %f431, %f382, %f426, %f430;
|
|
fma.rn.f32 %f432, %f382, %f428, %f431;
|
|
mov.f32 %f433, 0f00000000;
|
|
fma.rn.f32 %f434, %f433, %f426, %f432;
|
|
add.rn.f32 %f435, %f429, %f434;
|
|
neg.f32 %f436, %f435;
|
|
add.rn.f32 %f437, %f429, %f436;
|
|
add.rn.f32 %f438, %f437, %f434;
|
|
mov.b32 %r240, %f435;
|
|
setp.eq.s32 %p47, %r240, 1118925336;
|
|
add.s32 %r241, %r240, -1;
|
|
mov.b32 %f439, %r241;
|
|
add.f32 %f440, %f438, 0f37000000;
|
|
selp.f32 %f441, %f439, %f435, %p47;
|
|
selp.f32 %f93, %f440, %f438, %p47;
|
|
mul.f32 %f442, %f441, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f443, %f442;
|
|
mov.f32 %f444, 0fBF317200;
|
|
fma.rn.f32 %f445, %f443, %f444, %f441;
|
|
mov.f32 %f446, 0fB5BFBE8E;
|
|
fma.rn.f32 %f447, %f443, %f446, %f445;
|
|
mul.f32 %f448, %f447, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f449, %f448;
|
|
add.f32 %f450, %f443, 0f00000000;
|
|
ex2.approx.f32 %f451, %f450;
|
|
mul.f32 %f452, %f449, %f451;
|
|
setp.lt.f32 %p48, %f441, 0fC2D20000;
|
|
selp.f32 %f453, 0f00000000, %f452, %p48;
|
|
setp.gt.f32 %p49, %f441, 0f42D20000;
|
|
selp.f32 %f1116, 0f7F800000, %f453, %p49;
|
|
setp.eq.f32 %p50, %f1116, 0f7F800000;
|
|
@%p50 bra BB0_60;
|
|
|
|
fma.rn.f32 %f1116, %f1116, %f93, %f1116;
|
|
|
|
BB0_60:
|
|
mov.f32 %f1023, 0f41200000;
|
|
cvt.rzi.f32.f32 %f1022, %f1023;
|
|
add.f32 %f1021, %f1022, %f1022;
|
|
mov.f32 %f1020, 0f41A00000;
|
|
sub.f32 %f1019, %f1020, %f1021;
|
|
abs.f32 %f1018, %f1019;
|
|
setp.lt.f32 %p51, %f90, 0f00000000;
|
|
setp.eq.f32 %p52, %f1018, 0f3F800000;
|
|
and.pred %p1, %p51, %p52;
|
|
mov.b32 %r242, %f1116;
|
|
xor.b32 %r243, %r242, -2147483648;
|
|
mov.b32 %f454, %r243;
|
|
selp.f32 %f1118, %f454, %f1116, %p1;
|
|
setp.eq.f32 %p53, %f90, 0f00000000;
|
|
@%p53 bra BB0_63;
|
|
bra.uni BB0_61;
|
|
|
|
BB0_63:
|
|
add.f32 %f457, %f90, %f90;
|
|
selp.f32 %f1118, %f457, 0f00000000, %p52;
|
|
bra.uni BB0_64;
|
|
|
|
BB0_61:
|
|
setp.geu.f32 %p54, %f90, 0f00000000;
|
|
@%p54 bra BB0_64;
|
|
|
|
mov.f32 %f1059, 0f41A00000;
|
|
cvt.rzi.f32.f32 %f456, %f1059;
|
|
setp.neu.f32 %p55, %f456, 0f41A00000;
|
|
selp.f32 %f1118, 0f7FFFFFFF, %f1118, %p55;
|
|
|
|
BB0_64:
|
|
add.f32 %f458, %f92, 0f41A00000;
|
|
mov.b32 %r244, %f458;
|
|
setp.lt.s32 %p57, %r244, 2139095040;
|
|
@%p57 bra BB0_69;
|
|
|
|
setp.gtu.f32 %p58, %f92, 0f7F800000;
|
|
@%p58 bra BB0_68;
|
|
bra.uni BB0_66;
|
|
|
|
BB0_68:
|
|
add.f32 %f1118, %f90, 0f41A00000;
|
|
bra.uni BB0_69;
|
|
|
|
BB0_66:
|
|
setp.neu.f32 %p59, %f92, 0f7F800000;
|
|
@%p59 bra BB0_69;
|
|
|
|
selp.f32 %f1118, 0fFF800000, 0f7F800000, %p1;
|
|
|
|
BB0_69:
|
|
setp.eq.f32 %p60, %f90, 0f3F800000;
|
|
selp.f32 %f459, 0f3F800000, %f1118, %p60;
|
|
cvt.sat.f32.f32 %f460, %f459;
|
|
mul.f32 %f104, %f84, %f460;
|
|
mul.f32 %f105, %f85, %f460;
|
|
mul.f32 %f106, %f86, %f460;
|
|
ld.global.u32 %r407, [imageEnabled];
|
|
and.b32 %r245, %r407, 8;
|
|
setp.eq.s32 %p61, %r245, 0;
|
|
@%p61 bra BB0_82;
|
|
|
|
mov.f32 %f1031, 0fB5BFBE8E;
|
|
mov.f32 %f1030, 0fBF317200;
|
|
mov.f32 %f1029, 0f00000000;
|
|
mov.f32 %f1028, 0f35BFBE8E;
|
|
mov.f32 %f1027, 0f3F317200;
|
|
mov.f32 %f1026, 0f3DAAAABD;
|
|
mov.f32 %f1025, 0f3C4CAF63;
|
|
mov.f32 %f1024, 0f3B18F0FE;
|
|
cvt.u64.u32 %rd71, %r2;
|
|
cvt.u64.u32 %rd72, %r3;
|
|
mov.u64 %rd75, image_Mask;
|
|
cvta.global.u64 %rd70, %rd75;
|
|
// inline asm
|
|
call (%rd69), _rt_buffer_get_64, (%rd70, %r105, %r105, %rd71, %rd72, %rd31, %rd31);
|
|
// inline asm
|
|
abs.f32 %f108, %f1113;
|
|
setp.lt.f32 %p62, %f108, 0f00800000;
|
|
mul.f32 %f466, %f108, 0f4B800000;
|
|
selp.f32 %f467, 0fC3170000, 0fC2FE0000, %p62;
|
|
selp.f32 %f468, %f466, %f108, %p62;
|
|
mov.b32 %r248, %f468;
|
|
and.b32 %r249, %r248, 8388607;
|
|
or.b32 %r250, %r249, 1065353216;
|
|
mov.b32 %f469, %r250;
|
|
shr.u32 %r251, %r248, 23;
|
|
cvt.rn.f32.u32 %f470, %r251;
|
|
add.f32 %f471, %f467, %f470;
|
|
setp.gt.f32 %p63, %f469, 0f3FB504F3;
|
|
mul.f32 %f472, %f469, 0f3F000000;
|
|
add.f32 %f473, %f471, 0f3F800000;
|
|
selp.f32 %f474, %f472, %f469, %p63;
|
|
selp.f32 %f475, %f473, %f471, %p63;
|
|
add.f32 %f476, %f474, 0fBF800000;
|
|
add.f32 %f462, %f474, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f461,%f462;
|
|
// inline asm
|
|
add.f32 %f477, %f476, %f476;
|
|
mul.f32 %f478, %f461, %f477;
|
|
mul.f32 %f479, %f478, %f478;
|
|
fma.rn.f32 %f482, %f1024, %f479, %f1025;
|
|
fma.rn.f32 %f484, %f482, %f479, %f1026;
|
|
mul.rn.f32 %f485, %f484, %f479;
|
|
mul.rn.f32 %f486, %f485, %f478;
|
|
sub.f32 %f487, %f476, %f478;
|
|
neg.f32 %f488, %f478;
|
|
add.f32 %f489, %f487, %f487;
|
|
fma.rn.f32 %f490, %f488, %f476, %f489;
|
|
mul.rn.f32 %f491, %f461, %f490;
|
|
add.f32 %f492, %f486, %f478;
|
|
sub.f32 %f493, %f478, %f492;
|
|
add.f32 %f494, %f486, %f493;
|
|
add.f32 %f495, %f491, %f494;
|
|
add.f32 %f496, %f492, %f495;
|
|
sub.f32 %f497, %f492, %f496;
|
|
add.f32 %f498, %f495, %f497;
|
|
mul.rn.f32 %f500, %f475, %f1027;
|
|
mul.rn.f32 %f502, %f475, %f1028;
|
|
add.f32 %f503, %f500, %f496;
|
|
sub.f32 %f504, %f500, %f503;
|
|
add.f32 %f505, %f496, %f504;
|
|
add.f32 %f506, %f498, %f505;
|
|
add.f32 %f507, %f502, %f506;
|
|
add.f32 %f508, %f503, %f507;
|
|
sub.f32 %f509, %f503, %f508;
|
|
add.f32 %f510, %f507, %f509;
|
|
mov.f32 %f511, 0f3EE8BA2E;
|
|
mul.rn.f32 %f512, %f511, %f508;
|
|
neg.f32 %f513, %f512;
|
|
fma.rn.f32 %f514, %f511, %f508, %f513;
|
|
fma.rn.f32 %f515, %f511, %f510, %f514;
|
|
fma.rn.f32 %f517, %f1029, %f508, %f515;
|
|
add.rn.f32 %f518, %f512, %f517;
|
|
neg.f32 %f519, %f518;
|
|
add.rn.f32 %f520, %f512, %f519;
|
|
add.rn.f32 %f521, %f520, %f517;
|
|
mov.b32 %r252, %f518;
|
|
setp.eq.s32 %p64, %r252, 1118925336;
|
|
add.s32 %r253, %r252, -1;
|
|
mov.b32 %f522, %r253;
|
|
add.f32 %f523, %f521, 0f37000000;
|
|
selp.f32 %f524, %f522, %f518, %p64;
|
|
selp.f32 %f109, %f523, %f521, %p64;
|
|
mul.f32 %f525, %f524, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f526, %f525;
|
|
fma.rn.f32 %f528, %f526, %f1030, %f524;
|
|
fma.rn.f32 %f530, %f526, %f1031, %f528;
|
|
mul.f32 %f531, %f530, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f532, %f531;
|
|
add.f32 %f533, %f526, 0f00000000;
|
|
ex2.approx.f32 %f534, %f533;
|
|
mul.f32 %f535, %f532, %f534;
|
|
setp.lt.f32 %p65, %f524, 0fC2D20000;
|
|
selp.f32 %f536, 0f00000000, %f535, %p65;
|
|
setp.gt.f32 %p66, %f524, 0f42D20000;
|
|
selp.f32 %f1119, 0f7F800000, %f536, %p66;
|
|
setp.eq.f32 %p67, %f1119, 0f7F800000;
|
|
@%p67 bra BB0_72;
|
|
|
|
fma.rn.f32 %f1119, %f1119, %f109, %f1119;
|
|
|
|
BB0_72:
|
|
mov.f32 %f1063, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f1062, %f1063;
|
|
fma.rn.f32 %f1061, %f1062, 0fC0000000, 0f3EE8BA2E;
|
|
abs.f32 %f1060, %f1061;
|
|
setp.lt.f32 %p68, %f1113, 0f00000000;
|
|
setp.eq.f32 %p69, %f1060, 0f3F800000;
|
|
and.pred %p2, %p68, %p69;
|
|
mov.b32 %r254, %f1119;
|
|
xor.b32 %r255, %r254, -2147483648;
|
|
mov.b32 %f537, %r255;
|
|
selp.f32 %f1121, %f537, %f1119, %p2;
|
|
setp.eq.f32 %p70, %f1113, 0f00000000;
|
|
@%p70 bra BB0_75;
|
|
bra.uni BB0_73;
|
|
|
|
BB0_75:
|
|
add.f32 %f540, %f1113, %f1113;
|
|
selp.f32 %f1121, %f540, 0f00000000, %p69;
|
|
bra.uni BB0_76;
|
|
|
|
BB0_143:
|
|
mov.u64 %rd217, image_HDR;
|
|
cvta.global.u64 %rd212, %rd217;
|
|
mov.u32 %r352, 8;
|
|
mov.u64 %rd216, 0;
|
|
// inline asm
|
|
call (%rd211), _rt_buffer_get_64, (%rd212, %r105, %r352, %rd24, %rd25, %rd216, %rd216);
|
|
// inline asm
|
|
mov.f32 %f996, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs116, %f996;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs117, 0;
|
|
st.v4.u16 [%rd211], {%rs116, %rs116, %rs116, %rs117};
|
|
|
|
BB0_144:
|
|
ld.global.u32 %r353, [additive];
|
|
setp.eq.s32 %p145, %r353, 0;
|
|
@%p145 bra BB0_146;
|
|
|
|
mov.u64 %rd230, image_RNM0;
|
|
cvta.global.u64 %rd219, %rd230;
|
|
mov.u32 %r357, 8;
|
|
mov.u64 %rd229, 0;
|
|
// inline asm
|
|
call (%rd218), _rt_buffer_get_64, (%rd219, %r105, %r357, %rd24, %rd25, %rd229, %rd229);
|
|
// inline asm
|
|
ld.v4.u16 {%rs124, %rs125, %rs126, %rs127}, [%rd218];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f997, %rs124;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f998, %rs125;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f999, %rs126;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd224), _rt_buffer_get_64, (%rd219, %r105, %r357, %rd24, %rd25, %rd229, %rd229);
|
|
// inline asm
|
|
add.f32 %f1000, %f997, 0f00000000;
|
|
add.f32 %f1001, %f998, 0f00000000;
|
|
add.f32 %f1002, %f999, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs123, %f1002;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs122, %f1001;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs121, %f1000;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs128, 0;
|
|
st.v4.u16 [%rd224], {%rs121, %rs122, %rs123, %rs128};
|
|
bra.uni BB0_147;
|
|
|
|
BB0_146:
|
|
mov.u64 %rd237, image_RNM0;
|
|
cvta.global.u64 %rd232, %rd237;
|
|
mov.u32 %r359, 8;
|
|
mov.u64 %rd236, 0;
|
|
// inline asm
|
|
call (%rd231), _rt_buffer_get_64, (%rd232, %r105, %r359, %rd24, %rd25, %rd236, %rd236);
|
|
// inline asm
|
|
mov.f32 %f1003, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs129, %f1003;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs130, 0;
|
|
st.v4.u16 [%rd231], {%rs129, %rs129, %rs129, %rs130};
|
|
|
|
BB0_147:
|
|
ld.global.u32 %r360, [additive];
|
|
setp.eq.s32 %p146, %r360, 0;
|
|
@%p146 bra BB0_149;
|
|
|
|
mov.u64 %rd250, image_RNM1;
|
|
cvta.global.u64 %rd239, %rd250;
|
|
mov.u32 %r364, 8;
|
|
mov.u64 %rd249, 0;
|
|
// inline asm
|
|
call (%rd238), _rt_buffer_get_64, (%rd239, %r105, %r364, %rd24, %rd25, %rd249, %rd249);
|
|
// inline asm
|
|
ld.v4.u16 {%rs137, %rs138, %rs139, %rs140}, [%rd238];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1004, %rs137;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1005, %rs138;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1006, %rs139;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd244), _rt_buffer_get_64, (%rd239, %r105, %r364, %rd24, %rd25, %rd249, %rd249);
|
|
// inline asm
|
|
add.f32 %f1007, %f1004, 0f00000000;
|
|
add.f32 %f1008, %f1005, 0f00000000;
|
|
add.f32 %f1009, %f1006, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs136, %f1009;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs135, %f1008;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs134, %f1007;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs141, 0;
|
|
st.v4.u16 [%rd244], {%rs134, %rs135, %rs136, %rs141};
|
|
bra.uni BB0_150;
|
|
|
|
BB0_149:
|
|
mov.u64 %rd257, image_RNM1;
|
|
cvta.global.u64 %rd252, %rd257;
|
|
mov.u32 %r366, 8;
|
|
mov.u64 %rd256, 0;
|
|
// inline asm
|
|
call (%rd251), _rt_buffer_get_64, (%rd252, %r105, %r366, %rd24, %rd25, %rd256, %rd256);
|
|
// inline asm
|
|
mov.f32 %f1010, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs142, %f1010;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs143, 0;
|
|
st.v4.u16 [%rd251], {%rs142, %rs142, %rs142, %rs143};
|
|
|
|
BB0_150:
|
|
ld.global.u32 %r367, [additive];
|
|
setp.eq.s32 %p147, %r367, 0;
|
|
@%p147 bra BB0_152;
|
|
|
|
mov.u64 %rd270, image_RNM2;
|
|
cvta.global.u64 %rd259, %rd270;
|
|
mov.u32 %r371, 8;
|
|
mov.u64 %rd269, 0;
|
|
// inline asm
|
|
call (%rd258), _rt_buffer_get_64, (%rd259, %r105, %r371, %rd24, %rd25, %rd269, %rd269);
|
|
// inline asm
|
|
ld.v4.u16 {%rs150, %rs151, %rs152, %rs153}, [%rd258];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1011, %rs150;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1012, %rs151;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1013, %rs152;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd264), _rt_buffer_get_64, (%rd259, %r105, %r371, %rd24, %rd25, %rd269, %rd269);
|
|
// inline asm
|
|
add.f32 %f1014, %f1011, 0f00000000;
|
|
add.f32 %f1015, %f1012, 0f00000000;
|
|
add.f32 %f1016, %f1013, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs149, %f1016;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs148, %f1015;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs147, %f1014;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs154, 0;
|
|
st.v4.u16 [%rd264], {%rs147, %rs148, %rs149, %rs154};
|
|
bra.uni BB0_153;
|
|
|
|
BB0_152:
|
|
mov.u64 %rd277, image_RNM2;
|
|
cvta.global.u64 %rd272, %rd277;
|
|
mov.u32 %r373, 8;
|
|
mov.u64 %rd276, 0;
|
|
// inline asm
|
|
call (%rd271), _rt_buffer_get_64, (%rd272, %r105, %r373, %rd24, %rd25, %rd276, %rd276);
|
|
// inline asm
|
|
mov.f32 %f1017, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs155, %f1017;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs156, 0;
|
|
st.v4.u16 [%rd271], {%rs155, %rs155, %rs155, %rs156};
|
|
bra.uni BB0_153;
|
|
|
|
BB0_73:
|
|
setp.geu.f32 %p71, %f1113, 0f00000000;
|
|
@%p71 bra BB0_76;
|
|
|
|
mov.f32 %f1067, 0f3EE8BA2E;
|
|
cvt.rzi.f32.f32 %f539, %f1067;
|
|
setp.neu.f32 %p72, %f539, 0f3EE8BA2E;
|
|
selp.f32 %f1121, 0f7FFFFFFF, %f1121, %p72;
|
|
|
|
BB0_76:
|
|
abs.f32 %f1064, %f1113;
|
|
add.f32 %f541, %f1064, 0f3EE8BA2E;
|
|
mov.b32 %r256, %f541;
|
|
setp.lt.s32 %p74, %r256, 2139095040;
|
|
@%p74 bra BB0_81;
|
|
|
|
abs.f32 %f1065, %f1113;
|
|
setp.gtu.f32 %p75, %f1065, 0f7F800000;
|
|
@%p75 bra BB0_80;
|
|
bra.uni BB0_78;
|
|
|
|
BB0_80:
|
|
add.f32 %f1121, %f1113, 0f3EE8BA2E;
|
|
bra.uni BB0_81;
|
|
|
|
BB0_78:
|
|
abs.f32 %f1066, %f1113;
|
|
setp.neu.f32 %p76, %f1066, 0f7F800000;
|
|
@%p76 bra BB0_81;
|
|
|
|
selp.f32 %f1121, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
BB0_81:
|
|
mul.f32 %f542, %f1121, 0f437F0000;
|
|
setp.eq.f32 %p77, %f1113, 0f3F800000;
|
|
selp.f32 %f543, 0f437F0000, %f542, %p77;
|
|
cvt.rzi.u32.f32 %r257, %f543;
|
|
cvt.u16.u32 %rs13, %r257;
|
|
mov.u16 %rs14, 255;
|
|
st.v2.u8 [%rd69], {%rs13, %rs14};
|
|
ld.global.u32 %r407, [imageEnabled];
|
|
|
|
BB0_82:
|
|
and.b32 %r258, %r407, 1;
|
|
setp.eq.b32 %p78, %r258, 1;
|
|
@!%p78 bra BB0_117;
|
|
bra.uni BB0_83;
|
|
|
|
BB0_83:
|
|
mov.f32 %f1039, 0fB5BFBE8E;
|
|
mov.f32 %f1038, 0fBF317200;
|
|
mov.f32 %f1037, 0f00000000;
|
|
mov.f32 %f1036, 0f35BFBE8E;
|
|
mov.f32 %f1035, 0f3F317200;
|
|
mov.f32 %f1034, 0f3DAAAABD;
|
|
mov.f32 %f1033, 0f3C4CAF63;
|
|
mov.f32 %f1032, 0f3B18F0FE;
|
|
abs.f32 %f121, %f87;
|
|
setp.lt.f32 %p79, %f121, 0f00800000;
|
|
mul.f32 %f549, %f121, 0f4B800000;
|
|
selp.f32 %f550, 0fC3170000, 0fC2FE0000, %p79;
|
|
selp.f32 %f551, %f549, %f121, %p79;
|
|
mov.b32 %r259, %f551;
|
|
and.b32 %r260, %r259, 8388607;
|
|
or.b32 %r261, %r260, 1065353216;
|
|
mov.b32 %f552, %r261;
|
|
shr.u32 %r262, %r259, 23;
|
|
cvt.rn.f32.u32 %f553, %r262;
|
|
add.f32 %f554, %f550, %f553;
|
|
setp.gt.f32 %p80, %f552, 0f3FB504F3;
|
|
mul.f32 %f555, %f552, 0f3F000000;
|
|
add.f32 %f556, %f554, 0f3F800000;
|
|
selp.f32 %f557, %f555, %f552, %p80;
|
|
selp.f32 %f558, %f556, %f554, %p80;
|
|
add.f32 %f559, %f557, 0fBF800000;
|
|
add.f32 %f545, %f557, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f544,%f545;
|
|
// inline asm
|
|
add.f32 %f560, %f559, %f559;
|
|
mul.f32 %f561, %f544, %f560;
|
|
mul.f32 %f562, %f561, %f561;
|
|
fma.rn.f32 %f565, %f1032, %f562, %f1033;
|
|
fma.rn.f32 %f567, %f565, %f562, %f1034;
|
|
mul.rn.f32 %f568, %f567, %f562;
|
|
mul.rn.f32 %f569, %f568, %f561;
|
|
sub.f32 %f570, %f559, %f561;
|
|
neg.f32 %f571, %f561;
|
|
add.f32 %f572, %f570, %f570;
|
|
fma.rn.f32 %f573, %f571, %f559, %f572;
|
|
mul.rn.f32 %f574, %f544, %f573;
|
|
add.f32 %f575, %f569, %f561;
|
|
sub.f32 %f576, %f561, %f575;
|
|
add.f32 %f577, %f569, %f576;
|
|
add.f32 %f578, %f574, %f577;
|
|
add.f32 %f579, %f575, %f578;
|
|
sub.f32 %f580, %f575, %f579;
|
|
add.f32 %f581, %f578, %f580;
|
|
mul.rn.f32 %f583, %f558, %f1035;
|
|
mul.rn.f32 %f585, %f558, %f1036;
|
|
add.f32 %f586, %f583, %f579;
|
|
sub.f32 %f587, %f583, %f586;
|
|
add.f32 %f588, %f579, %f587;
|
|
add.f32 %f589, %f581, %f588;
|
|
add.f32 %f590, %f585, %f589;
|
|
add.f32 %f591, %f586, %f590;
|
|
sub.f32 %f592, %f586, %f591;
|
|
add.f32 %f593, %f590, %f592;
|
|
mov.f32 %f594, 0f3EE66666;
|
|
mul.rn.f32 %f595, %f594, %f591;
|
|
neg.f32 %f596, %f595;
|
|
fma.rn.f32 %f597, %f594, %f591, %f596;
|
|
fma.rn.f32 %f598, %f594, %f593, %f597;
|
|
fma.rn.f32 %f600, %f1037, %f591, %f598;
|
|
add.rn.f32 %f601, %f595, %f600;
|
|
neg.f32 %f602, %f601;
|
|
add.rn.f32 %f603, %f595, %f602;
|
|
add.rn.f32 %f604, %f603, %f600;
|
|
mov.b32 %r263, %f601;
|
|
setp.eq.s32 %p81, %r263, 1118925336;
|
|
add.s32 %r264, %r263, -1;
|
|
mov.b32 %f605, %r264;
|
|
add.f32 %f606, %f604, 0f37000000;
|
|
selp.f32 %f607, %f605, %f601, %p81;
|
|
selp.f32 %f122, %f606, %f604, %p81;
|
|
mul.f32 %f608, %f607, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f609, %f608;
|
|
fma.rn.f32 %f611, %f609, %f1038, %f607;
|
|
fma.rn.f32 %f613, %f609, %f1039, %f611;
|
|
mul.f32 %f614, %f613, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f615, %f614;
|
|
add.f32 %f616, %f609, 0f00000000;
|
|
ex2.approx.f32 %f617, %f616;
|
|
mul.f32 %f618, %f615, %f617;
|
|
setp.lt.f32 %p82, %f607, 0fC2D20000;
|
|
selp.f32 %f619, 0f00000000, %f618, %p82;
|
|
setp.gt.f32 %p83, %f607, 0f42D20000;
|
|
selp.f32 %f1122, 0f7F800000, %f619, %p83;
|
|
setp.eq.f32 %p84, %f1122, 0f7F800000;
|
|
@%p84 bra BB0_85;
|
|
|
|
fma.rn.f32 %f1122, %f1122, %f122, %f1122;
|
|
|
|
BB0_85:
|
|
mov.f32 %f1071, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f1070, %f1071;
|
|
fma.rn.f32 %f1069, %f1070, 0fC0000000, 0f3EE66666;
|
|
abs.f32 %f1068, %f1069;
|
|
setp.lt.f32 %p85, %f87, 0f00000000;
|
|
setp.eq.f32 %p86, %f1068, 0f3F800000;
|
|
and.pred %p3, %p85, %p86;
|
|
mov.b32 %r265, %f1122;
|
|
xor.b32 %r266, %r265, -2147483648;
|
|
mov.b32 %f620, %r266;
|
|
selp.f32 %f1124, %f620, %f1122, %p3;
|
|
setp.eq.f32 %p87, %f87, 0f00000000;
|
|
@%p87 bra BB0_88;
|
|
bra.uni BB0_86;
|
|
|
|
BB0_88:
|
|
add.f32 %f623, %f87, %f87;
|
|
selp.f32 %f1124, %f623, 0f00000000, %p86;
|
|
bra.uni BB0_89;
|
|
|
|
BB0_86:
|
|
setp.geu.f32 %p88, %f87, 0f00000000;
|
|
@%p88 bra BB0_89;
|
|
|
|
mov.f32 %f1079, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f622, %f1079;
|
|
setp.neu.f32 %p89, %f622, 0f3EE66666;
|
|
selp.f32 %f1124, 0f7FFFFFFF, %f1124, %p89;
|
|
|
|
BB0_89:
|
|
abs.f32 %f1072, %f87;
|
|
add.f32 %f624, %f1072, 0f3EE66666;
|
|
mov.b32 %r267, %f624;
|
|
setp.lt.s32 %p91, %r267, 2139095040;
|
|
@%p91 bra BB0_94;
|
|
|
|
abs.f32 %f1077, %f87;
|
|
setp.gtu.f32 %p92, %f1077, 0f7F800000;
|
|
@%p92 bra BB0_93;
|
|
bra.uni BB0_91;
|
|
|
|
BB0_93:
|
|
add.f32 %f1124, %f87, 0f3EE66666;
|
|
bra.uni BB0_94;
|
|
|
|
BB0_91:
|
|
abs.f32 %f1078, %f87;
|
|
setp.neu.f32 %p93, %f1078, 0f7F800000;
|
|
@%p93 bra BB0_94;
|
|
|
|
selp.f32 %f1124, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
BB0_94:
|
|
mov.f32 %f1073, 0f3EE66666;
|
|
mov.f32 %f1047, 0fB5BFBE8E;
|
|
mov.f32 %f1046, 0fBF317200;
|
|
mov.f32 %f1045, 0f00000000;
|
|
mov.f32 %f1044, 0f35BFBE8E;
|
|
mov.f32 %f1043, 0f3F317200;
|
|
mov.f32 %f1042, 0f3DAAAABD;
|
|
mov.f32 %f1041, 0f3C4CAF63;
|
|
mov.f32 %f1040, 0f3B18F0FE;
|
|
setp.eq.f32 %p94, %f87, 0f3F800000;
|
|
selp.f32 %f133, 0f3F800000, %f1124, %p94;
|
|
abs.f32 %f134, %f88;
|
|
setp.lt.f32 %p95, %f134, 0f00800000;
|
|
mul.f32 %f627, %f134, 0f4B800000;
|
|
selp.f32 %f628, 0fC3170000, 0fC2FE0000, %p95;
|
|
selp.f32 %f629, %f627, %f134, %p95;
|
|
mov.b32 %r268, %f629;
|
|
and.b32 %r269, %r268, 8388607;
|
|
or.b32 %r270, %r269, 1065353216;
|
|
mov.b32 %f630, %r270;
|
|
shr.u32 %r271, %r268, 23;
|
|
cvt.rn.f32.u32 %f631, %r271;
|
|
add.f32 %f632, %f628, %f631;
|
|
setp.gt.f32 %p96, %f630, 0f3FB504F3;
|
|
mul.f32 %f633, %f630, 0f3F000000;
|
|
add.f32 %f634, %f632, 0f3F800000;
|
|
selp.f32 %f635, %f633, %f630, %p96;
|
|
selp.f32 %f636, %f634, %f632, %p96;
|
|
add.f32 %f637, %f635, 0fBF800000;
|
|
add.f32 %f626, %f635, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f625,%f626;
|
|
// inline asm
|
|
add.f32 %f638, %f637, %f637;
|
|
mul.f32 %f639, %f625, %f638;
|
|
mul.f32 %f640, %f639, %f639;
|
|
fma.rn.f32 %f643, %f1040, %f640, %f1041;
|
|
fma.rn.f32 %f645, %f643, %f640, %f1042;
|
|
mul.rn.f32 %f646, %f645, %f640;
|
|
mul.rn.f32 %f647, %f646, %f639;
|
|
sub.f32 %f648, %f637, %f639;
|
|
neg.f32 %f649, %f639;
|
|
add.f32 %f650, %f648, %f648;
|
|
fma.rn.f32 %f651, %f649, %f637, %f650;
|
|
mul.rn.f32 %f652, %f625, %f651;
|
|
add.f32 %f653, %f647, %f639;
|
|
sub.f32 %f654, %f639, %f653;
|
|
add.f32 %f655, %f647, %f654;
|
|
add.f32 %f656, %f652, %f655;
|
|
add.f32 %f657, %f653, %f656;
|
|
sub.f32 %f658, %f653, %f657;
|
|
add.f32 %f659, %f656, %f658;
|
|
mul.rn.f32 %f661, %f636, %f1043;
|
|
mul.rn.f32 %f663, %f636, %f1044;
|
|
add.f32 %f664, %f661, %f657;
|
|
sub.f32 %f665, %f661, %f664;
|
|
add.f32 %f666, %f657, %f665;
|
|
add.f32 %f667, %f659, %f666;
|
|
add.f32 %f668, %f663, %f667;
|
|
add.f32 %f669, %f664, %f668;
|
|
sub.f32 %f670, %f664, %f669;
|
|
add.f32 %f671, %f668, %f670;
|
|
mul.rn.f32 %f673, %f1073, %f669;
|
|
neg.f32 %f674, %f673;
|
|
fma.rn.f32 %f675, %f1073, %f669, %f674;
|
|
fma.rn.f32 %f676, %f1073, %f671, %f675;
|
|
fma.rn.f32 %f678, %f1045, %f669, %f676;
|
|
add.rn.f32 %f679, %f673, %f678;
|
|
neg.f32 %f680, %f679;
|
|
add.rn.f32 %f681, %f673, %f680;
|
|
add.rn.f32 %f682, %f681, %f678;
|
|
mov.b32 %r272, %f679;
|
|
setp.eq.s32 %p97, %r272, 1118925336;
|
|
add.s32 %r273, %r272, -1;
|
|
mov.b32 %f683, %r273;
|
|
add.f32 %f684, %f682, 0f37000000;
|
|
selp.f32 %f685, %f683, %f679, %p97;
|
|
selp.f32 %f135, %f684, %f682, %p97;
|
|
mul.f32 %f686, %f685, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f687, %f686;
|
|
fma.rn.f32 %f689, %f687, %f1046, %f685;
|
|
fma.rn.f32 %f691, %f687, %f1047, %f689;
|
|
mul.f32 %f692, %f691, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f693, %f692;
|
|
add.f32 %f694, %f687, 0f00000000;
|
|
ex2.approx.f32 %f695, %f694;
|
|
mul.f32 %f696, %f693, %f695;
|
|
setp.lt.f32 %p98, %f685, 0fC2D20000;
|
|
selp.f32 %f697, 0f00000000, %f696, %p98;
|
|
setp.gt.f32 %p99, %f685, 0f42D20000;
|
|
selp.f32 %f1125, 0f7F800000, %f697, %p99;
|
|
setp.eq.f32 %p100, %f1125, 0f7F800000;
|
|
@%p100 bra BB0_96;
|
|
|
|
fma.rn.f32 %f1125, %f1125, %f135, %f1125;
|
|
|
|
BB0_96:
|
|
setp.lt.f32 %p101, %f88, 0f00000000;
|
|
and.pred %p4, %p101, %p86;
|
|
mov.b32 %r274, %f1125;
|
|
xor.b32 %r275, %r274, -2147483648;
|
|
mov.b32 %f698, %r275;
|
|
selp.f32 %f1127, %f698, %f1125, %p4;
|
|
setp.eq.f32 %p103, %f88, 0f00000000;
|
|
@%p103 bra BB0_99;
|
|
bra.uni BB0_97;
|
|
|
|
BB0_99:
|
|
add.f32 %f701, %f88, %f88;
|
|
selp.f32 %f1127, %f701, 0f00000000, %p86;
|
|
bra.uni BB0_100;
|
|
|
|
BB0_97:
|
|
setp.geu.f32 %p104, %f88, 0f00000000;
|
|
@%p104 bra BB0_100;
|
|
|
|
mov.f32 %f1076, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f700, %f1076;
|
|
setp.neu.f32 %p105, %f700, 0f3EE66666;
|
|
selp.f32 %f1127, 0f7FFFFFFF, %f1127, %p105;
|
|
|
|
BB0_100:
|
|
abs.f32 %f1080, %f88;
|
|
add.f32 %f702, %f1080, 0f3EE66666;
|
|
mov.b32 %r276, %f702;
|
|
setp.lt.s32 %p107, %r276, 2139095040;
|
|
@%p107 bra BB0_105;
|
|
|
|
abs.f32 %f1081, %f88;
|
|
setp.gtu.f32 %p108, %f1081, 0f7F800000;
|
|
@%p108 bra BB0_104;
|
|
bra.uni BB0_102;
|
|
|
|
BB0_104:
|
|
add.f32 %f1127, %f88, 0f3EE66666;
|
|
bra.uni BB0_105;
|
|
|
|
BB0_102:
|
|
abs.f32 %f1082, %f88;
|
|
setp.neu.f32 %p109, %f1082, 0f7F800000;
|
|
@%p109 bra BB0_105;
|
|
|
|
selp.f32 %f1127, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
BB0_105:
|
|
mov.f32 %f1074, 0f3EE66666;
|
|
mov.f32 %f1055, 0fB5BFBE8E;
|
|
mov.f32 %f1054, 0fBF317200;
|
|
mov.f32 %f1053, 0f00000000;
|
|
mov.f32 %f1052, 0f35BFBE8E;
|
|
mov.f32 %f1051, 0f3F317200;
|
|
mov.f32 %f1050, 0f3DAAAABD;
|
|
mov.f32 %f1049, 0f3C4CAF63;
|
|
mov.f32 %f1048, 0f3B18F0FE;
|
|
setp.eq.f32 %p110, %f88, 0f3F800000;
|
|
selp.f32 %f146, 0f3F800000, %f1127, %p110;
|
|
abs.f32 %f147, %f89;
|
|
setp.lt.f32 %p111, %f147, 0f00800000;
|
|
mul.f32 %f705, %f147, 0f4B800000;
|
|
selp.f32 %f706, 0fC3170000, 0fC2FE0000, %p111;
|
|
selp.f32 %f707, %f705, %f147, %p111;
|
|
mov.b32 %r277, %f707;
|
|
and.b32 %r278, %r277, 8388607;
|
|
or.b32 %r279, %r278, 1065353216;
|
|
mov.b32 %f708, %r279;
|
|
shr.u32 %r280, %r277, 23;
|
|
cvt.rn.f32.u32 %f709, %r280;
|
|
add.f32 %f710, %f706, %f709;
|
|
setp.gt.f32 %p112, %f708, 0f3FB504F3;
|
|
mul.f32 %f711, %f708, 0f3F000000;
|
|
add.f32 %f712, %f710, 0f3F800000;
|
|
selp.f32 %f713, %f711, %f708, %p112;
|
|
selp.f32 %f714, %f712, %f710, %p112;
|
|
add.f32 %f715, %f713, 0fBF800000;
|
|
add.f32 %f704, %f713, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f703,%f704;
|
|
// inline asm
|
|
add.f32 %f716, %f715, %f715;
|
|
mul.f32 %f717, %f703, %f716;
|
|
mul.f32 %f718, %f717, %f717;
|
|
fma.rn.f32 %f721, %f1048, %f718, %f1049;
|
|
fma.rn.f32 %f723, %f721, %f718, %f1050;
|
|
mul.rn.f32 %f724, %f723, %f718;
|
|
mul.rn.f32 %f725, %f724, %f717;
|
|
sub.f32 %f726, %f715, %f717;
|
|
neg.f32 %f727, %f717;
|
|
add.f32 %f728, %f726, %f726;
|
|
fma.rn.f32 %f729, %f727, %f715, %f728;
|
|
mul.rn.f32 %f730, %f703, %f729;
|
|
add.f32 %f731, %f725, %f717;
|
|
sub.f32 %f732, %f717, %f731;
|
|
add.f32 %f733, %f725, %f732;
|
|
add.f32 %f734, %f730, %f733;
|
|
add.f32 %f735, %f731, %f734;
|
|
sub.f32 %f736, %f731, %f735;
|
|
add.f32 %f737, %f734, %f736;
|
|
mul.rn.f32 %f739, %f714, %f1051;
|
|
mul.rn.f32 %f741, %f714, %f1052;
|
|
add.f32 %f742, %f739, %f735;
|
|
sub.f32 %f743, %f739, %f742;
|
|
add.f32 %f744, %f735, %f743;
|
|
add.f32 %f745, %f737, %f744;
|
|
add.f32 %f746, %f741, %f745;
|
|
add.f32 %f747, %f742, %f746;
|
|
sub.f32 %f748, %f742, %f747;
|
|
add.f32 %f749, %f746, %f748;
|
|
mul.rn.f32 %f751, %f1074, %f747;
|
|
neg.f32 %f752, %f751;
|
|
fma.rn.f32 %f753, %f1074, %f747, %f752;
|
|
fma.rn.f32 %f754, %f1074, %f749, %f753;
|
|
fma.rn.f32 %f756, %f1053, %f747, %f754;
|
|
add.rn.f32 %f757, %f751, %f756;
|
|
neg.f32 %f758, %f757;
|
|
add.rn.f32 %f759, %f751, %f758;
|
|
add.rn.f32 %f760, %f759, %f756;
|
|
mov.b32 %r281, %f757;
|
|
setp.eq.s32 %p113, %r281, 1118925336;
|
|
add.s32 %r282, %r281, -1;
|
|
mov.b32 %f761, %r282;
|
|
add.f32 %f762, %f760, 0f37000000;
|
|
selp.f32 %f763, %f761, %f757, %p113;
|
|
selp.f32 %f148, %f762, %f760, %p113;
|
|
mul.f32 %f764, %f763, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f765, %f764;
|
|
fma.rn.f32 %f767, %f765, %f1054, %f763;
|
|
fma.rn.f32 %f769, %f765, %f1055, %f767;
|
|
mul.f32 %f770, %f769, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f771, %f770;
|
|
add.f32 %f772, %f765, 0f00000000;
|
|
ex2.approx.f32 %f773, %f772;
|
|
mul.f32 %f774, %f771, %f773;
|
|
setp.lt.f32 %p114, %f763, 0fC2D20000;
|
|
selp.f32 %f775, 0f00000000, %f774, %p114;
|
|
setp.gt.f32 %p115, %f763, 0f42D20000;
|
|
selp.f32 %f1128, 0f7F800000, %f775, %p115;
|
|
setp.eq.f32 %p116, %f1128, 0f7F800000;
|
|
@%p116 bra BB0_107;
|
|
|
|
fma.rn.f32 %f1128, %f1128, %f148, %f1128;
|
|
|
|
BB0_107:
|
|
setp.lt.f32 %p117, %f89, 0f00000000;
|
|
and.pred %p5, %p117, %p86;
|
|
mov.b32 %r283, %f1128;
|
|
xor.b32 %r284, %r283, -2147483648;
|
|
mov.b32 %f776, %r284;
|
|
selp.f32 %f1130, %f776, %f1128, %p5;
|
|
setp.eq.f32 %p119, %f89, 0f00000000;
|
|
@%p119 bra BB0_110;
|
|
bra.uni BB0_108;
|
|
|
|
BB0_110:
|
|
add.f32 %f779, %f89, %f89;
|
|
selp.f32 %f1130, %f779, 0f00000000, %p86;
|
|
bra.uni BB0_111;
|
|
|
|
BB0_108:
|
|
setp.geu.f32 %p120, %f89, 0f00000000;
|
|
@%p120 bra BB0_111;
|
|
|
|
mov.f32 %f1075, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f778, %f1075;
|
|
setp.neu.f32 %p121, %f778, 0f3EE66666;
|
|
selp.f32 %f1130, 0f7FFFFFFF, %f1130, %p121;
|
|
|
|
BB0_111:
|
|
abs.f32 %f1083, %f89;
|
|
add.f32 %f780, %f1083, 0f3EE66666;
|
|
mov.b32 %r285, %f780;
|
|
setp.lt.s32 %p123, %r285, 2139095040;
|
|
@%p123 bra BB0_116;
|
|
|
|
abs.f32 %f1084, %f89;
|
|
setp.gtu.f32 %p124, %f1084, 0f7F800000;
|
|
@%p124 bra BB0_115;
|
|
bra.uni BB0_113;
|
|
|
|
BB0_115:
|
|
add.f32 %f1130, %f89, 0f3EE66666;
|
|
bra.uni BB0_116;
|
|
|
|
BB0_113:
|
|
abs.f32 %f1085, %f89;
|
|
setp.neu.f32 %p125, %f1085, 0f7F800000;
|
|
@%p125 bra BB0_116;
|
|
|
|
selp.f32 %f1130, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
BB0_116:
|
|
mov.u32 %r374, 4;
|
|
setp.eq.f32 %p126, %f89, 0f3F800000;
|
|
selp.f32 %f781, 0f3F800000, %f1130, %p126;
|
|
cvt.u64.u32 %rd79, %r3;
|
|
cvt.u64.u32 %rd78, %r2;
|
|
mov.u64 %rd82, image;
|
|
cvta.global.u64 %rd77, %rd82;
|
|
// inline asm
|
|
call (%rd76), _rt_buffer_get_64, (%rd77, %r105, %r374, %rd78, %rd79, %rd31, %rd31);
|
|
// inline asm
|
|
cvt.sat.f32.f32 %f782, %f781;
|
|
mul.f32 %f783, %f782, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r288, %f783;
|
|
cvt.sat.f32.f32 %f784, %f146;
|
|
mul.f32 %f785, %f784, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r289, %f785;
|
|
cvt.sat.f32.f32 %f786, %f133;
|
|
mul.f32 %f787, %f786, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r290, %f787;
|
|
cvt.u16.u32 %rs15, %r288;
|
|
cvt.u16.u32 %rs16, %r290;
|
|
cvt.u16.u32 %rs17, %r289;
|
|
mov.u16 %rs18, 255;
|
|
st.v4.u8 [%rd76], {%rs15, %rs17, %rs16, %rs18};
|
|
ld.global.u32 %r407, [imageEnabled];
|
|
|
|
BB0_117:
|
|
and.b32 %r291, %r407, 4;
|
|
setp.eq.s32 %p127, %r291, 0;
|
|
@%p127 bra BB0_121;
|
|
|
|
ld.global.u32 %r292, [additive];
|
|
setp.eq.s32 %p128, %r292, 0;
|
|
cvt.u64.u32 %rd17, %r2;
|
|
cvt.u64.u32 %rd18, %r3;
|
|
mov.f32 %f788, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs19, %f788;}
|
|
|
|
// inline asm
|
|
@%p128 bra BB0_120;
|
|
|
|
mov.u64 %rd95, image_HDR;
|
|
cvta.global.u64 %rd84, %rd95;
|
|
mov.u32 %r296, 8;
|
|
// inline asm
|
|
call (%rd83), _rt_buffer_get_64, (%rd84, %r105, %r296, %rd17, %rd18, %rd31, %rd31);
|
|
// inline asm
|
|
ld.v4.u16 {%rs26, %rs27, %rs28, %rs29}, [%rd83];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f789, %rs26;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f790, %rs27;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f791, %rs28;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd89), _rt_buffer_get_64, (%rd84, %r105, %r296, %rd17, %rd18, %rd31, %rd31);
|
|
// inline asm
|
|
add.f32 %f792, %f87, %f789;
|
|
add.f32 %f793, %f88, %f790;
|
|
add.f32 %f794, %f89, %f791;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs25, %f794;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs24, %f793;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs23, %f792;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd89], {%rs23, %rs24, %rs25, %rs19};
|
|
bra.uni BB0_121;
|
|
|
|
BB0_120:
|
|
mov.u64 %rd102, image_HDR;
|
|
cvta.global.u64 %rd97, %rd102;
|
|
mov.u32 %r298, 8;
|
|
// inline asm
|
|
call (%rd96), _rt_buffer_get_64, (%rd97, %r105, %r298, %rd17, %rd18, %rd31, %rd31);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs32, %f89;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs31, %f88;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs30, %f87;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd96], {%rs30, %rs31, %rs32, %rs19};
|
|
|
|
BB0_121:
|
|
mov.f32 %f1131, 0f00000000;
|
|
mov.u32 %r375, 4;
|
|
ld.global.v2.u32 {%r301, %r302}, [pixelID];
|
|
cvt.u64.u32 %rd105, %r301;
|
|
cvt.u64.u32 %rd106, %r302;
|
|
mov.u64 %rd109, uvtangent;
|
|
cvta.global.u64 %rd104, %rd109;
|
|
// inline asm
|
|
call (%rd103), _rt_buffer_get_64, (%rd104, %r105, %r375, %rd105, %rd106, %rd31, %rd31);
|
|
// inline asm
|
|
ld.u32 %r94, [%rd103];
|
|
shr.u32 %r95, %r94, 16;
|
|
cvt.u16.u32 %rs33, %r95;
|
|
and.b16 %rs34, %rs33, 255;
|
|
cvt.u16.u32 %rs35, %r94;
|
|
or.b16 %rs36, %rs35, %rs34;
|
|
setp.eq.s16 %p129, %rs36, 0;
|
|
mov.f32 %f1132, %f1131;
|
|
mov.f32 %f1133, %f1131;
|
|
@%p129 bra BB0_123;
|
|
|
|
ld.u8 %rs37, [%rd103+1];
|
|
and.b16 %rs39, %rs35, 255;
|
|
cvt.rn.f32.u16 %f801, %rs39;
|
|
div.rn.f32 %f802, %f801, 0f437F0000;
|
|
fma.rn.f32 %f803, %f802, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f804, %rs37;
|
|
div.rn.f32 %f805, %f804, 0f437F0000;
|
|
fma.rn.f32 %f806, %f805, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f807, %rs34;
|
|
div.rn.f32 %f808, %f807, 0f437F0000;
|
|
fma.rn.f32 %f809, %f808, 0f40000000, 0fBF800000;
|
|
mul.f32 %f810, %f806, %f806;
|
|
fma.rn.f32 %f811, %f803, %f803, %f810;
|
|
fma.rn.f32 %f812, %f809, %f809, %f811;
|
|
sqrt.rn.f32 %f813, %f812;
|
|
rcp.rn.f32 %f814, %f813;
|
|
mul.f32 %f1131, %f803, %f814;
|
|
mul.f32 %f1132, %f806, %f814;
|
|
mul.f32 %f1133, %f809, %f814;
|
|
|
|
BB0_123:
|
|
mov.f32 %f1134, 0f00000000;
|
|
mov.u32 %r376, 4;
|
|
mul.f32 %f818, %f1088, %f1132;
|
|
mul.f32 %f819, %f1087, %f1133;
|
|
sub.f32 %f820, %f819, %f818;
|
|
mul.f32 %f821, %f1086, %f1133;
|
|
mul.f32 %f822, %f1088, %f1131;
|
|
sub.f32 %f823, %f822, %f821;
|
|
mul.f32 %f824, %f1087, %f1131;
|
|
mul.f32 %f825, %f1086, %f1132;
|
|
sub.f32 %f826, %f825, %f824;
|
|
setp.lt.u32 %p130, %r94, 16777216;
|
|
selp.f32 %f827, 0fBF800000, 0f3F800000, %p130;
|
|
mul.f32 %f828, %f820, %f827;
|
|
mul.f32 %f829, %f823, %f827;
|
|
mul.f32 %f830, %f826, %f827;
|
|
mul.f32 %f831, %f828, 0f00000000;
|
|
mul.f32 %f832, %f829, 0f00000000;
|
|
mul.f32 %f833, %f830, 0f00000000;
|
|
fma.rn.f32 %f834, %f1131, 0f3F5105EC, %f831;
|
|
fma.rn.f32 %f835, %f1132, 0f3F5105EC, %f832;
|
|
fma.rn.f32 %f836, %f1133, 0f3F5105EC, %f833;
|
|
mul.f32 %f165, %f1086, 0f3F13CD3A;
|
|
add.f32 %f166, %f165, %f834;
|
|
mul.f32 %f167, %f1087, 0f3F13CD3A;
|
|
add.f32 %f168, %f167, %f835;
|
|
mul.f32 %f169, %f1088, 0f3F13CD3A;
|
|
add.f32 %f170, %f169, %f836;
|
|
ld.global.v2.u32 {%r307, %r308}, [pixelID];
|
|
cvt.u64.u32 %rd112, %r307;
|
|
cvt.u64.u32 %rd113, %r308;
|
|
// inline asm
|
|
call (%rd110), _rt_buffer_get_64, (%rd104, %r105, %r376, %rd112, %rd113, %rd31, %rd31);
|
|
// inline asm
|
|
ld.u32 %r96, [%rd110];
|
|
shr.u32 %r97, %r96, 16;
|
|
cvt.u16.u32 %rs42, %r97;
|
|
and.b16 %rs43, %rs42, 255;
|
|
cvt.u16.u32 %rs44, %r96;
|
|
or.b16 %rs45, %rs44, %rs43;
|
|
setp.eq.s16 %p131, %rs45, 0;
|
|
mov.f32 %f1135, %f1134;
|
|
mov.f32 %f1136, %f1134;
|
|
@%p131 bra BB0_125;
|
|
|
|
ld.u8 %rs46, [%rd110+1];
|
|
and.b16 %rs48, %rs44, 255;
|
|
cvt.rn.f32.u16 %f837, %rs48;
|
|
div.rn.f32 %f838, %f837, 0f437F0000;
|
|
fma.rn.f32 %f839, %f838, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f840, %rs46;
|
|
div.rn.f32 %f841, %f840, 0f437F0000;
|
|
fma.rn.f32 %f842, %f841, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f843, %rs43;
|
|
div.rn.f32 %f844, %f843, 0f437F0000;
|
|
fma.rn.f32 %f845, %f844, 0f40000000, 0fBF800000;
|
|
mul.f32 %f846, %f842, %f842;
|
|
fma.rn.f32 %f847, %f839, %f839, %f846;
|
|
fma.rn.f32 %f848, %f845, %f845, %f847;
|
|
sqrt.rn.f32 %f849, %f848;
|
|
rcp.rn.f32 %f850, %f849;
|
|
mul.f32 %f1134, %f839, %f850;
|
|
mul.f32 %f1135, %f842, %f850;
|
|
mul.f32 %f1136, %f845, %f850;
|
|
|
|
BB0_125:
|
|
mov.f32 %f1137, 0f00000000;
|
|
mov.u32 %r377, 4;
|
|
mul.f32 %f854, %f1088, %f1135;
|
|
mul.f32 %f855, %f1087, %f1136;
|
|
sub.f32 %f856, %f855, %f854;
|
|
mul.f32 %f857, %f1086, %f1136;
|
|
mul.f32 %f858, %f1088, %f1134;
|
|
sub.f32 %f859, %f858, %f857;
|
|
mul.f32 %f860, %f1087, %f1134;
|
|
mul.f32 %f861, %f1086, %f1135;
|
|
sub.f32 %f862, %f861, %f860;
|
|
setp.lt.u32 %p132, %r96, 16777216;
|
|
selp.f32 %f863, 0fBF800000, 0f3F800000, %p132;
|
|
mul.f32 %f864, %f856, %f863;
|
|
mul.f32 %f865, %f859, %f863;
|
|
mul.f32 %f866, %f862, %f863;
|
|
mul.f32 %f867, %f864, 0f3F3504F3;
|
|
mul.f32 %f868, %f865, 0f3F3504F3;
|
|
mul.f32 %f869, %f866, 0f3F3504F3;
|
|
fma.rn.f32 %f870, %f1134, 0fBED105EC, %f867;
|
|
fma.rn.f32 %f871, %f1135, 0fBED105EC, %f868;
|
|
fma.rn.f32 %f872, %f1136, 0fBED105EC, %f869;
|
|
add.f32 %f177, %f165, %f870;
|
|
add.f32 %f178, %f167, %f871;
|
|
add.f32 %f179, %f169, %f872;
|
|
ld.global.v2.u32 {%r313, %r314}, [pixelID];
|
|
cvt.u64.u32 %rd119, %r313;
|
|
cvt.u64.u32 %rd120, %r314;
|
|
// inline asm
|
|
call (%rd117), _rt_buffer_get_64, (%rd104, %r105, %r377, %rd119, %rd120, %rd31, %rd31);
|
|
// inline asm
|
|
ld.u32 %r98, [%rd117];
|
|
shr.u32 %r99, %r98, 16;
|
|
cvt.u16.u32 %rs51, %r99;
|
|
and.b16 %rs52, %rs51, 255;
|
|
cvt.u16.u32 %rs53, %r98;
|
|
or.b16 %rs54, %rs53, %rs52;
|
|
setp.eq.s16 %p133, %rs54, 0;
|
|
mov.f32 %f1138, %f1137;
|
|
mov.f32 %f1139, %f1137;
|
|
@%p133 bra BB0_127;
|
|
|
|
ld.u8 %rs55, [%rd117+1];
|
|
and.b16 %rs57, %rs53, 255;
|
|
cvt.rn.f32.u16 %f873, %rs57;
|
|
div.rn.f32 %f874, %f873, 0f437F0000;
|
|
fma.rn.f32 %f875, %f874, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f876, %rs55;
|
|
div.rn.f32 %f877, %f876, 0f437F0000;
|
|
fma.rn.f32 %f878, %f877, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f879, %rs52;
|
|
div.rn.f32 %f880, %f879, 0f437F0000;
|
|
fma.rn.f32 %f881, %f880, 0f40000000, 0fBF800000;
|
|
mul.f32 %f882, %f878, %f878;
|
|
fma.rn.f32 %f883, %f875, %f875, %f882;
|
|
fma.rn.f32 %f884, %f881, %f881, %f883;
|
|
sqrt.rn.f32 %f885, %f884;
|
|
rcp.rn.f32 %f886, %f885;
|
|
mul.f32 %f1137, %f875, %f886;
|
|
mul.f32 %f1138, %f878, %f886;
|
|
mul.f32 %f1139, %f881, %f886;
|
|
|
|
BB0_127:
|
|
mul.f32 %f888, %f1088, %f1138;
|
|
mul.f32 %f889, %f1087, %f1139;
|
|
sub.f32 %f890, %f889, %f888;
|
|
mul.f32 %f891, %f1086, %f1139;
|
|
mul.f32 %f892, %f1088, %f1137;
|
|
sub.f32 %f893, %f892, %f891;
|
|
mul.f32 %f894, %f1087, %f1137;
|
|
mul.f32 %f895, %f1086, %f1138;
|
|
sub.f32 %f896, %f895, %f894;
|
|
setp.lt.u32 %p134, %r98, 16777216;
|
|
selp.f32 %f897, 0fBF800000, 0f3F800000, %p134;
|
|
mul.f32 %f898, %f890, %f897;
|
|
mul.f32 %f899, %f893, %f897;
|
|
mul.f32 %f900, %f896, %f897;
|
|
mul.f32 %f901, %f898, 0fBF3504F3;
|
|
mul.f32 %f902, %f899, 0fBF3504F3;
|
|
mul.f32 %f903, %f900, 0fBF3504F3;
|
|
fma.rn.f32 %f904, %f1137, 0fBED105EC, %f901;
|
|
fma.rn.f32 %f905, %f1138, 0fBED105EC, %f902;
|
|
fma.rn.f32 %f906, %f1139, 0fBED105EC, %f903;
|
|
add.f32 %f907, %f165, %f904;
|
|
add.f32 %f908, %f167, %f905;
|
|
add.f32 %f909, %f169, %f906;
|
|
ld.global.f32 %f910, [directDir];
|
|
mul.f32 %f911, %f166, %f910;
|
|
ld.global.f32 %f912, [directDir+4];
|
|
mul.f32 %f913, %f168, %f912;
|
|
neg.f32 %f914, %f913;
|
|
sub.f32 %f915, %f914, %f911;
|
|
ld.global.f32 %f916, [directDir+8];
|
|
mul.f32 %f917, %f170, %f916;
|
|
sub.f32 %f918, %f915, %f917;
|
|
cvt.sat.f32.f32 %f919, %f918;
|
|
mul.f32 %f920, %f104, %f919;
|
|
mul.f32 %f921, %f105, %f919;
|
|
mul.f32 %f922, %f106, %f919;
|
|
mul.f32 %f923, %f177, %f910;
|
|
mul.f32 %f924, %f178, %f912;
|
|
neg.f32 %f925, %f924;
|
|
sub.f32 %f926, %f925, %f923;
|
|
mul.f32 %f927, %f179, %f916;
|
|
sub.f32 %f928, %f926, %f927;
|
|
cvt.sat.f32.f32 %f929, %f928;
|
|
mul.f32 %f930, %f104, %f929;
|
|
mul.f32 %f931, %f105, %f929;
|
|
mul.f32 %f932, %f106, %f929;
|
|
mul.f32 %f933, %f907, %f910;
|
|
mul.f32 %f934, %f908, %f912;
|
|
neg.f32 %f935, %f934;
|
|
sub.f32 %f936, %f935, %f933;
|
|
mul.f32 %f937, %f909, %f916;
|
|
sub.f32 %f938, %f936, %f937;
|
|
cvt.sat.f32.f32 %f939, %f938;
|
|
mul.f32 %f940, %f104, %f939;
|
|
mul.f32 %f941, %f105, %f939;
|
|
mul.f32 %f942, %f106, %f939;
|
|
add.f32 %f943, %f920, %f930;
|
|
add.f32 %f944, %f921, %f931;
|
|
add.f32 %f945, %f922, %f932;
|
|
add.f32 %f946, %f943, %f940;
|
|
add.f32 %f947, %f944, %f941;
|
|
add.f32 %f948, %f945, %f942;
|
|
mul.f32 %f949, %f946, 0f3F13CD3A;
|
|
mul.f32 %f950, %f947, 0f3F13CD3A;
|
|
mul.f32 %f951, %f948, 0f3F13CD3A;
|
|
div.rn.f32 %f952, %f87, %f949;
|
|
div.rn.f32 %f953, %f88, %f950;
|
|
div.rn.f32 %f954, %f89, %f951;
|
|
setp.eq.f32 %p135, %f87, 0f00000000;
|
|
selp.f32 %f955, 0f00000000, %f952, %p135;
|
|
setp.eq.f32 %p136, %f88, 0f00000000;
|
|
selp.f32 %f956, 0f00000000, %f953, %p136;
|
|
setp.eq.f32 %p137, %f89, 0f00000000;
|
|
selp.f32 %f957, 0f00000000, %f954, %p137;
|
|
mul.f32 %f186, %f920, %f955;
|
|
mul.f32 %f187, %f921, %f956;
|
|
mul.f32 %f188, %f922, %f957;
|
|
mul.f32 %f189, %f930, %f955;
|
|
mul.f32 %f190, %f931, %f956;
|
|
mul.f32 %f191, %f932, %f957;
|
|
mul.f32 %f192, %f940, %f955;
|
|
mul.f32 %f193, %f941, %f956;
|
|
mul.f32 %f194, %f942, %f957;
|
|
ld.global.u32 %r317, [additive];
|
|
setp.eq.s32 %p138, %r317, 0;
|
|
cvt.u64.u32 %rd22, %r2;
|
|
cvt.u64.u32 %rd23, %r3;
|
|
mov.f32 %f887, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs60, %f887;}
|
|
|
|
// inline asm
|
|
@%p138 bra BB0_129;
|
|
|
|
mov.u64 %rd136, image_RNM0;
|
|
cvta.global.u64 %rd125, %rd136;
|
|
mov.u32 %r321, 8;
|
|
// inline asm
|
|
call (%rd124), _rt_buffer_get_64, (%rd125, %r105, %r321, %rd22, %rd23, %rd31, %rd31);
|
|
// inline asm
|
|
ld.v4.u16 {%rs67, %rs68, %rs69, %rs70}, [%rd124];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f958, %rs67;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f959, %rs68;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f960, %rs69;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd130), _rt_buffer_get_64, (%rd125, %r105, %r321, %rd22, %rd23, %rd31, %rd31);
|
|
// inline asm
|
|
add.f32 %f961, %f186, %f958;
|
|
add.f32 %f962, %f187, %f959;
|
|
add.f32 %f963, %f188, %f960;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs66, %f963;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs65, %f962;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs64, %f961;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd130], {%rs64, %rs65, %rs66, %rs60};
|
|
bra.uni BB0_130;
|
|
|
|
BB0_129:
|
|
mov.u64 %rd143, image_RNM0;
|
|
cvta.global.u64 %rd138, %rd143;
|
|
mov.u32 %r323, 8;
|
|
// inline asm
|
|
call (%rd137), _rt_buffer_get_64, (%rd138, %r105, %r323, %rd22, %rd23, %rd31, %rd31);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs73, %f188;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs72, %f187;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs71, %f186;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd137], {%rs71, %rs72, %rs73, %rs60};
|
|
|
|
BB0_130:
|
|
ld.global.u32 %r324, [additive];
|
|
setp.eq.s32 %p139, %r324, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs74, %f887;}
|
|
|
|
// inline asm
|
|
@%p139 bra BB0_132;
|
|
|
|
mov.u64 %rd156, image_RNM1;
|
|
cvta.global.u64 %rd145, %rd156;
|
|
mov.u32 %r328, 8;
|
|
// inline asm
|
|
call (%rd144), _rt_buffer_get_64, (%rd145, %r105, %r328, %rd22, %rd23, %rd31, %rd31);
|
|
// inline asm
|
|
ld.v4.u16 {%rs81, %rs82, %rs83, %rs84}, [%rd144];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f968, %rs81;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f969, %rs82;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f970, %rs83;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd150), _rt_buffer_get_64, (%rd145, %r105, %r328, %rd22, %rd23, %rd31, %rd31);
|
|
// inline asm
|
|
add.f32 %f971, %f189, %f968;
|
|
add.f32 %f972, %f190, %f969;
|
|
add.f32 %f973, %f191, %f970;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs80, %f973;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs79, %f972;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs78, %f971;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd150], {%rs78, %rs79, %rs80, %rs74};
|
|
bra.uni BB0_133;
|
|
|
|
BB0_132:
|
|
mov.u64 %rd163, image_RNM1;
|
|
cvta.global.u64 %rd158, %rd163;
|
|
mov.u32 %r330, 8;
|
|
// inline asm
|
|
call (%rd157), _rt_buffer_get_64, (%rd158, %r105, %r330, %rd22, %rd23, %rd31, %rd31);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs87, %f191;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs86, %f190;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs85, %f189;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd157], {%rs85, %rs86, %rs87, %rs74};
|
|
|
|
BB0_133:
|
|
ld.global.u32 %r331, [additive];
|
|
setp.eq.s32 %p140, %r331, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs88, %f887;}
|
|
|
|
// inline asm
|
|
@%p140 bra BB0_135;
|
|
|
|
mov.u64 %rd176, image_RNM2;
|
|
cvta.global.u64 %rd165, %rd176;
|
|
mov.u32 %r335, 8;
|
|
// inline asm
|
|
call (%rd164), _rt_buffer_get_64, (%rd165, %r105, %r335, %rd22, %rd23, %rd31, %rd31);
|
|
// inline asm
|
|
ld.v4.u16 {%rs95, %rs96, %rs97, %rs98}, [%rd164];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f978, %rs95;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f979, %rs96;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f980, %rs97;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd170), _rt_buffer_get_64, (%rd165, %r105, %r335, %rd22, %rd23, %rd31, %rd31);
|
|
// inline asm
|
|
add.f32 %f981, %f192, %f978;
|
|
add.f32 %f982, %f193, %f979;
|
|
add.f32 %f983, %f194, %f980;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs94, %f983;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs93, %f982;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs92, %f981;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd170], {%rs92, %rs93, %rs94, %rs88};
|
|
bra.uni BB0_153;
|
|
|
|
BB0_135:
|
|
mov.u64 %rd183, image_RNM2;
|
|
cvta.global.u64 %rd178, %rd183;
|
|
mov.u32 %r337, 8;
|
|
// inline asm
|
|
call (%rd177), _rt_buffer_get_64, (%rd178, %r105, %r337, %rd22, %rd23, %rd31, %rd31);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs101, %f194;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs100, %f193;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs99, %f192;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd177], {%rs99, %rs100, %rs101, %rs88};
|
|
|
|
BB0_153:
|
|
ret;
|
|
}
|
|
|
|
|