2098 lines
58 KiB
Plaintext
2098 lines
58 KiB
Plaintext
//
|
|
// Generated by NVIDIA NVVM Compiler
|
|
//
|
|
// Compiler Build ID: CL-31968024
|
|
// Cuda compilation tools, release 12.0, V12.0.76
|
|
// Based on NVVM 7.0.1
|
|
//
|
|
|
|
.version 8.0
|
|
.target sm_52
|
|
.address_size 64
|
|
|
|
// .globl __raygen__oxMain
|
|
.const .align 16 .b8 params[1184];
|
|
.global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
|
|
|
|
.visible .entry __raygen__oxMain()
|
|
{
|
|
.local .align 4 .b8 __local_depot0[28];
|
|
.reg .b64 %SP;
|
|
.reg .b64 %SPL;
|
|
.reg .pred %p<178>;
|
|
.reg .b16 %rs<84>;
|
|
.reg .f32 %f<1105>;
|
|
.reg .b32 %r<374>;
|
|
.reg .f64 %fd<5>;
|
|
.reg .b64 %rd<114>;
|
|
|
|
|
|
mov.u64 %SPL, __local_depot0;
|
|
add.u64 %rd1, %SPL, 0;
|
|
// begin inline asm
|
|
call (%r52), _optix_get_launch_index_x, ();
|
|
// end inline asm
|
|
// begin inline asm
|
|
call (%r53), _optix_get_launch_index_y, ();
|
|
// end inline asm
|
|
ld.const.u64 %rd24, [params+400];
|
|
cvta.to.global.u64 %rd25, %rd24;
|
|
ld.const.u32 %r58, [params+392];
|
|
mad.lo.s32 %r59, %r58, %r53, %r52;
|
|
mul.wide.u32 %rd26, %r59, 4;
|
|
add.s64 %rd2, %rd25, %rd26;
|
|
ld.global.v2.u8 {%rs7, %rs83}, [%rd2];
|
|
or.b16 %rs9, %rs7, %rs83;
|
|
and.b16 %rs10, %rs9, 255;
|
|
setp.eq.s16 %p8, %rs10, 0;
|
|
@%p8 bra $L__BB0_2;
|
|
|
|
ld.global.u8 %rs82, [%rd2+2];
|
|
bra.uni $L__BB0_3;
|
|
|
|
$L__BB0_2:
|
|
ld.global.u8 %rs82, [%rd2+2];
|
|
setp.eq.s16 %p9, %rs82, 0;
|
|
mov.f32 %f1071, 0f00000000;
|
|
mov.u16 %rs83, 0;
|
|
mov.f32 %f1072, %f1071;
|
|
mov.f32 %f1073, %f1071;
|
|
@%p9 bra $L__BB0_4;
|
|
|
|
$L__BB0_3:
|
|
cvt.rn.f32.u16 %f158, %rs7;
|
|
div.rn.f32 %f159, %f158, 0f437F0000;
|
|
fma.rn.f32 %f160, %f159, 0f40000000, 0fBF800000;
|
|
and.b16 %rs13, %rs83, 255;
|
|
cvt.rn.f32.u16 %f161, %rs13;
|
|
div.rn.f32 %f162, %f161, 0f437F0000;
|
|
fma.rn.f32 %f163, %f162, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f164, %rs82;
|
|
div.rn.f32 %f165, %f164, 0f437F0000;
|
|
fma.rn.f32 %f166, %f165, 0f40000000, 0fBF800000;
|
|
mul.f32 %f167, %f163, %f163;
|
|
fma.rn.f32 %f168, %f160, %f160, %f167;
|
|
fma.rn.f32 %f169, %f166, %f166, %f168;
|
|
sqrt.rn.f32 %f170, %f169;
|
|
rcp.rn.f32 %f171, %f170;
|
|
mul.f32 %f1073, %f171, %f166;
|
|
mul.f32 %f1072, %f171, %f163;
|
|
mul.f32 %f1071, %f160, %f171;
|
|
|
|
$L__BB0_4:
|
|
ld.const.v2.u32 {%r60, %r61}, [params];
|
|
add.s32 %r3, %r60, %r52;
|
|
add.s32 %r4, %r61, %r53;
|
|
setp.eq.f32 %p10, %f1071, 0f00000000;
|
|
setp.eq.f32 %p11, %f1072, 0f00000000;
|
|
and.pred %p12, %p10, %p11;
|
|
setp.eq.f32 %p13, %f1073, 0f00000000;
|
|
and.pred %p14, %p13, %p12;
|
|
@%p14 bra $L__BB0_142;
|
|
bra.uni $L__BB0_5;
|
|
|
|
$L__BB0_142:
|
|
ld.const.u32 %r51, [params+104];
|
|
and.b32 %r342, %r51, 1;
|
|
setp.eq.b32 %p170, %r342, 1;
|
|
mov.pred %p171, 0;
|
|
xor.pred %p172, %p170, %p171;
|
|
not.pred %p173, %p172;
|
|
@%p173 bra $L__BB0_144;
|
|
|
|
ld.const.u64 %rd88, [params+144];
|
|
cvta.to.global.u64 %rd89, %rd88;
|
|
ld.const.u32 %r343, [params+136];
|
|
mad.lo.s32 %r344, %r343, %r4, %r3;
|
|
mul.wide.u32 %rd90, %r344, 4;
|
|
add.s64 %rd91, %rd89, %rd90;
|
|
mov.u16 %rs63, 0;
|
|
st.global.v4.u8 [%rd91], {%rs63, %rs63, %rs63, %rs63};
|
|
|
|
$L__BB0_144:
|
|
and.b32 %r345, %r51, 8;
|
|
setp.eq.s32 %p174, %r345, 0;
|
|
@%p174 bra $L__BB0_146;
|
|
|
|
ld.const.u64 %rd92, [params+192];
|
|
cvta.to.global.u64 %rd93, %rd92;
|
|
ld.const.u32 %r346, [params+184];
|
|
mad.lo.s32 %r347, %r346, %r4, %r3;
|
|
mov.f32 %f993, 0f00000000;
|
|
cvt.rzi.u32.f32 %r348, %f993;
|
|
mul.wide.u32 %rd94, %r347, 2;
|
|
add.s64 %rd95, %rd93, %rd94;
|
|
mov.u16 %rs64, 0;
|
|
cvt.u16.u32 %rs65, %r348;
|
|
st.global.v2.u8 [%rd95], {%rs65, %rs64};
|
|
|
|
$L__BB0_146:
|
|
and.b32 %r349, %r51, 4;
|
|
setp.eq.s32 %p175, %r349, 0;
|
|
@%p175 bra $L__BB0_150;
|
|
|
|
ld.const.u32 %r350, [params+108];
|
|
setp.eq.s32 %p176, %r350, 0;
|
|
ld.const.u64 %rd96, [params+224];
|
|
cvta.to.global.u64 %rd97, %rd96;
|
|
ld.const.u32 %r351, [params+216];
|
|
mad.lo.s32 %r352, %r351, %r4, %r3;
|
|
mul.wide.u32 %rd98, %r352, 8;
|
|
add.s64 %rd22, %rd97, %rd98;
|
|
@%p176 bra $L__BB0_149;
|
|
|
|
ld.global.v4.u16 {%rs72, %rs73, %rs74, %rs75}, [%rd22];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f994, %rs72;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f995, %rs73;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f996, %rs74;}
|
|
|
|
// end inline asm
|
|
add.f32 %f997, %f994, 0f00000000;
|
|
add.f32 %f998, %f995, 0f00000000;
|
|
add.f32 %f999, %f996, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs71, %f999;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs70, %f998;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs69, %f997;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs76, 0;
|
|
st.global.v4.u16 [%rd22], {%rs69, %rs70, %rs71, %rs76};
|
|
bra.uni $L__BB0_150;
|
|
|
|
$L__BB0_5:
|
|
ld.const.v4.f32 {%f172, %f173, %f174, %f175}, [params+512];
|
|
neg.f32 %f13, %f173;
|
|
neg.f32 %f14, %f174;
|
|
mul.f32 %f176, %f1071, %f172;
|
|
mul.f32 %f177, %f1072, %f13;
|
|
sub.f32 %f178, %f177, %f176;
|
|
mul.f32 %f179, %f1073, %f174;
|
|
sub.f32 %f15, %f178, %f179;
|
|
setp.gtu.f32 %p15, %f15, 0f00000000;
|
|
ld.const.u32 %r5, [params+544];
|
|
setp.ne.s32 %p16, %r5, 0;
|
|
or.pred %p17, %p16, %p15;
|
|
@%p17 bra $L__BB0_7;
|
|
|
|
ld.const.u32 %r6, [params+104];
|
|
and.b32 %r64, %r6, 32;
|
|
setp.eq.s32 %p18, %r64, 0;
|
|
@%p18 bra $L__BB0_132;
|
|
bra.uni $L__BB0_7;
|
|
|
|
$L__BB0_132:
|
|
and.b32 %r328, %r6, 1;
|
|
setp.eq.b32 %p162, %r328, 1;
|
|
mov.pred %p163, 0;
|
|
xor.pred %p164, %p162, %p163;
|
|
not.pred %p165, %p164;
|
|
@%p165 bra $L__BB0_134;
|
|
|
|
ld.const.u64 %rd73, [params+144];
|
|
cvta.to.global.u64 %rd74, %rd73;
|
|
ld.const.u32 %r329, [params+136];
|
|
mad.lo.s32 %r330, %r329, %r4, %r3;
|
|
mul.wide.u32 %rd75, %r330, 4;
|
|
add.s64 %rd76, %rd74, %rd75;
|
|
mov.u16 %rs42, 0;
|
|
mov.u16 %rs43, 255;
|
|
st.global.v4.u8 [%rd76], {%rs42, %rs42, %rs42, %rs43};
|
|
|
|
$L__BB0_134:
|
|
and.b32 %r331, %r6, 8;
|
|
setp.eq.s32 %p166, %r331, 0;
|
|
@%p166 bra $L__BB0_136;
|
|
|
|
ld.const.u64 %rd77, [params+192];
|
|
cvta.to.global.u64 %rd78, %rd77;
|
|
ld.const.u32 %r332, [params+184];
|
|
mad.lo.s32 %r333, %r332, %r4, %r3;
|
|
mov.f32 %f981, 0f00000000;
|
|
cvt.rzi.u32.f32 %r334, %f981;
|
|
mul.wide.u32 %rd79, %r333, 2;
|
|
add.s64 %rd80, %rd78, %rd79;
|
|
cvt.u16.u32 %rs44, %r334;
|
|
mov.u16 %rs45, 255;
|
|
st.global.v2.u8 [%rd80], {%rs44, %rs45};
|
|
|
|
$L__BB0_136:
|
|
and.b32 %r335, %r6, 4;
|
|
setp.eq.s32 %p167, %r335, 0;
|
|
@%p167 bra $L__BB0_140;
|
|
|
|
ld.const.u32 %r336, [params+108];
|
|
setp.eq.s32 %p168, %r336, 0;
|
|
ld.const.u64 %rd81, [params+224];
|
|
cvta.to.global.u64 %rd82, %rd81;
|
|
ld.const.u32 %r337, [params+216];
|
|
mad.lo.s32 %r338, %r337, %r4, %r3;
|
|
mul.wide.u32 %rd83, %r338, 8;
|
|
add.s64 %rd21, %rd82, %rd83;
|
|
@%p168 bra $L__BB0_139;
|
|
|
|
ld.global.v4.u16 {%rs53, %rs54, %rs55, %rs56}, [%rd21];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f982, %rs53;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f983, %rs54;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f984, %rs55;}
|
|
|
|
// end inline asm
|
|
add.f32 %f985, %f982, 0f00000000;
|
|
add.f32 %f986, %f983, 0f00000000;
|
|
add.f32 %f987, %f984, 0f00000000;
|
|
mov.f32 %f988, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs52, %f988;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs51, %f987;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs50, %f986;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs49, %f985;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd21], {%rs49, %rs50, %rs51, %rs52};
|
|
bra.uni $L__BB0_140;
|
|
|
|
$L__BB0_7:
|
|
ld.const.u64 %rd27, [params+432];
|
|
cvta.to.global.u64 %rd28, %rd27;
|
|
ld.const.u32 %r65, [params+424];
|
|
mad.lo.s32 %r66, %r65, %r53, %r52;
|
|
mul.wide.u32 %rd29, %r66, 12;
|
|
add.s64 %rd30, %rd28, %rd29;
|
|
ld.global.f32 %f16, [%rd30];
|
|
mul.f32 %f181, %f16, 0f3456BF95;
|
|
ld.global.f32 %f17, [%rd30+4];
|
|
mul.f32 %f182, %f17, 0f3456BF95;
|
|
ld.global.f32 %f18, [%rd30+8];
|
|
mul.f32 %f183, %f18, 0f3456BF95;
|
|
abs.f32 %f184, %f1071;
|
|
div.rn.f32 %f185, %f181, %f184;
|
|
abs.f32 %f186, %f1072;
|
|
div.rn.f32 %f187, %f182, %f186;
|
|
abs.f32 %f188, %f1073;
|
|
div.rn.f32 %f189, %f183, %f188;
|
|
abs.f32 %f190, %f185;
|
|
abs.f32 %f191, %f187;
|
|
abs.f32 %f192, %f189;
|
|
mov.f32 %f193, 0f38D1B717;
|
|
max.f32 %f194, %f190, %f193;
|
|
max.f32 %f195, %f191, %f193;
|
|
max.f32 %f196, %f192, %f193;
|
|
fma.rn.f32 %f19, %f1071, %f194, %f16;
|
|
fma.rn.f32 %f20, %f1072, %f195, %f17;
|
|
fma.rn.f32 %f21, %f1073, %f196, %f18;
|
|
abs.f32 %f197, %f174;
|
|
abs.f32 %f198, %f172;
|
|
setp.gt.f32 %p19, %f198, %f197;
|
|
selp.f32 %f199, %f13, 0f00000000, %p19;
|
|
mov.f32 %f1075, 0f00000000;
|
|
selp.f32 %f200, %f172, %f14, %p19;
|
|
selp.f32 %f201, 0f00000000, %f173, %p19;
|
|
mul.f32 %f202, %f200, %f200;
|
|
fma.rn.f32 %f203, %f199, %f199, %f202;
|
|
fma.rn.f32 %f204, %f201, %f201, %f203;
|
|
sqrt.rn.f32 %f205, %f204;
|
|
rcp.rn.f32 %f206, %f205;
|
|
mul.f32 %f22, %f199, %f206;
|
|
mul.f32 %f23, %f200, %f206;
|
|
mul.f32 %f24, %f201, %f206;
|
|
mul.f32 %f207, %f174, %f23;
|
|
mul.f32 %f208, %f173, %f24;
|
|
sub.f32 %f25, %f207, %f208;
|
|
mul.f32 %f209, %f172, %f24;
|
|
mul.f32 %f210, %f174, %f22;
|
|
sub.f32 %f26, %f209, %f210;
|
|
mul.f32 %f211, %f173, %f22;
|
|
mul.f32 %f212, %f172, %f23;
|
|
sub.f32 %f27, %f211, %f212;
|
|
ld.const.u64 %rd31, [params+128];
|
|
cvta.to.global.u64 %rd32, %rd31;
|
|
ld.const.u32 %r67, [params+120];
|
|
mad.lo.s32 %r68, %r67, %r53, %r52;
|
|
mul.wide.u32 %rd33, %r68, 4;
|
|
add.s64 %rd3, %rd32, %rd33;
|
|
ld.const.u32 %r7, [params+540];
|
|
setp.lt.s32 %p20, %r7, 1;
|
|
@%p20 bra $L__BB0_36;
|
|
|
|
cvt.rn.f32.s32 %f214, %r7;
|
|
rcp.rn.f32 %f28, %f214;
|
|
ld.global.u32 %r366, [%rd3];
|
|
ld.const.f32 %f29, [params+536];
|
|
ld.const.u8 %rs15, [params+104];
|
|
and.b16 %rs16, %rs15, 32;
|
|
setp.eq.s16 %p21, %rs16, 0;
|
|
mov.u32 %r69, 0;
|
|
selp.f32 %f30, 0f3F800000, 0f41200000, %p21;
|
|
mul.f32 %f31, %f19, 0f3456BF95;
|
|
mul.f32 %f32, %f20, 0f3456BF95;
|
|
mul.f32 %f33, %f21, 0f3456BF95;
|
|
ld.const.u64 %rd4, [params+96];
|
|
add.s64 %rd5, %rd1, 24;
|
|
mov.u64 %rd34, __cudart_i2opi_f;
|
|
abs.f32 %f297, %f32;
|
|
abs.f32 %f298, %f31;
|
|
max.f32 %f299, %f298, %f297;
|
|
abs.f32 %f300, %f33;
|
|
max.f32 %f301, %f299, %f300;
|
|
mov.u32 %r363, %r69;
|
|
|
|
$L__BB0_9:
|
|
mov.u32 %r365, %r69;
|
|
|
|
$L__BB0_10:
|
|
cvt.rn.f32.s32 %f1009, %r363;
|
|
mad.lo.s32 %r71, %r366, 1664525, 1013904223;
|
|
and.b32 %r72, %r71, 16777215;
|
|
cvt.rn.f32.u32 %f215, %r72;
|
|
fma.rn.f32 %f216, %f215, 0f33800000, %f1009;
|
|
mul.f32 %f217, %f28, %f216;
|
|
mad.lo.s32 %r366, %r71, 1664525, 1013904223;
|
|
and.b32 %r73, %r366, 16777215;
|
|
cvt.rn.f32.u32 %f218, %r73;
|
|
cvt.rn.f32.s32 %f219, %r365;
|
|
fma.rn.f32 %f220, %f218, 0f33800000, %f219;
|
|
mul.f32 %f221, %f28, %f220;
|
|
sqrt.rn.f32 %f37, %f217;
|
|
mul.f32 %f38, %f221, 0f40C90FDB;
|
|
mul.f32 %f222, %f38, 0f3F22F983;
|
|
cvt.rni.s32.f32 %r373, %f222;
|
|
cvt.rn.f32.s32 %f223, %r373;
|
|
mov.f32 %f224, 0fBFC90FDA;
|
|
fma.rn.f32 %f225, %f223, %f224, %f38;
|
|
mov.f32 %f226, 0fB3A22168;
|
|
fma.rn.f32 %f227, %f223, %f226, %f225;
|
|
mov.f32 %f228, 0fA7C234C5;
|
|
fma.rn.f32 %f1079, %f223, %f228, %f227;
|
|
abs.f32 %f40, %f38;
|
|
setp.ltu.f32 %p22, %f40, 0f47CE4780;
|
|
mov.u32 %r370, %r373;
|
|
mov.f32 %f1076, %f1079;
|
|
@%p22 bra $L__BB0_18;
|
|
|
|
setp.eq.f32 %p23, %f40, 0f7F800000;
|
|
@%p23 bra $L__BB0_17;
|
|
bra.uni $L__BB0_12;
|
|
|
|
$L__BB0_17:
|
|
mov.f32 %f231, 0f00000000;
|
|
mul.rn.f32 %f1076, %f38, %f231;
|
|
mov.u32 %r370, 0;
|
|
bra.uni $L__BB0_18;
|
|
|
|
$L__BB0_12:
|
|
mov.b32 %r15, %f38;
|
|
bfe.u32 %r75, %r15, 23, 8;
|
|
add.s32 %r16, %r75, -128;
|
|
shl.b32 %r76, %r15, 8;
|
|
or.b32 %r17, %r76, -2147483648;
|
|
shr.u32 %r18, %r16, 5;
|
|
mov.u64 %rd111, 0;
|
|
mov.u32 %r367, 0;
|
|
mov.u64 %rd109, %rd1;
|
|
mov.u64 %rd110, %rd34;
|
|
|
|
$L__BB0_13:
|
|
.pragma "nounroll";
|
|
ld.global.nc.u32 %r77, [%rd110];
|
|
mad.wide.u32 %rd36, %r77, %r17, %rd111;
|
|
shr.u64 %rd111, %rd36, 32;
|
|
st.local.u32 [%rd109], %rd36;
|
|
add.s64 %rd110, %rd110, 4;
|
|
add.s64 %rd109, %rd109, 4;
|
|
add.s32 %r367, %r367, 1;
|
|
setp.ne.s32 %p24, %r367, 6;
|
|
@%p24 bra $L__BB0_13;
|
|
|
|
st.local.u32 [%rd5], %rd111;
|
|
mov.u32 %r78, 4;
|
|
sub.s32 %r21, %r78, %r18;
|
|
mov.u32 %r79, 6;
|
|
sub.s32 %r80, %r79, %r18;
|
|
mul.wide.s32 %rd37, %r80, 4;
|
|
add.s64 %rd38, %rd1, %rd37;
|
|
ld.local.u32 %r368, [%rd38];
|
|
ld.local.u32 %r369, [%rd38+-4];
|
|
and.b32 %r24, %r16, 31;
|
|
setp.eq.s32 %p25, %r24, 0;
|
|
@%p25 bra $L__BB0_16;
|
|
|
|
mov.u32 %r81, 32;
|
|
sub.s32 %r82, %r81, %r24;
|
|
shr.u32 %r83, %r369, %r82;
|
|
shl.b32 %r84, %r368, %r24;
|
|
add.s32 %r368, %r83, %r84;
|
|
mul.wide.s32 %rd39, %r21, 4;
|
|
add.s64 %rd40, %rd1, %rd39;
|
|
ld.local.u32 %r85, [%rd40];
|
|
shr.u32 %r86, %r85, %r82;
|
|
shl.b32 %r87, %r369, %r24;
|
|
add.s32 %r369, %r86, %r87;
|
|
|
|
$L__BB0_16:
|
|
and.b32 %r88, %r15, -2147483648;
|
|
shr.u32 %r89, %r369, 30;
|
|
shl.b32 %r90, %r368, 2;
|
|
or.b32 %r91, %r89, %r90;
|
|
shr.u32 %r92, %r91, 31;
|
|
shr.u32 %r93, %r368, 30;
|
|
add.s32 %r94, %r92, %r93;
|
|
neg.s32 %r95, %r94;
|
|
setp.eq.s32 %p26, %r88, 0;
|
|
selp.b32 %r370, %r94, %r95, %p26;
|
|
setp.ne.s32 %p27, %r92, 0;
|
|
xor.b32 %r96, %r88, -2147483648;
|
|
selp.b32 %r97, %r96, %r88, %p27;
|
|
selp.b32 %r98, -1, 0, %p27;
|
|
xor.b32 %r99, %r91, %r98;
|
|
shl.b32 %r100, %r369, 2;
|
|
xor.b32 %r101, %r100, %r98;
|
|
cvt.u64.u32 %rd41, %r99;
|
|
cvt.u64.u32 %rd42, %r101;
|
|
bfi.b64 %rd43, %rd41, %rd42, 32, 32;
|
|
cvt.rn.f64.s64 %fd1, %rd43;
|
|
mul.f64 %fd2, %fd1, 0d3BF921FB54442D19;
|
|
cvt.rn.f32.f64 %f229, %fd2;
|
|
setp.eq.s32 %p28, %r97, 0;
|
|
neg.f32 %f230, %f229;
|
|
selp.f32 %f1076, %f229, %f230, %p28;
|
|
|
|
$L__BB0_18:
|
|
add.s32 %r31, %r370, 1;
|
|
and.b32 %r32, %r31, 1;
|
|
setp.eq.s32 %p29, %r32, 0;
|
|
selp.f32 %f44, %f1076, 0f3F800000, %p29;
|
|
mul.rn.f32 %f45, %f1076, %f1076;
|
|
mov.f32 %f1077, 0fB94D4153;
|
|
@%p29 bra $L__BB0_20;
|
|
|
|
mov.f32 %f233, 0fBAB607ED;
|
|
mov.f32 %f234, 0f37CBAC00;
|
|
fma.rn.f32 %f1077, %f234, %f45, %f233;
|
|
|
|
$L__BB0_20:
|
|
selp.f32 %f235, 0f3C0885E4, 0f3D2AAABB, %p29;
|
|
fma.rn.f32 %f236, %f1077, %f45, %f235;
|
|
selp.f32 %f237, 0fBE2AAAA8, 0fBEFFFFFF, %p29;
|
|
fma.rn.f32 %f238, %f236, %f45, %f237;
|
|
mov.f32 %f239, 0f00000000;
|
|
fma.rn.f32 %f240, %f45, %f44, %f239;
|
|
fma.rn.f32 %f1078, %f238, %f240, %f44;
|
|
and.b32 %r103, %r31, 2;
|
|
setp.eq.s32 %p31, %r103, 0;
|
|
@%p31 bra $L__BB0_22;
|
|
|
|
mov.f32 %f242, 0fBF800000;
|
|
fma.rn.f32 %f1078, %f1078, %f242, %f239;
|
|
|
|
$L__BB0_22:
|
|
@%p22 bra $L__BB0_30;
|
|
|
|
setp.eq.f32 %p33, %f40, 0f7F800000;
|
|
@%p33 bra $L__BB0_29;
|
|
bra.uni $L__BB0_24;
|
|
|
|
$L__BB0_29:
|
|
mov.f32 %f245, 0f00000000;
|
|
mul.rn.f32 %f1079, %f38, %f245;
|
|
mov.u32 %r373, 0;
|
|
bra.uni $L__BB0_30;
|
|
|
|
$L__BB0_24:
|
|
mov.b32 %r33, %f38;
|
|
bfe.u32 %r104, %r33, 23, 8;
|
|
add.s32 %r34, %r104, -128;
|
|
shl.b32 %r105, %r33, 8;
|
|
or.b32 %r35, %r105, -2147483648;
|
|
shr.u32 %r36, %r34, 5;
|
|
mov.u64 %rd112, 0;
|
|
mov.u64 %rd113, %rd112;
|
|
|
|
$L__BB0_25:
|
|
.pragma "nounroll";
|
|
shl.b64 %rd46, %rd112, 2;
|
|
mov.u64 %rd47, __cudart_i2opi_f;
|
|
add.s64 %rd48, %rd47, %rd46;
|
|
ld.global.nc.u32 %r106, [%rd48];
|
|
mad.wide.u32 %rd49, %r106, %r35, %rd113;
|
|
shr.u64 %rd113, %rd49, 32;
|
|
add.s64 %rd50, %rd1, %rd46;
|
|
st.local.u32 [%rd50], %rd49;
|
|
cvt.u32.u64 %r107, %rd112;
|
|
add.s32 %r108, %r107, 1;
|
|
cvt.s64.s32 %rd112, %r108;
|
|
setp.ne.s32 %p34, %r108, 6;
|
|
@%p34 bra $L__BB0_25;
|
|
|
|
st.local.u32 [%rd5], %rd113;
|
|
mov.u32 %r109, 4;
|
|
sub.s32 %r37, %r109, %r36;
|
|
mov.u32 %r110, 6;
|
|
sub.s32 %r111, %r110, %r36;
|
|
mul.wide.s32 %rd51, %r111, 4;
|
|
add.s64 %rd52, %rd1, %rd51;
|
|
ld.local.u32 %r371, [%rd52];
|
|
ld.local.u32 %r372, [%rd52+-4];
|
|
and.b32 %r40, %r34, 31;
|
|
setp.eq.s32 %p35, %r40, 0;
|
|
@%p35 bra $L__BB0_28;
|
|
|
|
mov.u32 %r112, 32;
|
|
sub.s32 %r113, %r112, %r40;
|
|
shr.u32 %r114, %r372, %r113;
|
|
shl.b32 %r115, %r371, %r40;
|
|
add.s32 %r371, %r114, %r115;
|
|
mul.wide.s32 %rd53, %r37, 4;
|
|
add.s64 %rd54, %rd1, %rd53;
|
|
ld.local.u32 %r116, [%rd54];
|
|
shr.u32 %r117, %r116, %r113;
|
|
shl.b32 %r118, %r372, %r40;
|
|
add.s32 %r372, %r117, %r118;
|
|
|
|
$L__BB0_28:
|
|
and.b32 %r119, %r33, -2147483648;
|
|
shr.u32 %r120, %r372, 30;
|
|
shl.b32 %r121, %r371, 2;
|
|
or.b32 %r122, %r120, %r121;
|
|
shr.u32 %r123, %r122, 31;
|
|
shr.u32 %r124, %r371, 30;
|
|
add.s32 %r125, %r123, %r124;
|
|
neg.s32 %r126, %r125;
|
|
setp.eq.s32 %p36, %r119, 0;
|
|
selp.b32 %r373, %r125, %r126, %p36;
|
|
setp.ne.s32 %p37, %r123, 0;
|
|
xor.b32 %r127, %r119, -2147483648;
|
|
selp.b32 %r128, %r127, %r119, %p37;
|
|
selp.b32 %r129, -1, 0, %p37;
|
|
xor.b32 %r130, %r122, %r129;
|
|
shl.b32 %r131, %r372, 2;
|
|
xor.b32 %r132, %r131, %r129;
|
|
cvt.u64.u32 %rd55, %r130;
|
|
cvt.u64.u32 %rd56, %r132;
|
|
bfi.b64 %rd57, %rd55, %rd56, 32, 32;
|
|
cvt.rn.f64.s64 %fd3, %rd57;
|
|
mul.f64 %fd4, %fd3, 0d3BF921FB54442D19;
|
|
cvt.rn.f32.f64 %f243, %fd4;
|
|
setp.eq.s32 %p38, %r128, 0;
|
|
neg.f32 %f244, %f243;
|
|
selp.f32 %f1079, %f243, %f244, %p38;
|
|
|
|
$L__BB0_30:
|
|
mul.f32 %f54, %f37, %f1078;
|
|
and.b32 %r47, %r373, 1;
|
|
setp.eq.s32 %p39, %r47, 0;
|
|
selp.f32 %f55, %f1079, 0f3F800000, %p39;
|
|
mul.rn.f32 %f56, %f1079, %f1079;
|
|
mov.f32 %f1080, 0fB94D4153;
|
|
@%p39 bra $L__BB0_32;
|
|
|
|
mov.f32 %f247, 0fBAB607ED;
|
|
mov.f32 %f248, 0f37CBAC00;
|
|
fma.rn.f32 %f1080, %f248, %f56, %f247;
|
|
|
|
$L__BB0_32:
|
|
selp.f32 %f249, 0f3C0885E4, 0f3D2AAABB, %p39;
|
|
fma.rn.f32 %f250, %f1080, %f56, %f249;
|
|
selp.f32 %f251, 0fBE2AAAA8, 0fBEFFFFFF, %p39;
|
|
fma.rn.f32 %f252, %f250, %f56, %f251;
|
|
mov.f32 %f253, 0f00000000;
|
|
fma.rn.f32 %f254, %f56, %f55, %f253;
|
|
fma.rn.f32 %f1081, %f252, %f254, %f55;
|
|
and.b32 %r134, %r373, 2;
|
|
setp.eq.s32 %p41, %r134, 0;
|
|
@%p41 bra $L__BB0_34;
|
|
|
|
mov.f32 %f256, 0fBF800000;
|
|
fma.rn.f32 %f1081, %f1081, %f256, %f253;
|
|
|
|
$L__BB0_34:
|
|
mul.f32 %f266, %f54, %f54;
|
|
mov.f32 %f267, 0f3F800000;
|
|
sub.f32 %f268, %f267, %f266;
|
|
mul.f32 %f269, %f37, %f1081;
|
|
mul.f32 %f270, %f269, %f269;
|
|
sub.f32 %f271, %f268, %f270;
|
|
max.f32 %f272, %f253, %f271;
|
|
sqrt.rn.f32 %f273, %f272;
|
|
mul.f32 %f274, %f22, %f269;
|
|
mul.f32 %f275, %f23, %f269;
|
|
mul.f32 %f276, %f24, %f269;
|
|
fma.rn.f32 %f277, %f25, %f54, %f274;
|
|
fma.rn.f32 %f278, %f26, %f54, %f275;
|
|
fma.rn.f32 %f279, %f27, %f54, %f276;
|
|
fma.rn.f32 %f280, %f172, %f273, %f277;
|
|
fma.rn.f32 %f281, %f173, %f273, %f278;
|
|
fma.rn.f32 %f282, %f174, %f273, %f279;
|
|
add.f32 %f283, %f172, %f280;
|
|
add.f32 %f284, %f173, %f281;
|
|
add.f32 %f285, %f174, %f282;
|
|
mul.f32 %f286, %f29, %f283;
|
|
mul.f32 %f287, %f29, %f284;
|
|
mul.f32 %f288, %f29, %f285;
|
|
sub.f32 %f289, %f286, %f172;
|
|
sub.f32 %f290, %f287, %f173;
|
|
sub.f32 %f291, %f288, %f174;
|
|
mul.f32 %f292, %f290, %f290;
|
|
fma.rn.f32 %f293, %f289, %f289, %f292;
|
|
fma.rn.f32 %f294, %f291, %f291, %f293;
|
|
sqrt.rn.f32 %f295, %f294;
|
|
rcp.rn.f32 %f296, %f295;
|
|
mul.f32 %f260, %f296, %f289;
|
|
mul.f32 %f261, %f296, %f290;
|
|
mul.f32 %f262, %f296, %f291;
|
|
mov.f32 %f302, 0f38D1B717;
|
|
max.f32 %f303, %f301, %f302;
|
|
mul.f32 %f263, %f30, %f303;
|
|
mov.f32 %f264, 0f6C4ECB8F;
|
|
mov.u32 %r171, 2;
|
|
mov.u32 %r173, 1;
|
|
mov.u32 %r174, 1065353216;
|
|
mov.u32 %r205, 0;
|
|
// begin inline asm
|
|
call(%r135,%r136,%r137,%r138,%r139,%r140,%r141,%r142,%r143,%r144,%r145,%r146,%r147,%r148,%r149,%r150,%r151,%r152,%r153,%r154,%r155,%r156,%r157,%r158,%r159,%r160,%r161,%r162,%r163,%r164,%r165,%r166),_optix_trace_typed_32,(%r205,%rd4,%f19,%f20,%f21,%f260,%f261,%f262,%f263,%f264,%f253,%r173,%r205,%r173,%r171,%r173,%r173,%r174,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205,%r205);
|
|
// end inline asm
|
|
mov.b32 %f304, %r135;
|
|
add.f32 %f1075, %f1075, %f304;
|
|
add.s32 %r365, %r365, 1;
|
|
setp.lt.s32 %p42, %r365, %r7;
|
|
@%p42 bra $L__BB0_10;
|
|
|
|
add.s32 %r363, %r363, 1;
|
|
setp.lt.s32 %p43, %r363, %r7;
|
|
@%p43 bra $L__BB0_9;
|
|
|
|
$L__BB0_36:
|
|
setp.eq.s32 %p44, %r7, 0;
|
|
mov.f32 %f1083, 0f3F800000;
|
|
@%p44 bra $L__BB0_38;
|
|
|
|
mul.lo.s32 %r206, %r7, %r7;
|
|
cvt.rn.f32.s32 %f306, %r206;
|
|
div.rn.f32 %f1083, %f1075, %f306;
|
|
|
|
$L__BB0_38:
|
|
mul.f32 %f307, %f17, %f26;
|
|
fma.rn.f32 %f308, %f16, %f25, %f307;
|
|
fma.rn.f32 %f309, %f18, %f27, %f308;
|
|
ld.const.v4.f32 {%f310, %f311, %f312, %f313}, [params+560];
|
|
fma.rn.f32 %f318, %f309, %f310, %f312;
|
|
mul.f32 %f319, %f17, %f23;
|
|
fma.rn.f32 %f320, %f16, %f22, %f319;
|
|
fma.rn.f32 %f321, %f18, %f24, %f320;
|
|
fma.rn.f32 %f322, %f321, %f311, %f313;
|
|
ld.const.u64 %rd59, [params+552];
|
|
tex.2d.v4.f32.f32 {%f323, %f324, %f325, %f326}, [%rd59, {%f318, %f322}];
|
|
min.f32 %f327, %f323, %f324;
|
|
min.f32 %f328, %f327, %f325;
|
|
mul.f32 %f66, %f1083, %f328;
|
|
ld.const.f32 %f329, [params+524];
|
|
mul.f32 %f330, %f1083, %f329;
|
|
ld.const.v2.f32 {%f331, %f332}, [params+528];
|
|
mul.f32 %f335, %f1083, %f331;
|
|
mul.f32 %f336, %f1083, %f332;
|
|
mul.f32 %f337, %f323, %f330;
|
|
mul.f32 %f338, %f324, %f335;
|
|
mul.f32 %f339, %f325, %f336;
|
|
cvt.sat.f32.f32 %f340, %f15;
|
|
mul.f32 %f341, %f337, %f340;
|
|
mul.f32 %f342, %f338, %f340;
|
|
mul.f32 %f343, %f340, %f339;
|
|
setp.eq.s32 %p45, %r5, 0;
|
|
selp.f32 %f67, %f341, %f337, %p45;
|
|
selp.f32 %f68, %f342, %f338, %p45;
|
|
selp.f32 %f69, %f343, %f339, %p45;
|
|
ld.const.u32 %r50, [params+104];
|
|
and.b32 %r207, %r50, 8;
|
|
setp.eq.s32 %p46, %r207, 0;
|
|
@%p46 bra $L__BB0_52;
|
|
|
|
mov.f32 %f348, 0f3EE8BA2E;
|
|
abs.f32 %f71, %f66;
|
|
setp.lt.f32 %p47, %f71, 0f00800000;
|
|
mul.f32 %f350, %f71, 0f4B800000;
|
|
selp.f32 %f351, %f350, %f71, %p47;
|
|
selp.f32 %f352, 0fC3170000, 0fC2FE0000, %p47;
|
|
mov.b32 %r210, %f351;
|
|
and.b32 %r211, %r210, 8388607;
|
|
or.b32 %r212, %r211, 1065353216;
|
|
mov.b32 %f353, %r212;
|
|
shr.u32 %r213, %r210, 23;
|
|
cvt.rn.f32.u32 %f354, %r213;
|
|
add.f32 %f355, %f352, %f354;
|
|
setp.gt.f32 %p48, %f353, 0f3FB504F3;
|
|
mul.f32 %f356, %f353, 0f3F000000;
|
|
add.f32 %f357, %f355, 0f3F800000;
|
|
selp.f32 %f358, %f357, %f355, %p48;
|
|
selp.f32 %f359, %f356, %f353, %p48;
|
|
add.f32 %f360, %f359, 0fBF800000;
|
|
add.f32 %f361, %f359, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f362, %f361;
|
|
add.f32 %f363, %f360, %f360;
|
|
mul.f32 %f364, %f363, %f362;
|
|
mul.f32 %f365, %f364, %f364;
|
|
mov.f32 %f366, 0f3C4CAF63;
|
|
mov.f32 %f367, 0f3B18F0FE;
|
|
fma.rn.f32 %f368, %f367, %f365, %f366;
|
|
mov.f32 %f369, 0f3DAAAABD;
|
|
fma.rn.f32 %f370, %f368, %f365, %f369;
|
|
mul.rn.f32 %f371, %f370, %f365;
|
|
mul.rn.f32 %f372, %f371, %f364;
|
|
sub.f32 %f373, %f360, %f364;
|
|
add.f32 %f374, %f373, %f373;
|
|
neg.f32 %f375, %f364;
|
|
fma.rn.f32 %f376, %f375, %f360, %f374;
|
|
mul.rn.f32 %f377, %f362, %f376;
|
|
add.f32 %f378, %f372, %f364;
|
|
sub.f32 %f379, %f364, %f378;
|
|
add.f32 %f380, %f372, %f379;
|
|
add.f32 %f381, %f377, %f380;
|
|
add.f32 %f382, %f378, %f381;
|
|
sub.f32 %f383, %f378, %f382;
|
|
add.f32 %f384, %f381, %f383;
|
|
mov.f32 %f385, 0f3F317200;
|
|
mul.rn.f32 %f386, %f358, %f385;
|
|
mov.f32 %f387, 0f35BFBE8E;
|
|
mul.rn.f32 %f388, %f358, %f387;
|
|
add.f32 %f389, %f386, %f382;
|
|
sub.f32 %f390, %f386, %f389;
|
|
add.f32 %f391, %f382, %f390;
|
|
add.f32 %f392, %f384, %f391;
|
|
add.f32 %f393, %f388, %f392;
|
|
add.f32 %f394, %f389, %f393;
|
|
sub.f32 %f395, %f389, %f394;
|
|
add.f32 %f396, %f393, %f395;
|
|
mul.rn.f32 %f397, %f348, %f394;
|
|
neg.f32 %f398, %f397;
|
|
fma.rn.f32 %f399, %f348, %f394, %f398;
|
|
fma.rn.f32 %f400, %f348, %f396, %f399;
|
|
mov.f32 %f401, 0f00000000;
|
|
fma.rn.f32 %f402, %f401, %f394, %f400;
|
|
add.rn.f32 %f403, %f397, %f402;
|
|
neg.f32 %f404, %f403;
|
|
add.rn.f32 %f405, %f397, %f404;
|
|
add.rn.f32 %f406, %f405, %f402;
|
|
mov.b32 %r214, %f403;
|
|
setp.eq.s32 %p49, %r214, 1118925336;
|
|
add.s32 %r215, %r214, -1;
|
|
mov.b32 %f407, %r215;
|
|
add.f32 %f408, %f406, 0f37000000;
|
|
selp.f32 %f72, %f408, %f406, %p49;
|
|
selp.f32 %f409, %f407, %f403, %p49;
|
|
mov.f32 %f410, 0f3FB8AA3B;
|
|
mul.rn.f32 %f411, %f409, %f410;
|
|
cvt.rzi.f32.f32 %f412, %f411;
|
|
abs.f32 %f413, %f412;
|
|
setp.gt.f32 %p50, %f413, 0f42FC0000;
|
|
mov.b32 %r216, %f412;
|
|
and.b32 %r217, %r216, -2147483648;
|
|
or.b32 %r218, %r217, 1123811328;
|
|
mov.b32 %f414, %r218;
|
|
selp.f32 %f415, %f414, %f412, %p50;
|
|
mov.f32 %f416, 0fBF317218;
|
|
fma.rn.f32 %f417, %f415, %f416, %f409;
|
|
mov.f32 %f418, 0f3102E308;
|
|
fma.rn.f32 %f419, %f415, %f418, %f417;
|
|
mul.f32 %f420, %f419, 0f3FB8AA3B;
|
|
add.f32 %f421, %f415, 0f4B40007F;
|
|
mov.b32 %r219, %f421;
|
|
shl.b32 %r220, %r219, 23;
|
|
mov.b32 %f422, %r220;
|
|
ex2.approx.ftz.f32 %f423, %f420;
|
|
mul.f32 %f73, %f423, %f422;
|
|
setp.eq.f32 %p51, %f73, 0f7F800000;
|
|
mov.f32 %f1084, 0f7F800000;
|
|
@%p51 bra $L__BB0_41;
|
|
|
|
fma.rn.f32 %f1084, %f73, %f72, %f73;
|
|
|
|
$L__BB0_41:
|
|
mov.f32 %f1015, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f1014, %f1015;
|
|
add.f32 %f1013, %f1014, %f1014;
|
|
mov.f32 %f1012, 0f3EE8BA2E;
|
|
sub.f32 %f1011, %f1012, %f1013;
|
|
abs.f32 %f1010, %f1011;
|
|
setp.lt.f32 %p52, %f66, 0f00000000;
|
|
setp.eq.f32 %p53, %f1010, 0f3F800000;
|
|
and.pred %p1, %p52, %p53;
|
|
setp.eq.f32 %p54, %f66, 0f00000000;
|
|
@%p54 bra $L__BB0_45;
|
|
bra.uni $L__BB0_42;
|
|
|
|
$L__BB0_45:
|
|
add.f32 %f428, %f66, %f66;
|
|
selp.f32 %f1086, %f428, 0f00000000, %p53;
|
|
bra.uni $L__BB0_46;
|
|
|
|
$L__BB0_149:
|
|
mov.f32 %f1002, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs79, %f1002;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs78, %f1002;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs77, %f1002;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs80, 0;
|
|
st.global.v4.u16 [%rd22], {%rs77, %rs78, %rs79, %rs80};
|
|
|
|
$L__BB0_150:
|
|
and.b32 %r353, %r51, 64;
|
|
setp.eq.s32 %p177, %r353, 0;
|
|
@%p177 bra $L__BB0_152;
|
|
|
|
ld.const.u64 %rd99, [params+208];
|
|
cvta.to.global.u64 %rd100, %rd99;
|
|
ld.const.u32 %r354, [params+200];
|
|
mad.lo.s32 %r355, %r354, %r4, %r3;
|
|
mul.wide.u32 %rd101, %r355, 4;
|
|
add.s64 %rd102, %rd100, %rd101;
|
|
mov.u16 %rs81, 0;
|
|
st.global.v4.u8 [%rd102], {%rs81, %rs81, %rs81, %rs81};
|
|
bra.uni $L__BB0_152;
|
|
|
|
$L__BB0_42:
|
|
mov.b32 %r221, %f1084;
|
|
xor.b32 %r222, %r221, -2147483648;
|
|
mov.b32 %f424, %r222;
|
|
selp.f32 %f1086, %f424, %f1084, %p1;
|
|
setp.geu.f32 %p55, %f66, 0f00000000;
|
|
@%p55 bra $L__BB0_46;
|
|
|
|
mov.f32 %f425, 0f3EE8BA2E;
|
|
cvt.rzi.f32.f32 %f426, %f425;
|
|
setp.eq.f32 %p56, %f426, 0f3EE8BA2E;
|
|
@%p56 bra $L__BB0_46;
|
|
|
|
mov.f32 %f1086, 0f7FFFFFFF;
|
|
|
|
$L__BB0_46:
|
|
abs.f32 %f1016, %f66;
|
|
add.f32 %f429, %f1016, 0f3EE8BA2E;
|
|
mov.b32 %r223, %f429;
|
|
setp.lt.s32 %p58, %r223, 2139095040;
|
|
@%p58 bra $L__BB0_51;
|
|
|
|
abs.f32 %f1017, %f66;
|
|
setp.gtu.f32 %p59, %f1017, 0f7F800000;
|
|
@%p59 bra $L__BB0_50;
|
|
bra.uni $L__BB0_48;
|
|
|
|
$L__BB0_50:
|
|
add.f32 %f1086, %f66, 0f3EE8BA2E;
|
|
bra.uni $L__BB0_51;
|
|
|
|
$L__BB0_48:
|
|
abs.f32 %f1018, %f66;
|
|
setp.neu.f32 %p60, %f1018, 0f7F800000;
|
|
@%p60 bra $L__BB0_51;
|
|
|
|
selp.f32 %f1086, 0fFF800000, 0f7F800000, %p1;
|
|
|
|
$L__BB0_51:
|
|
ld.const.u32 %r362, [params+184];
|
|
mad.lo.s32 %r361, %r362, %r4, %r3;
|
|
cvt.u64.u32 %rd108, %r361;
|
|
ld.const.u64 %rd107, [params+192];
|
|
cvta.to.global.u64 %rd106, %rd107;
|
|
mul.f32 %f430, %f1086, 0f437F0000;
|
|
setp.eq.f32 %p61, %f66, 0f3F800000;
|
|
selp.f32 %f431, 0f437F0000, %f430, %p61;
|
|
cvt.rzi.u32.f32 %r224, %f431;
|
|
shl.b64 %rd61, %rd108, 1;
|
|
add.s64 %rd62, %rd106, %rd61;
|
|
cvt.u16.u32 %rs17, %r224;
|
|
mov.u16 %rs18, 255;
|
|
st.global.v2.u8 [%rd62], {%rs17, %rs18};
|
|
|
|
$L__BB0_52:
|
|
ld.const.u32 %r360, [params+104];
|
|
and.b32 %r225, %r360, 1;
|
|
setp.eq.b32 %p62, %r225, 1;
|
|
mov.pred %p63, 0;
|
|
xor.pred %p64, %p62, %p63;
|
|
not.pred %p65, %p64;
|
|
@%p65 bra $L__BB0_126;
|
|
|
|
mov.f32 %f436, 0f3EE66666;
|
|
abs.f32 %f83, %f67;
|
|
setp.lt.f32 %p66, %f83, 0f00800000;
|
|
mul.f32 %f438, %f83, 0f4B800000;
|
|
selp.f32 %f439, %f438, %f83, %p66;
|
|
selp.f32 %f440, 0fC3170000, 0fC2FE0000, %p66;
|
|
mov.b32 %r226, %f439;
|
|
and.b32 %r227, %r226, 8388607;
|
|
or.b32 %r228, %r227, 1065353216;
|
|
mov.b32 %f441, %r228;
|
|
shr.u32 %r229, %r226, 23;
|
|
cvt.rn.f32.u32 %f442, %r229;
|
|
add.f32 %f443, %f440, %f442;
|
|
setp.gt.f32 %p67, %f441, 0f3FB504F3;
|
|
mul.f32 %f444, %f441, 0f3F000000;
|
|
add.f32 %f445, %f443, 0f3F800000;
|
|
selp.f32 %f446, %f445, %f443, %p67;
|
|
selp.f32 %f447, %f444, %f441, %p67;
|
|
add.f32 %f448, %f447, 0fBF800000;
|
|
add.f32 %f449, %f447, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f450, %f449;
|
|
add.f32 %f451, %f448, %f448;
|
|
mul.f32 %f452, %f451, %f450;
|
|
mul.f32 %f453, %f452, %f452;
|
|
mov.f32 %f454, 0f3C4CAF63;
|
|
mov.f32 %f455, 0f3B18F0FE;
|
|
fma.rn.f32 %f456, %f455, %f453, %f454;
|
|
mov.f32 %f457, 0f3DAAAABD;
|
|
fma.rn.f32 %f458, %f456, %f453, %f457;
|
|
mul.rn.f32 %f459, %f458, %f453;
|
|
mul.rn.f32 %f460, %f459, %f452;
|
|
sub.f32 %f461, %f448, %f452;
|
|
add.f32 %f462, %f461, %f461;
|
|
neg.f32 %f463, %f452;
|
|
fma.rn.f32 %f464, %f463, %f448, %f462;
|
|
mul.rn.f32 %f465, %f450, %f464;
|
|
add.f32 %f466, %f460, %f452;
|
|
sub.f32 %f467, %f452, %f466;
|
|
add.f32 %f468, %f460, %f467;
|
|
add.f32 %f469, %f465, %f468;
|
|
add.f32 %f470, %f466, %f469;
|
|
sub.f32 %f471, %f466, %f470;
|
|
add.f32 %f472, %f469, %f471;
|
|
mov.f32 %f473, 0f3F317200;
|
|
mul.rn.f32 %f474, %f446, %f473;
|
|
mov.f32 %f475, 0f35BFBE8E;
|
|
mul.rn.f32 %f476, %f446, %f475;
|
|
add.f32 %f477, %f474, %f470;
|
|
sub.f32 %f478, %f474, %f477;
|
|
add.f32 %f479, %f470, %f478;
|
|
add.f32 %f480, %f472, %f479;
|
|
add.f32 %f481, %f476, %f480;
|
|
add.f32 %f482, %f477, %f481;
|
|
sub.f32 %f483, %f477, %f482;
|
|
add.f32 %f484, %f481, %f483;
|
|
mul.rn.f32 %f485, %f436, %f482;
|
|
neg.f32 %f486, %f485;
|
|
fma.rn.f32 %f487, %f436, %f482, %f486;
|
|
fma.rn.f32 %f488, %f436, %f484, %f487;
|
|
mov.f32 %f489, 0f00000000;
|
|
fma.rn.f32 %f490, %f489, %f482, %f488;
|
|
add.rn.f32 %f491, %f485, %f490;
|
|
neg.f32 %f492, %f491;
|
|
add.rn.f32 %f493, %f485, %f492;
|
|
add.rn.f32 %f494, %f493, %f490;
|
|
mov.b32 %r230, %f491;
|
|
setp.eq.s32 %p68, %r230, 1118925336;
|
|
add.s32 %r231, %r230, -1;
|
|
mov.b32 %f495, %r231;
|
|
add.f32 %f496, %f494, 0f37000000;
|
|
selp.f32 %f84, %f496, %f494, %p68;
|
|
selp.f32 %f497, %f495, %f491, %p68;
|
|
mov.f32 %f498, 0f3FB8AA3B;
|
|
mul.rn.f32 %f499, %f497, %f498;
|
|
cvt.rzi.f32.f32 %f500, %f499;
|
|
abs.f32 %f501, %f500;
|
|
setp.gt.f32 %p69, %f501, 0f42FC0000;
|
|
mov.b32 %r232, %f500;
|
|
and.b32 %r233, %r232, -2147483648;
|
|
or.b32 %r234, %r233, 1123811328;
|
|
mov.b32 %f502, %r234;
|
|
selp.f32 %f503, %f502, %f500, %p69;
|
|
mov.f32 %f504, 0fBF317218;
|
|
fma.rn.f32 %f505, %f503, %f504, %f497;
|
|
mov.f32 %f506, 0f3102E308;
|
|
fma.rn.f32 %f507, %f503, %f506, %f505;
|
|
mul.f32 %f508, %f507, 0f3FB8AA3B;
|
|
add.f32 %f509, %f503, 0f4B40007F;
|
|
mov.b32 %r235, %f509;
|
|
shl.b32 %r236, %r235, 23;
|
|
mov.b32 %f510, %r236;
|
|
ex2.approx.ftz.f32 %f511, %f508;
|
|
mul.f32 %f85, %f511, %f510;
|
|
setp.eq.f32 %p70, %f85, 0f7F800000;
|
|
mov.f32 %f1087, 0f7F800000;
|
|
@%p70 bra $L__BB0_55;
|
|
|
|
fma.rn.f32 %f1087, %f85, %f84, %f85;
|
|
|
|
$L__BB0_55:
|
|
mov.f32 %f1024, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f1023, %f1024;
|
|
add.f32 %f1022, %f1023, %f1023;
|
|
mov.f32 %f1021, 0f3EE66666;
|
|
sub.f32 %f1020, %f1021, %f1022;
|
|
abs.f32 %f1019, %f1020;
|
|
setp.lt.f32 %p71, %f67, 0f00000000;
|
|
setp.eq.f32 %p72, %f1019, 0f3F800000;
|
|
and.pred %p2, %p71, %p72;
|
|
setp.eq.f32 %p73, %f67, 0f00000000;
|
|
@%p73 bra $L__BB0_59;
|
|
bra.uni $L__BB0_56;
|
|
|
|
$L__BB0_59:
|
|
add.f32 %f516, %f67, %f67;
|
|
selp.f32 %f1089, %f516, 0f00000000, %p72;
|
|
bra.uni $L__BB0_60;
|
|
|
|
$L__BB0_56:
|
|
mov.b32 %r237, %f1087;
|
|
xor.b32 %r238, %r237, -2147483648;
|
|
mov.b32 %f512, %r238;
|
|
selp.f32 %f1089, %f512, %f1087, %p2;
|
|
setp.geu.f32 %p74, %f67, 0f00000000;
|
|
@%p74 bra $L__BB0_60;
|
|
|
|
mov.f32 %f513, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f514, %f513;
|
|
setp.eq.f32 %p75, %f514, 0f3EE66666;
|
|
@%p75 bra $L__BB0_60;
|
|
|
|
mov.f32 %f1089, 0f7FFFFFFF;
|
|
|
|
$L__BB0_60:
|
|
abs.f32 %f1025, %f67;
|
|
add.f32 %f517, %f1025, 0f3EE66666;
|
|
mov.b32 %r239, %f517;
|
|
setp.lt.s32 %p77, %r239, 2139095040;
|
|
@%p77 bra $L__BB0_65;
|
|
|
|
abs.f32 %f1026, %f67;
|
|
setp.gtu.f32 %p78, %f1026, 0f7F800000;
|
|
@%p78 bra $L__BB0_64;
|
|
bra.uni $L__BB0_62;
|
|
|
|
$L__BB0_64:
|
|
add.f32 %f1089, %f67, 0f3EE66666;
|
|
bra.uni $L__BB0_65;
|
|
|
|
$L__BB0_62:
|
|
abs.f32 %f1027, %f67;
|
|
setp.neu.f32 %p79, %f1027, 0f7F800000;
|
|
@%p79 bra $L__BB0_65;
|
|
|
|
selp.f32 %f1089, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
$L__BB0_65:
|
|
setp.eq.f32 %p80, %f67, 0f3F800000;
|
|
selp.f32 %f94, 0f3F800000, %f1089, %p80;
|
|
abs.f32 %f95, %f68;
|
|
setp.lt.f32 %p81, %f95, 0f00800000;
|
|
mul.f32 %f519, %f95, 0f4B800000;
|
|
selp.f32 %f520, %f519, %f95, %p81;
|
|
selp.f32 %f521, 0fC3170000, 0fC2FE0000, %p81;
|
|
mov.b32 %r240, %f520;
|
|
and.b32 %r241, %r240, 8388607;
|
|
or.b32 %r242, %r241, 1065353216;
|
|
mov.b32 %f522, %r242;
|
|
shr.u32 %r243, %r240, 23;
|
|
cvt.rn.f32.u32 %f523, %r243;
|
|
add.f32 %f524, %f521, %f523;
|
|
setp.gt.f32 %p82, %f522, 0f3FB504F3;
|
|
mul.f32 %f525, %f522, 0f3F000000;
|
|
add.f32 %f526, %f524, 0f3F800000;
|
|
selp.f32 %f527, %f526, %f524, %p82;
|
|
selp.f32 %f528, %f525, %f522, %p82;
|
|
add.f32 %f529, %f528, 0fBF800000;
|
|
add.f32 %f530, %f528, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f531, %f530;
|
|
add.f32 %f532, %f529, %f529;
|
|
mul.f32 %f533, %f532, %f531;
|
|
mul.f32 %f534, %f533, %f533;
|
|
mov.f32 %f535, 0f3C4CAF63;
|
|
mov.f32 %f536, 0f3B18F0FE;
|
|
fma.rn.f32 %f537, %f536, %f534, %f535;
|
|
mov.f32 %f538, 0f3DAAAABD;
|
|
fma.rn.f32 %f539, %f537, %f534, %f538;
|
|
mul.rn.f32 %f540, %f539, %f534;
|
|
mul.rn.f32 %f541, %f540, %f533;
|
|
sub.f32 %f542, %f529, %f533;
|
|
add.f32 %f543, %f542, %f542;
|
|
neg.f32 %f544, %f533;
|
|
fma.rn.f32 %f545, %f544, %f529, %f543;
|
|
mul.rn.f32 %f546, %f531, %f545;
|
|
add.f32 %f547, %f541, %f533;
|
|
sub.f32 %f548, %f533, %f547;
|
|
add.f32 %f549, %f541, %f548;
|
|
add.f32 %f550, %f546, %f549;
|
|
add.f32 %f551, %f547, %f550;
|
|
sub.f32 %f552, %f547, %f551;
|
|
add.f32 %f553, %f550, %f552;
|
|
mov.f32 %f554, 0f3F317200;
|
|
mul.rn.f32 %f555, %f527, %f554;
|
|
mov.f32 %f556, 0f35BFBE8E;
|
|
mul.rn.f32 %f557, %f527, %f556;
|
|
add.f32 %f558, %f555, %f551;
|
|
sub.f32 %f559, %f555, %f558;
|
|
add.f32 %f560, %f551, %f559;
|
|
add.f32 %f561, %f553, %f560;
|
|
add.f32 %f562, %f557, %f561;
|
|
add.f32 %f563, %f558, %f562;
|
|
sub.f32 %f564, %f558, %f563;
|
|
add.f32 %f565, %f562, %f564;
|
|
mov.f32 %f566, 0f3EE66666;
|
|
mul.rn.f32 %f567, %f566, %f563;
|
|
neg.f32 %f568, %f567;
|
|
fma.rn.f32 %f569, %f566, %f563, %f568;
|
|
fma.rn.f32 %f570, %f566, %f565, %f569;
|
|
mov.f32 %f571, 0f00000000;
|
|
fma.rn.f32 %f572, %f571, %f563, %f570;
|
|
add.rn.f32 %f573, %f567, %f572;
|
|
neg.f32 %f574, %f573;
|
|
add.rn.f32 %f575, %f567, %f574;
|
|
add.rn.f32 %f576, %f575, %f572;
|
|
mov.b32 %r244, %f573;
|
|
setp.eq.s32 %p83, %r244, 1118925336;
|
|
add.s32 %r245, %r244, -1;
|
|
mov.b32 %f577, %r245;
|
|
add.f32 %f578, %f576, 0f37000000;
|
|
selp.f32 %f96, %f578, %f576, %p83;
|
|
selp.f32 %f579, %f577, %f573, %p83;
|
|
mov.f32 %f580, 0f3FB8AA3B;
|
|
mul.rn.f32 %f581, %f579, %f580;
|
|
cvt.rzi.f32.f32 %f582, %f581;
|
|
abs.f32 %f583, %f582;
|
|
setp.gt.f32 %p84, %f583, 0f42FC0000;
|
|
mov.b32 %r246, %f582;
|
|
and.b32 %r247, %r246, -2147483648;
|
|
or.b32 %r248, %r247, 1123811328;
|
|
mov.b32 %f584, %r248;
|
|
selp.f32 %f585, %f584, %f582, %p84;
|
|
mov.f32 %f586, 0fBF317218;
|
|
fma.rn.f32 %f587, %f585, %f586, %f579;
|
|
mov.f32 %f588, 0f3102E308;
|
|
fma.rn.f32 %f589, %f585, %f588, %f587;
|
|
mul.f32 %f590, %f589, 0f3FB8AA3B;
|
|
add.f32 %f591, %f585, 0f4B40007F;
|
|
mov.b32 %r249, %f591;
|
|
shl.b32 %r250, %r249, 23;
|
|
mov.b32 %f592, %r250;
|
|
ex2.approx.ftz.f32 %f593, %f590;
|
|
mul.f32 %f97, %f593, %f592;
|
|
setp.eq.f32 %p85, %f97, 0f7F800000;
|
|
mov.f32 %f1090, 0f7F800000;
|
|
@%p85 bra $L__BB0_67;
|
|
|
|
fma.rn.f32 %f1090, %f97, %f96, %f97;
|
|
|
|
$L__BB0_67:
|
|
setp.lt.f32 %p86, %f68, 0f00000000;
|
|
and.pred %p3, %p86, %p72;
|
|
setp.eq.f32 %p88, %f68, 0f00000000;
|
|
@%p88 bra $L__BB0_71;
|
|
bra.uni $L__BB0_68;
|
|
|
|
$L__BB0_71:
|
|
add.f32 %f598, %f68, %f68;
|
|
selp.f32 %f1092, %f598, 0f00000000, %p72;
|
|
bra.uni $L__BB0_72;
|
|
|
|
$L__BB0_68:
|
|
mov.b32 %r251, %f1090;
|
|
xor.b32 %r252, %r251, -2147483648;
|
|
mov.b32 %f594, %r252;
|
|
selp.f32 %f1092, %f594, %f1090, %p3;
|
|
setp.geu.f32 %p89, %f68, 0f00000000;
|
|
@%p89 bra $L__BB0_72;
|
|
|
|
mov.f32 %f595, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f596, %f595;
|
|
setp.eq.f32 %p90, %f596, 0f3EE66666;
|
|
@%p90 bra $L__BB0_72;
|
|
|
|
mov.f32 %f1092, 0f7FFFFFFF;
|
|
|
|
$L__BB0_72:
|
|
abs.f32 %f1028, %f68;
|
|
add.f32 %f599, %f1028, 0f3EE66666;
|
|
mov.b32 %r253, %f599;
|
|
setp.lt.s32 %p92, %r253, 2139095040;
|
|
@%p92 bra $L__BB0_77;
|
|
|
|
abs.f32 %f1029, %f68;
|
|
setp.gtu.f32 %p93, %f1029, 0f7F800000;
|
|
@%p93 bra $L__BB0_76;
|
|
bra.uni $L__BB0_74;
|
|
|
|
$L__BB0_76:
|
|
add.f32 %f1092, %f68, 0f3EE66666;
|
|
bra.uni $L__BB0_77;
|
|
|
|
$L__BB0_74:
|
|
abs.f32 %f1030, %f68;
|
|
setp.neu.f32 %p94, %f1030, 0f7F800000;
|
|
@%p94 bra $L__BB0_77;
|
|
|
|
selp.f32 %f1092, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
$L__BB0_77:
|
|
setp.eq.f32 %p95, %f68, 0f3F800000;
|
|
selp.f32 %f106, 0f3F800000, %f1092, %p95;
|
|
abs.f32 %f107, %f69;
|
|
setp.lt.f32 %p96, %f107, 0f00800000;
|
|
mul.f32 %f601, %f107, 0f4B800000;
|
|
selp.f32 %f602, %f601, %f107, %p96;
|
|
selp.f32 %f603, 0fC3170000, 0fC2FE0000, %p96;
|
|
mov.b32 %r254, %f602;
|
|
and.b32 %r255, %r254, 8388607;
|
|
or.b32 %r256, %r255, 1065353216;
|
|
mov.b32 %f604, %r256;
|
|
shr.u32 %r257, %r254, 23;
|
|
cvt.rn.f32.u32 %f605, %r257;
|
|
add.f32 %f606, %f603, %f605;
|
|
setp.gt.f32 %p97, %f604, 0f3FB504F3;
|
|
mul.f32 %f607, %f604, 0f3F000000;
|
|
add.f32 %f608, %f606, 0f3F800000;
|
|
selp.f32 %f609, %f608, %f606, %p97;
|
|
selp.f32 %f610, %f607, %f604, %p97;
|
|
add.f32 %f611, %f610, 0fBF800000;
|
|
add.f32 %f612, %f610, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f613, %f612;
|
|
add.f32 %f614, %f611, %f611;
|
|
mul.f32 %f615, %f614, %f613;
|
|
mul.f32 %f616, %f615, %f615;
|
|
mov.f32 %f617, 0f3C4CAF63;
|
|
mov.f32 %f618, 0f3B18F0FE;
|
|
fma.rn.f32 %f619, %f618, %f616, %f617;
|
|
mov.f32 %f620, 0f3DAAAABD;
|
|
fma.rn.f32 %f621, %f619, %f616, %f620;
|
|
mul.rn.f32 %f622, %f621, %f616;
|
|
mul.rn.f32 %f623, %f622, %f615;
|
|
sub.f32 %f624, %f611, %f615;
|
|
add.f32 %f625, %f624, %f624;
|
|
neg.f32 %f626, %f615;
|
|
fma.rn.f32 %f627, %f626, %f611, %f625;
|
|
mul.rn.f32 %f628, %f613, %f627;
|
|
add.f32 %f629, %f623, %f615;
|
|
sub.f32 %f630, %f615, %f629;
|
|
add.f32 %f631, %f623, %f630;
|
|
add.f32 %f632, %f628, %f631;
|
|
add.f32 %f633, %f629, %f632;
|
|
sub.f32 %f634, %f629, %f633;
|
|
add.f32 %f635, %f632, %f634;
|
|
mov.f32 %f636, 0f3F317200;
|
|
mul.rn.f32 %f637, %f609, %f636;
|
|
mov.f32 %f638, 0f35BFBE8E;
|
|
mul.rn.f32 %f639, %f609, %f638;
|
|
add.f32 %f640, %f637, %f633;
|
|
sub.f32 %f641, %f637, %f640;
|
|
add.f32 %f642, %f633, %f641;
|
|
add.f32 %f643, %f635, %f642;
|
|
add.f32 %f644, %f639, %f643;
|
|
add.f32 %f645, %f640, %f644;
|
|
sub.f32 %f646, %f640, %f645;
|
|
add.f32 %f647, %f644, %f646;
|
|
mov.f32 %f648, 0f3EE66666;
|
|
mul.rn.f32 %f649, %f648, %f645;
|
|
neg.f32 %f650, %f649;
|
|
fma.rn.f32 %f651, %f648, %f645, %f650;
|
|
fma.rn.f32 %f652, %f648, %f647, %f651;
|
|
mov.f32 %f653, 0f00000000;
|
|
fma.rn.f32 %f654, %f653, %f645, %f652;
|
|
add.rn.f32 %f655, %f649, %f654;
|
|
neg.f32 %f656, %f655;
|
|
add.rn.f32 %f657, %f649, %f656;
|
|
add.rn.f32 %f658, %f657, %f654;
|
|
mov.b32 %r258, %f655;
|
|
setp.eq.s32 %p98, %r258, 1118925336;
|
|
add.s32 %r259, %r258, -1;
|
|
mov.b32 %f659, %r259;
|
|
add.f32 %f660, %f658, 0f37000000;
|
|
selp.f32 %f108, %f660, %f658, %p98;
|
|
selp.f32 %f661, %f659, %f655, %p98;
|
|
mov.f32 %f662, 0f3FB8AA3B;
|
|
mul.rn.f32 %f663, %f661, %f662;
|
|
cvt.rzi.f32.f32 %f664, %f663;
|
|
abs.f32 %f665, %f664;
|
|
setp.gt.f32 %p99, %f665, 0f42FC0000;
|
|
mov.b32 %r260, %f664;
|
|
and.b32 %r261, %r260, -2147483648;
|
|
or.b32 %r262, %r261, 1123811328;
|
|
mov.b32 %f666, %r262;
|
|
selp.f32 %f667, %f666, %f664, %p99;
|
|
mov.f32 %f668, 0fBF317218;
|
|
fma.rn.f32 %f669, %f667, %f668, %f661;
|
|
mov.f32 %f670, 0f3102E308;
|
|
fma.rn.f32 %f671, %f667, %f670, %f669;
|
|
mul.f32 %f672, %f671, 0f3FB8AA3B;
|
|
add.f32 %f673, %f667, 0f4B40007F;
|
|
mov.b32 %r263, %f673;
|
|
shl.b32 %r264, %r263, 23;
|
|
mov.b32 %f674, %r264;
|
|
ex2.approx.ftz.f32 %f675, %f672;
|
|
mul.f32 %f109, %f675, %f674;
|
|
setp.eq.f32 %p100, %f109, 0f7F800000;
|
|
mov.f32 %f1093, 0f7F800000;
|
|
@%p100 bra $L__BB0_79;
|
|
|
|
fma.rn.f32 %f1093, %f109, %f108, %f109;
|
|
|
|
$L__BB0_79:
|
|
setp.lt.f32 %p101, %f69, 0f00000000;
|
|
and.pred %p4, %p101, %p72;
|
|
setp.eq.f32 %p103, %f69, 0f00000000;
|
|
@%p103 bra $L__BB0_83;
|
|
bra.uni $L__BB0_80;
|
|
|
|
$L__BB0_83:
|
|
add.f32 %f680, %f69, %f69;
|
|
selp.f32 %f1095, %f680, 0f00000000, %p72;
|
|
bra.uni $L__BB0_84;
|
|
|
|
$L__BB0_80:
|
|
mov.b32 %r265, %f1093;
|
|
xor.b32 %r266, %r265, -2147483648;
|
|
mov.b32 %f676, %r266;
|
|
selp.f32 %f1095, %f676, %f1093, %p4;
|
|
setp.geu.f32 %p104, %f69, 0f00000000;
|
|
@%p104 bra $L__BB0_84;
|
|
|
|
mov.f32 %f677, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f678, %f677;
|
|
setp.eq.f32 %p105, %f678, 0f3EE66666;
|
|
@%p105 bra $L__BB0_84;
|
|
|
|
mov.f32 %f1095, 0f7FFFFFFF;
|
|
|
|
$L__BB0_84:
|
|
abs.f32 %f1031, %f69;
|
|
add.f32 %f681, %f1031, 0f3EE66666;
|
|
mov.b32 %r267, %f681;
|
|
setp.lt.s32 %p107, %r267, 2139095040;
|
|
@%p107 bra $L__BB0_89;
|
|
|
|
abs.f32 %f1032, %f69;
|
|
setp.gtu.f32 %p108, %f1032, 0f7F800000;
|
|
@%p108 bra $L__BB0_88;
|
|
bra.uni $L__BB0_86;
|
|
|
|
$L__BB0_88:
|
|
add.f32 %f1095, %f69, 0f3EE66666;
|
|
bra.uni $L__BB0_89;
|
|
|
|
$L__BB0_86:
|
|
abs.f32 %f1033, %f69;
|
|
setp.neu.f32 %p109, %f1033, 0f7F800000;
|
|
@%p109 bra $L__BB0_89;
|
|
|
|
selp.f32 %f1095, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
$L__BB0_89:
|
|
setp.eq.f32 %p110, %f69, 0f3F800000;
|
|
mov.f32 %f683, 0f3F800000;
|
|
selp.f32 %f684, 0f3F800000, %f1095, %p110;
|
|
min.f32 %f685, %f94, %f683;
|
|
mov.f32 %f686, 0f00000000;
|
|
max.f32 %f118, %f686, %f685;
|
|
min.f32 %f687, %f106, %f683;
|
|
max.f32 %f119, %f686, %f687;
|
|
min.f32 %f688, %f684, %f683;
|
|
max.f32 %f120, %f686, %f688;
|
|
mov.f32 %f692, 0f3ED55555;
|
|
abs.f32 %f122, %f118;
|
|
setp.lt.f32 %p111, %f122, 0f00800000;
|
|
mul.f32 %f694, %f122, 0f4B800000;
|
|
selp.f32 %f695, %f694, %f122, %p111;
|
|
selp.f32 %f696, 0fC3170000, 0fC2FE0000, %p111;
|
|
mov.b32 %r270, %f695;
|
|
and.b32 %r271, %r270, 8388607;
|
|
or.b32 %r272, %r271, 1065353216;
|
|
mov.b32 %f697, %r272;
|
|
shr.u32 %r273, %r270, 23;
|
|
cvt.rn.f32.u32 %f698, %r273;
|
|
add.f32 %f699, %f696, %f698;
|
|
setp.gt.f32 %p112, %f697, 0f3FB504F3;
|
|
mul.f32 %f700, %f697, 0f3F000000;
|
|
add.f32 %f701, %f699, 0f3F800000;
|
|
selp.f32 %f702, %f701, %f699, %p112;
|
|
selp.f32 %f703, %f700, %f697, %p112;
|
|
add.f32 %f704, %f703, 0fBF800000;
|
|
add.f32 %f705, %f703, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f706, %f705;
|
|
add.f32 %f707, %f704, %f704;
|
|
mul.f32 %f708, %f707, %f706;
|
|
mul.f32 %f709, %f708, %f708;
|
|
mov.f32 %f710, 0f3C4CAF63;
|
|
mov.f32 %f711, 0f3B18F0FE;
|
|
fma.rn.f32 %f712, %f711, %f709, %f710;
|
|
mov.f32 %f713, 0f3DAAAABD;
|
|
fma.rn.f32 %f714, %f712, %f709, %f713;
|
|
mul.rn.f32 %f715, %f714, %f709;
|
|
mul.rn.f32 %f716, %f715, %f708;
|
|
sub.f32 %f717, %f704, %f708;
|
|
add.f32 %f718, %f717, %f717;
|
|
neg.f32 %f719, %f708;
|
|
fma.rn.f32 %f720, %f719, %f704, %f718;
|
|
mul.rn.f32 %f721, %f706, %f720;
|
|
add.f32 %f722, %f716, %f708;
|
|
sub.f32 %f723, %f708, %f722;
|
|
add.f32 %f724, %f716, %f723;
|
|
add.f32 %f725, %f721, %f724;
|
|
add.f32 %f726, %f722, %f725;
|
|
sub.f32 %f727, %f722, %f726;
|
|
add.f32 %f728, %f725, %f727;
|
|
mov.f32 %f729, 0f3F317200;
|
|
mul.rn.f32 %f730, %f702, %f729;
|
|
mov.f32 %f731, 0f35BFBE8E;
|
|
mul.rn.f32 %f732, %f702, %f731;
|
|
add.f32 %f733, %f730, %f726;
|
|
sub.f32 %f734, %f730, %f733;
|
|
add.f32 %f735, %f726, %f734;
|
|
add.f32 %f736, %f728, %f735;
|
|
add.f32 %f737, %f732, %f736;
|
|
add.f32 %f738, %f733, %f737;
|
|
sub.f32 %f739, %f733, %f738;
|
|
add.f32 %f740, %f737, %f739;
|
|
mul.rn.f32 %f741, %f692, %f738;
|
|
neg.f32 %f742, %f741;
|
|
fma.rn.f32 %f743, %f692, %f738, %f742;
|
|
fma.rn.f32 %f744, %f692, %f740, %f743;
|
|
fma.rn.f32 %f745, %f686, %f738, %f744;
|
|
add.rn.f32 %f746, %f741, %f745;
|
|
neg.f32 %f747, %f746;
|
|
add.rn.f32 %f748, %f741, %f747;
|
|
add.rn.f32 %f749, %f748, %f745;
|
|
mov.b32 %r274, %f746;
|
|
setp.eq.s32 %p113, %r274, 1118925336;
|
|
add.s32 %r275, %r274, -1;
|
|
mov.b32 %f750, %r275;
|
|
add.f32 %f751, %f749, 0f37000000;
|
|
selp.f32 %f123, %f751, %f749, %p113;
|
|
selp.f32 %f752, %f750, %f746, %p113;
|
|
mov.f32 %f753, 0f3FB8AA3B;
|
|
mul.rn.f32 %f754, %f752, %f753;
|
|
cvt.rzi.f32.f32 %f755, %f754;
|
|
abs.f32 %f756, %f755;
|
|
setp.gt.f32 %p114, %f756, 0f42FC0000;
|
|
mov.b32 %r276, %f755;
|
|
and.b32 %r277, %r276, -2147483648;
|
|
or.b32 %r278, %r277, 1123811328;
|
|
mov.b32 %f757, %r278;
|
|
selp.f32 %f758, %f757, %f755, %p114;
|
|
mov.f32 %f759, 0fBF317218;
|
|
fma.rn.f32 %f760, %f758, %f759, %f752;
|
|
mov.f32 %f761, 0f3102E308;
|
|
fma.rn.f32 %f762, %f758, %f761, %f760;
|
|
mul.f32 %f763, %f762, 0f3FB8AA3B;
|
|
add.f32 %f764, %f758, 0f4B40007F;
|
|
mov.b32 %r279, %f764;
|
|
shl.b32 %r280, %r279, 23;
|
|
mov.b32 %f765, %r280;
|
|
ex2.approx.ftz.f32 %f766, %f763;
|
|
mul.f32 %f124, %f766, %f765;
|
|
setp.eq.f32 %p115, %f124, 0f7F800000;
|
|
mov.f32 %f1096, 0f7F800000;
|
|
@%p115 bra $L__BB0_91;
|
|
|
|
fma.rn.f32 %f1096, %f124, %f123, %f124;
|
|
|
|
$L__BB0_91:
|
|
mov.f32 %f1053, 0f00000000;
|
|
max.f32 %f1052, %f1053, %f685;
|
|
mov.f32 %f1008, 0f3E555555;
|
|
cvt.rzi.f32.f32 %f1007, %f1008;
|
|
add.f32 %f1006, %f1007, %f1007;
|
|
mov.f32 %f1005, 0f3ED55555;
|
|
sub.f32 %f1004, %f1005, %f1006;
|
|
abs.f32 %f1003, %f1004;
|
|
setp.lt.f32 %p116, %f1052, 0f00000000;
|
|
setp.eq.f32 %p117, %f1003, 0f3F800000;
|
|
and.pred %p5, %p116, %p117;
|
|
setp.eq.f32 %p118, %f1052, 0f00000000;
|
|
@%p118 bra $L__BB0_95;
|
|
bra.uni $L__BB0_92;
|
|
|
|
$L__BB0_95:
|
|
mov.f32 %f1070, 0f00000000;
|
|
max.f32 %f1069, %f1070, %f685;
|
|
add.f32 %f771, %f1069, %f1069;
|
|
selp.f32 %f1098, %f771, 0f00000000, %p117;
|
|
bra.uni $L__BB0_96;
|
|
|
|
$L__BB0_92:
|
|
mov.f32 %f1055, 0f00000000;
|
|
max.f32 %f1054, %f1055, %f685;
|
|
mov.b32 %r281, %f1096;
|
|
xor.b32 %r282, %r281, -2147483648;
|
|
mov.b32 %f767, %r282;
|
|
selp.f32 %f1098, %f767, %f1096, %p5;
|
|
setp.geu.f32 %p119, %f1054, 0f00000000;
|
|
@%p119 bra $L__BB0_96;
|
|
|
|
mov.f32 %f768, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f769, %f768;
|
|
setp.eq.f32 %p120, %f769, 0f3ED55555;
|
|
@%p120 bra $L__BB0_96;
|
|
|
|
mov.f32 %f1098, 0f7FFFFFFF;
|
|
|
|
$L__BB0_96:
|
|
mov.f32 %f1058, 0f00000000;
|
|
max.f32 %f1057, %f1058, %f685;
|
|
abs.f32 %f1056, %f1057;
|
|
add.f32 %f772, %f1056, 0f3ED55555;
|
|
mov.b32 %r283, %f772;
|
|
setp.lt.s32 %p122, %r283, 2139095040;
|
|
@%p122 bra $L__BB0_101;
|
|
|
|
mov.f32 %f1063, 0f00000000;
|
|
max.f32 %f1062, %f1063, %f685;
|
|
abs.f32 %f1061, %f1062;
|
|
setp.gtu.f32 %p123, %f1061, 0f7F800000;
|
|
@%p123 bra $L__BB0_100;
|
|
bra.uni $L__BB0_98;
|
|
|
|
$L__BB0_100:
|
|
mov.f32 %f1068, 0f00000000;
|
|
max.f32 %f1067, %f1068, %f685;
|
|
add.f32 %f1098, %f1067, 0f3ED55555;
|
|
bra.uni $L__BB0_101;
|
|
|
|
$L__BB0_98:
|
|
mov.f32 %f1066, 0f00000000;
|
|
max.f32 %f1065, %f1066, %f685;
|
|
abs.f32 %f1064, %f1065;
|
|
setp.neu.f32 %p124, %f1064, 0f7F800000;
|
|
@%p124 bra $L__BB0_101;
|
|
|
|
selp.f32 %f1098, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
$L__BB0_101:
|
|
abs.f32 %f133, %f119;
|
|
setp.lt.f32 %p125, %f133, 0f00800000;
|
|
mul.f32 %f774, %f133, 0f4B800000;
|
|
selp.f32 %f775, %f774, %f133, %p125;
|
|
selp.f32 %f776, 0fC3170000, 0fC2FE0000, %p125;
|
|
mov.b32 %r284, %f775;
|
|
and.b32 %r285, %r284, 8388607;
|
|
or.b32 %r286, %r285, 1065353216;
|
|
mov.b32 %f777, %r286;
|
|
shr.u32 %r287, %r284, 23;
|
|
cvt.rn.f32.u32 %f778, %r287;
|
|
add.f32 %f779, %f776, %f778;
|
|
setp.gt.f32 %p126, %f777, 0f3FB504F3;
|
|
mul.f32 %f780, %f777, 0f3F000000;
|
|
add.f32 %f781, %f779, 0f3F800000;
|
|
selp.f32 %f782, %f781, %f779, %p126;
|
|
selp.f32 %f783, %f780, %f777, %p126;
|
|
add.f32 %f784, %f783, 0fBF800000;
|
|
add.f32 %f785, %f783, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f786, %f785;
|
|
add.f32 %f787, %f784, %f784;
|
|
mul.f32 %f788, %f787, %f786;
|
|
mul.f32 %f789, %f788, %f788;
|
|
mov.f32 %f790, 0f3C4CAF63;
|
|
mov.f32 %f791, 0f3B18F0FE;
|
|
fma.rn.f32 %f792, %f791, %f789, %f790;
|
|
mov.f32 %f793, 0f3DAAAABD;
|
|
fma.rn.f32 %f794, %f792, %f789, %f793;
|
|
mul.rn.f32 %f795, %f794, %f789;
|
|
mul.rn.f32 %f796, %f795, %f788;
|
|
sub.f32 %f797, %f784, %f788;
|
|
add.f32 %f798, %f797, %f797;
|
|
neg.f32 %f799, %f788;
|
|
fma.rn.f32 %f800, %f799, %f784, %f798;
|
|
mul.rn.f32 %f801, %f786, %f800;
|
|
add.f32 %f802, %f796, %f788;
|
|
sub.f32 %f803, %f788, %f802;
|
|
add.f32 %f804, %f796, %f803;
|
|
add.f32 %f805, %f801, %f804;
|
|
add.f32 %f806, %f802, %f805;
|
|
sub.f32 %f807, %f802, %f806;
|
|
add.f32 %f808, %f805, %f807;
|
|
mov.f32 %f809, 0f3F317200;
|
|
mul.rn.f32 %f810, %f782, %f809;
|
|
mov.f32 %f811, 0f35BFBE8E;
|
|
mul.rn.f32 %f812, %f782, %f811;
|
|
add.f32 %f813, %f810, %f806;
|
|
sub.f32 %f814, %f810, %f813;
|
|
add.f32 %f815, %f806, %f814;
|
|
add.f32 %f816, %f808, %f815;
|
|
add.f32 %f817, %f812, %f816;
|
|
add.f32 %f818, %f813, %f817;
|
|
sub.f32 %f819, %f813, %f818;
|
|
add.f32 %f820, %f817, %f819;
|
|
mov.f32 %f821, 0f3ED55555;
|
|
mul.rn.f32 %f822, %f821, %f818;
|
|
neg.f32 %f823, %f822;
|
|
fma.rn.f32 %f824, %f821, %f818, %f823;
|
|
fma.rn.f32 %f825, %f821, %f820, %f824;
|
|
mov.f32 %f826, 0f00000000;
|
|
fma.rn.f32 %f827, %f826, %f818, %f825;
|
|
add.rn.f32 %f828, %f822, %f827;
|
|
neg.f32 %f829, %f828;
|
|
add.rn.f32 %f830, %f822, %f829;
|
|
add.rn.f32 %f831, %f830, %f827;
|
|
mov.b32 %r288, %f828;
|
|
setp.eq.s32 %p127, %r288, 1118925336;
|
|
add.s32 %r289, %r288, -1;
|
|
mov.b32 %f832, %r289;
|
|
add.f32 %f833, %f831, 0f37000000;
|
|
selp.f32 %f134, %f833, %f831, %p127;
|
|
selp.f32 %f834, %f832, %f828, %p127;
|
|
mov.f32 %f835, 0f3FB8AA3B;
|
|
mul.rn.f32 %f836, %f834, %f835;
|
|
cvt.rzi.f32.f32 %f837, %f836;
|
|
abs.f32 %f838, %f837;
|
|
setp.gt.f32 %p128, %f838, 0f42FC0000;
|
|
mov.b32 %r290, %f837;
|
|
and.b32 %r291, %r290, -2147483648;
|
|
or.b32 %r292, %r291, 1123811328;
|
|
mov.b32 %f839, %r292;
|
|
selp.f32 %f840, %f839, %f837, %p128;
|
|
mov.f32 %f841, 0fBF317218;
|
|
fma.rn.f32 %f842, %f840, %f841, %f834;
|
|
mov.f32 %f843, 0f3102E308;
|
|
fma.rn.f32 %f844, %f840, %f843, %f842;
|
|
mul.f32 %f845, %f844, 0f3FB8AA3B;
|
|
add.f32 %f846, %f840, 0f4B40007F;
|
|
mov.b32 %r293, %f846;
|
|
shl.b32 %r294, %r293, 23;
|
|
mov.b32 %f847, %r294;
|
|
ex2.approx.ftz.f32 %f848, %f845;
|
|
mul.f32 %f135, %f848, %f847;
|
|
setp.eq.f32 %p129, %f135, 0f7F800000;
|
|
mov.f32 %f1099, 0f7F800000;
|
|
@%p129 bra $L__BB0_103;
|
|
|
|
fma.rn.f32 %f1099, %f135, %f134, %f135;
|
|
|
|
$L__BB0_103:
|
|
setp.lt.f32 %p130, %f119, 0f00000000;
|
|
and.pred %p6, %p130, %p117;
|
|
setp.eq.f32 %p132, %f119, 0f00000000;
|
|
@%p132 bra $L__BB0_107;
|
|
bra.uni $L__BB0_104;
|
|
|
|
$L__BB0_107:
|
|
add.f32 %f853, %f119, %f119;
|
|
selp.f32 %f1101, %f853, 0f00000000, %p117;
|
|
bra.uni $L__BB0_108;
|
|
|
|
$L__BB0_104:
|
|
mov.b32 %r295, %f1099;
|
|
xor.b32 %r296, %r295, -2147483648;
|
|
mov.b32 %f849, %r296;
|
|
selp.f32 %f1101, %f849, %f1099, %p6;
|
|
setp.geu.f32 %p133, %f119, 0f00000000;
|
|
@%p133 bra $L__BB0_108;
|
|
|
|
mov.f32 %f850, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f851, %f850;
|
|
setp.eq.f32 %p134, %f851, 0f3ED55555;
|
|
@%p134 bra $L__BB0_108;
|
|
|
|
mov.f32 %f1101, 0f7FFFFFFF;
|
|
|
|
$L__BB0_108:
|
|
mov.f32 %f1036, 0f00000000;
|
|
max.f32 %f1035, %f1036, %f687;
|
|
abs.f32 %f1034, %f1035;
|
|
add.f32 %f854, %f1034, 0f3ED55555;
|
|
mov.b32 %r297, %f854;
|
|
setp.lt.s32 %p136, %r297, 2139095040;
|
|
@%p136 bra $L__BB0_113;
|
|
|
|
mov.f32 %f1039, 0f00000000;
|
|
max.f32 %f1038, %f1039, %f687;
|
|
abs.f32 %f1037, %f1038;
|
|
setp.gtu.f32 %p137, %f1037, 0f7F800000;
|
|
@%p137 bra $L__BB0_112;
|
|
bra.uni $L__BB0_110;
|
|
|
|
$L__BB0_112:
|
|
add.f32 %f1101, %f119, 0f3ED55555;
|
|
bra.uni $L__BB0_113;
|
|
|
|
$L__BB0_110:
|
|
mov.f32 %f1042, 0f00000000;
|
|
max.f32 %f1041, %f1042, %f687;
|
|
abs.f32 %f1040, %f1041;
|
|
setp.neu.f32 %p138, %f1040, 0f7F800000;
|
|
@%p138 bra $L__BB0_113;
|
|
|
|
selp.f32 %f1101, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
$L__BB0_113:
|
|
abs.f32 %f144, %f120;
|
|
setp.lt.f32 %p139, %f144, 0f00800000;
|
|
mul.f32 %f856, %f144, 0f4B800000;
|
|
selp.f32 %f857, %f856, %f144, %p139;
|
|
selp.f32 %f858, 0fC3170000, 0fC2FE0000, %p139;
|
|
mov.b32 %r298, %f857;
|
|
and.b32 %r299, %r298, 8388607;
|
|
or.b32 %r300, %r299, 1065353216;
|
|
mov.b32 %f859, %r300;
|
|
shr.u32 %r301, %r298, 23;
|
|
cvt.rn.f32.u32 %f860, %r301;
|
|
add.f32 %f861, %f858, %f860;
|
|
setp.gt.f32 %p140, %f859, 0f3FB504F3;
|
|
mul.f32 %f862, %f859, 0f3F000000;
|
|
add.f32 %f863, %f861, 0f3F800000;
|
|
selp.f32 %f864, %f863, %f861, %p140;
|
|
selp.f32 %f865, %f862, %f859, %p140;
|
|
add.f32 %f866, %f865, 0fBF800000;
|
|
add.f32 %f867, %f865, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f868, %f867;
|
|
add.f32 %f869, %f866, %f866;
|
|
mul.f32 %f870, %f869, %f868;
|
|
mul.f32 %f871, %f870, %f870;
|
|
mov.f32 %f872, 0f3C4CAF63;
|
|
mov.f32 %f873, 0f3B18F0FE;
|
|
fma.rn.f32 %f874, %f873, %f871, %f872;
|
|
mov.f32 %f875, 0f3DAAAABD;
|
|
fma.rn.f32 %f876, %f874, %f871, %f875;
|
|
mul.rn.f32 %f877, %f876, %f871;
|
|
mul.rn.f32 %f878, %f877, %f870;
|
|
sub.f32 %f879, %f866, %f870;
|
|
add.f32 %f880, %f879, %f879;
|
|
neg.f32 %f881, %f870;
|
|
fma.rn.f32 %f882, %f881, %f866, %f880;
|
|
mul.rn.f32 %f883, %f868, %f882;
|
|
add.f32 %f884, %f878, %f870;
|
|
sub.f32 %f885, %f870, %f884;
|
|
add.f32 %f886, %f878, %f885;
|
|
add.f32 %f887, %f883, %f886;
|
|
add.f32 %f888, %f884, %f887;
|
|
sub.f32 %f889, %f884, %f888;
|
|
add.f32 %f890, %f887, %f889;
|
|
mov.f32 %f891, 0f3F317200;
|
|
mul.rn.f32 %f892, %f864, %f891;
|
|
mov.f32 %f893, 0f35BFBE8E;
|
|
mul.rn.f32 %f894, %f864, %f893;
|
|
add.f32 %f895, %f892, %f888;
|
|
sub.f32 %f896, %f892, %f895;
|
|
add.f32 %f897, %f888, %f896;
|
|
add.f32 %f898, %f890, %f897;
|
|
add.f32 %f899, %f894, %f898;
|
|
add.f32 %f900, %f895, %f899;
|
|
sub.f32 %f901, %f895, %f900;
|
|
add.f32 %f902, %f899, %f901;
|
|
mov.f32 %f903, 0f3ED55555;
|
|
mul.rn.f32 %f904, %f903, %f900;
|
|
neg.f32 %f905, %f904;
|
|
fma.rn.f32 %f906, %f903, %f900, %f905;
|
|
fma.rn.f32 %f907, %f903, %f902, %f906;
|
|
mov.f32 %f908, 0f00000000;
|
|
fma.rn.f32 %f909, %f908, %f900, %f907;
|
|
add.rn.f32 %f910, %f904, %f909;
|
|
neg.f32 %f911, %f910;
|
|
add.rn.f32 %f912, %f904, %f911;
|
|
add.rn.f32 %f913, %f912, %f909;
|
|
mov.b32 %r302, %f910;
|
|
setp.eq.s32 %p141, %r302, 1118925336;
|
|
add.s32 %r303, %r302, -1;
|
|
mov.b32 %f914, %r303;
|
|
add.f32 %f915, %f913, 0f37000000;
|
|
selp.f32 %f145, %f915, %f913, %p141;
|
|
selp.f32 %f916, %f914, %f910, %p141;
|
|
mov.f32 %f917, 0f3FB8AA3B;
|
|
mul.rn.f32 %f918, %f916, %f917;
|
|
cvt.rzi.f32.f32 %f919, %f918;
|
|
abs.f32 %f920, %f919;
|
|
setp.gt.f32 %p142, %f920, 0f42FC0000;
|
|
mov.b32 %r304, %f919;
|
|
and.b32 %r305, %r304, -2147483648;
|
|
or.b32 %r306, %r305, 1123811328;
|
|
mov.b32 %f921, %r306;
|
|
selp.f32 %f922, %f921, %f919, %p142;
|
|
mov.f32 %f923, 0fBF317218;
|
|
fma.rn.f32 %f924, %f922, %f923, %f916;
|
|
mov.f32 %f925, 0f3102E308;
|
|
fma.rn.f32 %f926, %f922, %f925, %f924;
|
|
mul.f32 %f927, %f926, 0f3FB8AA3B;
|
|
add.f32 %f928, %f922, 0f4B40007F;
|
|
mov.b32 %r307, %f928;
|
|
shl.b32 %r308, %r307, 23;
|
|
mov.b32 %f929, %r308;
|
|
ex2.approx.ftz.f32 %f930, %f927;
|
|
mul.f32 %f146, %f930, %f929;
|
|
setp.eq.f32 %p143, %f146, 0f7F800000;
|
|
mov.f32 %f1102, 0f7F800000;
|
|
@%p143 bra $L__BB0_115;
|
|
|
|
fma.rn.f32 %f1102, %f146, %f145, %f146;
|
|
|
|
$L__BB0_115:
|
|
setp.lt.f32 %p144, %f120, 0f00000000;
|
|
and.pred %p7, %p144, %p117;
|
|
setp.eq.f32 %p146, %f120, 0f00000000;
|
|
@%p146 bra $L__BB0_119;
|
|
bra.uni $L__BB0_116;
|
|
|
|
$L__BB0_119:
|
|
add.f32 %f935, %f120, %f120;
|
|
selp.f32 %f1104, %f935, 0f00000000, %p117;
|
|
bra.uni $L__BB0_120;
|
|
|
|
$L__BB0_116:
|
|
mov.b32 %r309, %f1102;
|
|
xor.b32 %r310, %r309, -2147483648;
|
|
mov.b32 %f931, %r310;
|
|
selp.f32 %f1104, %f931, %f1102, %p7;
|
|
setp.geu.f32 %p147, %f120, 0f00000000;
|
|
@%p147 bra $L__BB0_120;
|
|
|
|
mov.f32 %f932, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f933, %f932;
|
|
setp.eq.f32 %p148, %f933, 0f3ED55555;
|
|
@%p148 bra $L__BB0_120;
|
|
|
|
mov.f32 %f1104, 0f7FFFFFFF;
|
|
|
|
$L__BB0_120:
|
|
mov.f32 %f1045, 0f00000000;
|
|
max.f32 %f1044, %f1045, %f688;
|
|
abs.f32 %f1043, %f1044;
|
|
add.f32 %f936, %f1043, 0f3ED55555;
|
|
mov.b32 %r311, %f936;
|
|
setp.lt.s32 %p150, %r311, 2139095040;
|
|
@%p150 bra $L__BB0_125;
|
|
|
|
mov.f32 %f1048, 0f00000000;
|
|
max.f32 %f1047, %f1048, %f688;
|
|
abs.f32 %f1046, %f1047;
|
|
setp.gtu.f32 %p151, %f1046, 0f7F800000;
|
|
@%p151 bra $L__BB0_124;
|
|
bra.uni $L__BB0_122;
|
|
|
|
$L__BB0_124:
|
|
add.f32 %f1104, %f120, 0f3ED55555;
|
|
bra.uni $L__BB0_125;
|
|
|
|
$L__BB0_122:
|
|
mov.f32 %f1051, 0f00000000;
|
|
max.f32 %f1050, %f1051, %f688;
|
|
abs.f32 %f1049, %f1050;
|
|
setp.neu.f32 %p152, %f1049, 0f7F800000;
|
|
@%p152 bra $L__BB0_125;
|
|
|
|
selp.f32 %f1104, 0fFF800000, 0f7F800000, %p7;
|
|
|
|
$L__BB0_125:
|
|
mov.f32 %f1060, 0f00000000;
|
|
max.f32 %f1059, %f1060, %f685;
|
|
ld.const.u64 %rd105, [params+144];
|
|
cvta.to.global.u64 %rd104, %rd105;
|
|
ld.const.u32 %r357, [params+136];
|
|
mad.lo.s32 %r356, %r357, %r4, %r3;
|
|
cvt.u64.u32 %rd103, %r356;
|
|
fma.rn.f32 %f937, %f1098, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p153, %f1059, 0f3F800000;
|
|
mov.f32 %f938, 0f3F800000;
|
|
selp.f32 %f939, 0f3F7FFFFF, %f937, %p153;
|
|
mul.f32 %f940, %f1059, 0f414EB852;
|
|
setp.lt.f32 %p154, %f1059, 0f3B4D2E1C;
|
|
selp.f32 %f941, %f940, %f939, %p154;
|
|
fma.rn.f32 %f942, %f1101, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p155, %f119, 0f3F800000;
|
|
selp.f32 %f943, 0f3F7FFFFF, %f942, %p155;
|
|
mul.f32 %f944, %f119, 0f414EB852;
|
|
setp.lt.f32 %p156, %f119, 0f3B4D2E1C;
|
|
selp.f32 %f945, %f944, %f943, %p156;
|
|
fma.rn.f32 %f946, %f1104, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p157, %f120, 0f3F800000;
|
|
selp.f32 %f947, 0f3F7FFFFF, %f946, %p157;
|
|
mul.f32 %f948, %f120, 0f414EB852;
|
|
setp.lt.f32 %p158, %f120, 0f3B4D2E1C;
|
|
selp.f32 %f949, %f948, %f947, %p158;
|
|
min.f32 %f950, %f941, %f938;
|
|
mov.f32 %f951, 0f00000000;
|
|
max.f32 %f952, %f951, %f950;
|
|
mul.f32 %f953, %f952, 0f43800000;
|
|
cvt.rzi.u32.f32 %r312, %f953;
|
|
min.u32 %r313, %r312, 255;
|
|
min.f32 %f954, %f945, %f938;
|
|
max.f32 %f955, %f951, %f954;
|
|
mul.f32 %f956, %f955, 0f43800000;
|
|
cvt.rzi.u32.f32 %r314, %f956;
|
|
min.u32 %r315, %r314, 255;
|
|
min.f32 %f957, %f949, %f938;
|
|
max.f32 %f958, %f951, %f957;
|
|
mul.f32 %f959, %f958, 0f43800000;
|
|
cvt.rzi.u32.f32 %r316, %f959;
|
|
min.u32 %r317, %r316, 255;
|
|
shl.b64 %rd64, %rd103, 2;
|
|
add.s64 %rd65, %rd104, %rd64;
|
|
cvt.u16.u32 %rs19, %r317;
|
|
cvt.u16.u32 %rs20, %r315;
|
|
cvt.u16.u32 %rs21, %r313;
|
|
mov.u16 %rs22, 255;
|
|
st.global.v4.u8 [%rd65], {%rs21, %rs20, %rs19, %rs22};
|
|
|
|
$L__BB0_126:
|
|
ld.const.u32 %r358, [params+104];
|
|
and.b32 %r318, %r358, 4;
|
|
setp.eq.s32 %p159, %r318, 0;
|
|
@%p159 bra $L__BB0_130;
|
|
|
|
ld.const.u32 %r319, [params+108];
|
|
setp.eq.s32 %p160, %r319, 0;
|
|
ld.const.u64 %rd66, [params+224];
|
|
cvta.to.global.u64 %rd67, %rd66;
|
|
ld.const.u32 %r320, [params+216];
|
|
mad.lo.s32 %r321, %r320, %r4, %r3;
|
|
mul.wide.u32 %rd68, %r321, 8;
|
|
add.s64 %rd20, %rd67, %rd68;
|
|
@%p160 bra $L__BB0_129;
|
|
|
|
ld.global.v4.u16 {%rs30, %rs31, %rs32, %rs33}, [%rd20];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f960, %rs30;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f961, %rs31;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f962, %rs32;}
|
|
|
|
// end inline asm
|
|
add.f32 %f963, %f67, %f960;
|
|
add.f32 %f964, %f68, %f961;
|
|
add.f32 %f965, %f69, %f962;
|
|
mov.f32 %f966, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs28, %f965;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs27, %f964;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs26, %f963;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs29, %f966;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd20], {%rs26, %rs27, %rs28, %rs29};
|
|
bra.uni $L__BB0_130;
|
|
|
|
$L__BB0_129:
|
|
mov.f32 %f970, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs37, %f970;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs36, %f69;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs35, %f68;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs34, %f67;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd20], {%rs34, %rs35, %rs36, %rs37};
|
|
|
|
$L__BB0_130:
|
|
ld.const.u32 %r359, [params+104];
|
|
and.b32 %r322, %r359, 64;
|
|
setp.eq.s32 %p161, %r322, 0;
|
|
@%p161 bra $L__BB0_152;
|
|
|
|
ld.const.u64 %rd69, [params+208];
|
|
cvta.to.global.u64 %rd70, %rd69;
|
|
ld.const.u32 %r323, [params+200];
|
|
mad.lo.s32 %r324, %r323, %r4, %r3;
|
|
mul.f32 %f971, %f172, 0f3F000000;
|
|
mov.f32 %f972, 0f3F000000;
|
|
sub.f32 %f973, %f972, %f971;
|
|
mul.f32 %f974, %f973, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r325, %f974;
|
|
mul.f32 %f975, %f173, 0f3F000000;
|
|
sub.f32 %f976, %f972, %f975;
|
|
mul.f32 %f977, %f976, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r326, %f977;
|
|
mul.f32 %f978, %f174, 0f3F000000;
|
|
sub.f32 %f979, %f972, %f978;
|
|
mul.f32 %f980, %f979, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r327, %f980;
|
|
mul.wide.u32 %rd71, %r324, 4;
|
|
add.s64 %rd72, %rd70, %rd71;
|
|
cvt.u16.u32 %rs38, %r327;
|
|
cvt.u16.u32 %rs39, %r326;
|
|
cvt.u16.u32 %rs40, %r325;
|
|
mov.u16 %rs41, 255;
|
|
st.global.v4.u8 [%rd72], {%rs40, %rs39, %rs38, %rs41};
|
|
bra.uni $L__BB0_152;
|
|
|
|
$L__BB0_139:
|
|
mov.f32 %f991, 0f00000000;
|
|
mov.f32 %f992, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs60, %f992;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs59, %f991;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs58, %f991;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs57, %f991;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd21], {%rs57, %rs58, %rs59, %rs60};
|
|
|
|
$L__BB0_140:
|
|
and.b32 %r339, %r6, 64;
|
|
setp.eq.s32 %p169, %r339, 0;
|
|
@%p169 bra $L__BB0_152;
|
|
|
|
ld.const.u64 %rd84, [params+208];
|
|
cvta.to.global.u64 %rd85, %rd84;
|
|
ld.const.u32 %r340, [params+200];
|
|
mad.lo.s32 %r341, %r340, %r4, %r3;
|
|
mul.wide.u32 %rd86, %r341, 4;
|
|
add.s64 %rd87, %rd85, %rd86;
|
|
mov.u16 %rs61, 0;
|
|
mov.u16 %rs62, 255;
|
|
st.global.v4.u8 [%rd87], {%rs61, %rs61, %rs61, %rs62};
|
|
|
|
$L__BB0_152:
|
|
ret;
|
|
|
|
}
|
|
|