2118 lines
60 KiB
Plaintext
2118 lines
60 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-31968024
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// Cuda compilation tools, release 12.0, V12.0.76
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// Based on NVVM 7.0.1
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//
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.version 8.0
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.target sm_52
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.address_size 64
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// .globl __raygen__oxMain
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.const .align 16 .b8 params[1184];
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.global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
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.visible .entry __raygen__oxMain()
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{
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.local .align 4 .b8 __local_depot0[28];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<191>;
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.reg .b16 %rs<57>;
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.reg .f32 %f<1215>;
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.reg .b32 %r<447>;
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.reg .f64 %fd<5>;
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.reg .b64 %rd<93>;
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mov.u64 %SPL, __local_depot0;
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add.u64 %rd1, %SPL, 0;
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// begin inline asm
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call (%r58), _optix_get_launch_index_x, ();
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// end inline asm
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// begin inline asm
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call (%r59), _optix_get_launch_index_y, ();
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// end inline asm
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ld.const.u32 %r3, [params+616];
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abs.s32 %r4, %r3;
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ld.const.u32 %r5, [params+540];
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ld.const.u64 %rd26, [params+400];
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cvta.to.global.u64 %rd27, %rd26;
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ld.const.u32 %r64, [params+392];
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mad.lo.s32 %r65, %r64, %r59, %r58;
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mul.wide.u32 %rd28, %r65, 4;
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add.s64 %rd2, %rd27, %rd28;
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ld.global.v2.u8 {%rs7, %rs56}, [%rd2];
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or.b16 %rs9, %rs7, %rs56;
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and.b16 %rs10, %rs9, 255;
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setp.eq.s16 %p10, %rs10, 0;
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@%p10 bra $L__BB0_2;
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ld.global.u8 %rs55, [%rd2+2];
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bra.uni $L__BB0_3;
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$L__BB0_2:
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ld.global.u8 %rs55, [%rd2+2];
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setp.eq.s16 %p11, %rs55, 0;
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mov.f32 %f1153, 0f00000000;
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mov.u16 %rs56, 0;
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mov.f32 %f1154, %f1153;
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mov.f32 %f1155, %f1153;
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@%p11 bra $L__BB0_4;
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$L__BB0_3:
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cvt.rn.f32.u16 %f216, %rs7;
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div.rn.f32 %f217, %f216, 0f437F0000;
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fma.rn.f32 %f218, %f217, 0f40000000, 0fBF800000;
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and.b16 %rs13, %rs56, 255;
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cvt.rn.f32.u16 %f219, %rs13;
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div.rn.f32 %f220, %f219, 0f437F0000;
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fma.rn.f32 %f221, %f220, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f222, %rs55;
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div.rn.f32 %f223, %f222, 0f437F0000;
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fma.rn.f32 %f224, %f223, 0f40000000, 0fBF800000;
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mul.f32 %f225, %f221, %f221;
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fma.rn.f32 %f226, %f218, %f218, %f225;
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fma.rn.f32 %f227, %f224, %f224, %f226;
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sqrt.rn.f32 %f228, %f227;
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rcp.rn.f32 %f229, %f228;
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mul.f32 %f1155, %f229, %f224;
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mul.f32 %f1154, %f229, %f221;
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mul.f32 %f1153, %f218, %f229;
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$L__BB0_4:
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ld.const.v2.u32 {%r66, %r67}, [params];
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add.s32 %r6, %r66, %r58;
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add.s32 %r7, %r67, %r59;
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setp.eq.f32 %p12, %f1153, 0f00000000;
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setp.eq.f32 %p13, %f1154, 0f00000000;
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and.pred %p14, %p12, %p13;
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setp.eq.f32 %p15, %f1155, 0f00000000;
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and.pred %p16, %p15, %p14;
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@%p16 bra $L__BB0_148;
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bra.uni $L__BB0_5;
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$L__BB0_148:
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ld.const.u32 %r57, [params+104];
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and.b32 %r420, %r57, 1;
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setp.eq.b32 %p183, %r420, 1;
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mov.pred %p184, 0;
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xor.pred %p185, %p183, %p184;
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not.pred %p186, %p185;
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@%p186 bra $L__BB0_150;
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ld.const.u64 %rd77, [params+144];
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cvta.to.global.u64 %rd78, %rd77;
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ld.const.u32 %r421, [params+136];
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mad.lo.s32 %r422, %r421, %r7, %r6;
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mul.wide.u32 %rd79, %r422, 4;
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add.s64 %rd80, %rd78, %rd79;
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mov.u16 %rs37, 0;
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st.global.v4.u8 [%rd80], {%rs37, %rs37, %rs37, %rs37};
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$L__BB0_150:
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and.b32 %r423, %r57, 8;
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setp.eq.s32 %p187, %r423, 0;
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@%p187 bra $L__BB0_152;
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ld.const.u64 %rd81, [params+192];
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cvta.to.global.u64 %rd82, %rd81;
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ld.const.u32 %r424, [params+184];
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mad.lo.s32 %r425, %r424, %r7, %r6;
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mov.f32 %f1135, 0f00000000;
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cvt.rzi.u32.f32 %r426, %f1135;
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mul.wide.u32 %rd83, %r425, 2;
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add.s64 %rd84, %rd82, %rd83;
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mov.u16 %rs38, 0;
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cvt.u16.u32 %rs39, %r426;
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st.global.v2.u8 [%rd84], {%rs39, %rs38};
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$L__BB0_152:
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and.b32 %r427, %r57, 4;
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setp.eq.s32 %p188, %r427, 0;
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@%p188 bra $L__BB0_156;
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ld.const.u32 %r428, [params+108];
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setp.eq.s32 %p189, %r428, 0;
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ld.const.u64 %rd85, [params+224];
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cvta.to.global.u64 %rd86, %rd85;
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ld.const.u32 %r429, [params+216];
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mad.lo.s32 %r430, %r429, %r7, %r6;
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mul.wide.u32 %rd87, %r430, 8;
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add.s64 %rd24, %rd86, %rd87;
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@%p189 bra $L__BB0_155;
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ld.global.v4.u16 {%rs46, %rs47, %rs48, %rs49}, [%rd24];
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// begin inline asm
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{ cvt.f32.f16 %f1136, %rs46;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f1137, %rs47;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f1138, %rs48;}
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// end inline asm
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add.f32 %f1139, %f1136, 0f00000000;
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add.f32 %f1140, %f1137, 0f00000000;
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add.f32 %f1141, %f1138, 0f00000000;
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// begin inline asm
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{ cvt.rn.f16.f32 %rs45, %f1141;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs44, %f1140;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs43, %f1139;}
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// end inline asm
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mov.u16 %rs50, 0;
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st.global.v4.u16 [%rd24], {%rs43, %rs44, %rs45, %rs50};
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bra.uni $L__BB0_156;
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$L__BB0_5:
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ld.const.u64 %rd29, [params+432];
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cvta.to.global.u64 %rd30, %rd29;
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ld.const.u32 %r71, [params+424];
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mad.lo.s32 %r72, %r71, %r59, %r58;
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mul.wide.u32 %rd31, %r72, 12;
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add.s64 %rd32, %rd30, %rd31;
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ld.global.f32 %f10, [%rd32];
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mul.f32 %f234, %f10, 0f3456BF95;
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ld.global.f32 %f11, [%rd32+4];
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mul.f32 %f235, %f11, 0f3456BF95;
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ld.global.f32 %f12, [%rd32+8];
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mul.f32 %f236, %f12, 0f3456BF95;
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abs.f32 %f13, %f1153;
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div.rn.f32 %f237, %f234, %f13;
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abs.f32 %f238, %f1154;
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div.rn.f32 %f239, %f235, %f238;
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abs.f32 %f14, %f1155;
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div.rn.f32 %f240, %f236, %f14;
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abs.f32 %f241, %f237;
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abs.f32 %f242, %f239;
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abs.f32 %f243, %f240;
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mov.f32 %f244, 0f38D1B717;
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max.f32 %f245, %f241, %f244;
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max.f32 %f246, %f242, %f244;
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max.f32 %f247, %f243, %f244;
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fma.rn.f32 %f15, %f1153, %f245, %f10;
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fma.rn.f32 %f16, %f1154, %f246, %f11;
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fma.rn.f32 %f17, %f1155, %f247, %f12;
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ld.const.u64 %rd33, [params+128];
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cvta.to.global.u64 %rd34, %rd33;
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ld.const.u32 %r73, [params+120];
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mad.lo.s32 %r74, %r73, %r59, %r58;
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mul.wide.u32 %rd35, %r74, 4;
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add.s64 %rd36, %rd34, %rd35;
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ld.global.u32 %r439, [%rd36];
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setp.lt.s32 %p18, %r4, 1;
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mov.pred %p17, 0;
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mov.u32 %r435, 0;
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mov.f32 %f1163, 0f00000000;
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mov.f32 %f1164, %f1163;
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mov.f32 %f1165, %f1163;
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mov.f32 %f1166, %f1163;
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mov.pred %p190, %p17;
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@%p18 bra $L__BB0_25;
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ld.const.f32 %f18, [params+620];
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ld.const.u64 %rd37, [params+624];
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cvta.to.global.u64 %rd3, %rd37;
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ld.const.u64 %rd38, [params+640];
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cvta.to.global.u64 %rd39, %rd38;
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ld.const.u32 %r77, [params+632];
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and.b32 %r78, %r59, 255;
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and.b32 %r79, %r58, 255;
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mad.lo.s32 %r80, %r77, %r78, %r79;
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mul.wide.u32 %rd40, %r80, 3;
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add.s64 %rd4, %rd39, %rd40;
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ld.const.f32 %f19, [params+660];
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mul.f32 %f20, %f15, 0f3456BF95;
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mul.f32 %f21, %f16, 0f3456BF95;
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mul.f32 %f22, %f17, 0f3456BF95;
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ld.const.u64 %rd5, [params+96];
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abs.f32 %f380, %f21;
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abs.f32 %f381, %f20;
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max.f32 %f382, %f381, %f380;
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abs.f32 %f383, %f22;
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max.f32 %f384, %f382, %f383;
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mov.u32 %r432, %r435;
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$L__BB0_7:
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mul.lo.s32 %r81, %r432, 3;
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mul.wide.s32 %rd41, %r81, 12;
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add.s64 %rd6, %rd3, %rd41;
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ld.global.f32 %f252, [%rd6];
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sub.f32 %f253, %f252, %f10;
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ld.global.f32 %f254, [%rd6+4];
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sub.f32 %f255, %f254, %f11;
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ld.global.f32 %f256, [%rd6+8];
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sub.f32 %f257, %f256, %f12;
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mul.f32 %f258, %f255, %f255;
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fma.rn.f32 %f259, %f253, %f253, %f258;
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fma.rn.f32 %f260, %f257, %f257, %f259;
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sqrt.rn.f32 %f27, %f260;
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rcp.rn.f32 %f261, %f27;
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mul.f32 %f28, %f253, %f261;
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mul.f32 %f29, %f255, %f261;
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mul.f32 %f30, %f257, %f261;
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mul.f32 %f262, %f1154, %f29;
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fma.rn.f32 %f263, %f1153, %f28, %f262;
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fma.rn.f32 %f31, %f1155, %f30, %f263;
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setp.leu.f32 %p19, %f31, 0f00000000;
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@%p19 bra $L__BB0_24;
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setp.ne.s32 %p21, %r5, 0;
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mul.f32 %f264, %f27, %f27;
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div.rn.f32 %f32, %f18, %f264;
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ld.global.u8 %rs15, [%rd4];
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cvt.rn.f32.u16 %f265, %rs15;
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div.rn.f32 %f266, %f265, 0fC37F0000;
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fma.rn.f32 %f267, %f266, 0f3F333333, 0f3F800000;
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setp.gt.f32 %p22, %f32, %f267;
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and.pred %p23, %p21, %p22;
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mov.pred %p190, -1;
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@%p23 bra $L__BB0_25;
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mul.f32 %f33, %f27, %f19;
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mov.f32 %f272, 0f40800000;
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abs.f32 %f35, %f33;
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setp.lt.f32 %p24, %f35, 0f00800000;
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mul.f32 %f274, %f35, 0f4B800000;
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selp.f32 %f275, %f274, %f35, %p24;
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selp.f32 %f276, 0fC3170000, 0fC2FE0000, %p24;
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mov.b32 %r82, %f275;
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and.b32 %r83, %r82, 8388607;
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or.b32 %r84, %r83, 1065353216;
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mov.b32 %f277, %r84;
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shr.u32 %r85, %r82, 23;
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cvt.rn.f32.u32 %f278, %r85;
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add.f32 %f279, %f276, %f278;
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setp.gt.f32 %p25, %f277, 0f3FB504F3;
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mul.f32 %f280, %f277, 0f3F000000;
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add.f32 %f281, %f279, 0f3F800000;
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selp.f32 %f282, %f281, %f279, %p25;
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selp.f32 %f283, %f280, %f277, %p25;
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add.f32 %f284, %f283, 0fBF800000;
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add.f32 %f285, %f283, 0f3F800000;
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rcp.approx.ftz.f32 %f286, %f285;
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add.f32 %f287, %f284, %f284;
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mul.f32 %f288, %f287, %f286;
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mul.f32 %f289, %f288, %f288;
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mov.f32 %f290, 0f3C4CAF63;
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mov.f32 %f291, 0f3B18F0FE;
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fma.rn.f32 %f292, %f291, %f289, %f290;
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mov.f32 %f293, 0f3DAAAABD;
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fma.rn.f32 %f294, %f292, %f289, %f293;
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mul.rn.f32 %f295, %f294, %f289;
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mul.rn.f32 %f296, %f295, %f288;
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sub.f32 %f297, %f284, %f288;
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add.f32 %f298, %f297, %f297;
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neg.f32 %f299, %f288;
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fma.rn.f32 %f300, %f299, %f284, %f298;
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mul.rn.f32 %f301, %f286, %f300;
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add.f32 %f302, %f296, %f288;
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sub.f32 %f303, %f288, %f302;
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add.f32 %f304, %f296, %f303;
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add.f32 %f305, %f301, %f304;
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add.f32 %f306, %f302, %f305;
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sub.f32 %f307, %f302, %f306;
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add.f32 %f308, %f305, %f307;
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mov.f32 %f309, 0f3F317200;
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mul.rn.f32 %f310, %f282, %f309;
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mov.f32 %f311, 0f35BFBE8E;
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mul.rn.f32 %f312, %f282, %f311;
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add.f32 %f313, %f310, %f306;
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sub.f32 %f314, %f310, %f313;
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add.f32 %f315, %f306, %f314;
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add.f32 %f316, %f308, %f315;
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add.f32 %f317, %f312, %f316;
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add.f32 %f318, %f313, %f317;
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sub.f32 %f319, %f313, %f318;
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add.f32 %f320, %f317, %f319;
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mul.rn.f32 %f321, %f272, %f318;
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neg.f32 %f322, %f321;
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fma.rn.f32 %f323, %f272, %f318, %f322;
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fma.rn.f32 %f324, %f272, %f320, %f323;
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mov.f32 %f325, 0f00000000;
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fma.rn.f32 %f326, %f325, %f318, %f324;
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add.rn.f32 %f327, %f321, %f326;
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neg.f32 %f328, %f327;
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add.rn.f32 %f329, %f321, %f328;
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add.rn.f32 %f330, %f329, %f326;
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mov.b32 %r86, %f327;
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setp.eq.s32 %p26, %r86, 1118925336;
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add.s32 %r87, %r86, -1;
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mov.b32 %f331, %r87;
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add.f32 %f332, %f330, 0f37000000;
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selp.f32 %f36, %f332, %f330, %p26;
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selp.f32 %f333, %f331, %f327, %p26;
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mov.f32 %f334, 0f3FB8AA3B;
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mul.rn.f32 %f335, %f333, %f334;
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cvt.rzi.f32.f32 %f336, %f335;
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abs.f32 %f337, %f336;
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setp.gt.f32 %p27, %f337, 0f42FC0000;
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mov.b32 %r88, %f336;
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and.b32 %r89, %r88, -2147483648;
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or.b32 %r90, %r89, 1123811328;
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mov.b32 %f338, %r90;
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selp.f32 %f339, %f338, %f336, %p27;
|
|
mov.f32 %f340, 0fBF317218;
|
|
fma.rn.f32 %f341, %f339, %f340, %f333;
|
|
mov.f32 %f342, 0f3102E308;
|
|
fma.rn.f32 %f343, %f339, %f342, %f341;
|
|
mul.f32 %f344, %f343, 0f3FB8AA3B;
|
|
add.f32 %f345, %f339, 0f4B40007F;
|
|
mov.b32 %r91, %f345;
|
|
shl.b32 %r92, %r91, 23;
|
|
mov.b32 %f346, %r92;
|
|
ex2.approx.ftz.f32 %f347, %f344;
|
|
mul.f32 %f37, %f347, %f346;
|
|
setp.eq.f32 %p28, %f37, 0f7F800000;
|
|
mov.f32 %f1160, 0f7F800000;
|
|
@%p28 bra $L__BB0_11;
|
|
|
|
fma.rn.f32 %f1160, %f37, %f36, %f37;
|
|
|
|
$L__BB0_11:
|
|
mov.f32 %f1150, 0f40000000;
|
|
cvt.rzi.f32.f32 %f1149, %f1150;
|
|
add.f32 %f1148, %f1149, %f1149;
|
|
mov.f32 %f1147, 0f40800000;
|
|
sub.f32 %f1146, %f1147, %f1148;
|
|
abs.f32 %f1145, %f1146;
|
|
setp.lt.f32 %p29, %f33, 0f00000000;
|
|
setp.eq.f32 %p30, %f1145, 0f3F800000;
|
|
and.pred %p1, %p29, %p30;
|
|
setp.eq.f32 %p31, %f33, 0f00000000;
|
|
@%p31 bra $L__BB0_15;
|
|
bra.uni $L__BB0_12;
|
|
|
|
$L__BB0_15:
|
|
add.f32 %f352, %f33, %f33;
|
|
selp.f32 %f1162, %f352, 0f00000000, %p30;
|
|
bra.uni $L__BB0_16;
|
|
|
|
$L__BB0_12:
|
|
mov.b32 %r93, %f1160;
|
|
xor.b32 %r94, %r93, -2147483648;
|
|
mov.b32 %f348, %r94;
|
|
selp.f32 %f1162, %f348, %f1160, %p1;
|
|
setp.geu.f32 %p32, %f33, 0f00000000;
|
|
@%p32 bra $L__BB0_16;
|
|
|
|
mov.f32 %f349, 0f40800000;
|
|
cvt.rzi.f32.f32 %f350, %f349;
|
|
setp.eq.f32 %p33, %f350, 0f40800000;
|
|
@%p33 bra $L__BB0_16;
|
|
|
|
mov.f32 %f1162, 0f7FFFFFFF;
|
|
|
|
$L__BB0_16:
|
|
add.f32 %f353, %f35, 0f40800000;
|
|
mov.b32 %r95, %f353;
|
|
setp.lt.s32 %p35, %r95, 2139095040;
|
|
@%p35 bra $L__BB0_21;
|
|
|
|
setp.gtu.f32 %p36, %f35, 0f7F800000;
|
|
@%p36 bra $L__BB0_20;
|
|
bra.uni $L__BB0_18;
|
|
|
|
$L__BB0_20:
|
|
add.f32 %f1162, %f33, 0f40800000;
|
|
bra.uni $L__BB0_21;
|
|
|
|
$L__BB0_18:
|
|
setp.neu.f32 %p37, %f35, 0f7F800000;
|
|
@%p37 bra $L__BB0_21;
|
|
|
|
selp.f32 %f1162, 0fFF800000, 0f7F800000, %p1;
|
|
|
|
$L__BB0_21:
|
|
mov.f32 %f354, 0f3F800000;
|
|
sub.f32 %f355, %f354, %f1162;
|
|
setp.eq.f32 %p38, %f33, 0f3F800000;
|
|
selp.f32 %f356, 0f00000000, %f355, %p38;
|
|
cvt.sat.f32.f32 %f357, %f356;
|
|
mul.f32 %f358, %f32, %f357;
|
|
ld.global.f32 %f359, [%rd6+12];
|
|
mul.f32 %f360, %f28, %f359;
|
|
ld.global.f32 %f361, [%rd6+16];
|
|
mul.f32 %f362, %f29, %f361;
|
|
neg.f32 %f363, %f362;
|
|
sub.f32 %f364, %f363, %f360;
|
|
ld.global.f32 %f365, [%rd6+20];
|
|
mul.f32 %f366, %f30, %f365;
|
|
sub.f32 %f367, %f364, %f366;
|
|
cvt.sat.f32.f32 %f368, %f367;
|
|
mul.f32 %f46, %f358, %f368;
|
|
cvt.sat.f32.f32 %f47, %f31;
|
|
mul.f32 %f369, %f46, %f47;
|
|
setp.leu.f32 %p39, %f369, 0f3727C5AC;
|
|
@%p39 bra $L__BB0_23;
|
|
|
|
mul.f32 %f379, %f46, 0f3EA2F983;
|
|
mov.f32 %f385, 0f38D1B717;
|
|
max.f32 %f376, %f384, %f385;
|
|
sub.f32 %f377, %f27, %f376;
|
|
mov.f32 %f378, 0f00000000;
|
|
mov.u32 %r132, 2;
|
|
mov.u32 %r134, 1;
|
|
mov.u32 %r135, 1065353216;
|
|
mov.u32 %r166, 0;
|
|
// begin inline asm
|
|
call(%r96,%r97,%r98,%r99,%r100,%r101,%r102,%r103,%r104,%r105,%r106,%r107,%r108,%r109,%r110,%r111,%r112,%r113,%r114,%r115,%r116,%r117,%r118,%r119,%r120,%r121,%r122,%r123,%r124,%r125,%r126,%r127),_optix_trace_typed_32,(%r166,%rd5,%f15,%f16,%f17,%f28,%f29,%f30,%f376,%f377,%f378,%r134,%r166,%r134,%r132,%r134,%r134,%r135,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166);
|
|
// end inline asm
|
|
mov.b32 %f386, %r96;
|
|
ld.global.f32 %f387, [%rd6+24];
|
|
mul.f32 %f388, %f387, %f386;
|
|
ld.global.f32 %f389, [%rd6+28];
|
|
mul.f32 %f390, %f389, %f386;
|
|
ld.global.f32 %f391, [%rd6+32];
|
|
mul.f32 %f392, %f391, %f386;
|
|
mul.f32 %f393, %f379, %f388;
|
|
mul.f32 %f394, %f379, %f390;
|
|
mul.f32 %f395, %f379, %f392;
|
|
fma.rn.f32 %f1163, %f47, %f393, %f1163;
|
|
fma.rn.f32 %f1164, %f47, %f394, %f1164;
|
|
fma.rn.f32 %f1165, %f47, %f395, %f1165;
|
|
add.f32 %f1166, %f1166, %f386;
|
|
|
|
$L__BB0_23:
|
|
add.s32 %r435, %r435, 1;
|
|
|
|
$L__BB0_24:
|
|
add.s32 %r432, %r432, 1;
|
|
setp.lt.s32 %p41, %r432, %r4;
|
|
mov.pred %p190, %p17;
|
|
@%p41 bra $L__BB0_7;
|
|
|
|
$L__BB0_25:
|
|
cvt.rn.f32.s32 %f396, %r435;
|
|
mov.f32 %f397, 0f3F800000;
|
|
max.f32 %f398, %f396, %f397;
|
|
rcp.rn.f32 %f399, %f398;
|
|
mul.f32 %f1190, %f1163, %f399;
|
|
mul.f32 %f1191, %f1164, %f399;
|
|
mul.f32 %f1192, %f1165, %f399;
|
|
div.rn.f32 %f1193, %f1166, %f398;
|
|
not.pred %p42, %p190;
|
|
@%p42 bra $L__BB0_56;
|
|
|
|
abs.f32 %f1152, %f1155;
|
|
abs.f32 %f1151, %f1153;
|
|
setp.gt.f32 %p43, %f1151, %f1152;
|
|
selp.f32 %f403, 0f00000000, %f1154, %p43;
|
|
mov.f32 %f402, 0f00000000;
|
|
neg.f32 %f404, %f1155;
|
|
selp.f32 %f405, %f1153, %f404, %p43;
|
|
neg.f32 %f406, %f1154;
|
|
selp.f32 %f407, %f406, 0f00000000, %p43;
|
|
mul.f32 %f408, %f405, %f405;
|
|
fma.rn.f32 %f409, %f407, %f407, %f408;
|
|
fma.rn.f32 %f410, %f403, %f403, %f409;
|
|
sqrt.rn.f32 %f411, %f410;
|
|
rcp.rn.f32 %f412, %f411;
|
|
mul.f32 %f68, %f407, %f412;
|
|
mul.f32 %f69, %f405, %f412;
|
|
mul.f32 %f70, %f403, %f412;
|
|
setp.lt.s32 %p44, %r5, 1;
|
|
mov.f32 %f1180, %f402;
|
|
mov.f32 %f1179, %f402;
|
|
mov.f32 %f1178, %f402;
|
|
@%p44 bra $L__BB0_55;
|
|
|
|
cvt.rn.f32.s32 %f416, %r5;
|
|
rcp.rn.f32 %f71, %f416;
|
|
mul.f32 %f72, %f15, 0f3456BF95;
|
|
mul.f32 %f73, %f16, 0f3456BF95;
|
|
mul.f32 %f74, %f17, 0f3456BF95;
|
|
ld.const.u64 %rd7, [params+96];
|
|
mul.f32 %f417, %f1153, %f69;
|
|
mul.f32 %f418, %f1154, %f68;
|
|
sub.f32 %f75, %f418, %f417;
|
|
mul.f32 %f419, %f1155, %f68;
|
|
mul.f32 %f420, %f1153, %f70;
|
|
sub.f32 %f76, %f420, %f419;
|
|
mul.f32 %f421, %f1154, %f70;
|
|
mul.f32 %f422, %f1155, %f69;
|
|
sub.f32 %f77, %f422, %f421;
|
|
mov.u32 %r167, 0;
|
|
add.s64 %rd8, %rd1, 24;
|
|
mov.u64 %rd43, __cudart_i2opi_f;
|
|
abs.f32 %f488, %f73;
|
|
abs.f32 %f489, %f72;
|
|
max.f32 %f490, %f489, %f488;
|
|
abs.f32 %f491, %f74;
|
|
max.f32 %f492, %f490, %f491;
|
|
mov.u32 %r436, %r167;
|
|
|
|
$L__BB0_28:
|
|
cvt.rn.f32.s32 %f81, %r436;
|
|
mov.u32 %r438, %r167;
|
|
|
|
$L__BB0_29:
|
|
mad.lo.s32 %r169, %r439, 1664525, 1013904223;
|
|
and.b32 %r170, %r169, 16777215;
|
|
cvt.rn.f32.u32 %f423, %r170;
|
|
fma.rn.f32 %f424, %f423, 0f33800000, %f81;
|
|
mul.f32 %f425, %f71, %f424;
|
|
mad.lo.s32 %r439, %r169, 1664525, 1013904223;
|
|
and.b32 %r171, %r439, 16777215;
|
|
cvt.rn.f32.u32 %f426, %r171;
|
|
cvt.rn.f32.s32 %f427, %r438;
|
|
fma.rn.f32 %f428, %f426, 0f33800000, %f427;
|
|
mul.f32 %f429, %f71, %f428;
|
|
sqrt.rn.f32 %f85, %f425;
|
|
mul.f32 %f86, %f429, 0f40C90FDB;
|
|
mul.f32 %f430, %f86, 0f3F22F983;
|
|
cvt.rni.s32.f32 %r446, %f430;
|
|
cvt.rn.f32.s32 %f431, %r446;
|
|
mov.f32 %f432, 0fBFC90FDA;
|
|
fma.rn.f32 %f433, %f431, %f432, %f86;
|
|
mov.f32 %f434, 0fB3A22168;
|
|
fma.rn.f32 %f435, %f431, %f434, %f433;
|
|
mov.f32 %f436, 0fA7C234C5;
|
|
fma.rn.f32 %f1184, %f431, %f436, %f435;
|
|
abs.f32 %f88, %f86;
|
|
setp.ltu.f32 %p45, %f88, 0f47CE4780;
|
|
mov.u32 %r443, %r446;
|
|
mov.f32 %f1181, %f1184;
|
|
@%p45 bra $L__BB0_37;
|
|
|
|
setp.eq.f32 %p46, %f88, 0f7F800000;
|
|
@%p46 bra $L__BB0_36;
|
|
bra.uni $L__BB0_31;
|
|
|
|
$L__BB0_36:
|
|
mov.f32 %f439, 0f00000000;
|
|
mul.rn.f32 %f1181, %f86, %f439;
|
|
mov.u32 %r443, 0;
|
|
bra.uni $L__BB0_37;
|
|
|
|
$L__BB0_31:
|
|
mov.b32 %r21, %f86;
|
|
bfe.u32 %r173, %r21, 23, 8;
|
|
add.s32 %r22, %r173, -128;
|
|
shl.b32 %r174, %r21, 8;
|
|
or.b32 %r23, %r174, -2147483648;
|
|
shr.u32 %r24, %r22, 5;
|
|
mov.u64 %rd90, 0;
|
|
mov.u32 %r440, 0;
|
|
mov.u64 %rd88, %rd1;
|
|
mov.u64 %rd89, %rd43;
|
|
|
|
$L__BB0_32:
|
|
.pragma "nounroll";
|
|
ld.global.nc.u32 %r175, [%rd89];
|
|
mad.wide.u32 %rd45, %r175, %r23, %rd90;
|
|
shr.u64 %rd90, %rd45, 32;
|
|
st.local.u32 [%rd88], %rd45;
|
|
add.s64 %rd89, %rd89, 4;
|
|
add.s64 %rd88, %rd88, 4;
|
|
add.s32 %r440, %r440, 1;
|
|
setp.ne.s32 %p47, %r440, 6;
|
|
@%p47 bra $L__BB0_32;
|
|
|
|
st.local.u32 [%rd8], %rd90;
|
|
mov.u32 %r176, 4;
|
|
sub.s32 %r27, %r176, %r24;
|
|
mov.u32 %r177, 6;
|
|
sub.s32 %r178, %r177, %r24;
|
|
mul.wide.s32 %rd46, %r178, 4;
|
|
add.s64 %rd47, %rd1, %rd46;
|
|
ld.local.u32 %r441, [%rd47];
|
|
ld.local.u32 %r442, [%rd47+-4];
|
|
and.b32 %r30, %r22, 31;
|
|
setp.eq.s32 %p48, %r30, 0;
|
|
@%p48 bra $L__BB0_35;
|
|
|
|
mov.u32 %r179, 32;
|
|
sub.s32 %r180, %r179, %r30;
|
|
shr.u32 %r181, %r442, %r180;
|
|
shl.b32 %r182, %r441, %r30;
|
|
add.s32 %r441, %r181, %r182;
|
|
mul.wide.s32 %rd48, %r27, 4;
|
|
add.s64 %rd49, %rd1, %rd48;
|
|
ld.local.u32 %r183, [%rd49];
|
|
shr.u32 %r184, %r183, %r180;
|
|
shl.b32 %r185, %r442, %r30;
|
|
add.s32 %r442, %r184, %r185;
|
|
|
|
$L__BB0_35:
|
|
and.b32 %r186, %r21, -2147483648;
|
|
shr.u32 %r187, %r442, 30;
|
|
shl.b32 %r188, %r441, 2;
|
|
or.b32 %r189, %r187, %r188;
|
|
shr.u32 %r190, %r189, 31;
|
|
shr.u32 %r191, %r441, 30;
|
|
add.s32 %r192, %r190, %r191;
|
|
neg.s32 %r193, %r192;
|
|
setp.eq.s32 %p49, %r186, 0;
|
|
selp.b32 %r443, %r192, %r193, %p49;
|
|
setp.ne.s32 %p50, %r190, 0;
|
|
xor.b32 %r194, %r186, -2147483648;
|
|
selp.b32 %r195, %r194, %r186, %p50;
|
|
selp.b32 %r196, -1, 0, %p50;
|
|
xor.b32 %r197, %r189, %r196;
|
|
shl.b32 %r198, %r442, 2;
|
|
xor.b32 %r199, %r198, %r196;
|
|
cvt.u64.u32 %rd50, %r197;
|
|
cvt.u64.u32 %rd51, %r199;
|
|
bfi.b64 %rd52, %rd50, %rd51, 32, 32;
|
|
cvt.rn.f64.s64 %fd1, %rd52;
|
|
mul.f64 %fd2, %fd1, 0d3BF921FB54442D19;
|
|
cvt.rn.f32.f64 %f437, %fd2;
|
|
setp.eq.s32 %p51, %r195, 0;
|
|
neg.f32 %f438, %f437;
|
|
selp.f32 %f1181, %f437, %f438, %p51;
|
|
|
|
$L__BB0_37:
|
|
add.s32 %r37, %r443, 1;
|
|
and.b32 %r38, %r37, 1;
|
|
setp.eq.s32 %p52, %r38, 0;
|
|
selp.f32 %f92, %f1181, 0f3F800000, %p52;
|
|
mul.rn.f32 %f93, %f1181, %f1181;
|
|
mov.f32 %f1182, 0fB94D4153;
|
|
@%p52 bra $L__BB0_39;
|
|
|
|
mov.f32 %f441, 0fBAB607ED;
|
|
mov.f32 %f442, 0f37CBAC00;
|
|
fma.rn.f32 %f1182, %f442, %f93, %f441;
|
|
|
|
$L__BB0_39:
|
|
selp.f32 %f443, 0f3C0885E4, 0f3D2AAABB, %p52;
|
|
fma.rn.f32 %f444, %f1182, %f93, %f443;
|
|
selp.f32 %f445, 0fBE2AAAA8, 0fBEFFFFFF, %p52;
|
|
fma.rn.f32 %f446, %f444, %f93, %f445;
|
|
mov.f32 %f447, 0f00000000;
|
|
fma.rn.f32 %f448, %f93, %f92, %f447;
|
|
fma.rn.f32 %f1183, %f446, %f448, %f92;
|
|
and.b32 %r201, %r37, 2;
|
|
setp.eq.s32 %p54, %r201, 0;
|
|
@%p54 bra $L__BB0_41;
|
|
|
|
mov.f32 %f450, 0fBF800000;
|
|
fma.rn.f32 %f1183, %f1183, %f450, %f447;
|
|
|
|
$L__BB0_41:
|
|
@%p45 bra $L__BB0_49;
|
|
|
|
setp.eq.f32 %p56, %f88, 0f7F800000;
|
|
@%p56 bra $L__BB0_48;
|
|
bra.uni $L__BB0_43;
|
|
|
|
$L__BB0_48:
|
|
mov.f32 %f453, 0f00000000;
|
|
mul.rn.f32 %f1184, %f86, %f453;
|
|
mov.u32 %r446, 0;
|
|
bra.uni $L__BB0_49;
|
|
|
|
$L__BB0_43:
|
|
mov.b32 %r39, %f86;
|
|
bfe.u32 %r202, %r39, 23, 8;
|
|
add.s32 %r40, %r202, -128;
|
|
shl.b32 %r203, %r39, 8;
|
|
or.b32 %r41, %r203, -2147483648;
|
|
shr.u32 %r42, %r40, 5;
|
|
mov.u64 %rd91, 0;
|
|
mov.u64 %rd92, %rd91;
|
|
|
|
$L__BB0_44:
|
|
.pragma "nounroll";
|
|
shl.b64 %rd55, %rd91, 2;
|
|
mov.u64 %rd56, __cudart_i2opi_f;
|
|
add.s64 %rd57, %rd56, %rd55;
|
|
ld.global.nc.u32 %r204, [%rd57];
|
|
mad.wide.u32 %rd58, %r204, %r41, %rd92;
|
|
shr.u64 %rd92, %rd58, 32;
|
|
add.s64 %rd59, %rd1, %rd55;
|
|
st.local.u32 [%rd59], %rd58;
|
|
cvt.u32.u64 %r205, %rd91;
|
|
add.s32 %r206, %r205, 1;
|
|
cvt.s64.s32 %rd91, %r206;
|
|
setp.ne.s32 %p57, %r206, 6;
|
|
@%p57 bra $L__BB0_44;
|
|
|
|
st.local.u32 [%rd8], %rd92;
|
|
mov.u32 %r207, 4;
|
|
sub.s32 %r43, %r207, %r42;
|
|
mov.u32 %r208, 6;
|
|
sub.s32 %r209, %r208, %r42;
|
|
mul.wide.s32 %rd60, %r209, 4;
|
|
add.s64 %rd61, %rd1, %rd60;
|
|
ld.local.u32 %r444, [%rd61];
|
|
ld.local.u32 %r445, [%rd61+-4];
|
|
and.b32 %r46, %r40, 31;
|
|
setp.eq.s32 %p58, %r46, 0;
|
|
@%p58 bra $L__BB0_47;
|
|
|
|
mov.u32 %r210, 32;
|
|
sub.s32 %r211, %r210, %r46;
|
|
shr.u32 %r212, %r445, %r211;
|
|
shl.b32 %r213, %r444, %r46;
|
|
add.s32 %r444, %r212, %r213;
|
|
mul.wide.s32 %rd62, %r43, 4;
|
|
add.s64 %rd63, %rd1, %rd62;
|
|
ld.local.u32 %r214, [%rd63];
|
|
shr.u32 %r215, %r214, %r211;
|
|
shl.b32 %r216, %r445, %r46;
|
|
add.s32 %r445, %r215, %r216;
|
|
|
|
$L__BB0_47:
|
|
and.b32 %r217, %r39, -2147483648;
|
|
shr.u32 %r218, %r445, 30;
|
|
shl.b32 %r219, %r444, 2;
|
|
or.b32 %r220, %r218, %r219;
|
|
shr.u32 %r221, %r220, 31;
|
|
shr.u32 %r222, %r444, 30;
|
|
add.s32 %r223, %r221, %r222;
|
|
neg.s32 %r224, %r223;
|
|
setp.eq.s32 %p59, %r217, 0;
|
|
selp.b32 %r446, %r223, %r224, %p59;
|
|
setp.ne.s32 %p60, %r221, 0;
|
|
xor.b32 %r225, %r217, -2147483648;
|
|
selp.b32 %r226, %r225, %r217, %p60;
|
|
selp.b32 %r227, -1, 0, %p60;
|
|
xor.b32 %r228, %r220, %r227;
|
|
shl.b32 %r229, %r445, 2;
|
|
xor.b32 %r230, %r229, %r227;
|
|
cvt.u64.u32 %rd64, %r228;
|
|
cvt.u64.u32 %rd65, %r230;
|
|
bfi.b64 %rd66, %rd64, %rd65, 32, 32;
|
|
cvt.rn.f64.s64 %fd3, %rd66;
|
|
mul.f64 %fd4, %fd3, 0d3BF921FB54442D19;
|
|
cvt.rn.f32.f64 %f451, %fd4;
|
|
setp.eq.s32 %p61, %r226, 0;
|
|
neg.f32 %f452, %f451;
|
|
selp.f32 %f1184, %f451, %f452, %p61;
|
|
|
|
$L__BB0_49:
|
|
mul.f32 %f102, %f85, %f1183;
|
|
and.b32 %r53, %r446, 1;
|
|
setp.eq.s32 %p62, %r53, 0;
|
|
selp.f32 %f103, %f1184, 0f3F800000, %p62;
|
|
mul.rn.f32 %f104, %f1184, %f1184;
|
|
mov.f32 %f1185, 0fB94D4153;
|
|
@%p62 bra $L__BB0_51;
|
|
|
|
mov.f32 %f455, 0fBAB607ED;
|
|
mov.f32 %f456, 0f37CBAC00;
|
|
fma.rn.f32 %f1185, %f456, %f104, %f455;
|
|
|
|
$L__BB0_51:
|
|
selp.f32 %f457, 0f3C0885E4, 0f3D2AAABB, %p62;
|
|
fma.rn.f32 %f458, %f1185, %f104, %f457;
|
|
selp.f32 %f459, 0fBE2AAAA8, 0fBEFFFFFF, %p62;
|
|
fma.rn.f32 %f460, %f458, %f104, %f459;
|
|
mov.f32 %f461, 0f00000000;
|
|
fma.rn.f32 %f462, %f104, %f103, %f461;
|
|
fma.rn.f32 %f1186, %f460, %f462, %f103;
|
|
and.b32 %r232, %r446, 2;
|
|
setp.eq.s32 %p64, %r232, 0;
|
|
@%p64 bra $L__BB0_53;
|
|
|
|
mov.f32 %f464, 0fBF800000;
|
|
fma.rn.f32 %f1186, %f1186, %f464, %f461;
|
|
|
|
$L__BB0_53:
|
|
mul.f32 %f474, %f102, %f102;
|
|
mov.f32 %f475, 0f3F800000;
|
|
sub.f32 %f476, %f475, %f474;
|
|
mul.f32 %f477, %f85, %f1186;
|
|
mul.f32 %f478, %f477, %f477;
|
|
sub.f32 %f479, %f476, %f478;
|
|
max.f32 %f480, %f461, %f479;
|
|
sqrt.rn.f32 %f481, %f480;
|
|
mul.f32 %f482, %f68, %f477;
|
|
mul.f32 %f483, %f69, %f477;
|
|
mul.f32 %f484, %f70, %f477;
|
|
fma.rn.f32 %f485, %f77, %f102, %f482;
|
|
fma.rn.f32 %f486, %f76, %f102, %f483;
|
|
fma.rn.f32 %f487, %f75, %f102, %f484;
|
|
fma.rn.f32 %f468, %f1153, %f481, %f485;
|
|
fma.rn.f32 %f469, %f1154, %f481, %f486;
|
|
fma.rn.f32 %f470, %f1155, %f481, %f487;
|
|
mov.f32 %f493, 0f38D1B717;
|
|
max.f32 %f471, %f492, %f493;
|
|
mov.f32 %f472, 0f6C4ECB8F;
|
|
mov.u32 %r266, 1;
|
|
mov.u32 %r269, 2;
|
|
mov.u32 %r271, 3;
|
|
mov.u32 %r303, 0;
|
|
// begin inline asm
|
|
call(%r233,%r234,%r235,%r236,%r237,%r238,%r239,%r240,%r241,%r242,%r243,%r244,%r245,%r246,%r247,%r248,%r249,%r250,%r251,%r252,%r253,%r254,%r255,%r256,%r257,%r258,%r259,%r260,%r261,%r262,%r263,%r264),_optix_trace_typed_32,(%r303,%rd7,%f15,%f16,%f17,%f468,%f469,%f470,%f471,%f472,%f461,%r266,%r303,%r303,%r269,%r303,%r271,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303);
|
|
// end inline asm
|
|
mov.b32 %f494, %r233;
|
|
mov.b32 %f495, %r234;
|
|
mov.b32 %f496, %r235;
|
|
max.f32 %f497, %f494, %f461;
|
|
max.f32 %f498, %f495, %f461;
|
|
max.f32 %f499, %f496, %f461;
|
|
add.f32 %f1180, %f1180, %f497;
|
|
add.f32 %f1179, %f1179, %f498;
|
|
add.f32 %f1178, %f1178, %f499;
|
|
add.s32 %r438, %r438, 1;
|
|
setp.lt.s32 %p65, %r438, %r5;
|
|
@%p65 bra $L__BB0_29;
|
|
|
|
add.s32 %r436, %r436, 1;
|
|
setp.lt.s32 %p66, %r436, %r5;
|
|
@%p66 bra $L__BB0_28;
|
|
|
|
$L__BB0_55:
|
|
mul.lo.s32 %r304, %r5, %r5;
|
|
cvt.rn.f32.s32 %f500, %r304;
|
|
rcp.rn.f32 %f501, %f500;
|
|
mul.f32 %f1190, %f501, %f1180;
|
|
mul.f32 %f1191, %f501, %f1179;
|
|
mul.f32 %f1192, %f501, %f1178;
|
|
div.rn.f32 %f1193, %f402, %f500;
|
|
|
|
$L__BB0_56:
|
|
ld.const.u32 %r431, [params+616];
|
|
setp.lt.s32 %p67, %r431, 0;
|
|
selp.f32 %f124, %f1190, %f1193, %p67;
|
|
ld.const.u32 %r56, [params+104];
|
|
and.b32 %r305, %r56, 8;
|
|
setp.eq.s32 %p68, %r305, 0;
|
|
@%p68 bra $L__BB0_70;
|
|
|
|
ld.const.u64 %rd68, [params+192];
|
|
cvta.to.global.u64 %rd19, %rd68;
|
|
ld.const.u32 %r306, [params+184];
|
|
mad.lo.s32 %r307, %r306, %r7, %r6;
|
|
cvt.u64.u32 %rd20, %r307;
|
|
mov.f32 %f504, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f505, %f504;
|
|
add.f32 %f506, %f505, %f505;
|
|
mov.f32 %f507, 0f3EE8BA2E;
|
|
sub.f32 %f508, %f507, %f506;
|
|
abs.f32 %f125, %f508;
|
|
abs.f32 %f126, %f124;
|
|
setp.lt.f32 %p69, %f126, 0f00800000;
|
|
mul.f32 %f509, %f126, 0f4B800000;
|
|
selp.f32 %f510, %f509, %f126, %p69;
|
|
selp.f32 %f511, 0fC3170000, 0fC2FE0000, %p69;
|
|
mov.b32 %r308, %f510;
|
|
and.b32 %r309, %r308, 8388607;
|
|
or.b32 %r310, %r309, 1065353216;
|
|
mov.b32 %f512, %r310;
|
|
shr.u32 %r311, %r308, 23;
|
|
cvt.rn.f32.u32 %f513, %r311;
|
|
add.f32 %f514, %f511, %f513;
|
|
setp.gt.f32 %p70, %f512, 0f3FB504F3;
|
|
mul.f32 %f515, %f512, 0f3F000000;
|
|
add.f32 %f516, %f514, 0f3F800000;
|
|
selp.f32 %f517, %f516, %f514, %p70;
|
|
selp.f32 %f518, %f515, %f512, %p70;
|
|
add.f32 %f519, %f518, 0fBF800000;
|
|
add.f32 %f520, %f518, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f521, %f520;
|
|
add.f32 %f522, %f519, %f519;
|
|
mul.f32 %f523, %f522, %f521;
|
|
mul.f32 %f524, %f523, %f523;
|
|
mov.f32 %f525, 0f3C4CAF63;
|
|
mov.f32 %f526, 0f3B18F0FE;
|
|
fma.rn.f32 %f527, %f526, %f524, %f525;
|
|
mov.f32 %f528, 0f3DAAAABD;
|
|
fma.rn.f32 %f529, %f527, %f524, %f528;
|
|
mul.rn.f32 %f530, %f529, %f524;
|
|
mul.rn.f32 %f531, %f530, %f523;
|
|
sub.f32 %f532, %f519, %f523;
|
|
add.f32 %f533, %f532, %f532;
|
|
neg.f32 %f534, %f523;
|
|
fma.rn.f32 %f535, %f534, %f519, %f533;
|
|
mul.rn.f32 %f536, %f521, %f535;
|
|
add.f32 %f537, %f531, %f523;
|
|
sub.f32 %f538, %f523, %f537;
|
|
add.f32 %f539, %f531, %f538;
|
|
add.f32 %f540, %f536, %f539;
|
|
add.f32 %f541, %f537, %f540;
|
|
sub.f32 %f542, %f537, %f541;
|
|
add.f32 %f543, %f540, %f542;
|
|
mov.f32 %f544, 0f3F317200;
|
|
mul.rn.f32 %f545, %f517, %f544;
|
|
mov.f32 %f546, 0f35BFBE8E;
|
|
mul.rn.f32 %f547, %f517, %f546;
|
|
add.f32 %f548, %f545, %f541;
|
|
sub.f32 %f549, %f545, %f548;
|
|
add.f32 %f550, %f541, %f549;
|
|
add.f32 %f551, %f543, %f550;
|
|
add.f32 %f552, %f547, %f551;
|
|
add.f32 %f553, %f548, %f552;
|
|
sub.f32 %f554, %f548, %f553;
|
|
add.f32 %f555, %f552, %f554;
|
|
mul.rn.f32 %f556, %f507, %f553;
|
|
neg.f32 %f557, %f556;
|
|
fma.rn.f32 %f558, %f507, %f553, %f557;
|
|
fma.rn.f32 %f559, %f507, %f555, %f558;
|
|
mov.f32 %f560, 0f00000000;
|
|
fma.rn.f32 %f561, %f560, %f553, %f559;
|
|
add.rn.f32 %f562, %f556, %f561;
|
|
neg.f32 %f563, %f562;
|
|
add.rn.f32 %f564, %f556, %f563;
|
|
add.rn.f32 %f565, %f564, %f561;
|
|
mov.b32 %r312, %f562;
|
|
setp.eq.s32 %p71, %r312, 1118925336;
|
|
add.s32 %r313, %r312, -1;
|
|
mov.b32 %f566, %r313;
|
|
add.f32 %f567, %f565, 0f37000000;
|
|
selp.f32 %f127, %f567, %f565, %p71;
|
|
selp.f32 %f568, %f566, %f562, %p71;
|
|
mov.f32 %f569, 0f3FB8AA3B;
|
|
mul.rn.f32 %f570, %f568, %f569;
|
|
cvt.rzi.f32.f32 %f571, %f570;
|
|
abs.f32 %f572, %f571;
|
|
setp.gt.f32 %p72, %f572, 0f42FC0000;
|
|
mov.b32 %r314, %f571;
|
|
and.b32 %r315, %r314, -2147483648;
|
|
or.b32 %r316, %r315, 1123811328;
|
|
mov.b32 %f573, %r316;
|
|
selp.f32 %f574, %f573, %f571, %p72;
|
|
mov.f32 %f575, 0fBF317218;
|
|
fma.rn.f32 %f576, %f574, %f575, %f568;
|
|
mov.f32 %f577, 0f3102E308;
|
|
fma.rn.f32 %f578, %f574, %f577, %f576;
|
|
mul.f32 %f579, %f578, 0f3FB8AA3B;
|
|
add.f32 %f580, %f574, 0f4B40007F;
|
|
mov.b32 %r317, %f580;
|
|
shl.b32 %r318, %r317, 23;
|
|
mov.b32 %f581, %r318;
|
|
ex2.approx.ftz.f32 %f582, %f579;
|
|
mul.f32 %f128, %f582, %f581;
|
|
setp.eq.f32 %p73, %f128, 0f7F800000;
|
|
mov.f32 %f1194, 0f7F800000;
|
|
@%p73 bra $L__BB0_59;
|
|
|
|
fma.rn.f32 %f1194, %f128, %f127, %f128;
|
|
|
|
$L__BB0_59:
|
|
setp.lt.f32 %p74, %f124, 0f00000000;
|
|
setp.eq.f32 %p75, %f125, 0f3F800000;
|
|
and.pred %p3, %p74, %p75;
|
|
setp.eq.f32 %p76, %f124, 0f00000000;
|
|
@%p76 bra $L__BB0_63;
|
|
bra.uni $L__BB0_60;
|
|
|
|
$L__BB0_63:
|
|
add.f32 %f587, %f124, %f124;
|
|
selp.f32 %f1196, %f587, 0f00000000, %p75;
|
|
bra.uni $L__BB0_64;
|
|
|
|
$L__BB0_155:
|
|
mov.f32 %f1144, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs53, %f1144;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs52, %f1144;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs51, %f1144;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs54, 0;
|
|
st.global.v4.u16 [%rd24], {%rs51, %rs52, %rs53, %rs54};
|
|
bra.uni $L__BB0_156;
|
|
|
|
$L__BB0_60:
|
|
mov.b32 %r319, %f1194;
|
|
xor.b32 %r320, %r319, -2147483648;
|
|
mov.b32 %f583, %r320;
|
|
selp.f32 %f1196, %f583, %f1194, %p3;
|
|
setp.geu.f32 %p77, %f124, 0f00000000;
|
|
@%p77 bra $L__BB0_64;
|
|
|
|
mov.f32 %f584, 0f3EE8BA2E;
|
|
cvt.rzi.f32.f32 %f585, %f584;
|
|
setp.eq.f32 %p78, %f585, 0f3EE8BA2E;
|
|
@%p78 bra $L__BB0_64;
|
|
|
|
mov.f32 %f1196, 0f7FFFFFFF;
|
|
|
|
$L__BB0_64:
|
|
add.f32 %f588, %f126, 0f3EE8BA2E;
|
|
mov.b32 %r321, %f588;
|
|
setp.lt.s32 %p80, %r321, 2139095040;
|
|
@%p80 bra $L__BB0_69;
|
|
|
|
setp.gtu.f32 %p81, %f126, 0f7F800000;
|
|
@%p81 bra $L__BB0_68;
|
|
bra.uni $L__BB0_66;
|
|
|
|
$L__BB0_68:
|
|
add.f32 %f1196, %f124, 0f3EE8BA2E;
|
|
bra.uni $L__BB0_69;
|
|
|
|
$L__BB0_66:
|
|
setp.neu.f32 %p82, %f126, 0f7F800000;
|
|
@%p82 bra $L__BB0_69;
|
|
|
|
selp.f32 %f1196, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
$L__BB0_69:
|
|
mul.f32 %f589, %f1196, 0f437F0000;
|
|
setp.eq.f32 %p83, %f124, 0f3F800000;
|
|
selp.f32 %f590, 0f437F0000, %f589, %p83;
|
|
cvt.rzi.u32.f32 %r322, %f590;
|
|
shl.b64 %rd69, %rd20, 1;
|
|
add.s64 %rd70, %rd19, %rd69;
|
|
cvt.u16.u32 %rs16, %r322;
|
|
mov.u16 %rs17, 255;
|
|
st.global.v2.u8 [%rd70], {%rs16, %rs17};
|
|
|
|
$L__BB0_70:
|
|
ld.const.v2.f32 {%f591, %f592}, [params+648];
|
|
mul.f32 %f137, %f1190, %f591;
|
|
mul.f32 %f138, %f1191, %f592;
|
|
ld.const.f32 %f595, [params+656];
|
|
mul.f32 %f139, %f1192, %f595;
|
|
and.b32 %r323, %r56, 1;
|
|
setp.eq.b32 %p84, %r323, 1;
|
|
mov.pred %p85, 0;
|
|
xor.pred %p86, %p84, %p85;
|
|
not.pred %p87, %p86;
|
|
@%p87 bra $L__BB0_144;
|
|
|
|
mov.f32 %f597, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f598, %f597;
|
|
add.f32 %f599, %f598, %f598;
|
|
mov.f32 %f600, 0f3EE66666;
|
|
sub.f32 %f601, %f600, %f599;
|
|
abs.f32 %f140, %f601;
|
|
abs.f32 %f141, %f137;
|
|
setp.lt.f32 %p88, %f141, 0f00800000;
|
|
mul.f32 %f602, %f141, 0f4B800000;
|
|
selp.f32 %f603, %f602, %f141, %p88;
|
|
selp.f32 %f604, 0fC3170000, 0fC2FE0000, %p88;
|
|
mov.b32 %r324, %f603;
|
|
and.b32 %r325, %r324, 8388607;
|
|
or.b32 %r326, %r325, 1065353216;
|
|
mov.b32 %f605, %r326;
|
|
shr.u32 %r327, %r324, 23;
|
|
cvt.rn.f32.u32 %f606, %r327;
|
|
add.f32 %f607, %f604, %f606;
|
|
setp.gt.f32 %p89, %f605, 0f3FB504F3;
|
|
mul.f32 %f608, %f605, 0f3F000000;
|
|
add.f32 %f609, %f607, 0f3F800000;
|
|
selp.f32 %f610, %f609, %f607, %p89;
|
|
selp.f32 %f611, %f608, %f605, %p89;
|
|
add.f32 %f612, %f611, 0fBF800000;
|
|
add.f32 %f613, %f611, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f614, %f613;
|
|
add.f32 %f615, %f612, %f612;
|
|
mul.f32 %f616, %f615, %f614;
|
|
mul.f32 %f617, %f616, %f616;
|
|
mov.f32 %f618, 0f3C4CAF63;
|
|
mov.f32 %f619, 0f3B18F0FE;
|
|
fma.rn.f32 %f620, %f619, %f617, %f618;
|
|
mov.f32 %f621, 0f3DAAAABD;
|
|
fma.rn.f32 %f622, %f620, %f617, %f621;
|
|
mul.rn.f32 %f623, %f622, %f617;
|
|
mul.rn.f32 %f624, %f623, %f616;
|
|
sub.f32 %f625, %f612, %f616;
|
|
add.f32 %f626, %f625, %f625;
|
|
neg.f32 %f627, %f616;
|
|
fma.rn.f32 %f628, %f627, %f612, %f626;
|
|
mul.rn.f32 %f629, %f614, %f628;
|
|
add.f32 %f630, %f624, %f616;
|
|
sub.f32 %f631, %f616, %f630;
|
|
add.f32 %f632, %f624, %f631;
|
|
add.f32 %f633, %f629, %f632;
|
|
add.f32 %f634, %f630, %f633;
|
|
sub.f32 %f635, %f630, %f634;
|
|
add.f32 %f636, %f633, %f635;
|
|
mov.f32 %f637, 0f3F317200;
|
|
mul.rn.f32 %f638, %f610, %f637;
|
|
mov.f32 %f639, 0f35BFBE8E;
|
|
mul.rn.f32 %f640, %f610, %f639;
|
|
add.f32 %f641, %f638, %f634;
|
|
sub.f32 %f642, %f638, %f641;
|
|
add.f32 %f643, %f634, %f642;
|
|
add.f32 %f644, %f636, %f643;
|
|
add.f32 %f645, %f640, %f644;
|
|
add.f32 %f646, %f641, %f645;
|
|
sub.f32 %f647, %f641, %f646;
|
|
add.f32 %f648, %f645, %f647;
|
|
mul.rn.f32 %f649, %f600, %f646;
|
|
neg.f32 %f650, %f649;
|
|
fma.rn.f32 %f651, %f600, %f646, %f650;
|
|
fma.rn.f32 %f652, %f600, %f648, %f651;
|
|
mov.f32 %f653, 0f00000000;
|
|
fma.rn.f32 %f654, %f653, %f646, %f652;
|
|
add.rn.f32 %f655, %f649, %f654;
|
|
neg.f32 %f656, %f655;
|
|
add.rn.f32 %f657, %f649, %f656;
|
|
add.rn.f32 %f658, %f657, %f654;
|
|
mov.b32 %r328, %f655;
|
|
setp.eq.s32 %p90, %r328, 1118925336;
|
|
add.s32 %r329, %r328, -1;
|
|
mov.b32 %f659, %r329;
|
|
add.f32 %f660, %f658, 0f37000000;
|
|
selp.f32 %f142, %f660, %f658, %p90;
|
|
selp.f32 %f661, %f659, %f655, %p90;
|
|
mov.f32 %f662, 0f3FB8AA3B;
|
|
mul.rn.f32 %f663, %f661, %f662;
|
|
cvt.rzi.f32.f32 %f664, %f663;
|
|
abs.f32 %f665, %f664;
|
|
setp.gt.f32 %p91, %f665, 0f42FC0000;
|
|
mov.b32 %r330, %f664;
|
|
and.b32 %r331, %r330, -2147483648;
|
|
or.b32 %r332, %r331, 1123811328;
|
|
mov.b32 %f666, %r332;
|
|
selp.f32 %f667, %f666, %f664, %p91;
|
|
mov.f32 %f668, 0fBF317218;
|
|
fma.rn.f32 %f669, %f667, %f668, %f661;
|
|
mov.f32 %f670, 0f3102E308;
|
|
fma.rn.f32 %f671, %f667, %f670, %f669;
|
|
mul.f32 %f672, %f671, 0f3FB8AA3B;
|
|
add.f32 %f673, %f667, 0f4B40007F;
|
|
mov.b32 %r333, %f673;
|
|
shl.b32 %r334, %r333, 23;
|
|
mov.b32 %f674, %r334;
|
|
ex2.approx.ftz.f32 %f675, %f672;
|
|
mul.f32 %f143, %f675, %f674;
|
|
setp.eq.f32 %p92, %f143, 0f7F800000;
|
|
mov.f32 %f1197, 0f7F800000;
|
|
@%p92 bra $L__BB0_73;
|
|
|
|
fma.rn.f32 %f1197, %f143, %f142, %f143;
|
|
|
|
$L__BB0_73:
|
|
setp.lt.f32 %p93, %f137, 0f00000000;
|
|
setp.eq.f32 %p94, %f140, 0f3F800000;
|
|
and.pred %p4, %p93, %p94;
|
|
setp.eq.f32 %p95, %f137, 0f00000000;
|
|
@%p95 bra $L__BB0_77;
|
|
bra.uni $L__BB0_74;
|
|
|
|
$L__BB0_77:
|
|
add.f32 %f680, %f137, %f137;
|
|
selp.f32 %f1199, %f680, 0f00000000, %p94;
|
|
bra.uni $L__BB0_78;
|
|
|
|
$L__BB0_74:
|
|
mov.b32 %r335, %f1197;
|
|
xor.b32 %r336, %r335, -2147483648;
|
|
mov.b32 %f676, %r336;
|
|
selp.f32 %f1199, %f676, %f1197, %p4;
|
|
setp.geu.f32 %p96, %f137, 0f00000000;
|
|
@%p96 bra $L__BB0_78;
|
|
|
|
mov.f32 %f677, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f678, %f677;
|
|
setp.eq.f32 %p97, %f678, 0f3EE66666;
|
|
@%p97 bra $L__BB0_78;
|
|
|
|
mov.f32 %f1199, 0f7FFFFFFF;
|
|
|
|
$L__BB0_78:
|
|
add.f32 %f681, %f141, 0f3EE66666;
|
|
mov.b32 %r337, %f681;
|
|
setp.lt.s32 %p99, %r337, 2139095040;
|
|
@%p99 bra $L__BB0_83;
|
|
|
|
setp.gtu.f32 %p100, %f141, 0f7F800000;
|
|
@%p100 bra $L__BB0_82;
|
|
bra.uni $L__BB0_80;
|
|
|
|
$L__BB0_82:
|
|
add.f32 %f1199, %f137, 0f3EE66666;
|
|
bra.uni $L__BB0_83;
|
|
|
|
$L__BB0_80:
|
|
setp.neu.f32 %p101, %f141, 0f7F800000;
|
|
@%p101 bra $L__BB0_83;
|
|
|
|
selp.f32 %f1199, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
$L__BB0_83:
|
|
setp.eq.f32 %p102, %f137, 0f3F800000;
|
|
selp.f32 %f152, 0f3F800000, %f1199, %p102;
|
|
abs.f32 %f153, %f138;
|
|
setp.lt.f32 %p103, %f153, 0f00800000;
|
|
mul.f32 %f683, %f153, 0f4B800000;
|
|
selp.f32 %f684, %f683, %f153, %p103;
|
|
selp.f32 %f685, 0fC3170000, 0fC2FE0000, %p103;
|
|
mov.b32 %r338, %f684;
|
|
and.b32 %r339, %r338, 8388607;
|
|
or.b32 %r340, %r339, 1065353216;
|
|
mov.b32 %f686, %r340;
|
|
shr.u32 %r341, %r338, 23;
|
|
cvt.rn.f32.u32 %f687, %r341;
|
|
add.f32 %f688, %f685, %f687;
|
|
setp.gt.f32 %p104, %f686, 0f3FB504F3;
|
|
mul.f32 %f689, %f686, 0f3F000000;
|
|
add.f32 %f690, %f688, 0f3F800000;
|
|
selp.f32 %f691, %f690, %f688, %p104;
|
|
selp.f32 %f692, %f689, %f686, %p104;
|
|
add.f32 %f693, %f692, 0fBF800000;
|
|
add.f32 %f694, %f692, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f695, %f694;
|
|
add.f32 %f696, %f693, %f693;
|
|
mul.f32 %f697, %f696, %f695;
|
|
mul.f32 %f698, %f697, %f697;
|
|
mov.f32 %f699, 0f3C4CAF63;
|
|
mov.f32 %f700, 0f3B18F0FE;
|
|
fma.rn.f32 %f701, %f700, %f698, %f699;
|
|
mov.f32 %f702, 0f3DAAAABD;
|
|
fma.rn.f32 %f703, %f701, %f698, %f702;
|
|
mul.rn.f32 %f704, %f703, %f698;
|
|
mul.rn.f32 %f705, %f704, %f697;
|
|
sub.f32 %f706, %f693, %f697;
|
|
add.f32 %f707, %f706, %f706;
|
|
neg.f32 %f708, %f697;
|
|
fma.rn.f32 %f709, %f708, %f693, %f707;
|
|
mul.rn.f32 %f710, %f695, %f709;
|
|
add.f32 %f711, %f705, %f697;
|
|
sub.f32 %f712, %f697, %f711;
|
|
add.f32 %f713, %f705, %f712;
|
|
add.f32 %f714, %f710, %f713;
|
|
add.f32 %f715, %f711, %f714;
|
|
sub.f32 %f716, %f711, %f715;
|
|
add.f32 %f717, %f714, %f716;
|
|
mov.f32 %f718, 0f3F317200;
|
|
mul.rn.f32 %f719, %f691, %f718;
|
|
mov.f32 %f720, 0f35BFBE8E;
|
|
mul.rn.f32 %f721, %f691, %f720;
|
|
add.f32 %f722, %f719, %f715;
|
|
sub.f32 %f723, %f719, %f722;
|
|
add.f32 %f724, %f715, %f723;
|
|
add.f32 %f725, %f717, %f724;
|
|
add.f32 %f726, %f721, %f725;
|
|
add.f32 %f727, %f722, %f726;
|
|
sub.f32 %f728, %f722, %f727;
|
|
add.f32 %f729, %f726, %f728;
|
|
mov.f32 %f730, 0f3EE66666;
|
|
mul.rn.f32 %f731, %f730, %f727;
|
|
neg.f32 %f732, %f731;
|
|
fma.rn.f32 %f733, %f730, %f727, %f732;
|
|
fma.rn.f32 %f734, %f730, %f729, %f733;
|
|
mov.f32 %f735, 0f00000000;
|
|
fma.rn.f32 %f736, %f735, %f727, %f734;
|
|
add.rn.f32 %f737, %f731, %f736;
|
|
neg.f32 %f738, %f737;
|
|
add.rn.f32 %f739, %f731, %f738;
|
|
add.rn.f32 %f740, %f739, %f736;
|
|
mov.b32 %r342, %f737;
|
|
setp.eq.s32 %p105, %r342, 1118925336;
|
|
add.s32 %r343, %r342, -1;
|
|
mov.b32 %f741, %r343;
|
|
add.f32 %f742, %f740, 0f37000000;
|
|
selp.f32 %f154, %f742, %f740, %p105;
|
|
selp.f32 %f743, %f741, %f737, %p105;
|
|
mov.f32 %f744, 0f3FB8AA3B;
|
|
mul.rn.f32 %f745, %f743, %f744;
|
|
cvt.rzi.f32.f32 %f746, %f745;
|
|
abs.f32 %f747, %f746;
|
|
setp.gt.f32 %p106, %f747, 0f42FC0000;
|
|
mov.b32 %r344, %f746;
|
|
and.b32 %r345, %r344, -2147483648;
|
|
or.b32 %r346, %r345, 1123811328;
|
|
mov.b32 %f748, %r346;
|
|
selp.f32 %f749, %f748, %f746, %p106;
|
|
mov.f32 %f750, 0fBF317218;
|
|
fma.rn.f32 %f751, %f749, %f750, %f743;
|
|
mov.f32 %f752, 0f3102E308;
|
|
fma.rn.f32 %f753, %f749, %f752, %f751;
|
|
mul.f32 %f754, %f753, 0f3FB8AA3B;
|
|
add.f32 %f755, %f749, 0f4B40007F;
|
|
mov.b32 %r347, %f755;
|
|
shl.b32 %r348, %r347, 23;
|
|
mov.b32 %f756, %r348;
|
|
ex2.approx.ftz.f32 %f757, %f754;
|
|
mul.f32 %f155, %f757, %f756;
|
|
setp.eq.f32 %p107, %f155, 0f7F800000;
|
|
mov.f32 %f1200, 0f7F800000;
|
|
@%p107 bra $L__BB0_85;
|
|
|
|
fma.rn.f32 %f1200, %f155, %f154, %f155;
|
|
|
|
$L__BB0_85:
|
|
setp.lt.f32 %p108, %f138, 0f00000000;
|
|
and.pred %p5, %p108, %p94;
|
|
setp.eq.f32 %p110, %f138, 0f00000000;
|
|
@%p110 bra $L__BB0_89;
|
|
bra.uni $L__BB0_86;
|
|
|
|
$L__BB0_89:
|
|
add.f32 %f762, %f138, %f138;
|
|
selp.f32 %f1202, %f762, 0f00000000, %p94;
|
|
bra.uni $L__BB0_90;
|
|
|
|
$L__BB0_86:
|
|
mov.b32 %r349, %f1200;
|
|
xor.b32 %r350, %r349, -2147483648;
|
|
mov.b32 %f758, %r350;
|
|
selp.f32 %f1202, %f758, %f1200, %p5;
|
|
setp.geu.f32 %p111, %f138, 0f00000000;
|
|
@%p111 bra $L__BB0_90;
|
|
|
|
mov.f32 %f759, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f760, %f759;
|
|
setp.eq.f32 %p112, %f760, 0f3EE66666;
|
|
@%p112 bra $L__BB0_90;
|
|
|
|
mov.f32 %f1202, 0f7FFFFFFF;
|
|
|
|
$L__BB0_90:
|
|
add.f32 %f763, %f153, 0f3EE66666;
|
|
mov.b32 %r351, %f763;
|
|
setp.lt.s32 %p114, %r351, 2139095040;
|
|
@%p114 bra $L__BB0_95;
|
|
|
|
setp.gtu.f32 %p115, %f153, 0f7F800000;
|
|
@%p115 bra $L__BB0_94;
|
|
bra.uni $L__BB0_92;
|
|
|
|
$L__BB0_94:
|
|
add.f32 %f1202, %f138, 0f3EE66666;
|
|
bra.uni $L__BB0_95;
|
|
|
|
$L__BB0_92:
|
|
setp.neu.f32 %p116, %f153, 0f7F800000;
|
|
@%p116 bra $L__BB0_95;
|
|
|
|
selp.f32 %f1202, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
$L__BB0_95:
|
|
setp.eq.f32 %p117, %f138, 0f3F800000;
|
|
selp.f32 %f164, 0f3F800000, %f1202, %p117;
|
|
abs.f32 %f165, %f139;
|
|
setp.lt.f32 %p118, %f165, 0f00800000;
|
|
mul.f32 %f765, %f165, 0f4B800000;
|
|
selp.f32 %f766, %f765, %f165, %p118;
|
|
selp.f32 %f767, 0fC3170000, 0fC2FE0000, %p118;
|
|
mov.b32 %r352, %f766;
|
|
and.b32 %r353, %r352, 8388607;
|
|
or.b32 %r354, %r353, 1065353216;
|
|
mov.b32 %f768, %r354;
|
|
shr.u32 %r355, %r352, 23;
|
|
cvt.rn.f32.u32 %f769, %r355;
|
|
add.f32 %f770, %f767, %f769;
|
|
setp.gt.f32 %p119, %f768, 0f3FB504F3;
|
|
mul.f32 %f771, %f768, 0f3F000000;
|
|
add.f32 %f772, %f770, 0f3F800000;
|
|
selp.f32 %f773, %f772, %f770, %p119;
|
|
selp.f32 %f774, %f771, %f768, %p119;
|
|
add.f32 %f775, %f774, 0fBF800000;
|
|
add.f32 %f776, %f774, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f777, %f776;
|
|
add.f32 %f778, %f775, %f775;
|
|
mul.f32 %f779, %f778, %f777;
|
|
mul.f32 %f780, %f779, %f779;
|
|
mov.f32 %f781, 0f3C4CAF63;
|
|
mov.f32 %f782, 0f3B18F0FE;
|
|
fma.rn.f32 %f783, %f782, %f780, %f781;
|
|
mov.f32 %f784, 0f3DAAAABD;
|
|
fma.rn.f32 %f785, %f783, %f780, %f784;
|
|
mul.rn.f32 %f786, %f785, %f780;
|
|
mul.rn.f32 %f787, %f786, %f779;
|
|
sub.f32 %f788, %f775, %f779;
|
|
add.f32 %f789, %f788, %f788;
|
|
neg.f32 %f790, %f779;
|
|
fma.rn.f32 %f791, %f790, %f775, %f789;
|
|
mul.rn.f32 %f792, %f777, %f791;
|
|
add.f32 %f793, %f787, %f779;
|
|
sub.f32 %f794, %f779, %f793;
|
|
add.f32 %f795, %f787, %f794;
|
|
add.f32 %f796, %f792, %f795;
|
|
add.f32 %f797, %f793, %f796;
|
|
sub.f32 %f798, %f793, %f797;
|
|
add.f32 %f799, %f796, %f798;
|
|
mov.f32 %f800, 0f3F317200;
|
|
mul.rn.f32 %f801, %f773, %f800;
|
|
mov.f32 %f802, 0f35BFBE8E;
|
|
mul.rn.f32 %f803, %f773, %f802;
|
|
add.f32 %f804, %f801, %f797;
|
|
sub.f32 %f805, %f801, %f804;
|
|
add.f32 %f806, %f797, %f805;
|
|
add.f32 %f807, %f799, %f806;
|
|
add.f32 %f808, %f803, %f807;
|
|
add.f32 %f809, %f804, %f808;
|
|
sub.f32 %f810, %f804, %f809;
|
|
add.f32 %f811, %f808, %f810;
|
|
mov.f32 %f812, 0f3EE66666;
|
|
mul.rn.f32 %f813, %f812, %f809;
|
|
neg.f32 %f814, %f813;
|
|
fma.rn.f32 %f815, %f812, %f809, %f814;
|
|
fma.rn.f32 %f816, %f812, %f811, %f815;
|
|
mov.f32 %f817, 0f00000000;
|
|
fma.rn.f32 %f818, %f817, %f809, %f816;
|
|
add.rn.f32 %f819, %f813, %f818;
|
|
neg.f32 %f820, %f819;
|
|
add.rn.f32 %f821, %f813, %f820;
|
|
add.rn.f32 %f822, %f821, %f818;
|
|
mov.b32 %r356, %f819;
|
|
setp.eq.s32 %p120, %r356, 1118925336;
|
|
add.s32 %r357, %r356, -1;
|
|
mov.b32 %f823, %r357;
|
|
add.f32 %f824, %f822, 0f37000000;
|
|
selp.f32 %f166, %f824, %f822, %p120;
|
|
selp.f32 %f825, %f823, %f819, %p120;
|
|
mov.f32 %f826, 0f3FB8AA3B;
|
|
mul.rn.f32 %f827, %f825, %f826;
|
|
cvt.rzi.f32.f32 %f828, %f827;
|
|
abs.f32 %f829, %f828;
|
|
setp.gt.f32 %p121, %f829, 0f42FC0000;
|
|
mov.b32 %r358, %f828;
|
|
and.b32 %r359, %r358, -2147483648;
|
|
or.b32 %r360, %r359, 1123811328;
|
|
mov.b32 %f830, %r360;
|
|
selp.f32 %f831, %f830, %f828, %p121;
|
|
mov.f32 %f832, 0fBF317218;
|
|
fma.rn.f32 %f833, %f831, %f832, %f825;
|
|
mov.f32 %f834, 0f3102E308;
|
|
fma.rn.f32 %f835, %f831, %f834, %f833;
|
|
mul.f32 %f836, %f835, 0f3FB8AA3B;
|
|
add.f32 %f837, %f831, 0f4B40007F;
|
|
mov.b32 %r361, %f837;
|
|
shl.b32 %r362, %r361, 23;
|
|
mov.b32 %f838, %r362;
|
|
ex2.approx.ftz.f32 %f839, %f836;
|
|
mul.f32 %f167, %f839, %f838;
|
|
setp.eq.f32 %p122, %f167, 0f7F800000;
|
|
mov.f32 %f1203, 0f7F800000;
|
|
@%p122 bra $L__BB0_97;
|
|
|
|
fma.rn.f32 %f1203, %f167, %f166, %f167;
|
|
|
|
$L__BB0_97:
|
|
setp.lt.f32 %p123, %f139, 0f00000000;
|
|
and.pred %p6, %p123, %p94;
|
|
setp.eq.f32 %p125, %f139, 0f00000000;
|
|
@%p125 bra $L__BB0_101;
|
|
bra.uni $L__BB0_98;
|
|
|
|
$L__BB0_101:
|
|
add.f32 %f844, %f139, %f139;
|
|
selp.f32 %f1205, %f844, 0f00000000, %p94;
|
|
bra.uni $L__BB0_102;
|
|
|
|
$L__BB0_98:
|
|
mov.b32 %r363, %f1203;
|
|
xor.b32 %r364, %r363, -2147483648;
|
|
mov.b32 %f840, %r364;
|
|
selp.f32 %f1205, %f840, %f1203, %p6;
|
|
setp.geu.f32 %p126, %f139, 0f00000000;
|
|
@%p126 bra $L__BB0_102;
|
|
|
|
mov.f32 %f841, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f842, %f841;
|
|
setp.eq.f32 %p127, %f842, 0f3EE66666;
|
|
@%p127 bra $L__BB0_102;
|
|
|
|
mov.f32 %f1205, 0f7FFFFFFF;
|
|
|
|
$L__BB0_102:
|
|
add.f32 %f845, %f165, 0f3EE66666;
|
|
mov.b32 %r365, %f845;
|
|
setp.lt.s32 %p129, %r365, 2139095040;
|
|
@%p129 bra $L__BB0_107;
|
|
|
|
setp.gtu.f32 %p130, %f165, 0f7F800000;
|
|
@%p130 bra $L__BB0_106;
|
|
bra.uni $L__BB0_104;
|
|
|
|
$L__BB0_106:
|
|
add.f32 %f1205, %f139, 0f3EE66666;
|
|
bra.uni $L__BB0_107;
|
|
|
|
$L__BB0_104:
|
|
setp.neu.f32 %p131, %f165, 0f7F800000;
|
|
@%p131 bra $L__BB0_107;
|
|
|
|
selp.f32 %f1205, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
$L__BB0_107:
|
|
setp.eq.f32 %p132, %f139, 0f3F800000;
|
|
mov.f32 %f847, 0f3F800000;
|
|
selp.f32 %f848, 0f3F800000, %f1205, %p132;
|
|
ld.const.u64 %rd71, [params+144];
|
|
cvta.to.global.u64 %rd21, %rd71;
|
|
ld.const.u32 %r366, [params+136];
|
|
mad.lo.s32 %r367, %r366, %r7, %r6;
|
|
cvt.u64.u32 %rd22, %r367;
|
|
min.f32 %f849, %f152, %f847;
|
|
mov.f32 %f850, 0f00000000;
|
|
max.f32 %f176, %f850, %f849;
|
|
min.f32 %f851, %f164, %f847;
|
|
max.f32 %f177, %f850, %f851;
|
|
min.f32 %f852, %f848, %f847;
|
|
max.f32 %f178, %f850, %f852;
|
|
mov.f32 %f853, 0f3E555555;
|
|
cvt.rzi.f32.f32 %f854, %f853;
|
|
add.f32 %f855, %f854, %f854;
|
|
mov.f32 %f856, 0f3ED55555;
|
|
sub.f32 %f857, %f856, %f855;
|
|
abs.f32 %f179, %f857;
|
|
abs.f32 %f180, %f176;
|
|
setp.lt.f32 %p133, %f180, 0f00800000;
|
|
mul.f32 %f858, %f180, 0f4B800000;
|
|
selp.f32 %f859, %f858, %f180, %p133;
|
|
selp.f32 %f860, 0fC3170000, 0fC2FE0000, %p133;
|
|
mov.b32 %r368, %f859;
|
|
and.b32 %r369, %r368, 8388607;
|
|
or.b32 %r370, %r369, 1065353216;
|
|
mov.b32 %f861, %r370;
|
|
shr.u32 %r371, %r368, 23;
|
|
cvt.rn.f32.u32 %f862, %r371;
|
|
add.f32 %f863, %f860, %f862;
|
|
setp.gt.f32 %p134, %f861, 0f3FB504F3;
|
|
mul.f32 %f864, %f861, 0f3F000000;
|
|
add.f32 %f865, %f863, 0f3F800000;
|
|
selp.f32 %f866, %f865, %f863, %p134;
|
|
selp.f32 %f867, %f864, %f861, %p134;
|
|
add.f32 %f868, %f867, 0fBF800000;
|
|
add.f32 %f869, %f867, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f870, %f869;
|
|
add.f32 %f871, %f868, %f868;
|
|
mul.f32 %f872, %f871, %f870;
|
|
mul.f32 %f873, %f872, %f872;
|
|
mov.f32 %f874, 0f3C4CAF63;
|
|
mov.f32 %f875, 0f3B18F0FE;
|
|
fma.rn.f32 %f876, %f875, %f873, %f874;
|
|
mov.f32 %f877, 0f3DAAAABD;
|
|
fma.rn.f32 %f878, %f876, %f873, %f877;
|
|
mul.rn.f32 %f879, %f878, %f873;
|
|
mul.rn.f32 %f880, %f879, %f872;
|
|
sub.f32 %f881, %f868, %f872;
|
|
add.f32 %f882, %f881, %f881;
|
|
neg.f32 %f883, %f872;
|
|
fma.rn.f32 %f884, %f883, %f868, %f882;
|
|
mul.rn.f32 %f885, %f870, %f884;
|
|
add.f32 %f886, %f880, %f872;
|
|
sub.f32 %f887, %f872, %f886;
|
|
add.f32 %f888, %f880, %f887;
|
|
add.f32 %f889, %f885, %f888;
|
|
add.f32 %f890, %f886, %f889;
|
|
sub.f32 %f891, %f886, %f890;
|
|
add.f32 %f892, %f889, %f891;
|
|
mov.f32 %f893, 0f3F317200;
|
|
mul.rn.f32 %f894, %f866, %f893;
|
|
mov.f32 %f895, 0f35BFBE8E;
|
|
mul.rn.f32 %f896, %f866, %f895;
|
|
add.f32 %f897, %f894, %f890;
|
|
sub.f32 %f898, %f894, %f897;
|
|
add.f32 %f899, %f890, %f898;
|
|
add.f32 %f900, %f892, %f899;
|
|
add.f32 %f901, %f896, %f900;
|
|
add.f32 %f902, %f897, %f901;
|
|
sub.f32 %f903, %f897, %f902;
|
|
add.f32 %f904, %f901, %f903;
|
|
mul.rn.f32 %f905, %f856, %f902;
|
|
neg.f32 %f906, %f905;
|
|
fma.rn.f32 %f907, %f856, %f902, %f906;
|
|
fma.rn.f32 %f908, %f856, %f904, %f907;
|
|
fma.rn.f32 %f909, %f850, %f902, %f908;
|
|
add.rn.f32 %f910, %f905, %f909;
|
|
neg.f32 %f911, %f910;
|
|
add.rn.f32 %f912, %f905, %f911;
|
|
add.rn.f32 %f913, %f912, %f909;
|
|
mov.b32 %r372, %f910;
|
|
setp.eq.s32 %p135, %r372, 1118925336;
|
|
add.s32 %r373, %r372, -1;
|
|
mov.b32 %f914, %r373;
|
|
add.f32 %f915, %f913, 0f37000000;
|
|
selp.f32 %f181, %f915, %f913, %p135;
|
|
selp.f32 %f916, %f914, %f910, %p135;
|
|
mov.f32 %f917, 0f3FB8AA3B;
|
|
mul.rn.f32 %f918, %f916, %f917;
|
|
cvt.rzi.f32.f32 %f919, %f918;
|
|
abs.f32 %f920, %f919;
|
|
setp.gt.f32 %p136, %f920, 0f42FC0000;
|
|
mov.b32 %r374, %f919;
|
|
and.b32 %r375, %r374, -2147483648;
|
|
or.b32 %r376, %r375, 1123811328;
|
|
mov.b32 %f921, %r376;
|
|
selp.f32 %f922, %f921, %f919, %p136;
|
|
mov.f32 %f923, 0fBF317218;
|
|
fma.rn.f32 %f924, %f922, %f923, %f916;
|
|
mov.f32 %f925, 0f3102E308;
|
|
fma.rn.f32 %f926, %f922, %f925, %f924;
|
|
mul.f32 %f927, %f926, 0f3FB8AA3B;
|
|
add.f32 %f928, %f922, 0f4B40007F;
|
|
mov.b32 %r377, %f928;
|
|
shl.b32 %r378, %r377, 23;
|
|
mov.b32 %f929, %r378;
|
|
ex2.approx.ftz.f32 %f930, %f927;
|
|
mul.f32 %f182, %f930, %f929;
|
|
setp.eq.f32 %p137, %f182, 0f7F800000;
|
|
mov.f32 %f1206, 0f7F800000;
|
|
@%p137 bra $L__BB0_109;
|
|
|
|
fma.rn.f32 %f1206, %f182, %f181, %f182;
|
|
|
|
$L__BB0_109:
|
|
setp.lt.f32 %p138, %f176, 0f00000000;
|
|
setp.eq.f32 %p139, %f179, 0f3F800000;
|
|
and.pred %p7, %p138, %p139;
|
|
setp.eq.f32 %p140, %f176, 0f00000000;
|
|
@%p140 bra $L__BB0_113;
|
|
bra.uni $L__BB0_110;
|
|
|
|
$L__BB0_113:
|
|
add.f32 %f935, %f176, %f176;
|
|
selp.f32 %f1208, %f935, 0f00000000, %p139;
|
|
bra.uni $L__BB0_114;
|
|
|
|
$L__BB0_110:
|
|
mov.b32 %r379, %f1206;
|
|
xor.b32 %r380, %r379, -2147483648;
|
|
mov.b32 %f931, %r380;
|
|
selp.f32 %f1208, %f931, %f1206, %p7;
|
|
setp.geu.f32 %p141, %f176, 0f00000000;
|
|
@%p141 bra $L__BB0_114;
|
|
|
|
mov.f32 %f932, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f933, %f932;
|
|
setp.eq.f32 %p142, %f933, 0f3ED55555;
|
|
@%p142 bra $L__BB0_114;
|
|
|
|
mov.f32 %f1208, 0f7FFFFFFF;
|
|
|
|
$L__BB0_114:
|
|
add.f32 %f936, %f180, 0f3ED55555;
|
|
mov.b32 %r381, %f936;
|
|
setp.lt.s32 %p144, %r381, 2139095040;
|
|
@%p144 bra $L__BB0_119;
|
|
|
|
setp.gtu.f32 %p145, %f180, 0f7F800000;
|
|
@%p145 bra $L__BB0_118;
|
|
bra.uni $L__BB0_116;
|
|
|
|
$L__BB0_118:
|
|
add.f32 %f1208, %f176, 0f3ED55555;
|
|
bra.uni $L__BB0_119;
|
|
|
|
$L__BB0_116:
|
|
setp.neu.f32 %p146, %f180, 0f7F800000;
|
|
@%p146 bra $L__BB0_119;
|
|
|
|
selp.f32 %f1208, 0fFF800000, 0f7F800000, %p7;
|
|
|
|
$L__BB0_119:
|
|
abs.f32 %f191, %f177;
|
|
setp.lt.f32 %p147, %f191, 0f00800000;
|
|
mul.f32 %f938, %f191, 0f4B800000;
|
|
selp.f32 %f939, %f938, %f191, %p147;
|
|
selp.f32 %f940, 0fC3170000, 0fC2FE0000, %p147;
|
|
mov.b32 %r382, %f939;
|
|
and.b32 %r383, %r382, 8388607;
|
|
or.b32 %r384, %r383, 1065353216;
|
|
mov.b32 %f941, %r384;
|
|
shr.u32 %r385, %r382, 23;
|
|
cvt.rn.f32.u32 %f942, %r385;
|
|
add.f32 %f943, %f940, %f942;
|
|
setp.gt.f32 %p148, %f941, 0f3FB504F3;
|
|
mul.f32 %f944, %f941, 0f3F000000;
|
|
add.f32 %f945, %f943, 0f3F800000;
|
|
selp.f32 %f946, %f945, %f943, %p148;
|
|
selp.f32 %f947, %f944, %f941, %p148;
|
|
add.f32 %f948, %f947, 0fBF800000;
|
|
add.f32 %f949, %f947, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f950, %f949;
|
|
add.f32 %f951, %f948, %f948;
|
|
mul.f32 %f952, %f951, %f950;
|
|
mul.f32 %f953, %f952, %f952;
|
|
mov.f32 %f954, 0f3C4CAF63;
|
|
mov.f32 %f955, 0f3B18F0FE;
|
|
fma.rn.f32 %f956, %f955, %f953, %f954;
|
|
mov.f32 %f957, 0f3DAAAABD;
|
|
fma.rn.f32 %f958, %f956, %f953, %f957;
|
|
mul.rn.f32 %f959, %f958, %f953;
|
|
mul.rn.f32 %f960, %f959, %f952;
|
|
sub.f32 %f961, %f948, %f952;
|
|
add.f32 %f962, %f961, %f961;
|
|
neg.f32 %f963, %f952;
|
|
fma.rn.f32 %f964, %f963, %f948, %f962;
|
|
mul.rn.f32 %f965, %f950, %f964;
|
|
add.f32 %f966, %f960, %f952;
|
|
sub.f32 %f967, %f952, %f966;
|
|
add.f32 %f968, %f960, %f967;
|
|
add.f32 %f969, %f965, %f968;
|
|
add.f32 %f970, %f966, %f969;
|
|
sub.f32 %f971, %f966, %f970;
|
|
add.f32 %f972, %f969, %f971;
|
|
mov.f32 %f973, 0f3F317200;
|
|
mul.rn.f32 %f974, %f946, %f973;
|
|
mov.f32 %f975, 0f35BFBE8E;
|
|
mul.rn.f32 %f976, %f946, %f975;
|
|
add.f32 %f977, %f974, %f970;
|
|
sub.f32 %f978, %f974, %f977;
|
|
add.f32 %f979, %f970, %f978;
|
|
add.f32 %f980, %f972, %f979;
|
|
add.f32 %f981, %f976, %f980;
|
|
add.f32 %f982, %f977, %f981;
|
|
sub.f32 %f983, %f977, %f982;
|
|
add.f32 %f984, %f981, %f983;
|
|
mov.f32 %f985, 0f3ED55555;
|
|
mul.rn.f32 %f986, %f985, %f982;
|
|
neg.f32 %f987, %f986;
|
|
fma.rn.f32 %f988, %f985, %f982, %f987;
|
|
fma.rn.f32 %f989, %f985, %f984, %f988;
|
|
mov.f32 %f990, 0f00000000;
|
|
fma.rn.f32 %f991, %f990, %f982, %f989;
|
|
add.rn.f32 %f992, %f986, %f991;
|
|
neg.f32 %f993, %f992;
|
|
add.rn.f32 %f994, %f986, %f993;
|
|
add.rn.f32 %f995, %f994, %f991;
|
|
mov.b32 %r386, %f992;
|
|
setp.eq.s32 %p149, %r386, 1118925336;
|
|
add.s32 %r387, %r386, -1;
|
|
mov.b32 %f996, %r387;
|
|
add.f32 %f997, %f995, 0f37000000;
|
|
selp.f32 %f192, %f997, %f995, %p149;
|
|
selp.f32 %f998, %f996, %f992, %p149;
|
|
mov.f32 %f999, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1000, %f998, %f999;
|
|
cvt.rzi.f32.f32 %f1001, %f1000;
|
|
abs.f32 %f1002, %f1001;
|
|
setp.gt.f32 %p150, %f1002, 0f42FC0000;
|
|
mov.b32 %r388, %f1001;
|
|
and.b32 %r389, %r388, -2147483648;
|
|
or.b32 %r390, %r389, 1123811328;
|
|
mov.b32 %f1003, %r390;
|
|
selp.f32 %f1004, %f1003, %f1001, %p150;
|
|
mov.f32 %f1005, 0fBF317218;
|
|
fma.rn.f32 %f1006, %f1004, %f1005, %f998;
|
|
mov.f32 %f1007, 0f3102E308;
|
|
fma.rn.f32 %f1008, %f1004, %f1007, %f1006;
|
|
mul.f32 %f1009, %f1008, 0f3FB8AA3B;
|
|
add.f32 %f1010, %f1004, 0f4B40007F;
|
|
mov.b32 %r391, %f1010;
|
|
shl.b32 %r392, %r391, 23;
|
|
mov.b32 %f1011, %r392;
|
|
ex2.approx.ftz.f32 %f1012, %f1009;
|
|
mul.f32 %f193, %f1012, %f1011;
|
|
setp.eq.f32 %p151, %f193, 0f7F800000;
|
|
mov.f32 %f1209, 0f7F800000;
|
|
@%p151 bra $L__BB0_121;
|
|
|
|
fma.rn.f32 %f1209, %f193, %f192, %f193;
|
|
|
|
$L__BB0_121:
|
|
setp.lt.f32 %p152, %f177, 0f00000000;
|
|
and.pred %p8, %p152, %p139;
|
|
setp.eq.f32 %p154, %f177, 0f00000000;
|
|
@%p154 bra $L__BB0_125;
|
|
bra.uni $L__BB0_122;
|
|
|
|
$L__BB0_125:
|
|
add.f32 %f1017, %f177, %f177;
|
|
selp.f32 %f1211, %f1017, 0f00000000, %p139;
|
|
bra.uni $L__BB0_126;
|
|
|
|
$L__BB0_122:
|
|
mov.b32 %r393, %f1209;
|
|
xor.b32 %r394, %r393, -2147483648;
|
|
mov.b32 %f1013, %r394;
|
|
selp.f32 %f1211, %f1013, %f1209, %p8;
|
|
setp.geu.f32 %p155, %f177, 0f00000000;
|
|
@%p155 bra $L__BB0_126;
|
|
|
|
mov.f32 %f1014, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1015, %f1014;
|
|
setp.eq.f32 %p156, %f1015, 0f3ED55555;
|
|
@%p156 bra $L__BB0_126;
|
|
|
|
mov.f32 %f1211, 0f7FFFFFFF;
|
|
|
|
$L__BB0_126:
|
|
add.f32 %f1018, %f191, 0f3ED55555;
|
|
mov.b32 %r395, %f1018;
|
|
setp.lt.s32 %p158, %r395, 2139095040;
|
|
@%p158 bra $L__BB0_131;
|
|
|
|
setp.gtu.f32 %p159, %f191, 0f7F800000;
|
|
@%p159 bra $L__BB0_130;
|
|
bra.uni $L__BB0_128;
|
|
|
|
$L__BB0_130:
|
|
add.f32 %f1211, %f177, 0f3ED55555;
|
|
bra.uni $L__BB0_131;
|
|
|
|
$L__BB0_128:
|
|
setp.neu.f32 %p160, %f191, 0f7F800000;
|
|
@%p160 bra $L__BB0_131;
|
|
|
|
selp.f32 %f1211, 0fFF800000, 0f7F800000, %p8;
|
|
|
|
$L__BB0_131:
|
|
abs.f32 %f202, %f178;
|
|
setp.lt.f32 %p161, %f202, 0f00800000;
|
|
mul.f32 %f1020, %f202, 0f4B800000;
|
|
selp.f32 %f1021, %f1020, %f202, %p161;
|
|
selp.f32 %f1022, 0fC3170000, 0fC2FE0000, %p161;
|
|
mov.b32 %r396, %f1021;
|
|
and.b32 %r397, %r396, 8388607;
|
|
or.b32 %r398, %r397, 1065353216;
|
|
mov.b32 %f1023, %r398;
|
|
shr.u32 %r399, %r396, 23;
|
|
cvt.rn.f32.u32 %f1024, %r399;
|
|
add.f32 %f1025, %f1022, %f1024;
|
|
setp.gt.f32 %p162, %f1023, 0f3FB504F3;
|
|
mul.f32 %f1026, %f1023, 0f3F000000;
|
|
add.f32 %f1027, %f1025, 0f3F800000;
|
|
selp.f32 %f1028, %f1027, %f1025, %p162;
|
|
selp.f32 %f1029, %f1026, %f1023, %p162;
|
|
add.f32 %f1030, %f1029, 0fBF800000;
|
|
add.f32 %f1031, %f1029, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1032, %f1031;
|
|
add.f32 %f1033, %f1030, %f1030;
|
|
mul.f32 %f1034, %f1033, %f1032;
|
|
mul.f32 %f1035, %f1034, %f1034;
|
|
mov.f32 %f1036, 0f3C4CAF63;
|
|
mov.f32 %f1037, 0f3B18F0FE;
|
|
fma.rn.f32 %f1038, %f1037, %f1035, %f1036;
|
|
mov.f32 %f1039, 0f3DAAAABD;
|
|
fma.rn.f32 %f1040, %f1038, %f1035, %f1039;
|
|
mul.rn.f32 %f1041, %f1040, %f1035;
|
|
mul.rn.f32 %f1042, %f1041, %f1034;
|
|
sub.f32 %f1043, %f1030, %f1034;
|
|
add.f32 %f1044, %f1043, %f1043;
|
|
neg.f32 %f1045, %f1034;
|
|
fma.rn.f32 %f1046, %f1045, %f1030, %f1044;
|
|
mul.rn.f32 %f1047, %f1032, %f1046;
|
|
add.f32 %f1048, %f1042, %f1034;
|
|
sub.f32 %f1049, %f1034, %f1048;
|
|
add.f32 %f1050, %f1042, %f1049;
|
|
add.f32 %f1051, %f1047, %f1050;
|
|
add.f32 %f1052, %f1048, %f1051;
|
|
sub.f32 %f1053, %f1048, %f1052;
|
|
add.f32 %f1054, %f1051, %f1053;
|
|
mov.f32 %f1055, 0f3F317200;
|
|
mul.rn.f32 %f1056, %f1028, %f1055;
|
|
mov.f32 %f1057, 0f35BFBE8E;
|
|
mul.rn.f32 %f1058, %f1028, %f1057;
|
|
add.f32 %f1059, %f1056, %f1052;
|
|
sub.f32 %f1060, %f1056, %f1059;
|
|
add.f32 %f1061, %f1052, %f1060;
|
|
add.f32 %f1062, %f1054, %f1061;
|
|
add.f32 %f1063, %f1058, %f1062;
|
|
add.f32 %f1064, %f1059, %f1063;
|
|
sub.f32 %f1065, %f1059, %f1064;
|
|
add.f32 %f1066, %f1063, %f1065;
|
|
mov.f32 %f1067, 0f3ED55555;
|
|
mul.rn.f32 %f1068, %f1067, %f1064;
|
|
neg.f32 %f1069, %f1068;
|
|
fma.rn.f32 %f1070, %f1067, %f1064, %f1069;
|
|
fma.rn.f32 %f1071, %f1067, %f1066, %f1070;
|
|
mov.f32 %f1072, 0f00000000;
|
|
fma.rn.f32 %f1073, %f1072, %f1064, %f1071;
|
|
add.rn.f32 %f1074, %f1068, %f1073;
|
|
neg.f32 %f1075, %f1074;
|
|
add.rn.f32 %f1076, %f1068, %f1075;
|
|
add.rn.f32 %f1077, %f1076, %f1073;
|
|
mov.b32 %r400, %f1074;
|
|
setp.eq.s32 %p163, %r400, 1118925336;
|
|
add.s32 %r401, %r400, -1;
|
|
mov.b32 %f1078, %r401;
|
|
add.f32 %f1079, %f1077, 0f37000000;
|
|
selp.f32 %f203, %f1079, %f1077, %p163;
|
|
selp.f32 %f1080, %f1078, %f1074, %p163;
|
|
mov.f32 %f1081, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1082, %f1080, %f1081;
|
|
cvt.rzi.f32.f32 %f1083, %f1082;
|
|
abs.f32 %f1084, %f1083;
|
|
setp.gt.f32 %p164, %f1084, 0f42FC0000;
|
|
mov.b32 %r402, %f1083;
|
|
and.b32 %r403, %r402, -2147483648;
|
|
or.b32 %r404, %r403, 1123811328;
|
|
mov.b32 %f1085, %r404;
|
|
selp.f32 %f1086, %f1085, %f1083, %p164;
|
|
mov.f32 %f1087, 0fBF317218;
|
|
fma.rn.f32 %f1088, %f1086, %f1087, %f1080;
|
|
mov.f32 %f1089, 0f3102E308;
|
|
fma.rn.f32 %f1090, %f1086, %f1089, %f1088;
|
|
mul.f32 %f1091, %f1090, 0f3FB8AA3B;
|
|
add.f32 %f1092, %f1086, 0f4B40007F;
|
|
mov.b32 %r405, %f1092;
|
|
shl.b32 %r406, %r405, 23;
|
|
mov.b32 %f1093, %r406;
|
|
ex2.approx.ftz.f32 %f1094, %f1091;
|
|
mul.f32 %f204, %f1094, %f1093;
|
|
setp.eq.f32 %p165, %f204, 0f7F800000;
|
|
mov.f32 %f1212, 0f7F800000;
|
|
@%p165 bra $L__BB0_133;
|
|
|
|
fma.rn.f32 %f1212, %f204, %f203, %f204;
|
|
|
|
$L__BB0_133:
|
|
setp.lt.f32 %p166, %f178, 0f00000000;
|
|
and.pred %p9, %p166, %p139;
|
|
setp.eq.f32 %p168, %f178, 0f00000000;
|
|
@%p168 bra $L__BB0_137;
|
|
bra.uni $L__BB0_134;
|
|
|
|
$L__BB0_137:
|
|
add.f32 %f1099, %f178, %f178;
|
|
selp.f32 %f1214, %f1099, 0f00000000, %p139;
|
|
bra.uni $L__BB0_138;
|
|
|
|
$L__BB0_134:
|
|
mov.b32 %r407, %f1212;
|
|
xor.b32 %r408, %r407, -2147483648;
|
|
mov.b32 %f1095, %r408;
|
|
selp.f32 %f1214, %f1095, %f1212, %p9;
|
|
setp.geu.f32 %p169, %f178, 0f00000000;
|
|
@%p169 bra $L__BB0_138;
|
|
|
|
mov.f32 %f1096, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1097, %f1096;
|
|
setp.eq.f32 %p170, %f1097, 0f3ED55555;
|
|
@%p170 bra $L__BB0_138;
|
|
|
|
mov.f32 %f1214, 0f7FFFFFFF;
|
|
|
|
$L__BB0_138:
|
|
add.f32 %f1100, %f202, 0f3ED55555;
|
|
mov.b32 %r409, %f1100;
|
|
setp.lt.s32 %p172, %r409, 2139095040;
|
|
@%p172 bra $L__BB0_143;
|
|
|
|
setp.gtu.f32 %p173, %f202, 0f7F800000;
|
|
@%p173 bra $L__BB0_142;
|
|
bra.uni $L__BB0_140;
|
|
|
|
$L__BB0_142:
|
|
add.f32 %f1214, %f178, 0f3ED55555;
|
|
bra.uni $L__BB0_143;
|
|
|
|
$L__BB0_140:
|
|
setp.neu.f32 %p174, %f202, 0f7F800000;
|
|
@%p174 bra $L__BB0_143;
|
|
|
|
selp.f32 %f1214, 0fFF800000, 0f7F800000, %p9;
|
|
|
|
$L__BB0_143:
|
|
fma.rn.f32 %f1101, %f1208, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p175, %f176, 0f3F800000;
|
|
mov.f32 %f1102, 0f3F800000;
|
|
selp.f32 %f1103, 0f3F7FFFFF, %f1101, %p175;
|
|
mul.f32 %f1104, %f176, 0f414EB852;
|
|
setp.lt.f32 %p176, %f176, 0f3B4D2E1C;
|
|
selp.f32 %f1105, %f1104, %f1103, %p176;
|
|
fma.rn.f32 %f1106, %f1211, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p177, %f177, 0f3F800000;
|
|
selp.f32 %f1107, 0f3F7FFFFF, %f1106, %p177;
|
|
mul.f32 %f1108, %f177, 0f414EB852;
|
|
setp.lt.f32 %p178, %f177, 0f3B4D2E1C;
|
|
selp.f32 %f1109, %f1108, %f1107, %p178;
|
|
fma.rn.f32 %f1110, %f1214, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p179, %f178, 0f3F800000;
|
|
selp.f32 %f1111, 0f3F7FFFFF, %f1110, %p179;
|
|
mul.f32 %f1112, %f178, 0f414EB852;
|
|
setp.lt.f32 %p180, %f178, 0f3B4D2E1C;
|
|
selp.f32 %f1113, %f1112, %f1111, %p180;
|
|
min.f32 %f1114, %f1105, %f1102;
|
|
mov.f32 %f1115, 0f00000000;
|
|
max.f32 %f1116, %f1115, %f1114;
|
|
mul.f32 %f1117, %f1116, 0f43800000;
|
|
cvt.rzi.u32.f32 %r410, %f1117;
|
|
min.u32 %r411, %r410, 255;
|
|
min.f32 %f1118, %f1109, %f1102;
|
|
max.f32 %f1119, %f1115, %f1118;
|
|
mul.f32 %f1120, %f1119, 0f43800000;
|
|
cvt.rzi.u32.f32 %r412, %f1120;
|
|
min.u32 %r413, %r412, 255;
|
|
min.f32 %f1121, %f1113, %f1102;
|
|
max.f32 %f1122, %f1115, %f1121;
|
|
mul.f32 %f1123, %f1122, 0f43800000;
|
|
cvt.rzi.u32.f32 %r414, %f1123;
|
|
min.u32 %r415, %r414, 255;
|
|
shl.b64 %rd72, %rd22, 2;
|
|
add.s64 %rd73, %rd21, %rd72;
|
|
cvt.u16.u32 %rs18, %r415;
|
|
cvt.u16.u32 %rs19, %r413;
|
|
cvt.u16.u32 %rs20, %r411;
|
|
mov.u16 %rs21, 255;
|
|
st.global.v4.u8 [%rd73], {%rs20, %rs19, %rs18, %rs21};
|
|
|
|
$L__BB0_144:
|
|
and.b32 %r416, %r56, 4;
|
|
setp.eq.s32 %p181, %r416, 0;
|
|
@%p181 bra $L__BB0_156;
|
|
|
|
ld.const.u32 %r417, [params+108];
|
|
setp.eq.s32 %p182, %r417, 0;
|
|
ld.const.u64 %rd74, [params+224];
|
|
cvta.to.global.u64 %rd75, %rd74;
|
|
ld.const.u32 %r418, [params+216];
|
|
mad.lo.s32 %r419, %r418, %r7, %r6;
|
|
mul.wide.u32 %rd76, %r419, 8;
|
|
add.s64 %rd23, %rd75, %rd76;
|
|
@%p182 bra $L__BB0_147;
|
|
|
|
ld.global.v4.u16 {%rs29, %rs30, %rs31, %rs32}, [%rd23];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1124, %rs29;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1125, %rs30;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1126, %rs31;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1127, %f137, %f1124;
|
|
add.f32 %f1128, %f138, %f1125;
|
|
add.f32 %f1129, %f139, %f1126;
|
|
mov.f32 %f1130, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs27, %f1129;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs26, %f1128;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs25, %f1127;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs28, %f1130;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd23], {%rs25, %rs26, %rs27, %rs28};
|
|
bra.uni $L__BB0_156;
|
|
|
|
$L__BB0_147:
|
|
mov.f32 %f1134, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs36, %f1134;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs35, %f139;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs34, %f138;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs33, %f137;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd23], {%rs33, %rs34, %rs35, %rs36};
|
|
|
|
$L__BB0_156:
|
|
ret;
|
|
|
|
}
|
|
|