2185 lines
62 KiB
Plaintext
2185 lines
62 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-31968024
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// Cuda compilation tools, release 12.0, V12.0.76
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// Based on NVVM 7.0.1
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//
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.version 8.0
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.target sm_52
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.address_size 64
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// .globl __raygen__oxMain
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.const .align 16 .b8 params[1184];
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.global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
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.visible .entry __raygen__oxMain()
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{
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.local .align 4 .b8 __local_depot0[28];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<194>;
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.reg .b16 %rs<62>;
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.reg .f32 %f<1301>;
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.reg .b32 %r<456>;
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.reg .f64 %fd<5>;
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.reg .b64 %rd<101>;
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mov.u64 %SPL, __local_depot0;
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add.u64 %rd1, %SPL, 0;
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// begin inline asm
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call (%r58), _optix_get_launch_index_x, ();
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// end inline asm
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// begin inline asm
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call (%r59), _optix_get_launch_index_y, ();
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// end inline asm
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ld.const.u32 %r3, [params+616];
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abs.s32 %r4, %r3;
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ld.const.u32 %r5, [params+540];
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ld.const.u64 %rd26, [params+400];
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cvta.to.global.u64 %rd27, %rd26;
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ld.const.u32 %r64, [params+392];
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mad.lo.s32 %r65, %r64, %r59, %r58;
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mul.wide.u32 %rd28, %r65, 4;
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add.s64 %rd2, %rd27, %rd28;
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ld.global.v2.u8 {%rs7, %rs61}, [%rd2];
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or.b16 %rs9, %rs7, %rs61;
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and.b16 %rs10, %rs9, 255;
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setp.eq.s16 %p10, %rs10, 0;
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@%p10 bra $L__BB0_2;
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ld.global.u8 %rs60, [%rd2+2];
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bra.uni $L__BB0_3;
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$L__BB0_2:
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ld.global.u8 %rs60, [%rd2+2];
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setp.eq.s16 %p11, %rs60, 0;
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mov.f32 %f1215, 0f00000000;
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mov.u16 %rs61, 0;
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mov.f32 %f1216, %f1215;
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mov.f32 %f1217, %f1215;
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@%p11 bra $L__BB0_4;
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$L__BB0_3:
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cvt.rn.f32.u16 %f247, %rs7;
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div.rn.f32 %f248, %f247, 0f437F0000;
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fma.rn.f32 %f249, %f248, 0f40000000, 0fBF800000;
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and.b16 %rs13, %rs61, 255;
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cvt.rn.f32.u16 %f250, %rs13;
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div.rn.f32 %f251, %f250, 0f437F0000;
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fma.rn.f32 %f252, %f251, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f253, %rs60;
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div.rn.f32 %f254, %f253, 0f437F0000;
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fma.rn.f32 %f255, %f254, 0f40000000, 0fBF800000;
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mul.f32 %f256, %f252, %f252;
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fma.rn.f32 %f257, %f249, %f249, %f256;
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fma.rn.f32 %f258, %f255, %f255, %f257;
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sqrt.rn.f32 %f259, %f258;
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rcp.rn.f32 %f260, %f259;
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mul.f32 %f1217, %f260, %f255;
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mul.f32 %f1216, %f260, %f252;
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mul.f32 %f1215, %f249, %f260;
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$L__BB0_4:
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ld.const.v2.u32 {%r66, %r67}, [params];
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add.s32 %r6, %r66, %r58;
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add.s32 %r7, %r67, %r59;
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setp.eq.f32 %p12, %f1215, 0f00000000;
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setp.eq.f32 %p13, %f1216, 0f00000000;
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and.pred %p14, %p12, %p13;
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setp.eq.f32 %p15, %f1217, 0f00000000;
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and.pred %p16, %p15, %p14;
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@%p16 bra $L__BB0_150;
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bra.uni $L__BB0_5;
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$L__BB0_150:
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ld.const.u32 %r57, [params+104];
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and.b32 %r426, %r57, 1;
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setp.eq.b32 %p185, %r426, 1;
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mov.pred %p186, 0;
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xor.pred %p187, %p185, %p186;
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not.pred %p188, %p187;
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@%p188 bra $L__BB0_152;
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ld.const.u64 %rd81, [params+144];
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cvta.to.global.u64 %rd82, %rd81;
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ld.const.u32 %r427, [params+136];
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mad.lo.s32 %r428, %r427, %r7, %r6;
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mul.wide.u32 %rd83, %r428, 4;
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add.s64 %rd84, %rd82, %rd83;
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mov.u16 %rs41, 0;
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st.global.v4.u8 [%rd84], {%rs41, %rs41, %rs41, %rs41};
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$L__BB0_152:
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and.b32 %r429, %r57, 8;
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setp.eq.s32 %p189, %r429, 0;
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@%p189 bra $L__BB0_154;
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ld.const.u64 %rd85, [params+192];
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cvta.to.global.u64 %rd86, %rd85;
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ld.const.u32 %r430, [params+184];
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mad.lo.s32 %r431, %r430, %r7, %r6;
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mov.f32 %f1197, 0f00000000;
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cvt.rzi.u32.f32 %r432, %f1197;
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mul.wide.u32 %rd87, %r431, 2;
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add.s64 %rd88, %rd86, %rd87;
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mov.u16 %rs42, 0;
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cvt.u16.u32 %rs43, %r432;
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st.global.v2.u8 [%rd88], {%rs43, %rs42};
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$L__BB0_154:
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and.b32 %r433, %r57, 4;
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setp.eq.s32 %p190, %r433, 0;
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@%p190 bra $L__BB0_158;
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ld.const.u32 %r434, [params+108];
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setp.eq.s32 %p191, %r434, 0;
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ld.const.u64 %rd89, [params+224];
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cvta.to.global.u64 %rd90, %rd89;
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ld.const.u32 %r435, [params+216];
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mad.lo.s32 %r436, %r435, %r7, %r6;
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mul.wide.u32 %rd91, %r436, 8;
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add.s64 %rd24, %rd90, %rd91;
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@%p191 bra $L__BB0_157;
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ld.global.v4.u16 {%rs50, %rs51, %rs52, %rs53}, [%rd24];
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// begin inline asm
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{ cvt.f32.f16 %f1198, %rs50;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f1199, %rs51;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f1200, %rs52;}
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// end inline asm
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add.f32 %f1201, %f1198, 0f00000000;
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add.f32 %f1202, %f1199, 0f00000000;
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add.f32 %f1203, %f1200, 0f00000000;
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// begin inline asm
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{ cvt.rn.f16.f32 %rs49, %f1203;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs48, %f1202;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs47, %f1201;}
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// end inline asm
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mov.u16 %rs54, 0;
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st.global.v4.u16 [%rd24], {%rs47, %rs48, %rs49, %rs54};
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bra.uni $L__BB0_158;
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$L__BB0_5:
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ld.const.u64 %rd29, [params+432];
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cvta.to.global.u64 %rd30, %rd29;
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ld.const.u32 %r71, [params+424];
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mad.lo.s32 %r72, %r71, %r59, %r58;
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mul.wide.u32 %rd31, %r72, 12;
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add.s64 %rd32, %rd30, %rd31;
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ld.global.f32 %f10, [%rd32];
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mul.f32 %f268, %f10, 0f3456BF95;
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ld.global.f32 %f11, [%rd32+4];
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mul.f32 %f269, %f11, 0f3456BF95;
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ld.global.f32 %f12, [%rd32+8];
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mul.f32 %f270, %f12, 0f3456BF95;
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abs.f32 %f13, %f1215;
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div.rn.f32 %f271, %f268, %f13;
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abs.f32 %f272, %f1216;
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div.rn.f32 %f273, %f269, %f272;
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abs.f32 %f14, %f1217;
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div.rn.f32 %f274, %f270, %f14;
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abs.f32 %f275, %f271;
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abs.f32 %f276, %f273;
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abs.f32 %f277, %f274;
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mov.f32 %f278, 0f38D1B717;
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max.f32 %f279, %f275, %f278;
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max.f32 %f280, %f276, %f278;
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max.f32 %f281, %f277, %f278;
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fma.rn.f32 %f15, %f1215, %f279, %f10;
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fma.rn.f32 %f16, %f1216, %f280, %f11;
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fma.rn.f32 %f17, %f1217, %f281, %f12;
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ld.const.u64 %rd33, [params+128];
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cvta.to.global.u64 %rd34, %rd33;
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ld.const.u32 %r73, [params+120];
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mad.lo.s32 %r74, %r73, %r59, %r58;
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mul.wide.u32 %rd35, %r74, 4;
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add.s64 %rd36, %rd34, %rd35;
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ld.global.u32 %r448, [%rd36];
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setp.lt.s32 %p18, %r4, 1;
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mov.pred %p17, 0;
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mov.u32 %r444, 0;
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mov.f32 %f1228, 0f00000000;
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mov.f32 %f1229, %f1228;
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mov.f32 %f1230, %f1228;
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mov.f32 %f1231, %f1228;
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mov.f32 %f1232, %f1228;
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mov.f32 %f1233, %f1228;
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mov.f32 %f1234, %f1228;
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mov.pred %p193, %p17;
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@%p18 bra $L__BB0_25;
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ld.const.f32 %f18, [params+620];
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ld.const.u64 %rd37, [params+624];
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cvta.to.global.u64 %rd3, %rd37;
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ld.const.u64 %rd38, [params+640];
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cvta.to.global.u64 %rd39, %rd38;
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ld.const.u32 %r77, [params+632];
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and.b32 %r78, %r59, 255;
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and.b32 %r79, %r58, 255;
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mad.lo.s32 %r80, %r77, %r78, %r79;
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mul.wide.u32 %rd40, %r80, 3;
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add.s64 %rd4, %rd39, %rd40;
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ld.const.f32 %f19, [params+660];
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mul.f32 %f20, %f15, 0f3456BF95;
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mul.f32 %f21, %f16, 0f3456BF95;
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mul.f32 %f22, %f17, 0f3456BF95;
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ld.const.u64 %rd5, [params+96];
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abs.f32 %f417, %f21;
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abs.f32 %f418, %f20;
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max.f32 %f419, %f418, %f417;
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abs.f32 %f420, %f22;
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max.f32 %f421, %f419, %f420;
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mov.u32 %r441, %r444;
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$L__BB0_7:
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mul.lo.s32 %r81, %r441, 3;
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mul.wide.s32 %rd41, %r81, 12;
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add.s64 %rd6, %rd3, %rd41;
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ld.global.f32 %f289, [%rd6];
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sub.f32 %f290, %f289, %f10;
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ld.global.f32 %f291, [%rd6+4];
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sub.f32 %f292, %f291, %f11;
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ld.global.f32 %f293, [%rd6+8];
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sub.f32 %f294, %f293, %f12;
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mul.f32 %f295, %f292, %f292;
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fma.rn.f32 %f296, %f290, %f290, %f295;
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fma.rn.f32 %f297, %f294, %f294, %f296;
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sqrt.rn.f32 %f30, %f297;
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rcp.rn.f32 %f298, %f30;
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mul.f32 %f31, %f290, %f298;
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mul.f32 %f32, %f292, %f298;
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mul.f32 %f33, %f294, %f298;
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mul.f32 %f299, %f1216, %f32;
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fma.rn.f32 %f300, %f1215, %f31, %f299;
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fma.rn.f32 %f34, %f1217, %f33, %f300;
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setp.leu.f32 %p19, %f34, 0f00000000;
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@%p19 bra $L__BB0_24;
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setp.ne.s32 %p21, %r5, 0;
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mul.f32 %f301, %f30, %f30;
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div.rn.f32 %f35, %f18, %f301;
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ld.global.u8 %rs15, [%rd4];
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cvt.rn.f32.u16 %f302, %rs15;
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div.rn.f32 %f303, %f302, 0fC37F0000;
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fma.rn.f32 %f304, %f303, 0f3F333333, 0f3F800000;
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setp.gt.f32 %p22, %f35, %f304;
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and.pred %p23, %p21, %p22;
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mov.pred %p193, -1;
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@%p23 bra $L__BB0_25;
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mul.f32 %f36, %f30, %f19;
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mov.f32 %f309, 0f40800000;
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abs.f32 %f38, %f36;
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setp.lt.f32 %p24, %f38, 0f00800000;
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mul.f32 %f311, %f38, 0f4B800000;
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selp.f32 %f312, %f311, %f38, %p24;
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selp.f32 %f313, 0fC3170000, 0fC2FE0000, %p24;
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mov.b32 %r82, %f312;
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and.b32 %r83, %r82, 8388607;
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or.b32 %r84, %r83, 1065353216;
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mov.b32 %f314, %r84;
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shr.u32 %r85, %r82, 23;
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cvt.rn.f32.u32 %f315, %r85;
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add.f32 %f316, %f313, %f315;
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setp.gt.f32 %p25, %f314, 0f3FB504F3;
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mul.f32 %f317, %f314, 0f3F000000;
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add.f32 %f318, %f316, 0f3F800000;
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selp.f32 %f319, %f318, %f316, %p25;
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selp.f32 %f320, %f317, %f314, %p25;
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add.f32 %f321, %f320, 0fBF800000;
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add.f32 %f322, %f320, 0f3F800000;
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rcp.approx.ftz.f32 %f323, %f322;
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add.f32 %f324, %f321, %f321;
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mul.f32 %f325, %f324, %f323;
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mul.f32 %f326, %f325, %f325;
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mov.f32 %f327, 0f3C4CAF63;
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mov.f32 %f328, 0f3B18F0FE;
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fma.rn.f32 %f329, %f328, %f326, %f327;
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mov.f32 %f330, 0f3DAAAABD;
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fma.rn.f32 %f331, %f329, %f326, %f330;
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mul.rn.f32 %f332, %f331, %f326;
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mul.rn.f32 %f333, %f332, %f325;
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sub.f32 %f334, %f321, %f325;
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add.f32 %f335, %f334, %f334;
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neg.f32 %f336, %f325;
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fma.rn.f32 %f337, %f336, %f321, %f335;
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mul.rn.f32 %f338, %f323, %f337;
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add.f32 %f339, %f333, %f325;
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sub.f32 %f340, %f325, %f339;
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add.f32 %f341, %f333, %f340;
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add.f32 %f342, %f338, %f341;
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add.f32 %f343, %f339, %f342;
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sub.f32 %f344, %f339, %f343;
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add.f32 %f345, %f342, %f344;
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mov.f32 %f346, 0f3F317200;
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mul.rn.f32 %f347, %f319, %f346;
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mov.f32 %f348, 0f35BFBE8E;
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mul.rn.f32 %f349, %f319, %f348;
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add.f32 %f350, %f347, %f343;
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sub.f32 %f351, %f347, %f350;
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add.f32 %f352, %f343, %f351;
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add.f32 %f353, %f345, %f352;
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add.f32 %f354, %f349, %f353;
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add.f32 %f355, %f350, %f354;
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sub.f32 %f356, %f350, %f355;
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add.f32 %f357, %f354, %f356;
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mul.rn.f32 %f358, %f309, %f355;
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neg.f32 %f359, %f358;
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fma.rn.f32 %f360, %f309, %f355, %f359;
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fma.rn.f32 %f361, %f309, %f357, %f360;
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mov.f32 %f362, 0f00000000;
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fma.rn.f32 %f363, %f362, %f355, %f361;
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add.rn.f32 %f364, %f358, %f363;
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neg.f32 %f365, %f364;
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add.rn.f32 %f366, %f358, %f365;
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add.rn.f32 %f367, %f366, %f363;
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mov.b32 %r86, %f364;
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setp.eq.s32 %p26, %r86, 1118925336;
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add.s32 %r87, %r86, -1;
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mov.b32 %f368, %r87;
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add.f32 %f369, %f367, 0f37000000;
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selp.f32 %f39, %f369, %f367, %p26;
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selp.f32 %f370, %f368, %f364, %p26;
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mov.f32 %f371, 0f3FB8AA3B;
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mul.rn.f32 %f372, %f370, %f371;
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cvt.rzi.f32.f32 %f373, %f372;
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abs.f32 %f374, %f373;
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setp.gt.f32 %p27, %f374, 0f42FC0000;
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mov.b32 %r88, %f373;
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and.b32 %r89, %r88, -2147483648;
|
|
or.b32 %r90, %r89, 1123811328;
|
|
mov.b32 %f375, %r90;
|
|
selp.f32 %f376, %f375, %f373, %p27;
|
|
mov.f32 %f377, 0fBF317218;
|
|
fma.rn.f32 %f378, %f376, %f377, %f370;
|
|
mov.f32 %f379, 0f3102E308;
|
|
fma.rn.f32 %f380, %f376, %f379, %f378;
|
|
mul.f32 %f381, %f380, 0f3FB8AA3B;
|
|
add.f32 %f382, %f376, 0f4B40007F;
|
|
mov.b32 %r91, %f382;
|
|
shl.b32 %r92, %r91, 23;
|
|
mov.b32 %f383, %r92;
|
|
ex2.approx.ftz.f32 %f384, %f381;
|
|
mul.f32 %f40, %f384, %f383;
|
|
setp.eq.f32 %p28, %f40, 0f7F800000;
|
|
mov.f32 %f1225, 0f7F800000;
|
|
@%p28 bra $L__BB0_11;
|
|
|
|
fma.rn.f32 %f1225, %f40, %f39, %f40;
|
|
|
|
$L__BB0_11:
|
|
mov.f32 %f1212, 0f40000000;
|
|
cvt.rzi.f32.f32 %f1211, %f1212;
|
|
add.f32 %f1210, %f1211, %f1211;
|
|
mov.f32 %f1209, 0f40800000;
|
|
sub.f32 %f1208, %f1209, %f1210;
|
|
abs.f32 %f1207, %f1208;
|
|
setp.lt.f32 %p29, %f36, 0f00000000;
|
|
setp.eq.f32 %p30, %f1207, 0f3F800000;
|
|
and.pred %p1, %p29, %p30;
|
|
setp.eq.f32 %p31, %f36, 0f00000000;
|
|
@%p31 bra $L__BB0_15;
|
|
bra.uni $L__BB0_12;
|
|
|
|
$L__BB0_15:
|
|
add.f32 %f389, %f36, %f36;
|
|
selp.f32 %f1227, %f389, 0f00000000, %p30;
|
|
bra.uni $L__BB0_16;
|
|
|
|
$L__BB0_12:
|
|
mov.b32 %r93, %f1225;
|
|
xor.b32 %r94, %r93, -2147483648;
|
|
mov.b32 %f385, %r94;
|
|
selp.f32 %f1227, %f385, %f1225, %p1;
|
|
setp.geu.f32 %p32, %f36, 0f00000000;
|
|
@%p32 bra $L__BB0_16;
|
|
|
|
mov.f32 %f386, 0f40800000;
|
|
cvt.rzi.f32.f32 %f387, %f386;
|
|
setp.eq.f32 %p33, %f387, 0f40800000;
|
|
@%p33 bra $L__BB0_16;
|
|
|
|
mov.f32 %f1227, 0f7FFFFFFF;
|
|
|
|
$L__BB0_16:
|
|
add.f32 %f390, %f38, 0f40800000;
|
|
mov.b32 %r95, %f390;
|
|
setp.lt.s32 %p35, %r95, 2139095040;
|
|
@%p35 bra $L__BB0_21;
|
|
|
|
setp.gtu.f32 %p36, %f38, 0f7F800000;
|
|
@%p36 bra $L__BB0_20;
|
|
bra.uni $L__BB0_18;
|
|
|
|
$L__BB0_20:
|
|
add.f32 %f1227, %f36, 0f40800000;
|
|
bra.uni $L__BB0_21;
|
|
|
|
$L__BB0_18:
|
|
setp.neu.f32 %p37, %f38, 0f7F800000;
|
|
@%p37 bra $L__BB0_21;
|
|
|
|
selp.f32 %f1227, 0fFF800000, 0f7F800000, %p1;
|
|
|
|
$L__BB0_21:
|
|
mov.f32 %f391, 0f3F800000;
|
|
sub.f32 %f392, %f391, %f1227;
|
|
setp.eq.f32 %p38, %f36, 0f3F800000;
|
|
selp.f32 %f393, 0f00000000, %f392, %p38;
|
|
cvt.sat.f32.f32 %f394, %f393;
|
|
mul.f32 %f395, %f35, %f394;
|
|
ld.global.f32 %f396, [%rd6+12];
|
|
mul.f32 %f397, %f31, %f396;
|
|
ld.global.f32 %f398, [%rd6+16];
|
|
mul.f32 %f399, %f32, %f398;
|
|
neg.f32 %f400, %f399;
|
|
sub.f32 %f401, %f400, %f397;
|
|
ld.global.f32 %f402, [%rd6+20];
|
|
mul.f32 %f403, %f33, %f402;
|
|
sub.f32 %f404, %f401, %f403;
|
|
cvt.sat.f32.f32 %f405, %f404;
|
|
mul.f32 %f49, %f395, %f405;
|
|
cvt.sat.f32.f32 %f50, %f34;
|
|
mul.f32 %f406, %f49, %f50;
|
|
setp.leu.f32 %p39, %f406, 0f3727C5AC;
|
|
@%p39 bra $L__BB0_23;
|
|
|
|
mul.f32 %f416, %f49, 0f3EA2F983;
|
|
mov.f32 %f422, 0f38D1B717;
|
|
max.f32 %f413, %f421, %f422;
|
|
sub.f32 %f414, %f30, %f413;
|
|
mov.f32 %f415, 0f00000000;
|
|
mov.u32 %r132, 2;
|
|
mov.u32 %r134, 1;
|
|
mov.u32 %r135, 1065353216;
|
|
mov.u32 %r166, 0;
|
|
// begin inline asm
|
|
call(%r96,%r97,%r98,%r99,%r100,%r101,%r102,%r103,%r104,%r105,%r106,%r107,%r108,%r109,%r110,%r111,%r112,%r113,%r114,%r115,%r116,%r117,%r118,%r119,%r120,%r121,%r122,%r123,%r124,%r125,%r126,%r127),_optix_trace_typed_32,(%r166,%rd5,%f15,%f16,%f17,%f31,%f32,%f33,%f413,%f414,%f415,%r134,%r166,%r134,%r132,%r134,%r134,%r135,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166,%r166);
|
|
// end inline asm
|
|
mov.b32 %f423, %r96;
|
|
ld.global.f32 %f424, [%rd6+24];
|
|
mul.f32 %f425, %f424, %f423;
|
|
ld.global.f32 %f426, [%rd6+28];
|
|
mul.f32 %f427, %f426, %f423;
|
|
ld.global.f32 %f428, [%rd6+32];
|
|
mul.f32 %f429, %f428, %f423;
|
|
mul.f32 %f430, %f416, %f425;
|
|
mul.f32 %f431, %f416, %f427;
|
|
mul.f32 %f432, %f416, %f429;
|
|
fma.rn.f32 %f1231, %f50, %f430, %f1231;
|
|
fma.rn.f32 %f1232, %f50, %f431, %f1232;
|
|
fma.rn.f32 %f1233, %f50, %f432, %f1233;
|
|
add.f32 %f1234, %f1234, %f423;
|
|
fma.rn.f32 %f1228, %f31, %f423, %f1228;
|
|
fma.rn.f32 %f1229, %f32, %f423, %f1229;
|
|
fma.rn.f32 %f1230, %f33, %f423, %f1230;
|
|
|
|
$L__BB0_23:
|
|
add.s32 %r444, %r444, 1;
|
|
|
|
$L__BB0_24:
|
|
add.s32 %r441, %r441, 1;
|
|
setp.lt.s32 %p41, %r441, %r4;
|
|
mov.pred %p193, %p17;
|
|
@%p41 bra $L__BB0_7;
|
|
|
|
$L__BB0_25:
|
|
cvt.rn.f32.s32 %f433, %r444;
|
|
mov.f32 %f434, 0f3F800000;
|
|
max.f32 %f435, %f433, %f434;
|
|
rcp.rn.f32 %f436, %f435;
|
|
mul.f32 %f1276, %f1231, %f436;
|
|
mul.f32 %f1277, %f1232, %f436;
|
|
mul.f32 %f1278, %f1233, %f436;
|
|
div.rn.f32 %f1279, %f1234, %f435;
|
|
not.pred %p42, %p193;
|
|
@%p42 bra $L__BB0_56;
|
|
|
|
abs.f32 %f1214, %f1217;
|
|
abs.f32 %f1213, %f1215;
|
|
setp.gt.f32 %p43, %f1213, %f1214;
|
|
selp.f32 %f443, 0f00000000, %f1216, %p43;
|
|
mov.f32 %f442, 0f00000000;
|
|
neg.f32 %f444, %f1217;
|
|
selp.f32 %f445, %f1215, %f444, %p43;
|
|
neg.f32 %f446, %f1216;
|
|
selp.f32 %f447, %f446, 0f00000000, %p43;
|
|
mul.f32 %f448, %f445, %f445;
|
|
fma.rn.f32 %f449, %f447, %f447, %f448;
|
|
fma.rn.f32 %f450, %f443, %f443, %f449;
|
|
sqrt.rn.f32 %f451, %f450;
|
|
rcp.rn.f32 %f452, %f451;
|
|
mul.f32 %f83, %f447, %f452;
|
|
mul.f32 %f84, %f445, %f452;
|
|
mul.f32 %f85, %f443, %f452;
|
|
setp.lt.s32 %p44, %r5, 1;
|
|
mov.f32 %f1228, %f442;
|
|
mov.f32 %f1229, %f442;
|
|
mov.f32 %f1230, %f442;
|
|
mov.f32 %f1257, %f442;
|
|
mov.f32 %f1256, %f442;
|
|
mov.f32 %f1255, %f442;
|
|
@%p44 bra $L__BB0_55;
|
|
|
|
cvt.rn.f32.s32 %f459, %r5;
|
|
rcp.rn.f32 %f86, %f459;
|
|
mul.f32 %f87, %f15, 0f3456BF95;
|
|
mul.f32 %f88, %f16, 0f3456BF95;
|
|
mul.f32 %f89, %f17, 0f3456BF95;
|
|
ld.const.u64 %rd7, [params+96];
|
|
mul.f32 %f460, %f1215, %f84;
|
|
mul.f32 %f461, %f1216, %f83;
|
|
sub.f32 %f90, %f461, %f460;
|
|
mul.f32 %f462, %f1217, %f83;
|
|
mul.f32 %f463, %f1215, %f85;
|
|
sub.f32 %f91, %f463, %f462;
|
|
mul.f32 %f464, %f1216, %f85;
|
|
mul.f32 %f465, %f1217, %f84;
|
|
sub.f32 %f92, %f465, %f464;
|
|
mov.u32 %r167, 0;
|
|
add.s64 %rd8, %rd1, 24;
|
|
mov.u64 %rd43, __cudart_i2opi_f;
|
|
abs.f32 %f528, %f88;
|
|
abs.f32 %f529, %f87;
|
|
max.f32 %f530, %f529, %f528;
|
|
abs.f32 %f531, %f89;
|
|
max.f32 %f532, %f530, %f531;
|
|
mov.u32 %r445, %r167;
|
|
|
|
$L__BB0_28:
|
|
cvt.rn.f32.s32 %f99, %r445;
|
|
mov.u32 %r447, %r167;
|
|
|
|
$L__BB0_29:
|
|
mad.lo.s32 %r169, %r448, 1664525, 1013904223;
|
|
and.b32 %r170, %r169, 16777215;
|
|
cvt.rn.f32.u32 %f466, %r170;
|
|
fma.rn.f32 %f467, %f466, 0f33800000, %f99;
|
|
mul.f32 %f106, %f86, %f467;
|
|
mad.lo.s32 %r448, %r169, 1664525, 1013904223;
|
|
and.b32 %r171, %r448, 16777215;
|
|
cvt.rn.f32.u32 %f468, %r171;
|
|
cvt.rn.f32.s32 %f469, %r447;
|
|
fma.rn.f32 %f470, %f468, 0f33800000, %f469;
|
|
mul.f32 %f471, %f86, %f470;
|
|
mul.f32 %f472, %f106, %f106;
|
|
mov.f32 %f473, 0f3F800000;
|
|
sub.f32 %f474, %f473, %f472;
|
|
mov.f32 %f475, 0f00000000;
|
|
max.f32 %f476, %f475, %f474;
|
|
sqrt.rn.f32 %f107, %f476;
|
|
mul.f32 %f108, %f471, 0f40C90FDB;
|
|
mul.f32 %f477, %f108, 0f3F22F983;
|
|
cvt.rni.s32.f32 %r455, %f477;
|
|
cvt.rn.f32.s32 %f478, %r455;
|
|
mov.f32 %f479, 0fBFC90FDA;
|
|
fma.rn.f32 %f480, %f478, %f479, %f108;
|
|
mov.f32 %f481, 0fB3A22168;
|
|
fma.rn.f32 %f482, %f478, %f481, %f480;
|
|
mov.f32 %f483, 0fA7C234C5;
|
|
fma.rn.f32 %f1264, %f478, %f483, %f482;
|
|
abs.f32 %f110, %f108;
|
|
setp.ltu.f32 %p45, %f110, 0f47CE4780;
|
|
mov.u32 %r452, %r455;
|
|
mov.f32 %f1261, %f1264;
|
|
@%p45 bra $L__BB0_37;
|
|
|
|
setp.eq.f32 %p46, %f110, 0f7F800000;
|
|
@%p46 bra $L__BB0_36;
|
|
bra.uni $L__BB0_31;
|
|
|
|
$L__BB0_36:
|
|
mov.f32 %f486, 0f00000000;
|
|
mul.rn.f32 %f1261, %f108, %f486;
|
|
mov.u32 %r452, 0;
|
|
bra.uni $L__BB0_37;
|
|
|
|
$L__BB0_31:
|
|
mov.b32 %r21, %f108;
|
|
bfe.u32 %r173, %r21, 23, 8;
|
|
add.s32 %r22, %r173, -128;
|
|
shl.b32 %r174, %r21, 8;
|
|
or.b32 %r23, %r174, -2147483648;
|
|
shr.u32 %r24, %r22, 5;
|
|
mov.u64 %rd98, 0;
|
|
mov.u32 %r449, 0;
|
|
mov.u64 %rd96, %rd1;
|
|
mov.u64 %rd97, %rd43;
|
|
|
|
$L__BB0_32:
|
|
.pragma "nounroll";
|
|
ld.global.nc.u32 %r175, [%rd97];
|
|
mad.wide.u32 %rd45, %r175, %r23, %rd98;
|
|
shr.u64 %rd98, %rd45, 32;
|
|
st.local.u32 [%rd96], %rd45;
|
|
add.s64 %rd97, %rd97, 4;
|
|
add.s64 %rd96, %rd96, 4;
|
|
add.s32 %r449, %r449, 1;
|
|
setp.ne.s32 %p47, %r449, 6;
|
|
@%p47 bra $L__BB0_32;
|
|
|
|
st.local.u32 [%rd8], %rd98;
|
|
mov.u32 %r176, 4;
|
|
sub.s32 %r27, %r176, %r24;
|
|
mov.u32 %r177, 6;
|
|
sub.s32 %r178, %r177, %r24;
|
|
mul.wide.s32 %rd46, %r178, 4;
|
|
add.s64 %rd47, %rd1, %rd46;
|
|
ld.local.u32 %r450, [%rd47];
|
|
ld.local.u32 %r451, [%rd47+-4];
|
|
and.b32 %r30, %r22, 31;
|
|
setp.eq.s32 %p48, %r30, 0;
|
|
@%p48 bra $L__BB0_35;
|
|
|
|
mov.u32 %r179, 32;
|
|
sub.s32 %r180, %r179, %r30;
|
|
shr.u32 %r181, %r451, %r180;
|
|
shl.b32 %r182, %r450, %r30;
|
|
add.s32 %r450, %r181, %r182;
|
|
mul.wide.s32 %rd48, %r27, 4;
|
|
add.s64 %rd49, %rd1, %rd48;
|
|
ld.local.u32 %r183, [%rd49];
|
|
shr.u32 %r184, %r183, %r180;
|
|
shl.b32 %r185, %r451, %r30;
|
|
add.s32 %r451, %r184, %r185;
|
|
|
|
$L__BB0_35:
|
|
and.b32 %r186, %r21, -2147483648;
|
|
shr.u32 %r187, %r451, 30;
|
|
shl.b32 %r188, %r450, 2;
|
|
or.b32 %r189, %r187, %r188;
|
|
shr.u32 %r190, %r189, 31;
|
|
shr.u32 %r191, %r450, 30;
|
|
add.s32 %r192, %r190, %r191;
|
|
neg.s32 %r193, %r192;
|
|
setp.eq.s32 %p49, %r186, 0;
|
|
selp.b32 %r452, %r192, %r193, %p49;
|
|
setp.ne.s32 %p50, %r190, 0;
|
|
xor.b32 %r194, %r186, -2147483648;
|
|
selp.b32 %r195, %r194, %r186, %p50;
|
|
selp.b32 %r196, -1, 0, %p50;
|
|
xor.b32 %r197, %r189, %r196;
|
|
shl.b32 %r198, %r451, 2;
|
|
xor.b32 %r199, %r198, %r196;
|
|
cvt.u64.u32 %rd50, %r197;
|
|
cvt.u64.u32 %rd51, %r199;
|
|
bfi.b64 %rd52, %rd50, %rd51, 32, 32;
|
|
cvt.rn.f64.s64 %fd1, %rd52;
|
|
mul.f64 %fd2, %fd1, 0d3BF921FB54442D19;
|
|
cvt.rn.f32.f64 %f484, %fd2;
|
|
setp.eq.s32 %p51, %r195, 0;
|
|
neg.f32 %f485, %f484;
|
|
selp.f32 %f1261, %f484, %f485, %p51;
|
|
|
|
$L__BB0_37:
|
|
add.s32 %r37, %r452, 1;
|
|
and.b32 %r38, %r37, 1;
|
|
setp.eq.s32 %p52, %r38, 0;
|
|
selp.f32 %f114, %f1261, 0f3F800000, %p52;
|
|
mul.rn.f32 %f115, %f1261, %f1261;
|
|
mov.f32 %f1262, 0fB94D4153;
|
|
@%p52 bra $L__BB0_39;
|
|
|
|
mov.f32 %f488, 0fBAB607ED;
|
|
mov.f32 %f489, 0f37CBAC00;
|
|
fma.rn.f32 %f1262, %f489, %f115, %f488;
|
|
|
|
$L__BB0_39:
|
|
selp.f32 %f490, 0f3C0885E4, 0f3D2AAABB, %p52;
|
|
fma.rn.f32 %f491, %f1262, %f115, %f490;
|
|
selp.f32 %f492, 0fBE2AAAA8, 0fBEFFFFFF, %p52;
|
|
fma.rn.f32 %f493, %f491, %f115, %f492;
|
|
mov.f32 %f494, 0f00000000;
|
|
fma.rn.f32 %f495, %f115, %f114, %f494;
|
|
fma.rn.f32 %f1263, %f493, %f495, %f114;
|
|
and.b32 %r201, %r37, 2;
|
|
setp.eq.s32 %p54, %r201, 0;
|
|
@%p54 bra $L__BB0_41;
|
|
|
|
mov.f32 %f497, 0fBF800000;
|
|
fma.rn.f32 %f1263, %f1263, %f497, %f494;
|
|
|
|
$L__BB0_41:
|
|
@%p45 bra $L__BB0_49;
|
|
|
|
setp.eq.f32 %p56, %f110, 0f7F800000;
|
|
@%p56 bra $L__BB0_48;
|
|
bra.uni $L__BB0_43;
|
|
|
|
$L__BB0_48:
|
|
mov.f32 %f500, 0f00000000;
|
|
mul.rn.f32 %f1264, %f108, %f500;
|
|
mov.u32 %r455, 0;
|
|
bra.uni $L__BB0_49;
|
|
|
|
$L__BB0_43:
|
|
mov.b32 %r39, %f108;
|
|
bfe.u32 %r202, %r39, 23, 8;
|
|
add.s32 %r40, %r202, -128;
|
|
shl.b32 %r203, %r39, 8;
|
|
or.b32 %r41, %r203, -2147483648;
|
|
shr.u32 %r42, %r40, 5;
|
|
mov.u64 %rd99, 0;
|
|
mov.u64 %rd100, %rd99;
|
|
|
|
$L__BB0_44:
|
|
.pragma "nounroll";
|
|
shl.b64 %rd55, %rd99, 2;
|
|
mov.u64 %rd56, __cudart_i2opi_f;
|
|
add.s64 %rd57, %rd56, %rd55;
|
|
ld.global.nc.u32 %r204, [%rd57];
|
|
mad.wide.u32 %rd58, %r204, %r41, %rd100;
|
|
shr.u64 %rd100, %rd58, 32;
|
|
add.s64 %rd59, %rd1, %rd55;
|
|
st.local.u32 [%rd59], %rd58;
|
|
cvt.u32.u64 %r205, %rd99;
|
|
add.s32 %r206, %r205, 1;
|
|
cvt.s64.s32 %rd99, %r206;
|
|
setp.ne.s32 %p57, %r206, 6;
|
|
@%p57 bra $L__BB0_44;
|
|
|
|
st.local.u32 [%rd8], %rd100;
|
|
mov.u32 %r207, 4;
|
|
sub.s32 %r43, %r207, %r42;
|
|
mov.u32 %r208, 6;
|
|
sub.s32 %r209, %r208, %r42;
|
|
mul.wide.s32 %rd60, %r209, 4;
|
|
add.s64 %rd61, %rd1, %rd60;
|
|
ld.local.u32 %r453, [%rd61];
|
|
ld.local.u32 %r454, [%rd61+-4];
|
|
and.b32 %r46, %r40, 31;
|
|
setp.eq.s32 %p58, %r46, 0;
|
|
@%p58 bra $L__BB0_47;
|
|
|
|
mov.u32 %r210, 32;
|
|
sub.s32 %r211, %r210, %r46;
|
|
shr.u32 %r212, %r454, %r211;
|
|
shl.b32 %r213, %r453, %r46;
|
|
add.s32 %r453, %r212, %r213;
|
|
mul.wide.s32 %rd62, %r43, 4;
|
|
add.s64 %rd63, %rd1, %rd62;
|
|
ld.local.u32 %r214, [%rd63];
|
|
shr.u32 %r215, %r214, %r211;
|
|
shl.b32 %r216, %r454, %r46;
|
|
add.s32 %r454, %r215, %r216;
|
|
|
|
$L__BB0_47:
|
|
and.b32 %r217, %r39, -2147483648;
|
|
shr.u32 %r218, %r454, 30;
|
|
shl.b32 %r219, %r453, 2;
|
|
or.b32 %r220, %r218, %r219;
|
|
shr.u32 %r221, %r220, 31;
|
|
shr.u32 %r222, %r453, 30;
|
|
add.s32 %r223, %r221, %r222;
|
|
neg.s32 %r224, %r223;
|
|
setp.eq.s32 %p59, %r217, 0;
|
|
selp.b32 %r455, %r223, %r224, %p59;
|
|
setp.ne.s32 %p60, %r221, 0;
|
|
xor.b32 %r225, %r217, -2147483648;
|
|
selp.b32 %r226, %r225, %r217, %p60;
|
|
selp.b32 %r227, -1, 0, %p60;
|
|
xor.b32 %r228, %r220, %r227;
|
|
shl.b32 %r229, %r454, 2;
|
|
xor.b32 %r230, %r229, %r227;
|
|
cvt.u64.u32 %rd64, %r228;
|
|
cvt.u64.u32 %rd65, %r230;
|
|
bfi.b64 %rd66, %rd64, %rd65, 32, 32;
|
|
cvt.rn.f64.s64 %fd3, %rd66;
|
|
mul.f64 %fd4, %fd3, 0d3BF921FB54442D19;
|
|
cvt.rn.f32.f64 %f498, %fd4;
|
|
setp.eq.s32 %p61, %r226, 0;
|
|
neg.f32 %f499, %f498;
|
|
selp.f32 %f1264, %f498, %f499, %p61;
|
|
|
|
$L__BB0_49:
|
|
mul.f32 %f124, %f107, %f1263;
|
|
and.b32 %r53, %r455, 1;
|
|
setp.eq.s32 %p62, %r53, 0;
|
|
selp.f32 %f125, %f1264, 0f3F800000, %p62;
|
|
mul.rn.f32 %f126, %f1264, %f1264;
|
|
mov.f32 %f1265, 0fB94D4153;
|
|
@%p62 bra $L__BB0_51;
|
|
|
|
mov.f32 %f502, 0fBAB607ED;
|
|
mov.f32 %f503, 0f37CBAC00;
|
|
fma.rn.f32 %f1265, %f503, %f126, %f502;
|
|
|
|
$L__BB0_51:
|
|
selp.f32 %f504, 0f3C0885E4, 0f3D2AAABB, %p62;
|
|
fma.rn.f32 %f505, %f1265, %f126, %f504;
|
|
selp.f32 %f506, 0fBE2AAAA8, 0fBEFFFFFF, %p62;
|
|
fma.rn.f32 %f507, %f505, %f126, %f506;
|
|
mov.f32 %f508, 0f00000000;
|
|
fma.rn.f32 %f509, %f126, %f125, %f508;
|
|
fma.rn.f32 %f1266, %f507, %f509, %f125;
|
|
and.b32 %r232, %r455, 2;
|
|
setp.eq.s32 %p64, %r232, 0;
|
|
@%p64 bra $L__BB0_53;
|
|
|
|
mov.f32 %f511, 0fBF800000;
|
|
fma.rn.f32 %f1266, %f1266, %f511, %f508;
|
|
|
|
$L__BB0_53:
|
|
mul.f32 %f521, %f107, %f1266;
|
|
mul.f32 %f522, %f83, %f521;
|
|
mul.f32 %f523, %f84, %f521;
|
|
mul.f32 %f524, %f85, %f521;
|
|
fma.rn.f32 %f525, %f92, %f124, %f522;
|
|
fma.rn.f32 %f526, %f91, %f124, %f523;
|
|
fma.rn.f32 %f527, %f90, %f124, %f524;
|
|
fma.rn.f32 %f515, %f1215, %f106, %f525;
|
|
fma.rn.f32 %f516, %f1216, %f106, %f526;
|
|
fma.rn.f32 %f517, %f1217, %f106, %f527;
|
|
mov.f32 %f533, 0f38D1B717;
|
|
max.f32 %f518, %f532, %f533;
|
|
mov.f32 %f519, 0f6C4ECB8F;
|
|
mov.u32 %r266, 1;
|
|
mov.u32 %r269, 2;
|
|
mov.u32 %r271, 3;
|
|
mov.u32 %r303, 0;
|
|
// begin inline asm
|
|
call(%r233,%r234,%r235,%r236,%r237,%r238,%r239,%r240,%r241,%r242,%r243,%r244,%r245,%r246,%r247,%r248,%r249,%r250,%r251,%r252,%r253,%r254,%r255,%r256,%r257,%r258,%r259,%r260,%r261,%r262,%r263,%r264),_optix_trace_typed_32,(%r303,%rd7,%f15,%f16,%f17,%f515,%f516,%f517,%f518,%f519,%f508,%r266,%r303,%r303,%r269,%r303,%r271,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303,%r303);
|
|
// end inline asm
|
|
mov.b32 %f534, %r233;
|
|
mov.b32 %f535, %r234;
|
|
mov.b32 %f536, %r235;
|
|
max.f32 %f537, %f534, %f508;
|
|
max.f32 %f538, %f535, %f508;
|
|
max.f32 %f539, %f536, %f508;
|
|
setp.geu.f32 %p65, %f534, 0f00000000;
|
|
selp.f32 %f540, 0f3F800000, 0f00000000, %p65;
|
|
fma.rn.f32 %f1228, %f515, %f540, %f1228;
|
|
fma.rn.f32 %f1229, %f516, %f540, %f1229;
|
|
fma.rn.f32 %f1230, %f517, %f540, %f1230;
|
|
mul.f32 %f541, %f1216, %f516;
|
|
fma.rn.f32 %f542, %f1215, %f515, %f541;
|
|
fma.rn.f32 %f543, %f1217, %f517, %f542;
|
|
cvt.sat.f32.f32 %f544, %f543;
|
|
fma.rn.f32 %f1257, %f537, %f544, %f1257;
|
|
fma.rn.f32 %f1256, %f538, %f544, %f1256;
|
|
fma.rn.f32 %f1255, %f539, %f544, %f1255;
|
|
add.s32 %r447, %r447, 1;
|
|
setp.lt.s32 %p66, %r447, %r5;
|
|
@%p66 bra $L__BB0_29;
|
|
|
|
add.s32 %r445, %r445, 1;
|
|
setp.lt.s32 %p67, %r445, %r5;
|
|
@%p67 bra $L__BB0_28;
|
|
|
|
$L__BB0_55:
|
|
mul.lo.s32 %r304, %r5, %r5;
|
|
cvt.rn.f32.s32 %f545, %r304;
|
|
rcp.rn.f32 %f546, %f545;
|
|
mul.f32 %f547, %f546, %f1257;
|
|
mul.f32 %f548, %f546, %f1256;
|
|
mul.f32 %f549, %f546, %f1255;
|
|
div.rn.f32 %f1279, %f442, %f545;
|
|
fma.rn.f32 %f1276, %f546, %f1257, %f547;
|
|
fma.rn.f32 %f1277, %f546, %f1256, %f548;
|
|
fma.rn.f32 %f1278, %f546, %f1255, %f549;
|
|
|
|
$L__BB0_56:
|
|
ld.const.u32 %r440, [params+616];
|
|
setp.lt.s32 %p68, %r440, 0;
|
|
selp.f32 %f155, %f1276, %f1279, %p68;
|
|
ld.const.u32 %r56, [params+104];
|
|
and.b32 %r305, %r56, 8;
|
|
setp.eq.s32 %p69, %r305, 0;
|
|
@%p69 bra $L__BB0_70;
|
|
|
|
ld.const.u64 %rd68, [params+192];
|
|
cvta.to.global.u64 %rd19, %rd68;
|
|
ld.const.u32 %r306, [params+184];
|
|
mad.lo.s32 %r307, %r306, %r7, %r6;
|
|
cvt.u64.u32 %rd20, %r307;
|
|
mov.f32 %f552, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f553, %f552;
|
|
add.f32 %f554, %f553, %f553;
|
|
mov.f32 %f555, 0f3EE8BA2E;
|
|
sub.f32 %f556, %f555, %f554;
|
|
abs.f32 %f156, %f556;
|
|
abs.f32 %f157, %f155;
|
|
setp.lt.f32 %p70, %f157, 0f00800000;
|
|
mul.f32 %f557, %f157, 0f4B800000;
|
|
selp.f32 %f558, %f557, %f157, %p70;
|
|
selp.f32 %f559, 0fC3170000, 0fC2FE0000, %p70;
|
|
mov.b32 %r308, %f558;
|
|
and.b32 %r309, %r308, 8388607;
|
|
or.b32 %r310, %r309, 1065353216;
|
|
mov.b32 %f560, %r310;
|
|
shr.u32 %r311, %r308, 23;
|
|
cvt.rn.f32.u32 %f561, %r311;
|
|
add.f32 %f562, %f559, %f561;
|
|
setp.gt.f32 %p71, %f560, 0f3FB504F3;
|
|
mul.f32 %f563, %f560, 0f3F000000;
|
|
add.f32 %f564, %f562, 0f3F800000;
|
|
selp.f32 %f565, %f564, %f562, %p71;
|
|
selp.f32 %f566, %f563, %f560, %p71;
|
|
add.f32 %f567, %f566, 0fBF800000;
|
|
add.f32 %f568, %f566, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f569, %f568;
|
|
add.f32 %f570, %f567, %f567;
|
|
mul.f32 %f571, %f570, %f569;
|
|
mul.f32 %f572, %f571, %f571;
|
|
mov.f32 %f573, 0f3C4CAF63;
|
|
mov.f32 %f574, 0f3B18F0FE;
|
|
fma.rn.f32 %f575, %f574, %f572, %f573;
|
|
mov.f32 %f576, 0f3DAAAABD;
|
|
fma.rn.f32 %f577, %f575, %f572, %f576;
|
|
mul.rn.f32 %f578, %f577, %f572;
|
|
mul.rn.f32 %f579, %f578, %f571;
|
|
sub.f32 %f580, %f567, %f571;
|
|
add.f32 %f581, %f580, %f580;
|
|
neg.f32 %f582, %f571;
|
|
fma.rn.f32 %f583, %f582, %f567, %f581;
|
|
mul.rn.f32 %f584, %f569, %f583;
|
|
add.f32 %f585, %f579, %f571;
|
|
sub.f32 %f586, %f571, %f585;
|
|
add.f32 %f587, %f579, %f586;
|
|
add.f32 %f588, %f584, %f587;
|
|
add.f32 %f589, %f585, %f588;
|
|
sub.f32 %f590, %f585, %f589;
|
|
add.f32 %f591, %f588, %f590;
|
|
mov.f32 %f592, 0f3F317200;
|
|
mul.rn.f32 %f593, %f565, %f592;
|
|
mov.f32 %f594, 0f35BFBE8E;
|
|
mul.rn.f32 %f595, %f565, %f594;
|
|
add.f32 %f596, %f593, %f589;
|
|
sub.f32 %f597, %f593, %f596;
|
|
add.f32 %f598, %f589, %f597;
|
|
add.f32 %f599, %f591, %f598;
|
|
add.f32 %f600, %f595, %f599;
|
|
add.f32 %f601, %f596, %f600;
|
|
sub.f32 %f602, %f596, %f601;
|
|
add.f32 %f603, %f600, %f602;
|
|
mul.rn.f32 %f604, %f555, %f601;
|
|
neg.f32 %f605, %f604;
|
|
fma.rn.f32 %f606, %f555, %f601, %f605;
|
|
fma.rn.f32 %f607, %f555, %f603, %f606;
|
|
mov.f32 %f608, 0f00000000;
|
|
fma.rn.f32 %f609, %f608, %f601, %f607;
|
|
add.rn.f32 %f610, %f604, %f609;
|
|
neg.f32 %f611, %f610;
|
|
add.rn.f32 %f612, %f604, %f611;
|
|
add.rn.f32 %f613, %f612, %f609;
|
|
mov.b32 %r312, %f610;
|
|
setp.eq.s32 %p72, %r312, 1118925336;
|
|
add.s32 %r313, %r312, -1;
|
|
mov.b32 %f614, %r313;
|
|
add.f32 %f615, %f613, 0f37000000;
|
|
selp.f32 %f158, %f615, %f613, %p72;
|
|
selp.f32 %f616, %f614, %f610, %p72;
|
|
mov.f32 %f617, 0f3FB8AA3B;
|
|
mul.rn.f32 %f618, %f616, %f617;
|
|
cvt.rzi.f32.f32 %f619, %f618;
|
|
abs.f32 %f620, %f619;
|
|
setp.gt.f32 %p73, %f620, 0f42FC0000;
|
|
mov.b32 %r314, %f619;
|
|
and.b32 %r315, %r314, -2147483648;
|
|
or.b32 %r316, %r315, 1123811328;
|
|
mov.b32 %f621, %r316;
|
|
selp.f32 %f622, %f621, %f619, %p73;
|
|
mov.f32 %f623, 0fBF317218;
|
|
fma.rn.f32 %f624, %f622, %f623, %f616;
|
|
mov.f32 %f625, 0f3102E308;
|
|
fma.rn.f32 %f626, %f622, %f625, %f624;
|
|
mul.f32 %f627, %f626, 0f3FB8AA3B;
|
|
add.f32 %f628, %f622, 0f4B40007F;
|
|
mov.b32 %r317, %f628;
|
|
shl.b32 %r318, %r317, 23;
|
|
mov.b32 %f629, %r318;
|
|
ex2.approx.ftz.f32 %f630, %f627;
|
|
mul.f32 %f159, %f630, %f629;
|
|
setp.eq.f32 %p74, %f159, 0f7F800000;
|
|
mov.f32 %f1280, 0f7F800000;
|
|
@%p74 bra $L__BB0_59;
|
|
|
|
fma.rn.f32 %f1280, %f159, %f158, %f159;
|
|
|
|
$L__BB0_59:
|
|
setp.lt.f32 %p75, %f155, 0f00000000;
|
|
setp.eq.f32 %p76, %f156, 0f3F800000;
|
|
and.pred %p3, %p75, %p76;
|
|
setp.eq.f32 %p77, %f155, 0f00000000;
|
|
@%p77 bra $L__BB0_63;
|
|
bra.uni $L__BB0_60;
|
|
|
|
$L__BB0_63:
|
|
add.f32 %f635, %f155, %f155;
|
|
selp.f32 %f1282, %f635, 0f00000000, %p76;
|
|
bra.uni $L__BB0_64;
|
|
|
|
$L__BB0_157:
|
|
mov.f32 %f1206, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs57, %f1206;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs56, %f1206;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs55, %f1206;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs58, 0;
|
|
st.global.v4.u16 [%rd24], {%rs55, %rs56, %rs57, %rs58};
|
|
|
|
$L__BB0_158:
|
|
and.b32 %r437, %r57, 64;
|
|
setp.eq.s32 %p192, %r437, 0;
|
|
@%p192 bra $L__BB0_160;
|
|
|
|
ld.const.u64 %rd92, [params+208];
|
|
cvta.to.global.u64 %rd93, %rd92;
|
|
ld.const.u32 %r438, [params+200];
|
|
mad.lo.s32 %r439, %r438, %r7, %r6;
|
|
mul.wide.u32 %rd94, %r439, 4;
|
|
add.s64 %rd95, %rd93, %rd94;
|
|
mov.u16 %rs59, 0;
|
|
st.global.v4.u8 [%rd95], {%rs59, %rs59, %rs59, %rs59};
|
|
bra.uni $L__BB0_160;
|
|
|
|
$L__BB0_60:
|
|
mov.b32 %r319, %f1280;
|
|
xor.b32 %r320, %r319, -2147483648;
|
|
mov.b32 %f631, %r320;
|
|
selp.f32 %f1282, %f631, %f1280, %p3;
|
|
setp.geu.f32 %p78, %f155, 0f00000000;
|
|
@%p78 bra $L__BB0_64;
|
|
|
|
mov.f32 %f632, 0f3EE8BA2E;
|
|
cvt.rzi.f32.f32 %f633, %f632;
|
|
setp.eq.f32 %p79, %f633, 0f3EE8BA2E;
|
|
@%p79 bra $L__BB0_64;
|
|
|
|
mov.f32 %f1282, 0f7FFFFFFF;
|
|
|
|
$L__BB0_64:
|
|
add.f32 %f636, %f157, 0f3EE8BA2E;
|
|
mov.b32 %r321, %f636;
|
|
setp.lt.s32 %p81, %r321, 2139095040;
|
|
@%p81 bra $L__BB0_69;
|
|
|
|
setp.gtu.f32 %p82, %f157, 0f7F800000;
|
|
@%p82 bra $L__BB0_68;
|
|
bra.uni $L__BB0_66;
|
|
|
|
$L__BB0_68:
|
|
add.f32 %f1282, %f155, 0f3EE8BA2E;
|
|
bra.uni $L__BB0_69;
|
|
|
|
$L__BB0_66:
|
|
setp.neu.f32 %p83, %f157, 0f7F800000;
|
|
@%p83 bra $L__BB0_69;
|
|
|
|
selp.f32 %f1282, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
$L__BB0_69:
|
|
mul.f32 %f637, %f1282, 0f437F0000;
|
|
setp.eq.f32 %p84, %f155, 0f3F800000;
|
|
selp.f32 %f638, 0f437F0000, %f637, %p84;
|
|
cvt.rzi.u32.f32 %r322, %f638;
|
|
shl.b64 %rd69, %rd20, 1;
|
|
add.s64 %rd70, %rd19, %rd69;
|
|
cvt.u16.u32 %rs16, %r322;
|
|
mov.u16 %rs17, 255;
|
|
st.global.v2.u8 [%rd70], {%rs16, %rs17};
|
|
|
|
$L__BB0_70:
|
|
ld.const.v2.f32 {%f639, %f640}, [params+648];
|
|
mul.f32 %f168, %f1276, %f639;
|
|
mul.f32 %f169, %f1277, %f640;
|
|
ld.const.f32 %f643, [params+656];
|
|
mul.f32 %f170, %f1278, %f643;
|
|
and.b32 %r323, %r56, 1;
|
|
setp.eq.b32 %p85, %r323, 1;
|
|
mov.pred %p86, 0;
|
|
xor.pred %p87, %p85, %p86;
|
|
not.pred %p88, %p87;
|
|
@%p88 bra $L__BB0_144;
|
|
|
|
mov.f32 %f645, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f646, %f645;
|
|
add.f32 %f647, %f646, %f646;
|
|
mov.f32 %f648, 0f3EE66666;
|
|
sub.f32 %f649, %f648, %f647;
|
|
abs.f32 %f171, %f649;
|
|
abs.f32 %f172, %f168;
|
|
setp.lt.f32 %p89, %f172, 0f00800000;
|
|
mul.f32 %f650, %f172, 0f4B800000;
|
|
selp.f32 %f651, %f650, %f172, %p89;
|
|
selp.f32 %f652, 0fC3170000, 0fC2FE0000, %p89;
|
|
mov.b32 %r324, %f651;
|
|
and.b32 %r325, %r324, 8388607;
|
|
or.b32 %r326, %r325, 1065353216;
|
|
mov.b32 %f653, %r326;
|
|
shr.u32 %r327, %r324, 23;
|
|
cvt.rn.f32.u32 %f654, %r327;
|
|
add.f32 %f655, %f652, %f654;
|
|
setp.gt.f32 %p90, %f653, 0f3FB504F3;
|
|
mul.f32 %f656, %f653, 0f3F000000;
|
|
add.f32 %f657, %f655, 0f3F800000;
|
|
selp.f32 %f658, %f657, %f655, %p90;
|
|
selp.f32 %f659, %f656, %f653, %p90;
|
|
add.f32 %f660, %f659, 0fBF800000;
|
|
add.f32 %f661, %f659, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f662, %f661;
|
|
add.f32 %f663, %f660, %f660;
|
|
mul.f32 %f664, %f663, %f662;
|
|
mul.f32 %f665, %f664, %f664;
|
|
mov.f32 %f666, 0f3C4CAF63;
|
|
mov.f32 %f667, 0f3B18F0FE;
|
|
fma.rn.f32 %f668, %f667, %f665, %f666;
|
|
mov.f32 %f669, 0f3DAAAABD;
|
|
fma.rn.f32 %f670, %f668, %f665, %f669;
|
|
mul.rn.f32 %f671, %f670, %f665;
|
|
mul.rn.f32 %f672, %f671, %f664;
|
|
sub.f32 %f673, %f660, %f664;
|
|
add.f32 %f674, %f673, %f673;
|
|
neg.f32 %f675, %f664;
|
|
fma.rn.f32 %f676, %f675, %f660, %f674;
|
|
mul.rn.f32 %f677, %f662, %f676;
|
|
add.f32 %f678, %f672, %f664;
|
|
sub.f32 %f679, %f664, %f678;
|
|
add.f32 %f680, %f672, %f679;
|
|
add.f32 %f681, %f677, %f680;
|
|
add.f32 %f682, %f678, %f681;
|
|
sub.f32 %f683, %f678, %f682;
|
|
add.f32 %f684, %f681, %f683;
|
|
mov.f32 %f685, 0f3F317200;
|
|
mul.rn.f32 %f686, %f658, %f685;
|
|
mov.f32 %f687, 0f35BFBE8E;
|
|
mul.rn.f32 %f688, %f658, %f687;
|
|
add.f32 %f689, %f686, %f682;
|
|
sub.f32 %f690, %f686, %f689;
|
|
add.f32 %f691, %f682, %f690;
|
|
add.f32 %f692, %f684, %f691;
|
|
add.f32 %f693, %f688, %f692;
|
|
add.f32 %f694, %f689, %f693;
|
|
sub.f32 %f695, %f689, %f694;
|
|
add.f32 %f696, %f693, %f695;
|
|
mul.rn.f32 %f697, %f648, %f694;
|
|
neg.f32 %f698, %f697;
|
|
fma.rn.f32 %f699, %f648, %f694, %f698;
|
|
fma.rn.f32 %f700, %f648, %f696, %f699;
|
|
mov.f32 %f701, 0f00000000;
|
|
fma.rn.f32 %f702, %f701, %f694, %f700;
|
|
add.rn.f32 %f703, %f697, %f702;
|
|
neg.f32 %f704, %f703;
|
|
add.rn.f32 %f705, %f697, %f704;
|
|
add.rn.f32 %f706, %f705, %f702;
|
|
mov.b32 %r328, %f703;
|
|
setp.eq.s32 %p91, %r328, 1118925336;
|
|
add.s32 %r329, %r328, -1;
|
|
mov.b32 %f707, %r329;
|
|
add.f32 %f708, %f706, 0f37000000;
|
|
selp.f32 %f173, %f708, %f706, %p91;
|
|
selp.f32 %f709, %f707, %f703, %p91;
|
|
mov.f32 %f710, 0f3FB8AA3B;
|
|
mul.rn.f32 %f711, %f709, %f710;
|
|
cvt.rzi.f32.f32 %f712, %f711;
|
|
abs.f32 %f713, %f712;
|
|
setp.gt.f32 %p92, %f713, 0f42FC0000;
|
|
mov.b32 %r330, %f712;
|
|
and.b32 %r331, %r330, -2147483648;
|
|
or.b32 %r332, %r331, 1123811328;
|
|
mov.b32 %f714, %r332;
|
|
selp.f32 %f715, %f714, %f712, %p92;
|
|
mov.f32 %f716, 0fBF317218;
|
|
fma.rn.f32 %f717, %f715, %f716, %f709;
|
|
mov.f32 %f718, 0f3102E308;
|
|
fma.rn.f32 %f719, %f715, %f718, %f717;
|
|
mul.f32 %f720, %f719, 0f3FB8AA3B;
|
|
add.f32 %f721, %f715, 0f4B40007F;
|
|
mov.b32 %r333, %f721;
|
|
shl.b32 %r334, %r333, 23;
|
|
mov.b32 %f722, %r334;
|
|
ex2.approx.ftz.f32 %f723, %f720;
|
|
mul.f32 %f174, %f723, %f722;
|
|
setp.eq.f32 %p93, %f174, 0f7F800000;
|
|
mov.f32 %f1283, 0f7F800000;
|
|
@%p93 bra $L__BB0_73;
|
|
|
|
fma.rn.f32 %f1283, %f174, %f173, %f174;
|
|
|
|
$L__BB0_73:
|
|
setp.lt.f32 %p94, %f168, 0f00000000;
|
|
setp.eq.f32 %p95, %f171, 0f3F800000;
|
|
and.pred %p4, %p94, %p95;
|
|
setp.eq.f32 %p96, %f168, 0f00000000;
|
|
@%p96 bra $L__BB0_77;
|
|
bra.uni $L__BB0_74;
|
|
|
|
$L__BB0_77:
|
|
add.f32 %f728, %f168, %f168;
|
|
selp.f32 %f1285, %f728, 0f00000000, %p95;
|
|
bra.uni $L__BB0_78;
|
|
|
|
$L__BB0_74:
|
|
mov.b32 %r335, %f1283;
|
|
xor.b32 %r336, %r335, -2147483648;
|
|
mov.b32 %f724, %r336;
|
|
selp.f32 %f1285, %f724, %f1283, %p4;
|
|
setp.geu.f32 %p97, %f168, 0f00000000;
|
|
@%p97 bra $L__BB0_78;
|
|
|
|
mov.f32 %f725, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f726, %f725;
|
|
setp.eq.f32 %p98, %f726, 0f3EE66666;
|
|
@%p98 bra $L__BB0_78;
|
|
|
|
mov.f32 %f1285, 0f7FFFFFFF;
|
|
|
|
$L__BB0_78:
|
|
add.f32 %f729, %f172, 0f3EE66666;
|
|
mov.b32 %r337, %f729;
|
|
setp.lt.s32 %p100, %r337, 2139095040;
|
|
@%p100 bra $L__BB0_83;
|
|
|
|
setp.gtu.f32 %p101, %f172, 0f7F800000;
|
|
@%p101 bra $L__BB0_82;
|
|
bra.uni $L__BB0_80;
|
|
|
|
$L__BB0_82:
|
|
add.f32 %f1285, %f168, 0f3EE66666;
|
|
bra.uni $L__BB0_83;
|
|
|
|
$L__BB0_80:
|
|
setp.neu.f32 %p102, %f172, 0f7F800000;
|
|
@%p102 bra $L__BB0_83;
|
|
|
|
selp.f32 %f1285, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
$L__BB0_83:
|
|
setp.eq.f32 %p103, %f168, 0f3F800000;
|
|
selp.f32 %f183, 0f3F800000, %f1285, %p103;
|
|
abs.f32 %f184, %f169;
|
|
setp.lt.f32 %p104, %f184, 0f00800000;
|
|
mul.f32 %f731, %f184, 0f4B800000;
|
|
selp.f32 %f732, %f731, %f184, %p104;
|
|
selp.f32 %f733, 0fC3170000, 0fC2FE0000, %p104;
|
|
mov.b32 %r338, %f732;
|
|
and.b32 %r339, %r338, 8388607;
|
|
or.b32 %r340, %r339, 1065353216;
|
|
mov.b32 %f734, %r340;
|
|
shr.u32 %r341, %r338, 23;
|
|
cvt.rn.f32.u32 %f735, %r341;
|
|
add.f32 %f736, %f733, %f735;
|
|
setp.gt.f32 %p105, %f734, 0f3FB504F3;
|
|
mul.f32 %f737, %f734, 0f3F000000;
|
|
add.f32 %f738, %f736, 0f3F800000;
|
|
selp.f32 %f739, %f738, %f736, %p105;
|
|
selp.f32 %f740, %f737, %f734, %p105;
|
|
add.f32 %f741, %f740, 0fBF800000;
|
|
add.f32 %f742, %f740, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f743, %f742;
|
|
add.f32 %f744, %f741, %f741;
|
|
mul.f32 %f745, %f744, %f743;
|
|
mul.f32 %f746, %f745, %f745;
|
|
mov.f32 %f747, 0f3C4CAF63;
|
|
mov.f32 %f748, 0f3B18F0FE;
|
|
fma.rn.f32 %f749, %f748, %f746, %f747;
|
|
mov.f32 %f750, 0f3DAAAABD;
|
|
fma.rn.f32 %f751, %f749, %f746, %f750;
|
|
mul.rn.f32 %f752, %f751, %f746;
|
|
mul.rn.f32 %f753, %f752, %f745;
|
|
sub.f32 %f754, %f741, %f745;
|
|
add.f32 %f755, %f754, %f754;
|
|
neg.f32 %f756, %f745;
|
|
fma.rn.f32 %f757, %f756, %f741, %f755;
|
|
mul.rn.f32 %f758, %f743, %f757;
|
|
add.f32 %f759, %f753, %f745;
|
|
sub.f32 %f760, %f745, %f759;
|
|
add.f32 %f761, %f753, %f760;
|
|
add.f32 %f762, %f758, %f761;
|
|
add.f32 %f763, %f759, %f762;
|
|
sub.f32 %f764, %f759, %f763;
|
|
add.f32 %f765, %f762, %f764;
|
|
mov.f32 %f766, 0f3F317200;
|
|
mul.rn.f32 %f767, %f739, %f766;
|
|
mov.f32 %f768, 0f35BFBE8E;
|
|
mul.rn.f32 %f769, %f739, %f768;
|
|
add.f32 %f770, %f767, %f763;
|
|
sub.f32 %f771, %f767, %f770;
|
|
add.f32 %f772, %f763, %f771;
|
|
add.f32 %f773, %f765, %f772;
|
|
add.f32 %f774, %f769, %f773;
|
|
add.f32 %f775, %f770, %f774;
|
|
sub.f32 %f776, %f770, %f775;
|
|
add.f32 %f777, %f774, %f776;
|
|
mov.f32 %f778, 0f3EE66666;
|
|
mul.rn.f32 %f779, %f778, %f775;
|
|
neg.f32 %f780, %f779;
|
|
fma.rn.f32 %f781, %f778, %f775, %f780;
|
|
fma.rn.f32 %f782, %f778, %f777, %f781;
|
|
mov.f32 %f783, 0f00000000;
|
|
fma.rn.f32 %f784, %f783, %f775, %f782;
|
|
add.rn.f32 %f785, %f779, %f784;
|
|
neg.f32 %f786, %f785;
|
|
add.rn.f32 %f787, %f779, %f786;
|
|
add.rn.f32 %f788, %f787, %f784;
|
|
mov.b32 %r342, %f785;
|
|
setp.eq.s32 %p106, %r342, 1118925336;
|
|
add.s32 %r343, %r342, -1;
|
|
mov.b32 %f789, %r343;
|
|
add.f32 %f790, %f788, 0f37000000;
|
|
selp.f32 %f185, %f790, %f788, %p106;
|
|
selp.f32 %f791, %f789, %f785, %p106;
|
|
mov.f32 %f792, 0f3FB8AA3B;
|
|
mul.rn.f32 %f793, %f791, %f792;
|
|
cvt.rzi.f32.f32 %f794, %f793;
|
|
abs.f32 %f795, %f794;
|
|
setp.gt.f32 %p107, %f795, 0f42FC0000;
|
|
mov.b32 %r344, %f794;
|
|
and.b32 %r345, %r344, -2147483648;
|
|
or.b32 %r346, %r345, 1123811328;
|
|
mov.b32 %f796, %r346;
|
|
selp.f32 %f797, %f796, %f794, %p107;
|
|
mov.f32 %f798, 0fBF317218;
|
|
fma.rn.f32 %f799, %f797, %f798, %f791;
|
|
mov.f32 %f800, 0f3102E308;
|
|
fma.rn.f32 %f801, %f797, %f800, %f799;
|
|
mul.f32 %f802, %f801, 0f3FB8AA3B;
|
|
add.f32 %f803, %f797, 0f4B40007F;
|
|
mov.b32 %r347, %f803;
|
|
shl.b32 %r348, %r347, 23;
|
|
mov.b32 %f804, %r348;
|
|
ex2.approx.ftz.f32 %f805, %f802;
|
|
mul.f32 %f186, %f805, %f804;
|
|
setp.eq.f32 %p108, %f186, 0f7F800000;
|
|
mov.f32 %f1286, 0f7F800000;
|
|
@%p108 bra $L__BB0_85;
|
|
|
|
fma.rn.f32 %f1286, %f186, %f185, %f186;
|
|
|
|
$L__BB0_85:
|
|
setp.lt.f32 %p109, %f169, 0f00000000;
|
|
and.pred %p5, %p109, %p95;
|
|
setp.eq.f32 %p111, %f169, 0f00000000;
|
|
@%p111 bra $L__BB0_89;
|
|
bra.uni $L__BB0_86;
|
|
|
|
$L__BB0_89:
|
|
add.f32 %f810, %f169, %f169;
|
|
selp.f32 %f1288, %f810, 0f00000000, %p95;
|
|
bra.uni $L__BB0_90;
|
|
|
|
$L__BB0_86:
|
|
mov.b32 %r349, %f1286;
|
|
xor.b32 %r350, %r349, -2147483648;
|
|
mov.b32 %f806, %r350;
|
|
selp.f32 %f1288, %f806, %f1286, %p5;
|
|
setp.geu.f32 %p112, %f169, 0f00000000;
|
|
@%p112 bra $L__BB0_90;
|
|
|
|
mov.f32 %f807, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f808, %f807;
|
|
setp.eq.f32 %p113, %f808, 0f3EE66666;
|
|
@%p113 bra $L__BB0_90;
|
|
|
|
mov.f32 %f1288, 0f7FFFFFFF;
|
|
|
|
$L__BB0_90:
|
|
add.f32 %f811, %f184, 0f3EE66666;
|
|
mov.b32 %r351, %f811;
|
|
setp.lt.s32 %p115, %r351, 2139095040;
|
|
@%p115 bra $L__BB0_95;
|
|
|
|
setp.gtu.f32 %p116, %f184, 0f7F800000;
|
|
@%p116 bra $L__BB0_94;
|
|
bra.uni $L__BB0_92;
|
|
|
|
$L__BB0_94:
|
|
add.f32 %f1288, %f169, 0f3EE66666;
|
|
bra.uni $L__BB0_95;
|
|
|
|
$L__BB0_92:
|
|
setp.neu.f32 %p117, %f184, 0f7F800000;
|
|
@%p117 bra $L__BB0_95;
|
|
|
|
selp.f32 %f1288, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
$L__BB0_95:
|
|
setp.eq.f32 %p118, %f169, 0f3F800000;
|
|
selp.f32 %f195, 0f3F800000, %f1288, %p118;
|
|
abs.f32 %f196, %f170;
|
|
setp.lt.f32 %p119, %f196, 0f00800000;
|
|
mul.f32 %f813, %f196, 0f4B800000;
|
|
selp.f32 %f814, %f813, %f196, %p119;
|
|
selp.f32 %f815, 0fC3170000, 0fC2FE0000, %p119;
|
|
mov.b32 %r352, %f814;
|
|
and.b32 %r353, %r352, 8388607;
|
|
or.b32 %r354, %r353, 1065353216;
|
|
mov.b32 %f816, %r354;
|
|
shr.u32 %r355, %r352, 23;
|
|
cvt.rn.f32.u32 %f817, %r355;
|
|
add.f32 %f818, %f815, %f817;
|
|
setp.gt.f32 %p120, %f816, 0f3FB504F3;
|
|
mul.f32 %f819, %f816, 0f3F000000;
|
|
add.f32 %f820, %f818, 0f3F800000;
|
|
selp.f32 %f821, %f820, %f818, %p120;
|
|
selp.f32 %f822, %f819, %f816, %p120;
|
|
add.f32 %f823, %f822, 0fBF800000;
|
|
add.f32 %f824, %f822, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f825, %f824;
|
|
add.f32 %f826, %f823, %f823;
|
|
mul.f32 %f827, %f826, %f825;
|
|
mul.f32 %f828, %f827, %f827;
|
|
mov.f32 %f829, 0f3C4CAF63;
|
|
mov.f32 %f830, 0f3B18F0FE;
|
|
fma.rn.f32 %f831, %f830, %f828, %f829;
|
|
mov.f32 %f832, 0f3DAAAABD;
|
|
fma.rn.f32 %f833, %f831, %f828, %f832;
|
|
mul.rn.f32 %f834, %f833, %f828;
|
|
mul.rn.f32 %f835, %f834, %f827;
|
|
sub.f32 %f836, %f823, %f827;
|
|
add.f32 %f837, %f836, %f836;
|
|
neg.f32 %f838, %f827;
|
|
fma.rn.f32 %f839, %f838, %f823, %f837;
|
|
mul.rn.f32 %f840, %f825, %f839;
|
|
add.f32 %f841, %f835, %f827;
|
|
sub.f32 %f842, %f827, %f841;
|
|
add.f32 %f843, %f835, %f842;
|
|
add.f32 %f844, %f840, %f843;
|
|
add.f32 %f845, %f841, %f844;
|
|
sub.f32 %f846, %f841, %f845;
|
|
add.f32 %f847, %f844, %f846;
|
|
mov.f32 %f848, 0f3F317200;
|
|
mul.rn.f32 %f849, %f821, %f848;
|
|
mov.f32 %f850, 0f35BFBE8E;
|
|
mul.rn.f32 %f851, %f821, %f850;
|
|
add.f32 %f852, %f849, %f845;
|
|
sub.f32 %f853, %f849, %f852;
|
|
add.f32 %f854, %f845, %f853;
|
|
add.f32 %f855, %f847, %f854;
|
|
add.f32 %f856, %f851, %f855;
|
|
add.f32 %f857, %f852, %f856;
|
|
sub.f32 %f858, %f852, %f857;
|
|
add.f32 %f859, %f856, %f858;
|
|
mov.f32 %f860, 0f3EE66666;
|
|
mul.rn.f32 %f861, %f860, %f857;
|
|
neg.f32 %f862, %f861;
|
|
fma.rn.f32 %f863, %f860, %f857, %f862;
|
|
fma.rn.f32 %f864, %f860, %f859, %f863;
|
|
mov.f32 %f865, 0f00000000;
|
|
fma.rn.f32 %f866, %f865, %f857, %f864;
|
|
add.rn.f32 %f867, %f861, %f866;
|
|
neg.f32 %f868, %f867;
|
|
add.rn.f32 %f869, %f861, %f868;
|
|
add.rn.f32 %f870, %f869, %f866;
|
|
mov.b32 %r356, %f867;
|
|
setp.eq.s32 %p121, %r356, 1118925336;
|
|
add.s32 %r357, %r356, -1;
|
|
mov.b32 %f871, %r357;
|
|
add.f32 %f872, %f870, 0f37000000;
|
|
selp.f32 %f197, %f872, %f870, %p121;
|
|
selp.f32 %f873, %f871, %f867, %p121;
|
|
mov.f32 %f874, 0f3FB8AA3B;
|
|
mul.rn.f32 %f875, %f873, %f874;
|
|
cvt.rzi.f32.f32 %f876, %f875;
|
|
abs.f32 %f877, %f876;
|
|
setp.gt.f32 %p122, %f877, 0f42FC0000;
|
|
mov.b32 %r358, %f876;
|
|
and.b32 %r359, %r358, -2147483648;
|
|
or.b32 %r360, %r359, 1123811328;
|
|
mov.b32 %f878, %r360;
|
|
selp.f32 %f879, %f878, %f876, %p122;
|
|
mov.f32 %f880, 0fBF317218;
|
|
fma.rn.f32 %f881, %f879, %f880, %f873;
|
|
mov.f32 %f882, 0f3102E308;
|
|
fma.rn.f32 %f883, %f879, %f882, %f881;
|
|
mul.f32 %f884, %f883, 0f3FB8AA3B;
|
|
add.f32 %f885, %f879, 0f4B40007F;
|
|
mov.b32 %r361, %f885;
|
|
shl.b32 %r362, %r361, 23;
|
|
mov.b32 %f886, %r362;
|
|
ex2.approx.ftz.f32 %f887, %f884;
|
|
mul.f32 %f198, %f887, %f886;
|
|
setp.eq.f32 %p123, %f198, 0f7F800000;
|
|
mov.f32 %f1289, 0f7F800000;
|
|
@%p123 bra $L__BB0_97;
|
|
|
|
fma.rn.f32 %f1289, %f198, %f197, %f198;
|
|
|
|
$L__BB0_97:
|
|
setp.lt.f32 %p124, %f170, 0f00000000;
|
|
and.pred %p6, %p124, %p95;
|
|
setp.eq.f32 %p126, %f170, 0f00000000;
|
|
@%p126 bra $L__BB0_101;
|
|
bra.uni $L__BB0_98;
|
|
|
|
$L__BB0_101:
|
|
add.f32 %f892, %f170, %f170;
|
|
selp.f32 %f1291, %f892, 0f00000000, %p95;
|
|
bra.uni $L__BB0_102;
|
|
|
|
$L__BB0_98:
|
|
mov.b32 %r363, %f1289;
|
|
xor.b32 %r364, %r363, -2147483648;
|
|
mov.b32 %f888, %r364;
|
|
selp.f32 %f1291, %f888, %f1289, %p6;
|
|
setp.geu.f32 %p127, %f170, 0f00000000;
|
|
@%p127 bra $L__BB0_102;
|
|
|
|
mov.f32 %f889, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f890, %f889;
|
|
setp.eq.f32 %p128, %f890, 0f3EE66666;
|
|
@%p128 bra $L__BB0_102;
|
|
|
|
mov.f32 %f1291, 0f7FFFFFFF;
|
|
|
|
$L__BB0_102:
|
|
add.f32 %f893, %f196, 0f3EE66666;
|
|
mov.b32 %r365, %f893;
|
|
setp.lt.s32 %p130, %r365, 2139095040;
|
|
@%p130 bra $L__BB0_107;
|
|
|
|
setp.gtu.f32 %p131, %f196, 0f7F800000;
|
|
@%p131 bra $L__BB0_106;
|
|
bra.uni $L__BB0_104;
|
|
|
|
$L__BB0_106:
|
|
add.f32 %f1291, %f170, 0f3EE66666;
|
|
bra.uni $L__BB0_107;
|
|
|
|
$L__BB0_104:
|
|
setp.neu.f32 %p132, %f196, 0f7F800000;
|
|
@%p132 bra $L__BB0_107;
|
|
|
|
selp.f32 %f1291, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
$L__BB0_107:
|
|
setp.eq.f32 %p133, %f170, 0f3F800000;
|
|
mov.f32 %f895, 0f3F800000;
|
|
selp.f32 %f896, 0f3F800000, %f1291, %p133;
|
|
ld.const.u64 %rd71, [params+144];
|
|
cvta.to.global.u64 %rd21, %rd71;
|
|
ld.const.u32 %r366, [params+136];
|
|
mad.lo.s32 %r367, %r366, %r7, %r6;
|
|
cvt.u64.u32 %rd22, %r367;
|
|
min.f32 %f897, %f183, %f895;
|
|
mov.f32 %f898, 0f00000000;
|
|
max.f32 %f207, %f898, %f897;
|
|
min.f32 %f899, %f195, %f895;
|
|
max.f32 %f208, %f898, %f899;
|
|
min.f32 %f900, %f896, %f895;
|
|
max.f32 %f209, %f898, %f900;
|
|
mov.f32 %f901, 0f3E555555;
|
|
cvt.rzi.f32.f32 %f902, %f901;
|
|
add.f32 %f903, %f902, %f902;
|
|
mov.f32 %f904, 0f3ED55555;
|
|
sub.f32 %f905, %f904, %f903;
|
|
abs.f32 %f210, %f905;
|
|
abs.f32 %f211, %f207;
|
|
setp.lt.f32 %p134, %f211, 0f00800000;
|
|
mul.f32 %f906, %f211, 0f4B800000;
|
|
selp.f32 %f907, %f906, %f211, %p134;
|
|
selp.f32 %f908, 0fC3170000, 0fC2FE0000, %p134;
|
|
mov.b32 %r368, %f907;
|
|
and.b32 %r369, %r368, 8388607;
|
|
or.b32 %r370, %r369, 1065353216;
|
|
mov.b32 %f909, %r370;
|
|
shr.u32 %r371, %r368, 23;
|
|
cvt.rn.f32.u32 %f910, %r371;
|
|
add.f32 %f911, %f908, %f910;
|
|
setp.gt.f32 %p135, %f909, 0f3FB504F3;
|
|
mul.f32 %f912, %f909, 0f3F000000;
|
|
add.f32 %f913, %f911, 0f3F800000;
|
|
selp.f32 %f914, %f913, %f911, %p135;
|
|
selp.f32 %f915, %f912, %f909, %p135;
|
|
add.f32 %f916, %f915, 0fBF800000;
|
|
add.f32 %f917, %f915, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f918, %f917;
|
|
add.f32 %f919, %f916, %f916;
|
|
mul.f32 %f920, %f919, %f918;
|
|
mul.f32 %f921, %f920, %f920;
|
|
mov.f32 %f922, 0f3C4CAF63;
|
|
mov.f32 %f923, 0f3B18F0FE;
|
|
fma.rn.f32 %f924, %f923, %f921, %f922;
|
|
mov.f32 %f925, 0f3DAAAABD;
|
|
fma.rn.f32 %f926, %f924, %f921, %f925;
|
|
mul.rn.f32 %f927, %f926, %f921;
|
|
mul.rn.f32 %f928, %f927, %f920;
|
|
sub.f32 %f929, %f916, %f920;
|
|
add.f32 %f930, %f929, %f929;
|
|
neg.f32 %f931, %f920;
|
|
fma.rn.f32 %f932, %f931, %f916, %f930;
|
|
mul.rn.f32 %f933, %f918, %f932;
|
|
add.f32 %f934, %f928, %f920;
|
|
sub.f32 %f935, %f920, %f934;
|
|
add.f32 %f936, %f928, %f935;
|
|
add.f32 %f937, %f933, %f936;
|
|
add.f32 %f938, %f934, %f937;
|
|
sub.f32 %f939, %f934, %f938;
|
|
add.f32 %f940, %f937, %f939;
|
|
mov.f32 %f941, 0f3F317200;
|
|
mul.rn.f32 %f942, %f914, %f941;
|
|
mov.f32 %f943, 0f35BFBE8E;
|
|
mul.rn.f32 %f944, %f914, %f943;
|
|
add.f32 %f945, %f942, %f938;
|
|
sub.f32 %f946, %f942, %f945;
|
|
add.f32 %f947, %f938, %f946;
|
|
add.f32 %f948, %f940, %f947;
|
|
add.f32 %f949, %f944, %f948;
|
|
add.f32 %f950, %f945, %f949;
|
|
sub.f32 %f951, %f945, %f950;
|
|
add.f32 %f952, %f949, %f951;
|
|
mul.rn.f32 %f953, %f904, %f950;
|
|
neg.f32 %f954, %f953;
|
|
fma.rn.f32 %f955, %f904, %f950, %f954;
|
|
fma.rn.f32 %f956, %f904, %f952, %f955;
|
|
fma.rn.f32 %f957, %f898, %f950, %f956;
|
|
add.rn.f32 %f958, %f953, %f957;
|
|
neg.f32 %f959, %f958;
|
|
add.rn.f32 %f960, %f953, %f959;
|
|
add.rn.f32 %f961, %f960, %f957;
|
|
mov.b32 %r372, %f958;
|
|
setp.eq.s32 %p136, %r372, 1118925336;
|
|
add.s32 %r373, %r372, -1;
|
|
mov.b32 %f962, %r373;
|
|
add.f32 %f963, %f961, 0f37000000;
|
|
selp.f32 %f212, %f963, %f961, %p136;
|
|
selp.f32 %f964, %f962, %f958, %p136;
|
|
mov.f32 %f965, 0f3FB8AA3B;
|
|
mul.rn.f32 %f966, %f964, %f965;
|
|
cvt.rzi.f32.f32 %f967, %f966;
|
|
abs.f32 %f968, %f967;
|
|
setp.gt.f32 %p137, %f968, 0f42FC0000;
|
|
mov.b32 %r374, %f967;
|
|
and.b32 %r375, %r374, -2147483648;
|
|
or.b32 %r376, %r375, 1123811328;
|
|
mov.b32 %f969, %r376;
|
|
selp.f32 %f970, %f969, %f967, %p137;
|
|
mov.f32 %f971, 0fBF317218;
|
|
fma.rn.f32 %f972, %f970, %f971, %f964;
|
|
mov.f32 %f973, 0f3102E308;
|
|
fma.rn.f32 %f974, %f970, %f973, %f972;
|
|
mul.f32 %f975, %f974, 0f3FB8AA3B;
|
|
add.f32 %f976, %f970, 0f4B40007F;
|
|
mov.b32 %r377, %f976;
|
|
shl.b32 %r378, %r377, 23;
|
|
mov.b32 %f977, %r378;
|
|
ex2.approx.ftz.f32 %f978, %f975;
|
|
mul.f32 %f213, %f978, %f977;
|
|
setp.eq.f32 %p138, %f213, 0f7F800000;
|
|
mov.f32 %f1292, 0f7F800000;
|
|
@%p138 bra $L__BB0_109;
|
|
|
|
fma.rn.f32 %f1292, %f213, %f212, %f213;
|
|
|
|
$L__BB0_109:
|
|
setp.lt.f32 %p139, %f207, 0f00000000;
|
|
setp.eq.f32 %p140, %f210, 0f3F800000;
|
|
and.pred %p7, %p139, %p140;
|
|
setp.eq.f32 %p141, %f207, 0f00000000;
|
|
@%p141 bra $L__BB0_113;
|
|
bra.uni $L__BB0_110;
|
|
|
|
$L__BB0_113:
|
|
add.f32 %f983, %f207, %f207;
|
|
selp.f32 %f1294, %f983, 0f00000000, %p140;
|
|
bra.uni $L__BB0_114;
|
|
|
|
$L__BB0_110:
|
|
mov.b32 %r379, %f1292;
|
|
xor.b32 %r380, %r379, -2147483648;
|
|
mov.b32 %f979, %r380;
|
|
selp.f32 %f1294, %f979, %f1292, %p7;
|
|
setp.geu.f32 %p142, %f207, 0f00000000;
|
|
@%p142 bra $L__BB0_114;
|
|
|
|
mov.f32 %f980, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f981, %f980;
|
|
setp.eq.f32 %p143, %f981, 0f3ED55555;
|
|
@%p143 bra $L__BB0_114;
|
|
|
|
mov.f32 %f1294, 0f7FFFFFFF;
|
|
|
|
$L__BB0_114:
|
|
add.f32 %f984, %f211, 0f3ED55555;
|
|
mov.b32 %r381, %f984;
|
|
setp.lt.s32 %p145, %r381, 2139095040;
|
|
@%p145 bra $L__BB0_119;
|
|
|
|
setp.gtu.f32 %p146, %f211, 0f7F800000;
|
|
@%p146 bra $L__BB0_118;
|
|
bra.uni $L__BB0_116;
|
|
|
|
$L__BB0_118:
|
|
add.f32 %f1294, %f207, 0f3ED55555;
|
|
bra.uni $L__BB0_119;
|
|
|
|
$L__BB0_116:
|
|
setp.neu.f32 %p147, %f211, 0f7F800000;
|
|
@%p147 bra $L__BB0_119;
|
|
|
|
selp.f32 %f1294, 0fFF800000, 0f7F800000, %p7;
|
|
|
|
$L__BB0_119:
|
|
abs.f32 %f222, %f208;
|
|
setp.lt.f32 %p148, %f222, 0f00800000;
|
|
mul.f32 %f986, %f222, 0f4B800000;
|
|
selp.f32 %f987, %f986, %f222, %p148;
|
|
selp.f32 %f988, 0fC3170000, 0fC2FE0000, %p148;
|
|
mov.b32 %r382, %f987;
|
|
and.b32 %r383, %r382, 8388607;
|
|
or.b32 %r384, %r383, 1065353216;
|
|
mov.b32 %f989, %r384;
|
|
shr.u32 %r385, %r382, 23;
|
|
cvt.rn.f32.u32 %f990, %r385;
|
|
add.f32 %f991, %f988, %f990;
|
|
setp.gt.f32 %p149, %f989, 0f3FB504F3;
|
|
mul.f32 %f992, %f989, 0f3F000000;
|
|
add.f32 %f993, %f991, 0f3F800000;
|
|
selp.f32 %f994, %f993, %f991, %p149;
|
|
selp.f32 %f995, %f992, %f989, %p149;
|
|
add.f32 %f996, %f995, 0fBF800000;
|
|
add.f32 %f997, %f995, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f998, %f997;
|
|
add.f32 %f999, %f996, %f996;
|
|
mul.f32 %f1000, %f999, %f998;
|
|
mul.f32 %f1001, %f1000, %f1000;
|
|
mov.f32 %f1002, 0f3C4CAF63;
|
|
mov.f32 %f1003, 0f3B18F0FE;
|
|
fma.rn.f32 %f1004, %f1003, %f1001, %f1002;
|
|
mov.f32 %f1005, 0f3DAAAABD;
|
|
fma.rn.f32 %f1006, %f1004, %f1001, %f1005;
|
|
mul.rn.f32 %f1007, %f1006, %f1001;
|
|
mul.rn.f32 %f1008, %f1007, %f1000;
|
|
sub.f32 %f1009, %f996, %f1000;
|
|
add.f32 %f1010, %f1009, %f1009;
|
|
neg.f32 %f1011, %f1000;
|
|
fma.rn.f32 %f1012, %f1011, %f996, %f1010;
|
|
mul.rn.f32 %f1013, %f998, %f1012;
|
|
add.f32 %f1014, %f1008, %f1000;
|
|
sub.f32 %f1015, %f1000, %f1014;
|
|
add.f32 %f1016, %f1008, %f1015;
|
|
add.f32 %f1017, %f1013, %f1016;
|
|
add.f32 %f1018, %f1014, %f1017;
|
|
sub.f32 %f1019, %f1014, %f1018;
|
|
add.f32 %f1020, %f1017, %f1019;
|
|
mov.f32 %f1021, 0f3F317200;
|
|
mul.rn.f32 %f1022, %f994, %f1021;
|
|
mov.f32 %f1023, 0f35BFBE8E;
|
|
mul.rn.f32 %f1024, %f994, %f1023;
|
|
add.f32 %f1025, %f1022, %f1018;
|
|
sub.f32 %f1026, %f1022, %f1025;
|
|
add.f32 %f1027, %f1018, %f1026;
|
|
add.f32 %f1028, %f1020, %f1027;
|
|
add.f32 %f1029, %f1024, %f1028;
|
|
add.f32 %f1030, %f1025, %f1029;
|
|
sub.f32 %f1031, %f1025, %f1030;
|
|
add.f32 %f1032, %f1029, %f1031;
|
|
mov.f32 %f1033, 0f3ED55555;
|
|
mul.rn.f32 %f1034, %f1033, %f1030;
|
|
neg.f32 %f1035, %f1034;
|
|
fma.rn.f32 %f1036, %f1033, %f1030, %f1035;
|
|
fma.rn.f32 %f1037, %f1033, %f1032, %f1036;
|
|
mov.f32 %f1038, 0f00000000;
|
|
fma.rn.f32 %f1039, %f1038, %f1030, %f1037;
|
|
add.rn.f32 %f1040, %f1034, %f1039;
|
|
neg.f32 %f1041, %f1040;
|
|
add.rn.f32 %f1042, %f1034, %f1041;
|
|
add.rn.f32 %f1043, %f1042, %f1039;
|
|
mov.b32 %r386, %f1040;
|
|
setp.eq.s32 %p150, %r386, 1118925336;
|
|
add.s32 %r387, %r386, -1;
|
|
mov.b32 %f1044, %r387;
|
|
add.f32 %f1045, %f1043, 0f37000000;
|
|
selp.f32 %f223, %f1045, %f1043, %p150;
|
|
selp.f32 %f1046, %f1044, %f1040, %p150;
|
|
mov.f32 %f1047, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1048, %f1046, %f1047;
|
|
cvt.rzi.f32.f32 %f1049, %f1048;
|
|
abs.f32 %f1050, %f1049;
|
|
setp.gt.f32 %p151, %f1050, 0f42FC0000;
|
|
mov.b32 %r388, %f1049;
|
|
and.b32 %r389, %r388, -2147483648;
|
|
or.b32 %r390, %r389, 1123811328;
|
|
mov.b32 %f1051, %r390;
|
|
selp.f32 %f1052, %f1051, %f1049, %p151;
|
|
mov.f32 %f1053, 0fBF317218;
|
|
fma.rn.f32 %f1054, %f1052, %f1053, %f1046;
|
|
mov.f32 %f1055, 0f3102E308;
|
|
fma.rn.f32 %f1056, %f1052, %f1055, %f1054;
|
|
mul.f32 %f1057, %f1056, 0f3FB8AA3B;
|
|
add.f32 %f1058, %f1052, 0f4B40007F;
|
|
mov.b32 %r391, %f1058;
|
|
shl.b32 %r392, %r391, 23;
|
|
mov.b32 %f1059, %r392;
|
|
ex2.approx.ftz.f32 %f1060, %f1057;
|
|
mul.f32 %f224, %f1060, %f1059;
|
|
setp.eq.f32 %p152, %f224, 0f7F800000;
|
|
mov.f32 %f1295, 0f7F800000;
|
|
@%p152 bra $L__BB0_121;
|
|
|
|
fma.rn.f32 %f1295, %f224, %f223, %f224;
|
|
|
|
$L__BB0_121:
|
|
setp.lt.f32 %p153, %f208, 0f00000000;
|
|
and.pred %p8, %p153, %p140;
|
|
setp.eq.f32 %p155, %f208, 0f00000000;
|
|
@%p155 bra $L__BB0_125;
|
|
bra.uni $L__BB0_122;
|
|
|
|
$L__BB0_125:
|
|
add.f32 %f1065, %f208, %f208;
|
|
selp.f32 %f1297, %f1065, 0f00000000, %p140;
|
|
bra.uni $L__BB0_126;
|
|
|
|
$L__BB0_122:
|
|
mov.b32 %r393, %f1295;
|
|
xor.b32 %r394, %r393, -2147483648;
|
|
mov.b32 %f1061, %r394;
|
|
selp.f32 %f1297, %f1061, %f1295, %p8;
|
|
setp.geu.f32 %p156, %f208, 0f00000000;
|
|
@%p156 bra $L__BB0_126;
|
|
|
|
mov.f32 %f1062, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1063, %f1062;
|
|
setp.eq.f32 %p157, %f1063, 0f3ED55555;
|
|
@%p157 bra $L__BB0_126;
|
|
|
|
mov.f32 %f1297, 0f7FFFFFFF;
|
|
|
|
$L__BB0_126:
|
|
add.f32 %f1066, %f222, 0f3ED55555;
|
|
mov.b32 %r395, %f1066;
|
|
setp.lt.s32 %p159, %r395, 2139095040;
|
|
@%p159 bra $L__BB0_131;
|
|
|
|
setp.gtu.f32 %p160, %f222, 0f7F800000;
|
|
@%p160 bra $L__BB0_130;
|
|
bra.uni $L__BB0_128;
|
|
|
|
$L__BB0_130:
|
|
add.f32 %f1297, %f208, 0f3ED55555;
|
|
bra.uni $L__BB0_131;
|
|
|
|
$L__BB0_128:
|
|
setp.neu.f32 %p161, %f222, 0f7F800000;
|
|
@%p161 bra $L__BB0_131;
|
|
|
|
selp.f32 %f1297, 0fFF800000, 0f7F800000, %p8;
|
|
|
|
$L__BB0_131:
|
|
abs.f32 %f233, %f209;
|
|
setp.lt.f32 %p162, %f233, 0f00800000;
|
|
mul.f32 %f1068, %f233, 0f4B800000;
|
|
selp.f32 %f1069, %f1068, %f233, %p162;
|
|
selp.f32 %f1070, 0fC3170000, 0fC2FE0000, %p162;
|
|
mov.b32 %r396, %f1069;
|
|
and.b32 %r397, %r396, 8388607;
|
|
or.b32 %r398, %r397, 1065353216;
|
|
mov.b32 %f1071, %r398;
|
|
shr.u32 %r399, %r396, 23;
|
|
cvt.rn.f32.u32 %f1072, %r399;
|
|
add.f32 %f1073, %f1070, %f1072;
|
|
setp.gt.f32 %p163, %f1071, 0f3FB504F3;
|
|
mul.f32 %f1074, %f1071, 0f3F000000;
|
|
add.f32 %f1075, %f1073, 0f3F800000;
|
|
selp.f32 %f1076, %f1075, %f1073, %p163;
|
|
selp.f32 %f1077, %f1074, %f1071, %p163;
|
|
add.f32 %f1078, %f1077, 0fBF800000;
|
|
add.f32 %f1079, %f1077, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1080, %f1079;
|
|
add.f32 %f1081, %f1078, %f1078;
|
|
mul.f32 %f1082, %f1081, %f1080;
|
|
mul.f32 %f1083, %f1082, %f1082;
|
|
mov.f32 %f1084, 0f3C4CAF63;
|
|
mov.f32 %f1085, 0f3B18F0FE;
|
|
fma.rn.f32 %f1086, %f1085, %f1083, %f1084;
|
|
mov.f32 %f1087, 0f3DAAAABD;
|
|
fma.rn.f32 %f1088, %f1086, %f1083, %f1087;
|
|
mul.rn.f32 %f1089, %f1088, %f1083;
|
|
mul.rn.f32 %f1090, %f1089, %f1082;
|
|
sub.f32 %f1091, %f1078, %f1082;
|
|
add.f32 %f1092, %f1091, %f1091;
|
|
neg.f32 %f1093, %f1082;
|
|
fma.rn.f32 %f1094, %f1093, %f1078, %f1092;
|
|
mul.rn.f32 %f1095, %f1080, %f1094;
|
|
add.f32 %f1096, %f1090, %f1082;
|
|
sub.f32 %f1097, %f1082, %f1096;
|
|
add.f32 %f1098, %f1090, %f1097;
|
|
add.f32 %f1099, %f1095, %f1098;
|
|
add.f32 %f1100, %f1096, %f1099;
|
|
sub.f32 %f1101, %f1096, %f1100;
|
|
add.f32 %f1102, %f1099, %f1101;
|
|
mov.f32 %f1103, 0f3F317200;
|
|
mul.rn.f32 %f1104, %f1076, %f1103;
|
|
mov.f32 %f1105, 0f35BFBE8E;
|
|
mul.rn.f32 %f1106, %f1076, %f1105;
|
|
add.f32 %f1107, %f1104, %f1100;
|
|
sub.f32 %f1108, %f1104, %f1107;
|
|
add.f32 %f1109, %f1100, %f1108;
|
|
add.f32 %f1110, %f1102, %f1109;
|
|
add.f32 %f1111, %f1106, %f1110;
|
|
add.f32 %f1112, %f1107, %f1111;
|
|
sub.f32 %f1113, %f1107, %f1112;
|
|
add.f32 %f1114, %f1111, %f1113;
|
|
mov.f32 %f1115, 0f3ED55555;
|
|
mul.rn.f32 %f1116, %f1115, %f1112;
|
|
neg.f32 %f1117, %f1116;
|
|
fma.rn.f32 %f1118, %f1115, %f1112, %f1117;
|
|
fma.rn.f32 %f1119, %f1115, %f1114, %f1118;
|
|
mov.f32 %f1120, 0f00000000;
|
|
fma.rn.f32 %f1121, %f1120, %f1112, %f1119;
|
|
add.rn.f32 %f1122, %f1116, %f1121;
|
|
neg.f32 %f1123, %f1122;
|
|
add.rn.f32 %f1124, %f1116, %f1123;
|
|
add.rn.f32 %f1125, %f1124, %f1121;
|
|
mov.b32 %r400, %f1122;
|
|
setp.eq.s32 %p164, %r400, 1118925336;
|
|
add.s32 %r401, %r400, -1;
|
|
mov.b32 %f1126, %r401;
|
|
add.f32 %f1127, %f1125, 0f37000000;
|
|
selp.f32 %f234, %f1127, %f1125, %p164;
|
|
selp.f32 %f1128, %f1126, %f1122, %p164;
|
|
mov.f32 %f1129, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1130, %f1128, %f1129;
|
|
cvt.rzi.f32.f32 %f1131, %f1130;
|
|
abs.f32 %f1132, %f1131;
|
|
setp.gt.f32 %p165, %f1132, 0f42FC0000;
|
|
mov.b32 %r402, %f1131;
|
|
and.b32 %r403, %r402, -2147483648;
|
|
or.b32 %r404, %r403, 1123811328;
|
|
mov.b32 %f1133, %r404;
|
|
selp.f32 %f1134, %f1133, %f1131, %p165;
|
|
mov.f32 %f1135, 0fBF317218;
|
|
fma.rn.f32 %f1136, %f1134, %f1135, %f1128;
|
|
mov.f32 %f1137, 0f3102E308;
|
|
fma.rn.f32 %f1138, %f1134, %f1137, %f1136;
|
|
mul.f32 %f1139, %f1138, 0f3FB8AA3B;
|
|
add.f32 %f1140, %f1134, 0f4B40007F;
|
|
mov.b32 %r405, %f1140;
|
|
shl.b32 %r406, %r405, 23;
|
|
mov.b32 %f1141, %r406;
|
|
ex2.approx.ftz.f32 %f1142, %f1139;
|
|
mul.f32 %f235, %f1142, %f1141;
|
|
setp.eq.f32 %p166, %f235, 0f7F800000;
|
|
mov.f32 %f1298, 0f7F800000;
|
|
@%p166 bra $L__BB0_133;
|
|
|
|
fma.rn.f32 %f1298, %f235, %f234, %f235;
|
|
|
|
$L__BB0_133:
|
|
setp.lt.f32 %p167, %f209, 0f00000000;
|
|
and.pred %p9, %p167, %p140;
|
|
setp.eq.f32 %p169, %f209, 0f00000000;
|
|
@%p169 bra $L__BB0_137;
|
|
bra.uni $L__BB0_134;
|
|
|
|
$L__BB0_137:
|
|
add.f32 %f1147, %f209, %f209;
|
|
selp.f32 %f1300, %f1147, 0f00000000, %p140;
|
|
bra.uni $L__BB0_138;
|
|
|
|
$L__BB0_134:
|
|
mov.b32 %r407, %f1298;
|
|
xor.b32 %r408, %r407, -2147483648;
|
|
mov.b32 %f1143, %r408;
|
|
selp.f32 %f1300, %f1143, %f1298, %p9;
|
|
setp.geu.f32 %p170, %f209, 0f00000000;
|
|
@%p170 bra $L__BB0_138;
|
|
|
|
mov.f32 %f1144, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1145, %f1144;
|
|
setp.eq.f32 %p171, %f1145, 0f3ED55555;
|
|
@%p171 bra $L__BB0_138;
|
|
|
|
mov.f32 %f1300, 0f7FFFFFFF;
|
|
|
|
$L__BB0_138:
|
|
add.f32 %f1148, %f233, 0f3ED55555;
|
|
mov.b32 %r409, %f1148;
|
|
setp.lt.s32 %p173, %r409, 2139095040;
|
|
@%p173 bra $L__BB0_143;
|
|
|
|
setp.gtu.f32 %p174, %f233, 0f7F800000;
|
|
@%p174 bra $L__BB0_142;
|
|
bra.uni $L__BB0_140;
|
|
|
|
$L__BB0_142:
|
|
add.f32 %f1300, %f209, 0f3ED55555;
|
|
bra.uni $L__BB0_143;
|
|
|
|
$L__BB0_140:
|
|
setp.neu.f32 %p175, %f233, 0f7F800000;
|
|
@%p175 bra $L__BB0_143;
|
|
|
|
selp.f32 %f1300, 0fFF800000, 0f7F800000, %p9;
|
|
|
|
$L__BB0_143:
|
|
fma.rn.f32 %f1149, %f1294, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p176, %f207, 0f3F800000;
|
|
mov.f32 %f1150, 0f3F800000;
|
|
selp.f32 %f1151, 0f3F7FFFFF, %f1149, %p176;
|
|
mul.f32 %f1152, %f207, 0f414EB852;
|
|
setp.lt.f32 %p177, %f207, 0f3B4D2E1C;
|
|
selp.f32 %f1153, %f1152, %f1151, %p177;
|
|
fma.rn.f32 %f1154, %f1297, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p178, %f208, 0f3F800000;
|
|
selp.f32 %f1155, 0f3F7FFFFF, %f1154, %p178;
|
|
mul.f32 %f1156, %f208, 0f414EB852;
|
|
setp.lt.f32 %p179, %f208, 0f3B4D2E1C;
|
|
selp.f32 %f1157, %f1156, %f1155, %p179;
|
|
fma.rn.f32 %f1158, %f1300, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p180, %f209, 0f3F800000;
|
|
selp.f32 %f1159, 0f3F7FFFFF, %f1158, %p180;
|
|
mul.f32 %f1160, %f209, 0f414EB852;
|
|
setp.lt.f32 %p181, %f209, 0f3B4D2E1C;
|
|
selp.f32 %f1161, %f1160, %f1159, %p181;
|
|
min.f32 %f1162, %f1153, %f1150;
|
|
mov.f32 %f1163, 0f00000000;
|
|
max.f32 %f1164, %f1163, %f1162;
|
|
mul.f32 %f1165, %f1164, 0f43800000;
|
|
cvt.rzi.u32.f32 %r410, %f1165;
|
|
min.u32 %r411, %r410, 255;
|
|
min.f32 %f1166, %f1157, %f1150;
|
|
max.f32 %f1167, %f1163, %f1166;
|
|
mul.f32 %f1168, %f1167, 0f43800000;
|
|
cvt.rzi.u32.f32 %r412, %f1168;
|
|
min.u32 %r413, %r412, 255;
|
|
min.f32 %f1169, %f1161, %f1150;
|
|
max.f32 %f1170, %f1163, %f1169;
|
|
mul.f32 %f1171, %f1170, 0f43800000;
|
|
cvt.rzi.u32.f32 %r414, %f1171;
|
|
min.u32 %r415, %r414, 255;
|
|
shl.b64 %rd72, %rd22, 2;
|
|
add.s64 %rd73, %rd21, %rd72;
|
|
cvt.u16.u32 %rs18, %r415;
|
|
cvt.u16.u32 %rs19, %r413;
|
|
cvt.u16.u32 %rs20, %r411;
|
|
mov.u16 %rs21, 255;
|
|
st.global.v4.u8 [%rd73], {%rs20, %rs19, %rs18, %rs21};
|
|
|
|
$L__BB0_144:
|
|
and.b32 %r416, %r56, 4;
|
|
setp.eq.s32 %p182, %r416, 0;
|
|
@%p182 bra $L__BB0_148;
|
|
|
|
ld.const.u32 %r417, [params+108];
|
|
setp.eq.s32 %p183, %r417, 0;
|
|
ld.const.u64 %rd74, [params+224];
|
|
cvta.to.global.u64 %rd75, %rd74;
|
|
ld.const.u32 %r418, [params+216];
|
|
mad.lo.s32 %r419, %r418, %r7, %r6;
|
|
mul.wide.u32 %rd76, %r419, 8;
|
|
add.s64 %rd23, %rd75, %rd76;
|
|
@%p183 bra $L__BB0_147;
|
|
|
|
ld.global.v4.u16 {%rs29, %rs30, %rs31, %rs32}, [%rd23];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1172, %rs29;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1173, %rs30;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1174, %rs31;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1175, %f168, %f1172;
|
|
add.f32 %f1176, %f169, %f1173;
|
|
add.f32 %f1177, %f170, %f1174;
|
|
mov.f32 %f1178, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs27, %f1177;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs26, %f1176;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs25, %f1175;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs28, %f1178;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd23], {%rs25, %rs26, %rs27, %rs28};
|
|
bra.uni $L__BB0_148;
|
|
|
|
$L__BB0_147:
|
|
mov.f32 %f1182, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs36, %f1182;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs35, %f170;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs34, %f169;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs33, %f168;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd23], {%rs33, %rs34, %rs35, %rs36};
|
|
|
|
$L__BB0_148:
|
|
and.b32 %r420, %r56, 64;
|
|
setp.eq.s32 %p184, %r420, 0;
|
|
@%p184 bra $L__BB0_160;
|
|
|
|
mul.f32 %f1183, %f1229, %f1229;
|
|
fma.rn.f32 %f1184, %f1228, %f1228, %f1183;
|
|
fma.rn.f32 %f1185, %f1230, %f1230, %f1184;
|
|
sqrt.rn.f32 %f1186, %f1185;
|
|
rcp.rn.f32 %f1187, %f1186;
|
|
mul.f32 %f1188, %f1228, %f1187;
|
|
mul.f32 %f1189, %f1229, %f1187;
|
|
mul.f32 %f1190, %f1230, %f1187;
|
|
ld.const.u64 %rd77, [params+208];
|
|
cvta.to.global.u64 %rd78, %rd77;
|
|
ld.const.u32 %r421, [params+200];
|
|
mad.lo.s32 %r422, %r421, %r7, %r6;
|
|
fma.rn.f32 %f1191, %f1188, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f1192, %f1191, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r423, %f1192;
|
|
fma.rn.f32 %f1193, %f1189, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f1194, %f1193, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r424, %f1194;
|
|
fma.rn.f32 %f1195, %f1190, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f1196, %f1195, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r425, %f1196;
|
|
mul.wide.u32 %rd79, %r422, 4;
|
|
add.s64 %rd80, %rd78, %rd79;
|
|
cvt.u16.u32 %rs37, %r425;
|
|
cvt.u16.u32 %rs38, %r424;
|
|
cvt.u16.u32 %rs39, %r423;
|
|
mov.u16 %rs40, 255;
|
|
st.global.v4.u8 [%rd80], {%rs39, %rs38, %rs37, %rs40};
|
|
|
|
$L__BB0_160:
|
|
ret;
|
|
|
|
}
|
|
|