1674 lines
46 KiB
Plaintext
1674 lines
46 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-31968024
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// Cuda compilation tools, release 12.0, V12.0.76
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// Based on NVVM 7.0.1
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//
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.version 8.0
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.target sm_52
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.address_size 64
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// .globl __raygen__oxMain
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.const .align 16 .b8 params[1184];
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.global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
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.visible .entry __raygen__oxMain()
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{
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.local .align 4 .b8 __local_depot0[28];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<146>;
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.reg .b16 %rs<52>;
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.reg .f32 %f<926>;
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.reg .b32 %r<323>;
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.reg .f64 %fd<5>;
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.reg .b64 %rd<78>;
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mov.u64 %SPL, __local_depot0;
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add.u64 %rd1, %SPL, 0;
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// begin inline asm
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call (%r51), _optix_get_launch_index_x, ();
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// end inline asm
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// begin inline asm
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call (%r52), _optix_get_launch_index_y, ();
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// end inline asm
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ld.const.u32 %r3, [params+540];
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ld.const.u64 %rd22, [params+400];
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cvta.to.global.u64 %rd23, %rd22;
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ld.const.u32 %r57, [params+392];
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mad.lo.s32 %r58, %r57, %r52, %r51;
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mul.wide.u32 %rd24, %r58, 4;
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add.s64 %rd2, %rd23, %rd24;
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ld.global.v2.u8 {%rs7, %rs51}, [%rd2];
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or.b16 %rs9, %rs7, %rs51;
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and.b16 %rs10, %rs9, 255;
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setp.eq.s16 %p7, %rs10, 0;
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@%p7 bra $L__BB0_2;
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ld.global.u8 %rs50, [%rd2+2];
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bra.uni $L__BB0_3;
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$L__BB0_2:
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ld.global.u8 %rs50, [%rd2+2];
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setp.eq.s16 %p8, %rs50, 0;
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mov.f32 %f887, 0f00000000;
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mov.u16 %rs51, 0;
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mov.f32 %f888, %f887;
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mov.f32 %f889, %f887;
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@%p8 bra $L__BB0_4;
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$L__BB0_3:
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cvt.rn.f32.u16 %f146, %rs7;
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div.rn.f32 %f147, %f146, 0f437F0000;
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fma.rn.f32 %f148, %f147, 0f40000000, 0fBF800000;
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and.b16 %rs13, %rs51, 255;
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cvt.rn.f32.u16 %f149, %rs13;
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div.rn.f32 %f150, %f149, 0f437F0000;
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fma.rn.f32 %f151, %f150, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f152, %rs50;
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div.rn.f32 %f153, %f152, 0f437F0000;
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fma.rn.f32 %f154, %f153, 0f40000000, 0fBF800000;
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mul.f32 %f155, %f151, %f151;
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fma.rn.f32 %f156, %f148, %f148, %f155;
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fma.rn.f32 %f157, %f154, %f154, %f156;
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sqrt.rn.f32 %f158, %f157;
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rcp.rn.f32 %f159, %f158;
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mul.f32 %f889, %f159, %f154;
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mul.f32 %f888, %f159, %f151;
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mul.f32 %f887, %f148, %f159;
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$L__BB0_4:
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ld.const.v2.u32 {%r59, %r60}, [params];
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add.s32 %r4, %r59, %r51;
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add.s32 %r5, %r60, %r52;
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setp.eq.f32 %p9, %f887, 0f00000000;
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setp.eq.f32 %p10, %f888, 0f00000000;
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and.pred %p11, %p9, %p10;
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setp.eq.f32 %p12, %f889, 0f00000000;
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and.pred %p13, %p12, %p11;
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@%p13 bra $L__BB0_114;
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bra.uni $L__BB0_5;
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$L__BB0_114:
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ld.const.u32 %r50, [params+104];
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and.b32 %r302, %r50, 1;
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setp.eq.b32 %p140, %r302, 1;
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mov.pred %p141, 0;
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xor.pred %p142, %p140, %p141;
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not.pred %p143, %p142;
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@%p143 bra $L__BB0_116;
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ld.const.u64 %rd63, [params+144];
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cvta.to.global.u64 %rd64, %rd63;
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ld.const.u32 %r303, [params+136];
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mad.lo.s32 %r304, %r303, %r5, %r4;
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mul.wide.u32 %rd65, %r304, 4;
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add.s64 %rd66, %rd64, %rd65;
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mov.u16 %rs34, 0;
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st.global.v4.u8 [%rd66], {%rs34, %rs34, %rs34, %rs34};
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$L__BB0_116:
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and.b32 %r305, %r50, 4;
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setp.eq.s32 %p144, %r305, 0;
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@%p144 bra $L__BB0_120;
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ld.const.u32 %r306, [params+108];
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setp.eq.s32 %p145, %r306, 0;
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ld.const.u64 %rd67, [params+224];
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cvta.to.global.u64 %rd68, %rd67;
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ld.const.u32 %r307, [params+216];
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mad.lo.s32 %r308, %r307, %r5, %r4;
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mul.wide.u32 %rd69, %r308, 8;
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add.s64 %rd20, %rd68, %rd69;
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@%p145 bra $L__BB0_119;
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ld.global.v4.u16 {%rs41, %rs42, %rs43, %rs44}, [%rd20];
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// begin inline asm
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{ cvt.f32.f16 %f835, %rs41;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f836, %rs42;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f837, %rs43;}
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// end inline asm
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add.f32 %f838, %f835, 0f00000000;
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add.f32 %f839, %f836, 0f00000000;
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add.f32 %f840, %f837, 0f00000000;
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// begin inline asm
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{ cvt.rn.f16.f32 %rs40, %f840;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs39, %f839;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs38, %f838;}
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// end inline asm
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mov.u16 %rs45, 0;
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st.global.v4.u16 [%rd20], {%rs38, %rs39, %rs40, %rs45};
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bra.uni $L__BB0_120;
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$L__BB0_5:
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ld.const.u64 %rd25, [params+432];
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cvta.to.global.u64 %rd26, %rd25;
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ld.const.u32 %r63, [params+424];
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mad.lo.s32 %r64, %r63, %r52, %r51;
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mul.wide.u32 %rd27, %r64, 12;
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add.s64 %rd28, %rd26, %rd27;
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ld.global.f32 %f163, [%rd28];
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mul.f32 %f164, %f163, 0f3456BF95;
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ld.global.f32 %f165, [%rd28+4];
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mul.f32 %f166, %f165, 0f3456BF95;
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ld.global.f32 %f167, [%rd28+8];
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mul.f32 %f168, %f167, 0f3456BF95;
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abs.f32 %f169, %f887;
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div.rn.f32 %f170, %f164, %f169;
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abs.f32 %f171, %f888;
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div.rn.f32 %f172, %f166, %f171;
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abs.f32 %f173, %f889;
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div.rn.f32 %f174, %f168, %f173;
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abs.f32 %f175, %f170;
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abs.f32 %f176, %f172;
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abs.f32 %f177, %f174;
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mov.f32 %f178, 0f38D1B717;
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max.f32 %f179, %f175, %f178;
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max.f32 %f180, %f176, %f178;
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max.f32 %f181, %f177, %f178;
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fma.rn.f32 %f10, %f887, %f179, %f163;
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fma.rn.f32 %f11, %f888, %f180, %f165;
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fma.rn.f32 %f12, %f889, %f181, %f167;
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setp.gt.f32 %p14, %f169, %f173;
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neg.f32 %f182, %f888;
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selp.f32 %f183, %f182, 0f00000000, %p14;
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mov.f32 %f902, 0f00000000;
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neg.f32 %f184, %f889;
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selp.f32 %f185, %f887, %f184, %p14;
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selp.f32 %f186, 0f00000000, %f888, %p14;
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mul.f32 %f187, %f185, %f185;
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fma.rn.f32 %f188, %f183, %f183, %f187;
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fma.rn.f32 %f189, %f186, %f186, %f188;
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sqrt.rn.f32 %f190, %f189;
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rcp.rn.f32 %f191, %f190;
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mul.f32 %f13, %f183, %f191;
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mul.f32 %f14, %f185, %f191;
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mul.f32 %f15, %f186, %f191;
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ld.const.u64 %rd29, [params+128];
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cvta.to.global.u64 %rd30, %rd29;
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ld.const.u32 %r65, [params+120];
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mad.lo.s32 %r66, %r65, %r52, %r51;
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mul.wide.u32 %rd31, %r66, 4;
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add.s64 %rd3, %rd30, %rd31;
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setp.lt.s32 %p15, %r3, 1;
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mov.f32 %f903, %f902;
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mov.f32 %f904, %f902;
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@%p15 bra $L__BB0_36;
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ld.const.u32 %r6, [params+588];
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cvt.rn.f32.s32 %f195, %r3;
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rcp.rn.f32 %f16, %f195;
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ld.global.u32 %r315, [%rd3];
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mul.f32 %f17, %f10, 0f3456BF95;
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mul.f32 %f18, %f11, 0f3456BF95;
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mul.f32 %f19, %f12, 0f3456BF95;
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ld.const.u64 %rd4, [params+592];
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ld.const.u64 %rd5, [params+96];
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mul.f32 %f196, %f887, %f14;
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mul.f32 %f197, %f888, %f13;
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sub.f32 %f20, %f197, %f196;
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mul.f32 %f198, %f889, %f13;
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mul.f32 %f199, %f887, %f15;
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sub.f32 %f21, %f199, %f198;
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mul.f32 %f200, %f888, %f15;
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mul.f32 %f201, %f889, %f14;
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sub.f32 %f22, %f201, %f200;
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mov.u32 %r67, 0;
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add.s64 %rd6, %rd1, 24;
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abs.f32 %f268, %f17;
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abs.f32 %f269, %f18;
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max.f32 %f270, %f268, %f269;
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abs.f32 %f271, %f19;
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max.f32 %f272, %f270, %f271;
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mov.u32 %r312, %r67;
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$L__BB0_7:
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cvt.rn.f32.s32 %f26, %r312;
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mov.u32 %r314, %r67;
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$L__BB0_8:
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mad.lo.s32 %r69, %r315, 1664525, 1013904223;
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and.b32 %r70, %r69, 16777215;
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cvt.rn.f32.u32 %f202, %r70;
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fma.rn.f32 %f203, %f202, 0f33800000, %f26;
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mul.f32 %f204, %f16, %f203;
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mad.lo.s32 %r315, %r69, 1664525, 1013904223;
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and.b32 %r71, %r315, 16777215;
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cvt.rn.f32.u32 %f205, %r71;
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cvt.rn.f32.s32 %f206, %r314;
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fma.rn.f32 %f207, %f205, 0f33800000, %f206;
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mul.f32 %f208, %f16, %f207;
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sqrt.rn.f32 %f30, %f204;
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mul.f32 %f31, %f208, 0f40C90FDB;
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mul.f32 %f209, %f31, 0f3F22F983;
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cvt.rni.s32.f32 %r322, %f209;
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cvt.rn.f32.s32 %f210, %r322;
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mov.f32 %f211, 0fBFC90FDA;
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fma.rn.f32 %f212, %f210, %f211, %f31;
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mov.f32 %f213, 0fB3A22168;
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fma.rn.f32 %f214, %f210, %f213, %f212;
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mov.f32 %f215, 0fA7C234C5;
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fma.rn.f32 %f899, %f210, %f215, %f214;
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abs.f32 %f33, %f31;
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setp.ltu.f32 %p16, %f33, 0f47CE4780;
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mov.u32 %r319, %r322;
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mov.f32 %f896, %f899;
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@%p16 bra $L__BB0_16;
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setp.eq.f32 %p17, %f33, 0f7F800000;
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@%p17 bra $L__BB0_15;
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bra.uni $L__BB0_10;
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$L__BB0_15:
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mov.f32 %f218, 0f00000000;
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mul.rn.f32 %f896, %f31, %f218;
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mov.u32 %r319, 0;
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bra.uni $L__BB0_16;
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$L__BB0_10:
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mov.b32 %r14, %f31;
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bfe.u32 %r73, %r14, 23, 8;
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add.s32 %r15, %r73, -128;
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shl.b32 %r74, %r14, 8;
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or.b32 %r16, %r74, -2147483648;
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shr.u32 %r17, %r15, 5;
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mov.u64 %rd75, 0;
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mov.u32 %r316, 0;
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mov.u64 %rd74, __cudart_i2opi_f;
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mov.u64 %rd73, %rd1;
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$L__BB0_11:
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.pragma "nounroll";
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ld.global.nc.u32 %r75, [%rd74];
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mad.wide.u32 %rd34, %r75, %r16, %rd75;
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shr.u64 %rd75, %rd34, 32;
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st.local.u32 [%rd73], %rd34;
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add.s64 %rd74, %rd74, 4;
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add.s64 %rd73, %rd73, 4;
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add.s32 %r316, %r316, 1;
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setp.ne.s32 %p18, %r316, 6;
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@%p18 bra $L__BB0_11;
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st.local.u32 [%rd6], %rd75;
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mov.u32 %r76, 4;
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sub.s32 %r20, %r76, %r17;
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mov.u32 %r77, 6;
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sub.s32 %r78, %r77, %r17;
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mul.wide.s32 %rd35, %r78, 4;
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add.s64 %rd36, %rd1, %rd35;
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ld.local.u32 %r317, [%rd36];
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ld.local.u32 %r318, [%rd36+-4];
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and.b32 %r23, %r15, 31;
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setp.eq.s32 %p19, %r23, 0;
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@%p19 bra $L__BB0_14;
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mov.u32 %r79, 32;
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sub.s32 %r80, %r79, %r23;
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shr.u32 %r81, %r318, %r80;
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shl.b32 %r82, %r317, %r23;
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add.s32 %r317, %r81, %r82;
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mul.wide.s32 %rd37, %r20, 4;
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add.s64 %rd38, %rd1, %rd37;
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ld.local.u32 %r83, [%rd38];
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shr.u32 %r84, %r83, %r80;
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shl.b32 %r85, %r318, %r23;
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add.s32 %r318, %r84, %r85;
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$L__BB0_14:
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and.b32 %r86, %r14, -2147483648;
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shr.u32 %r87, %r318, 30;
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shl.b32 %r88, %r317, 2;
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or.b32 %r89, %r87, %r88;
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shr.u32 %r90, %r89, 31;
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shr.u32 %r91, %r317, 30;
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add.s32 %r92, %r90, %r91;
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neg.s32 %r93, %r92;
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setp.eq.s32 %p20, %r86, 0;
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selp.b32 %r319, %r92, %r93, %p20;
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setp.ne.s32 %p21, %r90, 0;
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xor.b32 %r94, %r86, -2147483648;
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selp.b32 %r95, %r94, %r86, %p21;
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selp.b32 %r96, -1, 0, %p21;
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xor.b32 %r97, %r89, %r96;
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shl.b32 %r98, %r318, 2;
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xor.b32 %r99, %r98, %r96;
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cvt.u64.u32 %rd39, %r97;
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cvt.u64.u32 %rd40, %r99;
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bfi.b64 %rd41, %rd39, %rd40, 32, 32;
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cvt.rn.f64.s64 %fd1, %rd41;
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mul.f64 %fd2, %fd1, 0d3BF921FB54442D19;
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cvt.rn.f32.f64 %f216, %fd2;
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setp.eq.s32 %p22, %r95, 0;
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neg.f32 %f217, %f216;
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selp.f32 %f896, %f216, %f217, %p22;
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$L__BB0_16:
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add.s32 %r30, %r319, 1;
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and.b32 %r31, %r30, 1;
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setp.eq.s32 %p23, %r31, 0;
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selp.f32 %f37, %f896, 0f3F800000, %p23;
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mul.rn.f32 %f38, %f896, %f896;
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mov.f32 %f897, 0fB94D4153;
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@%p23 bra $L__BB0_18;
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mov.f32 %f220, 0fBAB607ED;
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mov.f32 %f221, 0f37CBAC00;
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fma.rn.f32 %f897, %f221, %f38, %f220;
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$L__BB0_18:
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selp.f32 %f222, 0f3C0885E4, 0f3D2AAABB, %p23;
|
|
fma.rn.f32 %f223, %f897, %f38, %f222;
|
|
selp.f32 %f224, 0fBE2AAAA8, 0fBEFFFFFF, %p23;
|
|
fma.rn.f32 %f225, %f223, %f38, %f224;
|
|
mov.f32 %f226, 0f00000000;
|
|
fma.rn.f32 %f227, %f38, %f37, %f226;
|
|
fma.rn.f32 %f898, %f225, %f227, %f37;
|
|
and.b32 %r101, %r30, 2;
|
|
setp.eq.s32 %p25, %r101, 0;
|
|
@%p25 bra $L__BB0_20;
|
|
|
|
mov.f32 %f229, 0fBF800000;
|
|
fma.rn.f32 %f898, %f898, %f229, %f226;
|
|
|
|
$L__BB0_20:
|
|
@%p16 bra $L__BB0_28;
|
|
|
|
setp.eq.f32 %p27, %f33, 0f7F800000;
|
|
@%p27 bra $L__BB0_27;
|
|
bra.uni $L__BB0_22;
|
|
|
|
$L__BB0_27:
|
|
mov.f32 %f232, 0f00000000;
|
|
mul.rn.f32 %f899, %f31, %f232;
|
|
mov.u32 %r322, 0;
|
|
bra.uni $L__BB0_28;
|
|
|
|
$L__BB0_22:
|
|
mov.b32 %r32, %f31;
|
|
bfe.u32 %r102, %r32, 23, 8;
|
|
add.s32 %r33, %r102, -128;
|
|
shl.b32 %r103, %r32, 8;
|
|
or.b32 %r34, %r103, -2147483648;
|
|
shr.u32 %r35, %r33, 5;
|
|
mov.u64 %rd76, 0;
|
|
mov.u64 %rd77, %rd76;
|
|
|
|
$L__BB0_23:
|
|
.pragma "nounroll";
|
|
shl.b64 %rd44, %rd76, 2;
|
|
mov.u64 %rd45, __cudart_i2opi_f;
|
|
add.s64 %rd46, %rd45, %rd44;
|
|
ld.global.nc.u32 %r104, [%rd46];
|
|
mad.wide.u32 %rd47, %r104, %r34, %rd77;
|
|
shr.u64 %rd77, %rd47, 32;
|
|
add.s64 %rd48, %rd1, %rd44;
|
|
st.local.u32 [%rd48], %rd47;
|
|
cvt.u32.u64 %r105, %rd76;
|
|
add.s32 %r106, %r105, 1;
|
|
cvt.s64.s32 %rd76, %r106;
|
|
setp.ne.s32 %p28, %r106, 6;
|
|
@%p28 bra $L__BB0_23;
|
|
|
|
st.local.u32 [%rd6], %rd77;
|
|
mov.u32 %r107, 4;
|
|
sub.s32 %r36, %r107, %r35;
|
|
mov.u32 %r108, 6;
|
|
sub.s32 %r109, %r108, %r35;
|
|
mul.wide.s32 %rd49, %r109, 4;
|
|
add.s64 %rd50, %rd1, %rd49;
|
|
ld.local.u32 %r320, [%rd50];
|
|
ld.local.u32 %r321, [%rd50+-4];
|
|
and.b32 %r39, %r33, 31;
|
|
setp.eq.s32 %p29, %r39, 0;
|
|
@%p29 bra $L__BB0_26;
|
|
|
|
mov.u32 %r110, 32;
|
|
sub.s32 %r111, %r110, %r39;
|
|
shr.u32 %r112, %r321, %r111;
|
|
shl.b32 %r113, %r320, %r39;
|
|
add.s32 %r320, %r112, %r113;
|
|
mul.wide.s32 %rd51, %r36, 4;
|
|
add.s64 %rd52, %rd1, %rd51;
|
|
ld.local.u32 %r114, [%rd52];
|
|
shr.u32 %r115, %r114, %r111;
|
|
shl.b32 %r116, %r321, %r39;
|
|
add.s32 %r321, %r115, %r116;
|
|
|
|
$L__BB0_26:
|
|
and.b32 %r117, %r32, -2147483648;
|
|
shr.u32 %r118, %r321, 30;
|
|
shl.b32 %r119, %r320, 2;
|
|
or.b32 %r120, %r118, %r119;
|
|
shr.u32 %r121, %r120, 31;
|
|
shr.u32 %r122, %r320, 30;
|
|
add.s32 %r123, %r121, %r122;
|
|
neg.s32 %r124, %r123;
|
|
setp.eq.s32 %p30, %r117, 0;
|
|
selp.b32 %r322, %r123, %r124, %p30;
|
|
setp.ne.s32 %p31, %r121, 0;
|
|
xor.b32 %r125, %r117, -2147483648;
|
|
selp.b32 %r126, %r125, %r117, %p31;
|
|
selp.b32 %r127, -1, 0, %p31;
|
|
xor.b32 %r128, %r120, %r127;
|
|
shl.b32 %r129, %r321, 2;
|
|
xor.b32 %r130, %r129, %r127;
|
|
cvt.u64.u32 %rd53, %r128;
|
|
cvt.u64.u32 %rd54, %r130;
|
|
bfi.b64 %rd55, %rd53, %rd54, 32, 32;
|
|
cvt.rn.f64.s64 %fd3, %rd55;
|
|
mul.f64 %fd4, %fd3, 0d3BF921FB54442D19;
|
|
cvt.rn.f32.f64 %f230, %fd4;
|
|
setp.eq.s32 %p32, %r126, 0;
|
|
neg.f32 %f231, %f230;
|
|
selp.f32 %f899, %f230, %f231, %p32;
|
|
|
|
$L__BB0_28:
|
|
mul.f32 %f47, %f30, %f898;
|
|
and.b32 %r46, %r322, 1;
|
|
setp.eq.s32 %p33, %r46, 0;
|
|
selp.f32 %f48, %f899, 0f3F800000, %p33;
|
|
mul.rn.f32 %f49, %f899, %f899;
|
|
mov.f32 %f900, 0fB94D4153;
|
|
@%p33 bra $L__BB0_30;
|
|
|
|
mov.f32 %f234, 0fBAB607ED;
|
|
mov.f32 %f235, 0f37CBAC00;
|
|
fma.rn.f32 %f900, %f235, %f49, %f234;
|
|
|
|
$L__BB0_30:
|
|
selp.f32 %f236, 0f3C0885E4, 0f3D2AAABB, %p33;
|
|
fma.rn.f32 %f237, %f900, %f49, %f236;
|
|
selp.f32 %f238, 0fBE2AAAA8, 0fBEFFFFFF, %p33;
|
|
fma.rn.f32 %f239, %f237, %f49, %f238;
|
|
mov.f32 %f240, 0f00000000;
|
|
fma.rn.f32 %f241, %f49, %f48, %f240;
|
|
fma.rn.f32 %f901, %f239, %f241, %f48;
|
|
and.b32 %r132, %r322, 2;
|
|
setp.eq.s32 %p35, %r132, 0;
|
|
@%p35 bra $L__BB0_32;
|
|
|
|
mov.f32 %f243, 0fBF800000;
|
|
fma.rn.f32 %f901, %f901, %f243, %f240;
|
|
|
|
$L__BB0_32:
|
|
mul.f32 %f244, %f47, %f47;
|
|
mov.f32 %f245, 0f3F800000;
|
|
sub.f32 %f246, %f245, %f244;
|
|
mul.f32 %f247, %f30, %f901;
|
|
mul.f32 %f248, %f247, %f247;
|
|
sub.f32 %f249, %f246, %f248;
|
|
max.f32 %f251, %f240, %f249;
|
|
sqrt.rn.f32 %f252, %f251;
|
|
mul.f32 %f253, %f13, %f247;
|
|
mul.f32 %f254, %f14, %f247;
|
|
mul.f32 %f255, %f15, %f247;
|
|
fma.rn.f32 %f256, %f22, %f47, %f253;
|
|
fma.rn.f32 %f257, %f21, %f47, %f254;
|
|
fma.rn.f32 %f258, %f20, %f47, %f255;
|
|
fma.rn.f32 %f55, %f887, %f252, %f256;
|
|
fma.rn.f32 %f56, %f888, %f252, %f257;
|
|
fma.rn.f32 %f57, %f889, %f252, %f258;
|
|
setp.leu.f32 %p36, %f56, 0f00000000;
|
|
setp.ne.s32 %p37, %r6, 0;
|
|
and.pred %p38, %p37, %p36;
|
|
@%p38 bra $L__BB0_34;
|
|
|
|
mov.f32 %f273, 0f38D1B717;
|
|
max.f32 %f265, %f272, %f273;
|
|
neg.f32 %f274, %f55;
|
|
neg.f32 %f275, %f56;
|
|
neg.f32 %f276, %f57;
|
|
tex.cube.v4.f32.f32 {%f277, %f278, %f279, %f280}, [%rd4, {%f276, %f275, %f274, %f274}];
|
|
mov.b32 %r172, %f277;
|
|
mov.b32 %r173, %f278;
|
|
mov.b32 %r174, %f279;
|
|
mov.f32 %f266, 0f6C4ECB8F;
|
|
mov.f32 %f267, 0f00000000;
|
|
mov.u32 %r169, 2;
|
|
mov.u32 %r170, 1;
|
|
mov.u32 %r171, 3;
|
|
mov.u32 %r203, 0;
|
|
// begin inline asm
|
|
call(%r133,%r134,%r135,%r136,%r137,%r138,%r139,%r140,%r141,%r142,%r143,%r144,%r145,%r146,%r147,%r148,%r149,%r150,%r151,%r152,%r153,%r154,%r155,%r156,%r157,%r158,%r159,%r160,%r161,%r162,%r163,%r164),_optix_trace_typed_32,(%r203,%rd5,%f10,%f11,%f12,%f55,%f56,%f57,%f265,%f266,%f267,%r170,%r203,%r170,%r169,%r170,%r171,%r172,%r173,%r174,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203,%r203);
|
|
// end inline asm
|
|
mov.b32 %f281, %r133;
|
|
mov.b32 %f282, %r134;
|
|
mov.b32 %f283, %r135;
|
|
add.f32 %f902, %f902, %f281;
|
|
add.f32 %f903, %f903, %f282;
|
|
add.f32 %f904, %f904, %f283;
|
|
|
|
$L__BB0_34:
|
|
add.s32 %r314, %r314, 1;
|
|
setp.lt.s32 %p39, %r314, %r3;
|
|
@%p39 bra $L__BB0_8;
|
|
|
|
add.s32 %r312, %r312, 1;
|
|
setp.lt.s32 %p40, %r312, %r3;
|
|
@%p40 bra $L__BB0_7;
|
|
|
|
$L__BB0_36:
|
|
mul.lo.s32 %r204, %r3, %r3;
|
|
cvt.rn.f32.s32 %f284, %r204;
|
|
rcp.rn.f32 %f285, %f284;
|
|
mul.f32 %f286, %f285, %f902;
|
|
mul.f32 %f287, %f285, %f903;
|
|
mul.f32 %f288, %f285, %f904;
|
|
ld.const.v4.f32 {%f289, %f290, %f291, %f292}, [params+576];
|
|
mul.f32 %f67, %f286, %f289;
|
|
mul.f32 %f68, %f287, %f290;
|
|
mul.f32 %f69, %f288, %f291;
|
|
ld.const.u32 %r49, [params+104];
|
|
and.b32 %r205, %r49, 1;
|
|
setp.eq.b32 %p41, %r205, 1;
|
|
mov.pred %p42, 0;
|
|
xor.pred %p43, %p41, %p42;
|
|
not.pred %p44, %p43;
|
|
@%p44 bra $L__BB0_110;
|
|
|
|
mov.f32 %f297, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f298, %f297;
|
|
add.f32 %f299, %f298, %f298;
|
|
mov.f32 %f300, 0f3EE66666;
|
|
sub.f32 %f301, %f300, %f299;
|
|
abs.f32 %f70, %f301;
|
|
abs.f32 %f71, %f67;
|
|
setp.lt.f32 %p45, %f71, 0f00800000;
|
|
mul.f32 %f302, %f71, 0f4B800000;
|
|
selp.f32 %f303, %f302, %f71, %p45;
|
|
selp.f32 %f304, 0fC3170000, 0fC2FE0000, %p45;
|
|
mov.b32 %r206, %f303;
|
|
and.b32 %r207, %r206, 8388607;
|
|
or.b32 %r208, %r207, 1065353216;
|
|
mov.b32 %f305, %r208;
|
|
shr.u32 %r209, %r206, 23;
|
|
cvt.rn.f32.u32 %f306, %r209;
|
|
add.f32 %f307, %f304, %f306;
|
|
setp.gt.f32 %p46, %f305, 0f3FB504F3;
|
|
mul.f32 %f308, %f305, 0f3F000000;
|
|
add.f32 %f309, %f307, 0f3F800000;
|
|
selp.f32 %f310, %f309, %f307, %p46;
|
|
selp.f32 %f311, %f308, %f305, %p46;
|
|
add.f32 %f312, %f311, 0fBF800000;
|
|
add.f32 %f313, %f311, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f314, %f313;
|
|
add.f32 %f315, %f312, %f312;
|
|
mul.f32 %f316, %f315, %f314;
|
|
mul.f32 %f317, %f316, %f316;
|
|
mov.f32 %f318, 0f3C4CAF63;
|
|
mov.f32 %f319, 0f3B18F0FE;
|
|
fma.rn.f32 %f320, %f319, %f317, %f318;
|
|
mov.f32 %f321, 0f3DAAAABD;
|
|
fma.rn.f32 %f322, %f320, %f317, %f321;
|
|
mul.rn.f32 %f323, %f322, %f317;
|
|
mul.rn.f32 %f324, %f323, %f316;
|
|
sub.f32 %f325, %f312, %f316;
|
|
add.f32 %f326, %f325, %f325;
|
|
neg.f32 %f327, %f316;
|
|
fma.rn.f32 %f328, %f327, %f312, %f326;
|
|
mul.rn.f32 %f329, %f314, %f328;
|
|
add.f32 %f330, %f324, %f316;
|
|
sub.f32 %f331, %f316, %f330;
|
|
add.f32 %f332, %f324, %f331;
|
|
add.f32 %f333, %f329, %f332;
|
|
add.f32 %f334, %f330, %f333;
|
|
sub.f32 %f335, %f330, %f334;
|
|
add.f32 %f336, %f333, %f335;
|
|
mov.f32 %f337, 0f3F317200;
|
|
mul.rn.f32 %f338, %f310, %f337;
|
|
mov.f32 %f339, 0f35BFBE8E;
|
|
mul.rn.f32 %f340, %f310, %f339;
|
|
add.f32 %f341, %f338, %f334;
|
|
sub.f32 %f342, %f338, %f341;
|
|
add.f32 %f343, %f334, %f342;
|
|
add.f32 %f344, %f336, %f343;
|
|
add.f32 %f345, %f340, %f344;
|
|
add.f32 %f346, %f341, %f345;
|
|
sub.f32 %f347, %f341, %f346;
|
|
add.f32 %f348, %f345, %f347;
|
|
mul.rn.f32 %f349, %f300, %f346;
|
|
neg.f32 %f350, %f349;
|
|
fma.rn.f32 %f351, %f300, %f346, %f350;
|
|
fma.rn.f32 %f352, %f300, %f348, %f351;
|
|
mov.f32 %f353, 0f00000000;
|
|
fma.rn.f32 %f354, %f353, %f346, %f352;
|
|
add.rn.f32 %f355, %f349, %f354;
|
|
neg.f32 %f356, %f355;
|
|
add.rn.f32 %f357, %f349, %f356;
|
|
add.rn.f32 %f358, %f357, %f354;
|
|
mov.b32 %r210, %f355;
|
|
setp.eq.s32 %p47, %r210, 1118925336;
|
|
add.s32 %r211, %r210, -1;
|
|
mov.b32 %f359, %r211;
|
|
add.f32 %f360, %f358, 0f37000000;
|
|
selp.f32 %f72, %f360, %f358, %p47;
|
|
selp.f32 %f361, %f359, %f355, %p47;
|
|
mov.f32 %f362, 0f3FB8AA3B;
|
|
mul.rn.f32 %f363, %f361, %f362;
|
|
cvt.rzi.f32.f32 %f364, %f363;
|
|
abs.f32 %f365, %f364;
|
|
setp.gt.f32 %p48, %f365, 0f42FC0000;
|
|
mov.b32 %r212, %f364;
|
|
and.b32 %r213, %r212, -2147483648;
|
|
or.b32 %r214, %r213, 1123811328;
|
|
mov.b32 %f366, %r214;
|
|
selp.f32 %f367, %f366, %f364, %p48;
|
|
mov.f32 %f368, 0fBF317218;
|
|
fma.rn.f32 %f369, %f367, %f368, %f361;
|
|
mov.f32 %f370, 0f3102E308;
|
|
fma.rn.f32 %f371, %f367, %f370, %f369;
|
|
mul.f32 %f372, %f371, 0f3FB8AA3B;
|
|
add.f32 %f373, %f367, 0f4B40007F;
|
|
mov.b32 %r215, %f373;
|
|
shl.b32 %r216, %r215, 23;
|
|
mov.b32 %f374, %r216;
|
|
ex2.approx.ftz.f32 %f375, %f372;
|
|
mul.f32 %f73, %f375, %f374;
|
|
setp.eq.f32 %p49, %f73, 0f7F800000;
|
|
mov.f32 %f908, 0f7F800000;
|
|
@%p49 bra $L__BB0_39;
|
|
|
|
fma.rn.f32 %f908, %f73, %f72, %f73;
|
|
|
|
$L__BB0_39:
|
|
setp.lt.f32 %p50, %f67, 0f00000000;
|
|
setp.eq.f32 %p51, %f70, 0f3F800000;
|
|
and.pred %p1, %p50, %p51;
|
|
setp.eq.f32 %p52, %f67, 0f00000000;
|
|
@%p52 bra $L__BB0_43;
|
|
bra.uni $L__BB0_40;
|
|
|
|
$L__BB0_43:
|
|
add.f32 %f380, %f67, %f67;
|
|
selp.f32 %f910, %f380, 0f00000000, %p51;
|
|
bra.uni $L__BB0_44;
|
|
|
|
$L__BB0_119:
|
|
mov.f32 %f843, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs48, %f843;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs47, %f843;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs46, %f843;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs49, 0;
|
|
st.global.v4.u16 [%rd20], {%rs46, %rs47, %rs48, %rs49};
|
|
bra.uni $L__BB0_120;
|
|
|
|
$L__BB0_40:
|
|
mov.b32 %r217, %f908;
|
|
xor.b32 %r218, %r217, -2147483648;
|
|
mov.b32 %f376, %r218;
|
|
selp.f32 %f910, %f376, %f908, %p1;
|
|
setp.geu.f32 %p53, %f67, 0f00000000;
|
|
@%p53 bra $L__BB0_44;
|
|
|
|
mov.f32 %f377, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f378, %f377;
|
|
setp.eq.f32 %p54, %f378, 0f3EE66666;
|
|
@%p54 bra $L__BB0_44;
|
|
|
|
mov.f32 %f910, 0f7FFFFFFF;
|
|
|
|
$L__BB0_44:
|
|
add.f32 %f381, %f71, 0f3EE66666;
|
|
mov.b32 %r219, %f381;
|
|
setp.lt.s32 %p56, %r219, 2139095040;
|
|
@%p56 bra $L__BB0_49;
|
|
|
|
setp.gtu.f32 %p57, %f71, 0f7F800000;
|
|
@%p57 bra $L__BB0_48;
|
|
bra.uni $L__BB0_46;
|
|
|
|
$L__BB0_48:
|
|
add.f32 %f910, %f67, 0f3EE66666;
|
|
bra.uni $L__BB0_49;
|
|
|
|
$L__BB0_46:
|
|
setp.neu.f32 %p58, %f71, 0f7F800000;
|
|
@%p58 bra $L__BB0_49;
|
|
|
|
selp.f32 %f910, 0fFF800000, 0f7F800000, %p1;
|
|
|
|
$L__BB0_49:
|
|
setp.eq.f32 %p59, %f67, 0f3F800000;
|
|
selp.f32 %f82, 0f3F800000, %f910, %p59;
|
|
abs.f32 %f83, %f68;
|
|
setp.lt.f32 %p60, %f83, 0f00800000;
|
|
mul.f32 %f383, %f83, 0f4B800000;
|
|
selp.f32 %f384, %f383, %f83, %p60;
|
|
selp.f32 %f385, 0fC3170000, 0fC2FE0000, %p60;
|
|
mov.b32 %r220, %f384;
|
|
and.b32 %r221, %r220, 8388607;
|
|
or.b32 %r222, %r221, 1065353216;
|
|
mov.b32 %f386, %r222;
|
|
shr.u32 %r223, %r220, 23;
|
|
cvt.rn.f32.u32 %f387, %r223;
|
|
add.f32 %f388, %f385, %f387;
|
|
setp.gt.f32 %p61, %f386, 0f3FB504F3;
|
|
mul.f32 %f389, %f386, 0f3F000000;
|
|
add.f32 %f390, %f388, 0f3F800000;
|
|
selp.f32 %f391, %f390, %f388, %p61;
|
|
selp.f32 %f392, %f389, %f386, %p61;
|
|
add.f32 %f393, %f392, 0fBF800000;
|
|
add.f32 %f394, %f392, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f395, %f394;
|
|
add.f32 %f396, %f393, %f393;
|
|
mul.f32 %f397, %f396, %f395;
|
|
mul.f32 %f398, %f397, %f397;
|
|
mov.f32 %f399, 0f3C4CAF63;
|
|
mov.f32 %f400, 0f3B18F0FE;
|
|
fma.rn.f32 %f401, %f400, %f398, %f399;
|
|
mov.f32 %f402, 0f3DAAAABD;
|
|
fma.rn.f32 %f403, %f401, %f398, %f402;
|
|
mul.rn.f32 %f404, %f403, %f398;
|
|
mul.rn.f32 %f405, %f404, %f397;
|
|
sub.f32 %f406, %f393, %f397;
|
|
add.f32 %f407, %f406, %f406;
|
|
neg.f32 %f408, %f397;
|
|
fma.rn.f32 %f409, %f408, %f393, %f407;
|
|
mul.rn.f32 %f410, %f395, %f409;
|
|
add.f32 %f411, %f405, %f397;
|
|
sub.f32 %f412, %f397, %f411;
|
|
add.f32 %f413, %f405, %f412;
|
|
add.f32 %f414, %f410, %f413;
|
|
add.f32 %f415, %f411, %f414;
|
|
sub.f32 %f416, %f411, %f415;
|
|
add.f32 %f417, %f414, %f416;
|
|
mov.f32 %f418, 0f3F317200;
|
|
mul.rn.f32 %f419, %f391, %f418;
|
|
mov.f32 %f420, 0f35BFBE8E;
|
|
mul.rn.f32 %f421, %f391, %f420;
|
|
add.f32 %f422, %f419, %f415;
|
|
sub.f32 %f423, %f419, %f422;
|
|
add.f32 %f424, %f415, %f423;
|
|
add.f32 %f425, %f417, %f424;
|
|
add.f32 %f426, %f421, %f425;
|
|
add.f32 %f427, %f422, %f426;
|
|
sub.f32 %f428, %f422, %f427;
|
|
add.f32 %f429, %f426, %f428;
|
|
mov.f32 %f430, 0f3EE66666;
|
|
mul.rn.f32 %f431, %f430, %f427;
|
|
neg.f32 %f432, %f431;
|
|
fma.rn.f32 %f433, %f430, %f427, %f432;
|
|
fma.rn.f32 %f434, %f430, %f429, %f433;
|
|
mov.f32 %f435, 0f00000000;
|
|
fma.rn.f32 %f436, %f435, %f427, %f434;
|
|
add.rn.f32 %f437, %f431, %f436;
|
|
neg.f32 %f438, %f437;
|
|
add.rn.f32 %f439, %f431, %f438;
|
|
add.rn.f32 %f440, %f439, %f436;
|
|
mov.b32 %r224, %f437;
|
|
setp.eq.s32 %p62, %r224, 1118925336;
|
|
add.s32 %r225, %r224, -1;
|
|
mov.b32 %f441, %r225;
|
|
add.f32 %f442, %f440, 0f37000000;
|
|
selp.f32 %f84, %f442, %f440, %p62;
|
|
selp.f32 %f443, %f441, %f437, %p62;
|
|
mov.f32 %f444, 0f3FB8AA3B;
|
|
mul.rn.f32 %f445, %f443, %f444;
|
|
cvt.rzi.f32.f32 %f446, %f445;
|
|
abs.f32 %f447, %f446;
|
|
setp.gt.f32 %p63, %f447, 0f42FC0000;
|
|
mov.b32 %r226, %f446;
|
|
and.b32 %r227, %r226, -2147483648;
|
|
or.b32 %r228, %r227, 1123811328;
|
|
mov.b32 %f448, %r228;
|
|
selp.f32 %f449, %f448, %f446, %p63;
|
|
mov.f32 %f450, 0fBF317218;
|
|
fma.rn.f32 %f451, %f449, %f450, %f443;
|
|
mov.f32 %f452, 0f3102E308;
|
|
fma.rn.f32 %f453, %f449, %f452, %f451;
|
|
mul.f32 %f454, %f453, 0f3FB8AA3B;
|
|
add.f32 %f455, %f449, 0f4B40007F;
|
|
mov.b32 %r229, %f455;
|
|
shl.b32 %r230, %r229, 23;
|
|
mov.b32 %f456, %r230;
|
|
ex2.approx.ftz.f32 %f457, %f454;
|
|
mul.f32 %f85, %f457, %f456;
|
|
setp.eq.f32 %p64, %f85, 0f7F800000;
|
|
mov.f32 %f911, 0f7F800000;
|
|
@%p64 bra $L__BB0_51;
|
|
|
|
fma.rn.f32 %f911, %f85, %f84, %f85;
|
|
|
|
$L__BB0_51:
|
|
setp.lt.f32 %p65, %f68, 0f00000000;
|
|
and.pred %p2, %p65, %p51;
|
|
setp.eq.f32 %p67, %f68, 0f00000000;
|
|
@%p67 bra $L__BB0_55;
|
|
bra.uni $L__BB0_52;
|
|
|
|
$L__BB0_55:
|
|
add.f32 %f462, %f68, %f68;
|
|
selp.f32 %f913, %f462, 0f00000000, %p51;
|
|
bra.uni $L__BB0_56;
|
|
|
|
$L__BB0_52:
|
|
mov.b32 %r231, %f911;
|
|
xor.b32 %r232, %r231, -2147483648;
|
|
mov.b32 %f458, %r232;
|
|
selp.f32 %f913, %f458, %f911, %p2;
|
|
setp.geu.f32 %p68, %f68, 0f00000000;
|
|
@%p68 bra $L__BB0_56;
|
|
|
|
mov.f32 %f459, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f460, %f459;
|
|
setp.eq.f32 %p69, %f460, 0f3EE66666;
|
|
@%p69 bra $L__BB0_56;
|
|
|
|
mov.f32 %f913, 0f7FFFFFFF;
|
|
|
|
$L__BB0_56:
|
|
add.f32 %f463, %f83, 0f3EE66666;
|
|
mov.b32 %r233, %f463;
|
|
setp.lt.s32 %p71, %r233, 2139095040;
|
|
@%p71 bra $L__BB0_61;
|
|
|
|
setp.gtu.f32 %p72, %f83, 0f7F800000;
|
|
@%p72 bra $L__BB0_60;
|
|
bra.uni $L__BB0_58;
|
|
|
|
$L__BB0_60:
|
|
add.f32 %f913, %f68, 0f3EE66666;
|
|
bra.uni $L__BB0_61;
|
|
|
|
$L__BB0_58:
|
|
setp.neu.f32 %p73, %f83, 0f7F800000;
|
|
@%p73 bra $L__BB0_61;
|
|
|
|
selp.f32 %f913, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
$L__BB0_61:
|
|
setp.eq.f32 %p74, %f68, 0f3F800000;
|
|
selp.f32 %f94, 0f3F800000, %f913, %p74;
|
|
abs.f32 %f95, %f69;
|
|
setp.lt.f32 %p75, %f95, 0f00800000;
|
|
mul.f32 %f465, %f95, 0f4B800000;
|
|
selp.f32 %f466, %f465, %f95, %p75;
|
|
selp.f32 %f467, 0fC3170000, 0fC2FE0000, %p75;
|
|
mov.b32 %r234, %f466;
|
|
and.b32 %r235, %r234, 8388607;
|
|
or.b32 %r236, %r235, 1065353216;
|
|
mov.b32 %f468, %r236;
|
|
shr.u32 %r237, %r234, 23;
|
|
cvt.rn.f32.u32 %f469, %r237;
|
|
add.f32 %f470, %f467, %f469;
|
|
setp.gt.f32 %p76, %f468, 0f3FB504F3;
|
|
mul.f32 %f471, %f468, 0f3F000000;
|
|
add.f32 %f472, %f470, 0f3F800000;
|
|
selp.f32 %f473, %f472, %f470, %p76;
|
|
selp.f32 %f474, %f471, %f468, %p76;
|
|
add.f32 %f475, %f474, 0fBF800000;
|
|
add.f32 %f476, %f474, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f477, %f476;
|
|
add.f32 %f478, %f475, %f475;
|
|
mul.f32 %f479, %f478, %f477;
|
|
mul.f32 %f480, %f479, %f479;
|
|
mov.f32 %f481, 0f3C4CAF63;
|
|
mov.f32 %f482, 0f3B18F0FE;
|
|
fma.rn.f32 %f483, %f482, %f480, %f481;
|
|
mov.f32 %f484, 0f3DAAAABD;
|
|
fma.rn.f32 %f485, %f483, %f480, %f484;
|
|
mul.rn.f32 %f486, %f485, %f480;
|
|
mul.rn.f32 %f487, %f486, %f479;
|
|
sub.f32 %f488, %f475, %f479;
|
|
add.f32 %f489, %f488, %f488;
|
|
neg.f32 %f490, %f479;
|
|
fma.rn.f32 %f491, %f490, %f475, %f489;
|
|
mul.rn.f32 %f492, %f477, %f491;
|
|
add.f32 %f493, %f487, %f479;
|
|
sub.f32 %f494, %f479, %f493;
|
|
add.f32 %f495, %f487, %f494;
|
|
add.f32 %f496, %f492, %f495;
|
|
add.f32 %f497, %f493, %f496;
|
|
sub.f32 %f498, %f493, %f497;
|
|
add.f32 %f499, %f496, %f498;
|
|
mov.f32 %f500, 0f3F317200;
|
|
mul.rn.f32 %f501, %f473, %f500;
|
|
mov.f32 %f502, 0f35BFBE8E;
|
|
mul.rn.f32 %f503, %f473, %f502;
|
|
add.f32 %f504, %f501, %f497;
|
|
sub.f32 %f505, %f501, %f504;
|
|
add.f32 %f506, %f497, %f505;
|
|
add.f32 %f507, %f499, %f506;
|
|
add.f32 %f508, %f503, %f507;
|
|
add.f32 %f509, %f504, %f508;
|
|
sub.f32 %f510, %f504, %f509;
|
|
add.f32 %f511, %f508, %f510;
|
|
mov.f32 %f512, 0f3EE66666;
|
|
mul.rn.f32 %f513, %f512, %f509;
|
|
neg.f32 %f514, %f513;
|
|
fma.rn.f32 %f515, %f512, %f509, %f514;
|
|
fma.rn.f32 %f516, %f512, %f511, %f515;
|
|
mov.f32 %f517, 0f00000000;
|
|
fma.rn.f32 %f518, %f517, %f509, %f516;
|
|
add.rn.f32 %f519, %f513, %f518;
|
|
neg.f32 %f520, %f519;
|
|
add.rn.f32 %f521, %f513, %f520;
|
|
add.rn.f32 %f522, %f521, %f518;
|
|
mov.b32 %r238, %f519;
|
|
setp.eq.s32 %p77, %r238, 1118925336;
|
|
add.s32 %r239, %r238, -1;
|
|
mov.b32 %f523, %r239;
|
|
add.f32 %f524, %f522, 0f37000000;
|
|
selp.f32 %f96, %f524, %f522, %p77;
|
|
selp.f32 %f525, %f523, %f519, %p77;
|
|
mov.f32 %f526, 0f3FB8AA3B;
|
|
mul.rn.f32 %f527, %f525, %f526;
|
|
cvt.rzi.f32.f32 %f528, %f527;
|
|
abs.f32 %f529, %f528;
|
|
setp.gt.f32 %p78, %f529, 0f42FC0000;
|
|
mov.b32 %r240, %f528;
|
|
and.b32 %r241, %r240, -2147483648;
|
|
or.b32 %r242, %r241, 1123811328;
|
|
mov.b32 %f530, %r242;
|
|
selp.f32 %f531, %f530, %f528, %p78;
|
|
mov.f32 %f532, 0fBF317218;
|
|
fma.rn.f32 %f533, %f531, %f532, %f525;
|
|
mov.f32 %f534, 0f3102E308;
|
|
fma.rn.f32 %f535, %f531, %f534, %f533;
|
|
mul.f32 %f536, %f535, 0f3FB8AA3B;
|
|
add.f32 %f537, %f531, 0f4B40007F;
|
|
mov.b32 %r243, %f537;
|
|
shl.b32 %r244, %r243, 23;
|
|
mov.b32 %f538, %r244;
|
|
ex2.approx.ftz.f32 %f539, %f536;
|
|
mul.f32 %f97, %f539, %f538;
|
|
setp.eq.f32 %p79, %f97, 0f7F800000;
|
|
mov.f32 %f914, 0f7F800000;
|
|
@%p79 bra $L__BB0_63;
|
|
|
|
fma.rn.f32 %f914, %f97, %f96, %f97;
|
|
|
|
$L__BB0_63:
|
|
setp.lt.f32 %p80, %f69, 0f00000000;
|
|
and.pred %p3, %p80, %p51;
|
|
setp.eq.f32 %p82, %f69, 0f00000000;
|
|
@%p82 bra $L__BB0_67;
|
|
bra.uni $L__BB0_64;
|
|
|
|
$L__BB0_67:
|
|
add.f32 %f544, %f69, %f69;
|
|
selp.f32 %f916, %f544, 0f00000000, %p51;
|
|
bra.uni $L__BB0_68;
|
|
|
|
$L__BB0_64:
|
|
mov.b32 %r245, %f914;
|
|
xor.b32 %r246, %r245, -2147483648;
|
|
mov.b32 %f540, %r246;
|
|
selp.f32 %f916, %f540, %f914, %p3;
|
|
setp.geu.f32 %p83, %f69, 0f00000000;
|
|
@%p83 bra $L__BB0_68;
|
|
|
|
mov.f32 %f541, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f542, %f541;
|
|
setp.eq.f32 %p84, %f542, 0f3EE66666;
|
|
@%p84 bra $L__BB0_68;
|
|
|
|
mov.f32 %f916, 0f7FFFFFFF;
|
|
|
|
$L__BB0_68:
|
|
add.f32 %f545, %f95, 0f3EE66666;
|
|
mov.b32 %r247, %f545;
|
|
setp.lt.s32 %p86, %r247, 2139095040;
|
|
@%p86 bra $L__BB0_73;
|
|
|
|
setp.gtu.f32 %p87, %f95, 0f7F800000;
|
|
@%p87 bra $L__BB0_72;
|
|
bra.uni $L__BB0_70;
|
|
|
|
$L__BB0_72:
|
|
add.f32 %f916, %f69, 0f3EE66666;
|
|
bra.uni $L__BB0_73;
|
|
|
|
$L__BB0_70:
|
|
setp.neu.f32 %p88, %f95, 0f7F800000;
|
|
@%p88 bra $L__BB0_73;
|
|
|
|
selp.f32 %f916, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
$L__BB0_73:
|
|
setp.eq.f32 %p89, %f69, 0f3F800000;
|
|
mov.f32 %f547, 0f3F800000;
|
|
selp.f32 %f548, 0f3F800000, %f916, %p89;
|
|
min.f32 %f549, %f82, %f547;
|
|
mov.f32 %f550, 0f00000000;
|
|
max.f32 %f106, %f550, %f549;
|
|
min.f32 %f551, %f94, %f547;
|
|
max.f32 %f107, %f550, %f551;
|
|
min.f32 %f552, %f548, %f547;
|
|
max.f32 %f108, %f550, %f552;
|
|
mov.f32 %f556, 0f3ED55555;
|
|
abs.f32 %f110, %f106;
|
|
setp.lt.f32 %p90, %f110, 0f00800000;
|
|
mul.f32 %f558, %f110, 0f4B800000;
|
|
selp.f32 %f559, %f558, %f110, %p90;
|
|
selp.f32 %f560, 0fC3170000, 0fC2FE0000, %p90;
|
|
mov.b32 %r250, %f559;
|
|
and.b32 %r251, %r250, 8388607;
|
|
or.b32 %r252, %r251, 1065353216;
|
|
mov.b32 %f561, %r252;
|
|
shr.u32 %r253, %r250, 23;
|
|
cvt.rn.f32.u32 %f562, %r253;
|
|
add.f32 %f563, %f560, %f562;
|
|
setp.gt.f32 %p91, %f561, 0f3FB504F3;
|
|
mul.f32 %f564, %f561, 0f3F000000;
|
|
add.f32 %f565, %f563, 0f3F800000;
|
|
selp.f32 %f566, %f565, %f563, %p91;
|
|
selp.f32 %f567, %f564, %f561, %p91;
|
|
add.f32 %f568, %f567, 0fBF800000;
|
|
add.f32 %f569, %f567, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f570, %f569;
|
|
add.f32 %f571, %f568, %f568;
|
|
mul.f32 %f572, %f571, %f570;
|
|
mul.f32 %f573, %f572, %f572;
|
|
mov.f32 %f574, 0f3C4CAF63;
|
|
mov.f32 %f575, 0f3B18F0FE;
|
|
fma.rn.f32 %f576, %f575, %f573, %f574;
|
|
mov.f32 %f577, 0f3DAAAABD;
|
|
fma.rn.f32 %f578, %f576, %f573, %f577;
|
|
mul.rn.f32 %f579, %f578, %f573;
|
|
mul.rn.f32 %f580, %f579, %f572;
|
|
sub.f32 %f581, %f568, %f572;
|
|
add.f32 %f582, %f581, %f581;
|
|
neg.f32 %f583, %f572;
|
|
fma.rn.f32 %f584, %f583, %f568, %f582;
|
|
mul.rn.f32 %f585, %f570, %f584;
|
|
add.f32 %f586, %f580, %f572;
|
|
sub.f32 %f587, %f572, %f586;
|
|
add.f32 %f588, %f580, %f587;
|
|
add.f32 %f589, %f585, %f588;
|
|
add.f32 %f590, %f586, %f589;
|
|
sub.f32 %f591, %f586, %f590;
|
|
add.f32 %f592, %f589, %f591;
|
|
mov.f32 %f593, 0f3F317200;
|
|
mul.rn.f32 %f594, %f566, %f593;
|
|
mov.f32 %f595, 0f35BFBE8E;
|
|
mul.rn.f32 %f596, %f566, %f595;
|
|
add.f32 %f597, %f594, %f590;
|
|
sub.f32 %f598, %f594, %f597;
|
|
add.f32 %f599, %f590, %f598;
|
|
add.f32 %f600, %f592, %f599;
|
|
add.f32 %f601, %f596, %f600;
|
|
add.f32 %f602, %f597, %f601;
|
|
sub.f32 %f603, %f597, %f602;
|
|
add.f32 %f604, %f601, %f603;
|
|
mul.rn.f32 %f605, %f556, %f602;
|
|
neg.f32 %f606, %f605;
|
|
fma.rn.f32 %f607, %f556, %f602, %f606;
|
|
fma.rn.f32 %f608, %f556, %f604, %f607;
|
|
fma.rn.f32 %f609, %f550, %f602, %f608;
|
|
add.rn.f32 %f610, %f605, %f609;
|
|
neg.f32 %f611, %f610;
|
|
add.rn.f32 %f612, %f605, %f611;
|
|
add.rn.f32 %f613, %f612, %f609;
|
|
mov.b32 %r254, %f610;
|
|
setp.eq.s32 %p92, %r254, 1118925336;
|
|
add.s32 %r255, %r254, -1;
|
|
mov.b32 %f614, %r255;
|
|
add.f32 %f615, %f613, 0f37000000;
|
|
selp.f32 %f111, %f615, %f613, %p92;
|
|
selp.f32 %f616, %f614, %f610, %p92;
|
|
mov.f32 %f617, 0f3FB8AA3B;
|
|
mul.rn.f32 %f618, %f616, %f617;
|
|
cvt.rzi.f32.f32 %f619, %f618;
|
|
abs.f32 %f620, %f619;
|
|
setp.gt.f32 %p93, %f620, 0f42FC0000;
|
|
mov.b32 %r256, %f619;
|
|
and.b32 %r257, %r256, -2147483648;
|
|
or.b32 %r258, %r257, 1123811328;
|
|
mov.b32 %f621, %r258;
|
|
selp.f32 %f622, %f621, %f619, %p93;
|
|
mov.f32 %f623, 0fBF317218;
|
|
fma.rn.f32 %f624, %f622, %f623, %f616;
|
|
mov.f32 %f625, 0f3102E308;
|
|
fma.rn.f32 %f626, %f622, %f625, %f624;
|
|
mul.f32 %f627, %f626, 0f3FB8AA3B;
|
|
add.f32 %f628, %f622, 0f4B40007F;
|
|
mov.b32 %r259, %f628;
|
|
shl.b32 %r260, %r259, 23;
|
|
mov.b32 %f629, %r260;
|
|
ex2.approx.ftz.f32 %f630, %f627;
|
|
mul.f32 %f112, %f630, %f629;
|
|
setp.eq.f32 %p94, %f112, 0f7F800000;
|
|
mov.f32 %f917, 0f7F800000;
|
|
@%p94 bra $L__BB0_75;
|
|
|
|
fma.rn.f32 %f917, %f112, %f111, %f112;
|
|
|
|
$L__BB0_75:
|
|
mov.f32 %f869, 0f00000000;
|
|
max.f32 %f868, %f869, %f549;
|
|
mov.f32 %f849, 0f3E555555;
|
|
cvt.rzi.f32.f32 %f848, %f849;
|
|
add.f32 %f847, %f848, %f848;
|
|
mov.f32 %f846, 0f3ED55555;
|
|
sub.f32 %f845, %f846, %f847;
|
|
abs.f32 %f844, %f845;
|
|
setp.lt.f32 %p95, %f868, 0f00000000;
|
|
setp.eq.f32 %p96, %f844, 0f3F800000;
|
|
and.pred %p4, %p95, %p96;
|
|
setp.eq.f32 %p97, %f868, 0f00000000;
|
|
@%p97 bra $L__BB0_79;
|
|
bra.uni $L__BB0_76;
|
|
|
|
$L__BB0_79:
|
|
mov.f32 %f886, 0f00000000;
|
|
max.f32 %f885, %f886, %f549;
|
|
add.f32 %f635, %f885, %f885;
|
|
selp.f32 %f919, %f635, 0f00000000, %p96;
|
|
bra.uni $L__BB0_80;
|
|
|
|
$L__BB0_76:
|
|
mov.f32 %f871, 0f00000000;
|
|
max.f32 %f870, %f871, %f549;
|
|
mov.b32 %r261, %f917;
|
|
xor.b32 %r262, %r261, -2147483648;
|
|
mov.b32 %f631, %r262;
|
|
selp.f32 %f919, %f631, %f917, %p4;
|
|
setp.geu.f32 %p98, %f870, 0f00000000;
|
|
@%p98 bra $L__BB0_80;
|
|
|
|
mov.f32 %f632, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f633, %f632;
|
|
setp.eq.f32 %p99, %f633, 0f3ED55555;
|
|
@%p99 bra $L__BB0_80;
|
|
|
|
mov.f32 %f919, 0f7FFFFFFF;
|
|
|
|
$L__BB0_80:
|
|
mov.f32 %f874, 0f00000000;
|
|
max.f32 %f873, %f874, %f549;
|
|
abs.f32 %f872, %f873;
|
|
add.f32 %f636, %f872, 0f3ED55555;
|
|
mov.b32 %r263, %f636;
|
|
setp.lt.s32 %p101, %r263, 2139095040;
|
|
@%p101 bra $L__BB0_85;
|
|
|
|
mov.f32 %f879, 0f00000000;
|
|
max.f32 %f878, %f879, %f549;
|
|
abs.f32 %f877, %f878;
|
|
setp.gtu.f32 %p102, %f877, 0f7F800000;
|
|
@%p102 bra $L__BB0_84;
|
|
bra.uni $L__BB0_82;
|
|
|
|
$L__BB0_84:
|
|
mov.f32 %f884, 0f00000000;
|
|
max.f32 %f883, %f884, %f549;
|
|
add.f32 %f919, %f883, 0f3ED55555;
|
|
bra.uni $L__BB0_85;
|
|
|
|
$L__BB0_82:
|
|
mov.f32 %f882, 0f00000000;
|
|
max.f32 %f881, %f882, %f549;
|
|
abs.f32 %f880, %f881;
|
|
setp.neu.f32 %p103, %f880, 0f7F800000;
|
|
@%p103 bra $L__BB0_85;
|
|
|
|
selp.f32 %f919, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
$L__BB0_85:
|
|
abs.f32 %f121, %f107;
|
|
setp.lt.f32 %p104, %f121, 0f00800000;
|
|
mul.f32 %f638, %f121, 0f4B800000;
|
|
selp.f32 %f639, %f638, %f121, %p104;
|
|
selp.f32 %f640, 0fC3170000, 0fC2FE0000, %p104;
|
|
mov.b32 %r264, %f639;
|
|
and.b32 %r265, %r264, 8388607;
|
|
or.b32 %r266, %r265, 1065353216;
|
|
mov.b32 %f641, %r266;
|
|
shr.u32 %r267, %r264, 23;
|
|
cvt.rn.f32.u32 %f642, %r267;
|
|
add.f32 %f643, %f640, %f642;
|
|
setp.gt.f32 %p105, %f641, 0f3FB504F3;
|
|
mul.f32 %f644, %f641, 0f3F000000;
|
|
add.f32 %f645, %f643, 0f3F800000;
|
|
selp.f32 %f646, %f645, %f643, %p105;
|
|
selp.f32 %f647, %f644, %f641, %p105;
|
|
add.f32 %f648, %f647, 0fBF800000;
|
|
add.f32 %f649, %f647, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f650, %f649;
|
|
add.f32 %f651, %f648, %f648;
|
|
mul.f32 %f652, %f651, %f650;
|
|
mul.f32 %f653, %f652, %f652;
|
|
mov.f32 %f654, 0f3C4CAF63;
|
|
mov.f32 %f655, 0f3B18F0FE;
|
|
fma.rn.f32 %f656, %f655, %f653, %f654;
|
|
mov.f32 %f657, 0f3DAAAABD;
|
|
fma.rn.f32 %f658, %f656, %f653, %f657;
|
|
mul.rn.f32 %f659, %f658, %f653;
|
|
mul.rn.f32 %f660, %f659, %f652;
|
|
sub.f32 %f661, %f648, %f652;
|
|
add.f32 %f662, %f661, %f661;
|
|
neg.f32 %f663, %f652;
|
|
fma.rn.f32 %f664, %f663, %f648, %f662;
|
|
mul.rn.f32 %f665, %f650, %f664;
|
|
add.f32 %f666, %f660, %f652;
|
|
sub.f32 %f667, %f652, %f666;
|
|
add.f32 %f668, %f660, %f667;
|
|
add.f32 %f669, %f665, %f668;
|
|
add.f32 %f670, %f666, %f669;
|
|
sub.f32 %f671, %f666, %f670;
|
|
add.f32 %f672, %f669, %f671;
|
|
mov.f32 %f673, 0f3F317200;
|
|
mul.rn.f32 %f674, %f646, %f673;
|
|
mov.f32 %f675, 0f35BFBE8E;
|
|
mul.rn.f32 %f676, %f646, %f675;
|
|
add.f32 %f677, %f674, %f670;
|
|
sub.f32 %f678, %f674, %f677;
|
|
add.f32 %f679, %f670, %f678;
|
|
add.f32 %f680, %f672, %f679;
|
|
add.f32 %f681, %f676, %f680;
|
|
add.f32 %f682, %f677, %f681;
|
|
sub.f32 %f683, %f677, %f682;
|
|
add.f32 %f684, %f681, %f683;
|
|
mov.f32 %f685, 0f3ED55555;
|
|
mul.rn.f32 %f686, %f685, %f682;
|
|
neg.f32 %f687, %f686;
|
|
fma.rn.f32 %f688, %f685, %f682, %f687;
|
|
fma.rn.f32 %f689, %f685, %f684, %f688;
|
|
mov.f32 %f690, 0f00000000;
|
|
fma.rn.f32 %f691, %f690, %f682, %f689;
|
|
add.rn.f32 %f692, %f686, %f691;
|
|
neg.f32 %f693, %f692;
|
|
add.rn.f32 %f694, %f686, %f693;
|
|
add.rn.f32 %f695, %f694, %f691;
|
|
mov.b32 %r268, %f692;
|
|
setp.eq.s32 %p106, %r268, 1118925336;
|
|
add.s32 %r269, %r268, -1;
|
|
mov.b32 %f696, %r269;
|
|
add.f32 %f697, %f695, 0f37000000;
|
|
selp.f32 %f122, %f697, %f695, %p106;
|
|
selp.f32 %f698, %f696, %f692, %p106;
|
|
mov.f32 %f699, 0f3FB8AA3B;
|
|
mul.rn.f32 %f700, %f698, %f699;
|
|
cvt.rzi.f32.f32 %f701, %f700;
|
|
abs.f32 %f702, %f701;
|
|
setp.gt.f32 %p107, %f702, 0f42FC0000;
|
|
mov.b32 %r270, %f701;
|
|
and.b32 %r271, %r270, -2147483648;
|
|
or.b32 %r272, %r271, 1123811328;
|
|
mov.b32 %f703, %r272;
|
|
selp.f32 %f704, %f703, %f701, %p107;
|
|
mov.f32 %f705, 0fBF317218;
|
|
fma.rn.f32 %f706, %f704, %f705, %f698;
|
|
mov.f32 %f707, 0f3102E308;
|
|
fma.rn.f32 %f708, %f704, %f707, %f706;
|
|
mul.f32 %f709, %f708, 0f3FB8AA3B;
|
|
add.f32 %f710, %f704, 0f4B40007F;
|
|
mov.b32 %r273, %f710;
|
|
shl.b32 %r274, %r273, 23;
|
|
mov.b32 %f711, %r274;
|
|
ex2.approx.ftz.f32 %f712, %f709;
|
|
mul.f32 %f123, %f712, %f711;
|
|
setp.eq.f32 %p108, %f123, 0f7F800000;
|
|
mov.f32 %f920, 0f7F800000;
|
|
@%p108 bra $L__BB0_87;
|
|
|
|
fma.rn.f32 %f920, %f123, %f122, %f123;
|
|
|
|
$L__BB0_87:
|
|
setp.lt.f32 %p109, %f107, 0f00000000;
|
|
and.pred %p5, %p109, %p96;
|
|
setp.eq.f32 %p111, %f107, 0f00000000;
|
|
@%p111 bra $L__BB0_91;
|
|
bra.uni $L__BB0_88;
|
|
|
|
$L__BB0_91:
|
|
add.f32 %f717, %f107, %f107;
|
|
selp.f32 %f922, %f717, 0f00000000, %p96;
|
|
bra.uni $L__BB0_92;
|
|
|
|
$L__BB0_88:
|
|
mov.b32 %r275, %f920;
|
|
xor.b32 %r276, %r275, -2147483648;
|
|
mov.b32 %f713, %r276;
|
|
selp.f32 %f922, %f713, %f920, %p5;
|
|
setp.geu.f32 %p112, %f107, 0f00000000;
|
|
@%p112 bra $L__BB0_92;
|
|
|
|
mov.f32 %f714, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f715, %f714;
|
|
setp.eq.f32 %p113, %f715, 0f3ED55555;
|
|
@%p113 bra $L__BB0_92;
|
|
|
|
mov.f32 %f922, 0f7FFFFFFF;
|
|
|
|
$L__BB0_92:
|
|
mov.f32 %f852, 0f00000000;
|
|
max.f32 %f851, %f852, %f551;
|
|
abs.f32 %f850, %f851;
|
|
add.f32 %f718, %f850, 0f3ED55555;
|
|
mov.b32 %r277, %f718;
|
|
setp.lt.s32 %p115, %r277, 2139095040;
|
|
@%p115 bra $L__BB0_97;
|
|
|
|
mov.f32 %f855, 0f00000000;
|
|
max.f32 %f854, %f855, %f551;
|
|
abs.f32 %f853, %f854;
|
|
setp.gtu.f32 %p116, %f853, 0f7F800000;
|
|
@%p116 bra $L__BB0_96;
|
|
bra.uni $L__BB0_94;
|
|
|
|
$L__BB0_96:
|
|
add.f32 %f922, %f107, 0f3ED55555;
|
|
bra.uni $L__BB0_97;
|
|
|
|
$L__BB0_94:
|
|
mov.f32 %f858, 0f00000000;
|
|
max.f32 %f857, %f858, %f551;
|
|
abs.f32 %f856, %f857;
|
|
setp.neu.f32 %p117, %f856, 0f7F800000;
|
|
@%p117 bra $L__BB0_97;
|
|
|
|
selp.f32 %f922, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
$L__BB0_97:
|
|
abs.f32 %f132, %f108;
|
|
setp.lt.f32 %p118, %f132, 0f00800000;
|
|
mul.f32 %f720, %f132, 0f4B800000;
|
|
selp.f32 %f721, %f720, %f132, %p118;
|
|
selp.f32 %f722, 0fC3170000, 0fC2FE0000, %p118;
|
|
mov.b32 %r278, %f721;
|
|
and.b32 %r279, %r278, 8388607;
|
|
or.b32 %r280, %r279, 1065353216;
|
|
mov.b32 %f723, %r280;
|
|
shr.u32 %r281, %r278, 23;
|
|
cvt.rn.f32.u32 %f724, %r281;
|
|
add.f32 %f725, %f722, %f724;
|
|
setp.gt.f32 %p119, %f723, 0f3FB504F3;
|
|
mul.f32 %f726, %f723, 0f3F000000;
|
|
add.f32 %f727, %f725, 0f3F800000;
|
|
selp.f32 %f728, %f727, %f725, %p119;
|
|
selp.f32 %f729, %f726, %f723, %p119;
|
|
add.f32 %f730, %f729, 0fBF800000;
|
|
add.f32 %f731, %f729, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f732, %f731;
|
|
add.f32 %f733, %f730, %f730;
|
|
mul.f32 %f734, %f733, %f732;
|
|
mul.f32 %f735, %f734, %f734;
|
|
mov.f32 %f736, 0f3C4CAF63;
|
|
mov.f32 %f737, 0f3B18F0FE;
|
|
fma.rn.f32 %f738, %f737, %f735, %f736;
|
|
mov.f32 %f739, 0f3DAAAABD;
|
|
fma.rn.f32 %f740, %f738, %f735, %f739;
|
|
mul.rn.f32 %f741, %f740, %f735;
|
|
mul.rn.f32 %f742, %f741, %f734;
|
|
sub.f32 %f743, %f730, %f734;
|
|
add.f32 %f744, %f743, %f743;
|
|
neg.f32 %f745, %f734;
|
|
fma.rn.f32 %f746, %f745, %f730, %f744;
|
|
mul.rn.f32 %f747, %f732, %f746;
|
|
add.f32 %f748, %f742, %f734;
|
|
sub.f32 %f749, %f734, %f748;
|
|
add.f32 %f750, %f742, %f749;
|
|
add.f32 %f751, %f747, %f750;
|
|
add.f32 %f752, %f748, %f751;
|
|
sub.f32 %f753, %f748, %f752;
|
|
add.f32 %f754, %f751, %f753;
|
|
mov.f32 %f755, 0f3F317200;
|
|
mul.rn.f32 %f756, %f728, %f755;
|
|
mov.f32 %f757, 0f35BFBE8E;
|
|
mul.rn.f32 %f758, %f728, %f757;
|
|
add.f32 %f759, %f756, %f752;
|
|
sub.f32 %f760, %f756, %f759;
|
|
add.f32 %f761, %f752, %f760;
|
|
add.f32 %f762, %f754, %f761;
|
|
add.f32 %f763, %f758, %f762;
|
|
add.f32 %f764, %f759, %f763;
|
|
sub.f32 %f765, %f759, %f764;
|
|
add.f32 %f766, %f763, %f765;
|
|
mov.f32 %f767, 0f3ED55555;
|
|
mul.rn.f32 %f768, %f767, %f764;
|
|
neg.f32 %f769, %f768;
|
|
fma.rn.f32 %f770, %f767, %f764, %f769;
|
|
fma.rn.f32 %f771, %f767, %f766, %f770;
|
|
mov.f32 %f772, 0f00000000;
|
|
fma.rn.f32 %f773, %f772, %f764, %f771;
|
|
add.rn.f32 %f774, %f768, %f773;
|
|
neg.f32 %f775, %f774;
|
|
add.rn.f32 %f776, %f768, %f775;
|
|
add.rn.f32 %f777, %f776, %f773;
|
|
mov.b32 %r282, %f774;
|
|
setp.eq.s32 %p120, %r282, 1118925336;
|
|
add.s32 %r283, %r282, -1;
|
|
mov.b32 %f778, %r283;
|
|
add.f32 %f779, %f777, 0f37000000;
|
|
selp.f32 %f133, %f779, %f777, %p120;
|
|
selp.f32 %f780, %f778, %f774, %p120;
|
|
mov.f32 %f781, 0f3FB8AA3B;
|
|
mul.rn.f32 %f782, %f780, %f781;
|
|
cvt.rzi.f32.f32 %f783, %f782;
|
|
abs.f32 %f784, %f783;
|
|
setp.gt.f32 %p121, %f784, 0f42FC0000;
|
|
mov.b32 %r284, %f783;
|
|
and.b32 %r285, %r284, -2147483648;
|
|
or.b32 %r286, %r285, 1123811328;
|
|
mov.b32 %f785, %r286;
|
|
selp.f32 %f786, %f785, %f783, %p121;
|
|
mov.f32 %f787, 0fBF317218;
|
|
fma.rn.f32 %f788, %f786, %f787, %f780;
|
|
mov.f32 %f789, 0f3102E308;
|
|
fma.rn.f32 %f790, %f786, %f789, %f788;
|
|
mul.f32 %f791, %f790, 0f3FB8AA3B;
|
|
add.f32 %f792, %f786, 0f4B40007F;
|
|
mov.b32 %r287, %f792;
|
|
shl.b32 %r288, %r287, 23;
|
|
mov.b32 %f793, %r288;
|
|
ex2.approx.ftz.f32 %f794, %f791;
|
|
mul.f32 %f134, %f794, %f793;
|
|
setp.eq.f32 %p122, %f134, 0f7F800000;
|
|
mov.f32 %f923, 0f7F800000;
|
|
@%p122 bra $L__BB0_99;
|
|
|
|
fma.rn.f32 %f923, %f134, %f133, %f134;
|
|
|
|
$L__BB0_99:
|
|
setp.lt.f32 %p123, %f108, 0f00000000;
|
|
and.pred %p6, %p123, %p96;
|
|
setp.eq.f32 %p125, %f108, 0f00000000;
|
|
@%p125 bra $L__BB0_103;
|
|
bra.uni $L__BB0_100;
|
|
|
|
$L__BB0_103:
|
|
add.f32 %f799, %f108, %f108;
|
|
selp.f32 %f925, %f799, 0f00000000, %p96;
|
|
bra.uni $L__BB0_104;
|
|
|
|
$L__BB0_100:
|
|
mov.b32 %r289, %f923;
|
|
xor.b32 %r290, %r289, -2147483648;
|
|
mov.b32 %f795, %r290;
|
|
selp.f32 %f925, %f795, %f923, %p6;
|
|
setp.geu.f32 %p126, %f108, 0f00000000;
|
|
@%p126 bra $L__BB0_104;
|
|
|
|
mov.f32 %f796, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f797, %f796;
|
|
setp.eq.f32 %p127, %f797, 0f3ED55555;
|
|
@%p127 bra $L__BB0_104;
|
|
|
|
mov.f32 %f925, 0f7FFFFFFF;
|
|
|
|
$L__BB0_104:
|
|
mov.f32 %f861, 0f00000000;
|
|
max.f32 %f860, %f861, %f552;
|
|
abs.f32 %f859, %f860;
|
|
add.f32 %f800, %f859, 0f3ED55555;
|
|
mov.b32 %r291, %f800;
|
|
setp.lt.s32 %p129, %r291, 2139095040;
|
|
@%p129 bra $L__BB0_109;
|
|
|
|
mov.f32 %f864, 0f00000000;
|
|
max.f32 %f863, %f864, %f552;
|
|
abs.f32 %f862, %f863;
|
|
setp.gtu.f32 %p130, %f862, 0f7F800000;
|
|
@%p130 bra $L__BB0_108;
|
|
bra.uni $L__BB0_106;
|
|
|
|
$L__BB0_108:
|
|
add.f32 %f925, %f108, 0f3ED55555;
|
|
bra.uni $L__BB0_109;
|
|
|
|
$L__BB0_106:
|
|
mov.f32 %f867, 0f00000000;
|
|
max.f32 %f866, %f867, %f552;
|
|
abs.f32 %f865, %f866;
|
|
setp.neu.f32 %p131, %f865, 0f7F800000;
|
|
@%p131 bra $L__BB0_109;
|
|
|
|
selp.f32 %f925, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
$L__BB0_109:
|
|
mov.f32 %f876, 0f00000000;
|
|
max.f32 %f875, %f876, %f549;
|
|
ld.const.u64 %rd72, [params+144];
|
|
cvta.to.global.u64 %rd71, %rd72;
|
|
ld.const.u32 %r310, [params+136];
|
|
mad.lo.s32 %r309, %r310, %r5, %r4;
|
|
cvt.u64.u32 %rd70, %r309;
|
|
fma.rn.f32 %f801, %f919, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p132, %f875, 0f3F800000;
|
|
mov.f32 %f802, 0f3F800000;
|
|
selp.f32 %f803, 0f3F7FFFFF, %f801, %p132;
|
|
mul.f32 %f804, %f875, 0f414EB852;
|
|
setp.lt.f32 %p133, %f875, 0f3B4D2E1C;
|
|
selp.f32 %f805, %f804, %f803, %p133;
|
|
fma.rn.f32 %f806, %f922, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p134, %f107, 0f3F800000;
|
|
selp.f32 %f807, 0f3F7FFFFF, %f806, %p134;
|
|
mul.f32 %f808, %f107, 0f414EB852;
|
|
setp.lt.f32 %p135, %f107, 0f3B4D2E1C;
|
|
selp.f32 %f809, %f808, %f807, %p135;
|
|
fma.rn.f32 %f810, %f925, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p136, %f108, 0f3F800000;
|
|
selp.f32 %f811, 0f3F7FFFFF, %f810, %p136;
|
|
mul.f32 %f812, %f108, 0f414EB852;
|
|
setp.lt.f32 %p137, %f108, 0f3B4D2E1C;
|
|
selp.f32 %f813, %f812, %f811, %p137;
|
|
min.f32 %f814, %f805, %f802;
|
|
mov.f32 %f815, 0f00000000;
|
|
max.f32 %f816, %f815, %f814;
|
|
mul.f32 %f817, %f816, 0f43800000;
|
|
cvt.rzi.u32.f32 %r292, %f817;
|
|
min.u32 %r293, %r292, 255;
|
|
min.f32 %f818, %f809, %f802;
|
|
max.f32 %f819, %f815, %f818;
|
|
mul.f32 %f820, %f819, 0f43800000;
|
|
cvt.rzi.u32.f32 %r294, %f820;
|
|
min.u32 %r295, %r294, 255;
|
|
min.f32 %f821, %f813, %f802;
|
|
max.f32 %f822, %f815, %f821;
|
|
mul.f32 %f823, %f822, 0f43800000;
|
|
cvt.rzi.u32.f32 %r296, %f823;
|
|
min.u32 %r297, %r296, 255;
|
|
shl.b64 %rd58, %rd70, 2;
|
|
add.s64 %rd59, %rd71, %rd58;
|
|
cvt.u16.u32 %rs15, %r297;
|
|
cvt.u16.u32 %rs16, %r295;
|
|
cvt.u16.u32 %rs17, %r293;
|
|
mov.u16 %rs18, 255;
|
|
st.global.v4.u8 [%rd59], {%rs17, %rs16, %rs15, %rs18};
|
|
|
|
$L__BB0_110:
|
|
ld.const.u32 %r311, [params+104];
|
|
and.b32 %r298, %r311, 4;
|
|
setp.eq.s32 %p138, %r298, 0;
|
|
@%p138 bra $L__BB0_120;
|
|
|
|
ld.const.u32 %r299, [params+108];
|
|
setp.eq.s32 %p139, %r299, 0;
|
|
ld.const.u64 %rd60, [params+224];
|
|
cvta.to.global.u64 %rd61, %rd60;
|
|
ld.const.u32 %r300, [params+216];
|
|
mad.lo.s32 %r301, %r300, %r5, %r4;
|
|
mul.wide.u32 %rd62, %r301, 8;
|
|
add.s64 %rd19, %rd61, %rd62;
|
|
@%p139 bra $L__BB0_113;
|
|
|
|
ld.global.v4.u16 {%rs26, %rs27, %rs28, %rs29}, [%rd19];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f824, %rs26;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f825, %rs27;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f826, %rs28;}
|
|
|
|
// end inline asm
|
|
add.f32 %f827, %f67, %f824;
|
|
add.f32 %f828, %f68, %f825;
|
|
add.f32 %f829, %f69, %f826;
|
|
mov.f32 %f830, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs24, %f829;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs23, %f828;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs22, %f827;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs25, %f830;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd19], {%rs22, %rs23, %rs24, %rs25};
|
|
bra.uni $L__BB0_120;
|
|
|
|
$L__BB0_113:
|
|
mov.f32 %f834, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs33, %f834;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs32, %f69;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs31, %f68;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs30, %f67;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd19], {%rs30, %rs31, %rs32, %rs33};
|
|
|
|
$L__BB0_120:
|
|
ret;
|
|
|
|
}
|
|
|