2455 lines
70 KiB
Plaintext
2455 lines
70 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-23083092
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// Cuda compilation tools, release 9.1, V9.1.85
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// Based on LLVM 3.4svn
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//
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.version 6.1
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.target sm_30
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.address_size 64
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// .globl _Z6oxMainv
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.global .align 8 .b8 pixelID[8];
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.global .align 8 .b8 resolution[8];
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.global .align 4 .b8 normal[12];
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.global .align 4 .b8 camPos[12];
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.global .align 4 .b8 root[4];
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.global .align 4 .u32 imageEnabled;
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.global .texref lightmap;
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.global .align 16 .b8 tileInfo[16];
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.global .align 4 .u32 additive;
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.global .align 1 .b8 image[1];
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.global .align 1 .b8 image_HDR[1];
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.global .align 1 .b8 image_HDR2[1];
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.global .align 1 .b8 image_Mask[1];
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.global .align 1 .b8 image_RNM0[1];
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.global .align 1 .b8 image_RNM1[1];
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.global .align 1 .b8 image_RNM2[1];
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.global .align 1 .b8 uvtangent[1];
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.global .align 1 .b8 uvpos[1];
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.global .align 1 .b8 uvnormal[1];
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.global .align 1 .b8 rnd_seeds[1];
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.global .align 4 .b8 directDir[12];
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.global .align 4 .b8 directColor[12];
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.global .align 4 .f32 shadowSpread;
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.global .align 4 .u32 samples;
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.global .align 4 .u32 ignoreNormal;
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.global .align 4 .u32 lightCookie;
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.global .align 16 .b8 lightTilingOffset[16];
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo9directDirE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo11directColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12shadowSpreadE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo11lightCookieE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo17lightTilingOffsetE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
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.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
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.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename9directDirE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename11directColorE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename12shadowSpreadE[6] = {102, 108, 111, 97, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename11lightCookieE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename17lightTilingOffsetE[7] = {102, 108, 111, 97, 116, 52, 0};
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.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum9directDirE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum11directColorE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12shadowSpreadE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum11lightCookieE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum17lightTilingOffsetE = 4919;
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.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
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.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic9directDirE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic11directColorE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12shadowSpreadE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic11lightCookieE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic17lightTilingOffsetE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation9directDirE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation11directColorE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12shadowSpreadE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation11lightCookieE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation17lightTilingOffsetE[1];
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.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
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.visible .entry _Z6oxMainv(
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)
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{
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.local .align 4 .b8 __local_depot0[32];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<148>;
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.reg .b16 %rs<157>;
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.reg .f32 %f<1134>;
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.reg .b32 %r<412>;
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.reg .b64 %rd<283>;
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mov.u64 %rd282, __local_depot0;
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cvta.local.u64 %SP, %rd282;
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ld.global.v2.u32 {%r107, %r108}, [pixelID];
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cvt.u64.u32 %rd28, %r107;
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cvt.u64.u32 %rd29, %r108;
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mov.u64 %rd32, uvnormal;
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cvta.global.u64 %rd27, %rd32;
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mov.u32 %r105, 2;
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mov.u32 %r106, 4;
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mov.u64 %rd31, 0;
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// inline asm
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call (%rd26), _rt_buffer_get_64, (%rd27, %r105, %r106, %rd28, %rd29, %rd31, %rd31);
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// inline asm
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ld.u32 %r1, [%rd26];
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shr.u32 %r111, %r1, 16;
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cvt.u16.u32 %rs1, %r111;
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and.b16 %rs6, %rs1, 255;
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cvt.u16.u32 %rs7, %r1;
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or.b16 %rs8, %rs7, %rs6;
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setp.eq.s16 %p6, %rs8, 0;
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mov.f32 %f1090, 0f00000000;
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mov.f32 %f1091, %f1090;
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mov.f32 %f1092, %f1090;
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@%p6 bra BB0_2;
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ld.u8 %rs9, [%rd26+1];
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and.b16 %rs11, %rs7, 255;
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cvt.rn.f32.u16 %f188, %rs11;
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div.rn.f32 %f189, %f188, 0f437F0000;
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fma.rn.f32 %f190, %f189, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f191, %rs9;
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div.rn.f32 %f192, %f191, 0f437F0000;
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fma.rn.f32 %f193, %f192, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f194, %rs6;
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div.rn.f32 %f195, %f194, 0f437F0000;
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fma.rn.f32 %f196, %f195, 0f40000000, 0fBF800000;
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mul.f32 %f197, %f193, %f193;
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fma.rn.f32 %f198, %f190, %f190, %f197;
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fma.rn.f32 %f199, %f196, %f196, %f198;
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sqrt.rn.f32 %f200, %f199;
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rcp.rn.f32 %f201, %f200;
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mul.f32 %f1090, %f190, %f201;
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mul.f32 %f1091, %f193, %f201;
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mul.f32 %f1092, %f196, %f201;
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BB0_2:
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ld.global.v2.u32 {%r112, %r113}, [pixelID];
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ld.global.v2.u32 {%r115, %r116}, [tileInfo];
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add.s32 %r2, %r112, %r115;
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add.s32 %r3, %r113, %r116;
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setp.eq.f32 %p7, %f1091, 0f00000000;
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setp.eq.f32 %p8, %f1090, 0f00000000;
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and.pred %p9, %p8, %p7;
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setp.eq.f32 %p10, %f1092, 0f00000000;
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and.pred %p11, %p9, %p10;
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@%p11 bra BB0_135;
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bra.uni BB0_3;
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BB0_135:
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ld.global.u32 %r411, [imageEnabled];
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and.b32 %r340, %r411, 1;
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setp.eq.b32 %p141, %r340, 1;
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@!%p141 bra BB0_137;
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bra.uni BB0_136;
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BB0_136:
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cvt.u64.u32 %rd186, %r2;
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cvt.u64.u32 %rd187, %r3;
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mov.u64 %rd190, image;
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cvta.global.u64 %rd185, %rd190;
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mov.u64 %rd189, 0;
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// inline asm
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call (%rd184), _rt_buffer_get_64, (%rd185, %r105, %r106, %rd186, %rd187, %rd189, %rd189);
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// inline asm
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mov.u16 %rs102, 0;
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st.v4.u8 [%rd184], {%rs102, %rs102, %rs102, %rs102};
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ld.global.u32 %r411, [imageEnabled];
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BB0_137:
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and.b32 %r343, %r411, 8;
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setp.eq.s32 %p142, %r343, 0;
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@%p142 bra BB0_139;
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cvt.u64.u32 %rd194, %r3;
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cvt.u64.u32 %rd193, %r2;
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mov.u64 %rd197, image_Mask;
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cvta.global.u64 %rd192, %rd197;
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mov.u64 %rd196, 0;
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// inline asm
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call (%rd191), _rt_buffer_get_64, (%rd192, %r105, %r105, %rd193, %rd194, %rd196, %rd196);
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// inline asm
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mov.f32 %f993, 0f00000000;
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cvt.rzi.u32.f32 %r346, %f993;
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cvt.u16.u32 %rs103, %r346;
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mov.u16 %rs104, 0;
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st.v2.u8 [%rd191], {%rs103, %rs104};
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ld.global.u32 %r411, [imageEnabled];
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BB0_139:
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cvt.u64.u32 %rd24, %r2;
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cvt.u64.u32 %rd25, %r3;
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and.b32 %r347, %r411, 4;
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setp.eq.s32 %p143, %r347, 0;
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@%p143 bra BB0_143;
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ld.global.u32 %r348, [additive];
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setp.eq.s32 %p144, %r348, 0;
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@%p144 bra BB0_142;
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mov.u64 %rd210, image_HDR;
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cvta.global.u64 %rd199, %rd210;
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mov.u32 %r352, 8;
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mov.u64 %rd209, 0;
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// inline asm
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call (%rd198), _rt_buffer_get_64, (%rd199, %r105, %r352, %rd24, %rd25, %rd209, %rd209);
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// inline asm
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ld.v4.u16 {%rs111, %rs112, %rs113, %rs114}, [%rd198];
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// inline asm
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{ cvt.f32.f16 %f994, %rs111;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f995, %rs112;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f996, %rs113;}
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// inline asm
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// inline asm
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call (%rd204), _rt_buffer_get_64, (%rd199, %r105, %r352, %rd24, %rd25, %rd209, %rd209);
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// inline asm
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add.f32 %f997, %f994, 0f00000000;
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add.f32 %f998, %f995, 0f00000000;
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add.f32 %f999, %f996, 0f00000000;
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// inline asm
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{ cvt.rn.f16.f32 %rs110, %f999;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs109, %f998;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs108, %f997;}
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// inline asm
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mov.u16 %rs115, 0;
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st.v4.u16 [%rd204], {%rs108, %rs109, %rs110, %rs115};
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bra.uni BB0_143;
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BB0_3:
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ld.global.f32 %f8, [directDir+4];
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ld.global.f32 %f9, [directDir+8];
|
|
ld.global.f32 %f7, [directDir];
|
|
ld.global.v2.u32 {%r124, %r125}, [pixelID];
|
|
cvt.u64.u32 %rd35, %r124;
|
|
cvt.u64.u32 %rd36, %r125;
|
|
mov.u64 %rd45, uvpos;
|
|
cvta.global.u64 %rd34, %rd45;
|
|
mov.u32 %r121, 12;
|
|
// inline asm
|
|
call (%rd33), _rt_buffer_get_64, (%rd34, %r105, %r121, %rd35, %rd36, %rd31, %rd31);
|
|
// inline asm
|
|
ld.f32 %f12, [%rd33+8];
|
|
ld.f32 %f11, [%rd33+4];
|
|
ld.f32 %f10, [%rd33];
|
|
mul.f32 %f203, %f10, 0f3456BF95;
|
|
mul.f32 %f204, %f11, 0f3456BF95;
|
|
mul.f32 %f205, %f12, 0f3456BF95;
|
|
abs.f32 %f206, %f1090;
|
|
div.rn.f32 %f207, %f203, %f206;
|
|
abs.f32 %f208, %f1091;
|
|
div.rn.f32 %f209, %f204, %f208;
|
|
abs.f32 %f210, %f1092;
|
|
div.rn.f32 %f211, %f205, %f210;
|
|
abs.f32 %f212, %f207;
|
|
abs.f32 %f213, %f209;
|
|
abs.f32 %f214, %f211;
|
|
mov.f32 %f215, 0f38D1B717;
|
|
max.f32 %f216, %f212, %f215;
|
|
max.f32 %f217, %f213, %f215;
|
|
max.f32 %f218, %f214, %f215;
|
|
fma.rn.f32 %f13, %f1090, %f216, %f10;
|
|
fma.rn.f32 %f14, %f1091, %f217, %f11;
|
|
fma.rn.f32 %f15, %f1092, %f218, %f12;
|
|
abs.f32 %f219, %f7;
|
|
abs.f32 %f220, %f9;
|
|
setp.gt.f32 %p12, %f219, %f220;
|
|
neg.f32 %f221, %f8;
|
|
neg.f32 %f222, %f9;
|
|
selp.f32 %f223, %f221, 0f00000000, %p12;
|
|
selp.f32 %f224, %f7, %f222, %p12;
|
|
selp.f32 %f225, 0f00000000, %f8, %p12;
|
|
mul.f32 %f226, %f224, %f224;
|
|
fma.rn.f32 %f227, %f223, %f223, %f226;
|
|
fma.rn.f32 %f228, %f225, %f225, %f227;
|
|
sqrt.rn.f32 %f229, %f228;
|
|
rcp.rn.f32 %f230, %f229;
|
|
mul.f32 %f16, %f223, %f230;
|
|
mul.f32 %f17, %f224, %f230;
|
|
mul.f32 %f18, %f225, %f230;
|
|
mul.f32 %f231, %f9, %f17;
|
|
mul.f32 %f232, %f8, %f18;
|
|
sub.f32 %f19, %f231, %f232;
|
|
mul.f32 %f233, %f7, %f18;
|
|
mul.f32 %f234, %f9, %f16;
|
|
sub.f32 %f20, %f233, %f234;
|
|
mul.f32 %f235, %f8, %f16;
|
|
mul.f32 %f236, %f7, %f17;
|
|
sub.f32 %f21, %f235, %f236;
|
|
ld.global.v2.u32 {%r128, %r129}, [pixelID];
|
|
cvt.u64.u32 %rd41, %r128;
|
|
cvt.u64.u32 %rd42, %r129;
|
|
mov.u64 %rd46, rnd_seeds;
|
|
cvta.global.u64 %rd40, %rd46;
|
|
// inline asm
|
|
call (%rd39), _rt_buffer_get_64, (%rd40, %r105, %r106, %rd41, %rd42, %rd31, %rd31);
|
|
// inline asm
|
|
ld.global.u32 %r380, [samples];
|
|
mov.f32 %f1107, 0f00000000;
|
|
setp.lt.s32 %p13, %r380, 1;
|
|
@%p13 bra BB0_55;
|
|
|
|
cvt.rn.f32.s32 %f238, %r380;
|
|
rcp.rn.f32 %f22, %f238;
|
|
ld.u32 %r406, [%rd39];
|
|
mul.f32 %f23, %f13, 0f3456BF95;
|
|
mul.f32 %f24, %f14, 0f3456BF95;
|
|
mul.f32 %f25, %f15, 0f3456BF95;
|
|
mov.f32 %f1107, 0f00000000;
|
|
mov.u32 %r381, 0;
|
|
abs.f32 %f239, %f24;
|
|
abs.f32 %f240, %f23;
|
|
max.f32 %f241, %f240, %f239;
|
|
abs.f32 %f242, %f25;
|
|
max.f32 %f243, %f241, %f242;
|
|
|
|
BB0_5:
|
|
setp.lt.s32 %p14, %r380, 1;
|
|
@%p14 bra BB0_54;
|
|
|
|
cvt.rn.f32.s32 %f27, %r381;
|
|
max.f32 %f28, %f243, %f215;
|
|
mov.u32 %r383, 0;
|
|
|
|
BB0_7:
|
|
mad.lo.s32 %r134, %r406, 1664525, 1013904223;
|
|
and.b32 %r135, %r134, 16777215;
|
|
cvt.rn.f32.u32 %f245, %r135;
|
|
fma.rn.f32 %f246, %f245, 0f33800000, %f27;
|
|
mul.f32 %f247, %f22, %f246;
|
|
mad.lo.s32 %r406, %r134, 1664525, 1013904223;
|
|
and.b32 %r136, %r406, 16777215;
|
|
cvt.rn.f32.u32 %f248, %r136;
|
|
cvt.rn.f32.s32 %f249, %r383;
|
|
fma.rn.f32 %f250, %f248, 0f33800000, %f249;
|
|
mul.f32 %f251, %f22, %f250;
|
|
sqrt.rn.f32 %f30, %f247;
|
|
mul.f32 %f1101, %f251, 0f40C90FDB;
|
|
abs.f32 %f32, %f1101;
|
|
setp.neu.f32 %p15, %f32, 0f7F800000;
|
|
mov.f32 %f1095, %f1101;
|
|
@%p15 bra BB0_9;
|
|
|
|
mov.f32 %f252, 0f00000000;
|
|
mul.rn.f32 %f1095, %f1101, %f252;
|
|
|
|
BB0_9:
|
|
mul.f32 %f253, %f1095, 0f3F22F983;
|
|
cvt.rni.s32.f32 %r394, %f253;
|
|
cvt.rn.f32.s32 %f254, %r394;
|
|
neg.f32 %f255, %f254;
|
|
mov.f32 %f256, 0f3FC90FDA;
|
|
fma.rn.f32 %f257, %f255, %f256, %f1095;
|
|
mov.f32 %f258, 0f33A22168;
|
|
fma.rn.f32 %f259, %f255, %f258, %f257;
|
|
mov.f32 %f260, 0f27C234C5;
|
|
fma.rn.f32 %f1096, %f255, %f260, %f259;
|
|
abs.f32 %f261, %f1095;
|
|
setp.leu.f32 %p16, %f261, 0f47CE4780;
|
|
@%p16 bra BB0_20;
|
|
|
|
add.u64 %rd48, %SP, 4;
|
|
cvta.to.local.u64 %rd3, %rd48;
|
|
mov.b32 %r13, %f1095;
|
|
shr.u32 %r14, %r13, 23;
|
|
shl.b32 %r139, %r13, 8;
|
|
or.b32 %r15, %r139, -2147483648;
|
|
mov.u32 %r385, 0;
|
|
mov.u64 %rd279, 0;
|
|
mov.u64 %rd278, %rd3;
|
|
mov.u32 %r386, %r385;
|
|
|
|
BB0_11:
|
|
.pragma "nounroll";
|
|
shl.b64 %rd49, %rd279, 2;
|
|
mov.u64 %rd50, __cudart_i2opi_f;
|
|
add.s64 %rd51, %rd50, %rd49;
|
|
ld.const.u32 %r142, [%rd51];
|
|
// inline asm
|
|
{
|
|
mad.lo.cc.u32 %r140, %r142, %r15, %r386;
|
|
madc.hi.u32 %r386, %r142, %r15, 0;
|
|
}
|
|
// inline asm
|
|
st.local.u32 [%rd278], %r140;
|
|
add.s32 %r385, %r385, 1;
|
|
cvt.s64.s32 %rd279, %r385;
|
|
mul.wide.s32 %rd54, %r385, 4;
|
|
add.s64 %rd278, %rd3, %rd54;
|
|
setp.ne.s32 %p17, %r385, 6;
|
|
@%p17 bra BB0_11;
|
|
|
|
and.b32 %r145, %r14, 255;
|
|
add.s32 %r146, %r145, -128;
|
|
shr.u32 %r147, %r146, 5;
|
|
and.b32 %r20, %r13, -2147483648;
|
|
cvta.to.local.u64 %rd56, %rd48;
|
|
st.local.u32 [%rd56+24], %r386;
|
|
mov.u32 %r148, 6;
|
|
sub.s32 %r149, %r148, %r147;
|
|
mul.wide.s32 %rd57, %r149, 4;
|
|
add.s64 %rd8, %rd56, %rd57;
|
|
ld.local.u32 %r387, [%rd8];
|
|
ld.local.u32 %r388, [%rd8+-4];
|
|
and.b32 %r23, %r14, 31;
|
|
setp.eq.s32 %p18, %r23, 0;
|
|
@%p18 bra BB0_14;
|
|
|
|
mov.u32 %r150, 32;
|
|
sub.s32 %r151, %r150, %r23;
|
|
shr.u32 %r152, %r388, %r151;
|
|
shl.b32 %r153, %r387, %r23;
|
|
add.s32 %r387, %r152, %r153;
|
|
ld.local.u32 %r154, [%rd8+-8];
|
|
shr.u32 %r155, %r154, %r151;
|
|
shl.b32 %r156, %r388, %r23;
|
|
add.s32 %r388, %r155, %r156;
|
|
|
|
BB0_14:
|
|
shr.u32 %r157, %r388, 30;
|
|
shl.b32 %r158, %r387, 2;
|
|
add.s32 %r389, %r157, %r158;
|
|
shl.b32 %r29, %r388, 2;
|
|
shr.u32 %r159, %r389, 31;
|
|
shr.u32 %r160, %r387, 30;
|
|
add.s32 %r30, %r159, %r160;
|
|
setp.eq.s32 %p19, %r159, 0;
|
|
@%p19 bra BB0_15;
|
|
bra.uni BB0_16;
|
|
|
|
BB0_15:
|
|
mov.u32 %r390, %r20;
|
|
mov.u32 %r391, %r29;
|
|
bra.uni BB0_17;
|
|
|
|
BB0_16:
|
|
not.b32 %r161, %r389;
|
|
neg.s32 %r391, %r29;
|
|
setp.eq.s32 %p20, %r29, 0;
|
|
selp.u32 %r162, 1, 0, %p20;
|
|
add.s32 %r389, %r162, %r161;
|
|
xor.b32 %r390, %r20, -2147483648;
|
|
|
|
BB0_17:
|
|
clz.b32 %r393, %r389;
|
|
setp.eq.s32 %p21, %r393, 0;
|
|
shl.b32 %r163, %r389, %r393;
|
|
mov.u32 %r164, 32;
|
|
sub.s32 %r165, %r164, %r393;
|
|
shr.u32 %r166, %r391, %r165;
|
|
add.s32 %r167, %r166, %r163;
|
|
selp.b32 %r38, %r389, %r167, %p21;
|
|
mov.u32 %r168, -921707870;
|
|
mul.hi.u32 %r392, %r38, %r168;
|
|
setp.eq.s32 %p22, %r20, 0;
|
|
neg.s32 %r169, %r30;
|
|
selp.b32 %r394, %r30, %r169, %p22;
|
|
setp.lt.s32 %p23, %r392, 1;
|
|
@%p23 bra BB0_19;
|
|
|
|
mul.lo.s32 %r170, %r38, -921707870;
|
|
shr.u32 %r171, %r170, 31;
|
|
shl.b32 %r172, %r392, 1;
|
|
add.s32 %r392, %r171, %r172;
|
|
add.s32 %r393, %r393, 1;
|
|
|
|
BB0_19:
|
|
mov.u32 %r173, 126;
|
|
sub.s32 %r174, %r173, %r393;
|
|
shl.b32 %r175, %r174, 23;
|
|
add.s32 %r176, %r392, 1;
|
|
shr.u32 %r177, %r176, 7;
|
|
add.s32 %r178, %r177, 1;
|
|
shr.u32 %r179, %r178, 1;
|
|
add.s32 %r180, %r179, %r175;
|
|
or.b32 %r181, %r180, %r390;
|
|
mov.b32 %f1096, %r181;
|
|
|
|
BB0_20:
|
|
mul.rn.f32 %f38, %f1096, %f1096;
|
|
add.s32 %r46, %r394, 1;
|
|
and.b32 %r47, %r46, 1;
|
|
setp.eq.s32 %p24, %r47, 0;
|
|
@%p24 bra BB0_22;
|
|
bra.uni BB0_21;
|
|
|
|
BB0_22:
|
|
mov.f32 %f264, 0f3C08839E;
|
|
mov.f32 %f265, 0fB94CA1F9;
|
|
fma.rn.f32 %f1097, %f265, %f38, %f264;
|
|
bra.uni BB0_23;
|
|
|
|
BB0_21:
|
|
mov.f32 %f262, 0fBAB6061A;
|
|
mov.f32 %f263, 0f37CCF5CE;
|
|
fma.rn.f32 %f1097, %f263, %f38, %f262;
|
|
|
|
BB0_23:
|
|
@%p24 bra BB0_25;
|
|
bra.uni BB0_24;
|
|
|
|
BB0_25:
|
|
mov.f32 %f269, 0fBE2AAAA3;
|
|
fma.rn.f32 %f270, %f1097, %f38, %f269;
|
|
mov.f32 %f271, 0f00000000;
|
|
fma.rn.f32 %f1098, %f270, %f38, %f271;
|
|
bra.uni BB0_26;
|
|
|
|
BB0_24:
|
|
mov.f32 %f266, 0f3D2AAAA5;
|
|
fma.rn.f32 %f267, %f1097, %f38, %f266;
|
|
mov.f32 %f268, 0fBF000000;
|
|
fma.rn.f32 %f1098, %f267, %f38, %f268;
|
|
|
|
BB0_26:
|
|
fma.rn.f32 %f1099, %f1098, %f1096, %f1096;
|
|
@%p24 bra BB0_28;
|
|
|
|
mov.f32 %f272, 0f3F800000;
|
|
fma.rn.f32 %f1099, %f1098, %f38, %f272;
|
|
|
|
BB0_28:
|
|
and.b32 %r182, %r46, 2;
|
|
setp.eq.s32 %p27, %r182, 0;
|
|
@%p27 bra BB0_30;
|
|
|
|
mov.f32 %f273, 0f00000000;
|
|
mov.f32 %f274, 0fBF800000;
|
|
fma.rn.f32 %f1099, %f1099, %f274, %f273;
|
|
|
|
BB0_30:
|
|
@%p15 bra BB0_32;
|
|
|
|
mov.f32 %f275, 0f00000000;
|
|
mul.rn.f32 %f1101, %f1101, %f275;
|
|
|
|
BB0_32:
|
|
mul.f32 %f276, %f1101, 0f3F22F983;
|
|
cvt.rni.s32.f32 %r404, %f276;
|
|
cvt.rn.f32.s32 %f277, %r404;
|
|
neg.f32 %f278, %f277;
|
|
fma.rn.f32 %f280, %f278, %f256, %f1101;
|
|
fma.rn.f32 %f282, %f278, %f258, %f280;
|
|
fma.rn.f32 %f1102, %f278, %f260, %f282;
|
|
abs.f32 %f284, %f1101;
|
|
setp.leu.f32 %p29, %f284, 0f47CE4780;
|
|
@%p29 bra BB0_43;
|
|
|
|
add.u64 %rd59, %SP, 4;
|
|
cvta.to.local.u64 %rd9, %rd59;
|
|
mov.b32 %r49, %f1101;
|
|
shr.u32 %r50, %r49, 23;
|
|
shl.b32 %r185, %r49, 8;
|
|
or.b32 %r51, %r185, -2147483648;
|
|
mov.u32 %r395, 0;
|
|
mov.u64 %rd280, %rd9;
|
|
mov.u64 %rd281, %rd31;
|
|
mov.u32 %r396, %r395;
|
|
|
|
BB0_34:
|
|
.pragma "nounroll";
|
|
shl.b64 %rd60, %rd281, 2;
|
|
mov.u64 %rd61, __cudart_i2opi_f;
|
|
add.s64 %rd62, %rd61, %rd60;
|
|
ld.const.u32 %r188, [%rd62];
|
|
// inline asm
|
|
{
|
|
mad.lo.cc.u32 %r186, %r188, %r51, %r396;
|
|
madc.hi.u32 %r396, %r188, %r51, 0;
|
|
}
|
|
// inline asm
|
|
st.local.u32 [%rd280], %r186;
|
|
add.s32 %r395, %r395, 1;
|
|
cvt.s64.s32 %rd281, %r395;
|
|
mul.wide.s32 %rd63, %r395, 4;
|
|
add.s64 %rd280, %rd9, %rd63;
|
|
setp.ne.s32 %p30, %r395, 6;
|
|
@%p30 bra BB0_34;
|
|
|
|
and.b32 %r191, %r50, 255;
|
|
add.s32 %r192, %r191, -128;
|
|
shr.u32 %r193, %r192, 5;
|
|
and.b32 %r56, %r49, -2147483648;
|
|
cvta.to.local.u64 %rd65, %rd59;
|
|
st.local.u32 [%rd65+24], %r396;
|
|
mov.u32 %r194, 6;
|
|
sub.s32 %r195, %r194, %r193;
|
|
mul.wide.s32 %rd66, %r195, 4;
|
|
add.s64 %rd15, %rd65, %rd66;
|
|
ld.local.u32 %r397, [%rd15];
|
|
ld.local.u32 %r398, [%rd15+-4];
|
|
and.b32 %r59, %r50, 31;
|
|
setp.eq.s32 %p31, %r59, 0;
|
|
@%p31 bra BB0_37;
|
|
|
|
mov.u32 %r196, 32;
|
|
sub.s32 %r197, %r196, %r59;
|
|
shr.u32 %r198, %r398, %r197;
|
|
shl.b32 %r199, %r397, %r59;
|
|
add.s32 %r397, %r198, %r199;
|
|
ld.local.u32 %r200, [%rd15+-8];
|
|
shr.u32 %r201, %r200, %r197;
|
|
shl.b32 %r202, %r398, %r59;
|
|
add.s32 %r398, %r201, %r202;
|
|
|
|
BB0_37:
|
|
shr.u32 %r203, %r398, 30;
|
|
shl.b32 %r204, %r397, 2;
|
|
add.s32 %r399, %r203, %r204;
|
|
shl.b32 %r65, %r398, 2;
|
|
shr.u32 %r205, %r399, 31;
|
|
shr.u32 %r206, %r397, 30;
|
|
add.s32 %r66, %r205, %r206;
|
|
setp.eq.s32 %p32, %r205, 0;
|
|
@%p32 bra BB0_38;
|
|
bra.uni BB0_39;
|
|
|
|
BB0_38:
|
|
mov.u32 %r400, %r56;
|
|
mov.u32 %r401, %r65;
|
|
bra.uni BB0_40;
|
|
|
|
BB0_39:
|
|
not.b32 %r207, %r399;
|
|
neg.s32 %r401, %r65;
|
|
setp.eq.s32 %p33, %r65, 0;
|
|
selp.u32 %r208, 1, 0, %p33;
|
|
add.s32 %r399, %r208, %r207;
|
|
xor.b32 %r400, %r56, -2147483648;
|
|
|
|
BB0_40:
|
|
clz.b32 %r403, %r399;
|
|
setp.eq.s32 %p34, %r403, 0;
|
|
shl.b32 %r209, %r399, %r403;
|
|
mov.u32 %r210, 32;
|
|
sub.s32 %r211, %r210, %r403;
|
|
shr.u32 %r212, %r401, %r211;
|
|
add.s32 %r213, %r212, %r209;
|
|
selp.b32 %r74, %r399, %r213, %p34;
|
|
mov.u32 %r214, -921707870;
|
|
mul.hi.u32 %r402, %r74, %r214;
|
|
setp.eq.s32 %p35, %r56, 0;
|
|
neg.s32 %r215, %r66;
|
|
selp.b32 %r404, %r66, %r215, %p35;
|
|
setp.lt.s32 %p36, %r402, 1;
|
|
@%p36 bra BB0_42;
|
|
|
|
mul.lo.s32 %r216, %r74, -921707870;
|
|
shr.u32 %r217, %r216, 31;
|
|
shl.b32 %r218, %r402, 1;
|
|
add.s32 %r402, %r217, %r218;
|
|
add.s32 %r403, %r403, 1;
|
|
|
|
BB0_42:
|
|
mov.u32 %r219, 126;
|
|
sub.s32 %r220, %r219, %r403;
|
|
shl.b32 %r221, %r220, 23;
|
|
add.s32 %r222, %r402, 1;
|
|
shr.u32 %r223, %r222, 7;
|
|
add.s32 %r224, %r223, 1;
|
|
shr.u32 %r225, %r224, 1;
|
|
add.s32 %r226, %r225, %r221;
|
|
or.b32 %r227, %r226, %r400;
|
|
mov.b32 %f1102, %r227;
|
|
|
|
BB0_43:
|
|
mul.rn.f32 %f55, %f1102, %f1102;
|
|
and.b32 %r82, %r404, 1;
|
|
setp.eq.s32 %p37, %r82, 0;
|
|
@%p37 bra BB0_45;
|
|
bra.uni BB0_44;
|
|
|
|
BB0_45:
|
|
mov.f32 %f287, 0f3C08839E;
|
|
mov.f32 %f288, 0fB94CA1F9;
|
|
fma.rn.f32 %f1103, %f288, %f55, %f287;
|
|
bra.uni BB0_46;
|
|
|
|
BB0_44:
|
|
mov.f32 %f285, 0fBAB6061A;
|
|
mov.f32 %f286, 0f37CCF5CE;
|
|
fma.rn.f32 %f1103, %f286, %f55, %f285;
|
|
|
|
BB0_46:
|
|
@%p37 bra BB0_48;
|
|
bra.uni BB0_47;
|
|
|
|
BB0_48:
|
|
mov.f32 %f292, 0fBE2AAAA3;
|
|
fma.rn.f32 %f293, %f1103, %f55, %f292;
|
|
mov.f32 %f294, 0f00000000;
|
|
fma.rn.f32 %f1104, %f293, %f55, %f294;
|
|
bra.uni BB0_49;
|
|
|
|
BB0_47:
|
|
mov.f32 %f289, 0f3D2AAAA5;
|
|
fma.rn.f32 %f290, %f1103, %f55, %f289;
|
|
mov.f32 %f291, 0fBF000000;
|
|
fma.rn.f32 %f1104, %f290, %f55, %f291;
|
|
|
|
BB0_49:
|
|
fma.rn.f32 %f1105, %f1104, %f1102, %f1102;
|
|
@%p37 bra BB0_51;
|
|
|
|
mov.f32 %f295, 0f3F800000;
|
|
fma.rn.f32 %f1105, %f1104, %f55, %f295;
|
|
|
|
BB0_51:
|
|
and.b32 %r228, %r404, 2;
|
|
setp.eq.s32 %p40, %r228, 0;
|
|
@%p40 bra BB0_53;
|
|
|
|
mov.f32 %f296, 0f00000000;
|
|
mov.f32 %f297, 0fBF800000;
|
|
fma.rn.f32 %f1105, %f1105, %f297, %f296;
|
|
|
|
BB0_53:
|
|
mul.f32 %f306, %f30, %f1099;
|
|
add.u64 %rd67, %SP, 0;
|
|
cvta.to.local.u64 %rd68, %rd67;
|
|
mul.f32 %f307, %f306, %f306;
|
|
mov.f32 %f308, 0f3F800000;
|
|
sub.f32 %f309, %f308, %f307;
|
|
mul.f32 %f310, %f30, %f1105;
|
|
mul.f32 %f311, %f310, %f310;
|
|
sub.f32 %f312, %f309, %f311;
|
|
mov.f32 %f313, 0f00000000;
|
|
max.f32 %f314, %f313, %f312;
|
|
sqrt.rn.f32 %f315, %f314;
|
|
mul.f32 %f316, %f16, %f310;
|
|
mul.f32 %f317, %f17, %f310;
|
|
mul.f32 %f318, %f18, %f310;
|
|
fma.rn.f32 %f319, %f19, %f306, %f316;
|
|
fma.rn.f32 %f320, %f20, %f306, %f317;
|
|
fma.rn.f32 %f321, %f21, %f306, %f318;
|
|
fma.rn.f32 %f322, %f7, %f315, %f319;
|
|
fma.rn.f32 %f323, %f8, %f315, %f320;
|
|
fma.rn.f32 %f324, %f9, %f315, %f321;
|
|
add.f32 %f325, %f7, %f322;
|
|
add.f32 %f326, %f8, %f323;
|
|
add.f32 %f327, %f9, %f324;
|
|
ld.global.f32 %f328, [shadowSpread];
|
|
mul.f32 %f329, %f328, %f325;
|
|
mul.f32 %f330, %f328, %f326;
|
|
mul.f32 %f331, %f328, %f327;
|
|
sub.f32 %f332, %f329, %f7;
|
|
sub.f32 %f333, %f330, %f8;
|
|
sub.f32 %f334, %f331, %f9;
|
|
mul.f32 %f335, %f333, %f333;
|
|
fma.rn.f32 %f336, %f332, %f332, %f335;
|
|
fma.rn.f32 %f337, %f334, %f334, %f336;
|
|
sqrt.rn.f32 %f338, %f337;
|
|
rcp.rn.f32 %f339, %f338;
|
|
mul.f32 %f301, %f339, %f332;
|
|
mul.f32 %f302, %f339, %f333;
|
|
mul.f32 %f303, %f339, %f334;
|
|
ld.global.u32 %r232, [imageEnabled];
|
|
and.b32 %r233, %r232, 32;
|
|
setp.eq.s32 %p41, %r233, 0;
|
|
selp.f32 %f340, 0f3F800000, 0f41200000, %p41;
|
|
mul.f32 %f304, %f340, %f28;
|
|
mov.u32 %r234, 1065353216;
|
|
st.local.u32 [%rd68], %r234;
|
|
ld.global.u32 %r229, [root];
|
|
mov.u32 %r230, 1;
|
|
mov.f32 %f305, 0f6C4ECB8F;
|
|
// inline asm
|
|
call _rt_trace_64, (%r229, %f13, %f14, %f15, %f301, %f302, %f303, %r230, %f304, %f305, %rd67, %r106);
|
|
// inline asm
|
|
ld.local.f32 %f341, [%rd68];
|
|
add.f32 %f1107, %f1107, %f341;
|
|
ld.global.u32 %r380, [samples];
|
|
add.s32 %r383, %r383, 1;
|
|
setp.lt.s32 %p42, %r383, %r380;
|
|
@%p42 bra BB0_7;
|
|
|
|
BB0_54:
|
|
add.s32 %r381, %r381, 1;
|
|
setp.lt.s32 %p43, %r381, %r380;
|
|
@%p43 bra BB0_5;
|
|
|
|
BB0_55:
|
|
mul.f32 %f343, %f1092, %f9;
|
|
mul.f32 %f344, %f1091, %f8;
|
|
neg.f32 %f345, %f344;
|
|
mul.f32 %f346, %f1090, %f7;
|
|
sub.f32 %f347, %f345, %f346;
|
|
sub.f32 %f70, %f347, %f343;
|
|
setp.eq.s32 %p44, %r380, 0;
|
|
mov.f32 %f1109, 0f3F800000;
|
|
@%p44 bra BB0_57;
|
|
|
|
mul.lo.s32 %r235, %r380, %r380;
|
|
cvt.rn.f32.s32 %f348, %r235;
|
|
div.rn.f32 %f1109, %f1107, %f348;
|
|
|
|
BB0_57:
|
|
mul.f32 %f359, %f11, %f20;
|
|
fma.rn.f32 %f360, %f10, %f19, %f359;
|
|
fma.rn.f32 %f361, %f12, %f21, %f360;
|
|
ld.global.v4.f32 {%f362, %f363, %f364, %f365}, [lightTilingOffset];
|
|
fma.rn.f32 %f353, %f361, %f362, %f364;
|
|
mul.f32 %f368, %f11, %f17;
|
|
fma.rn.f32 %f369, %f10, %f16, %f368;
|
|
fma.rn.f32 %f370, %f12, %f18, %f369;
|
|
fma.rn.f32 %f354, %f370, %f363, %f365;
|
|
ld.global.u32 %r236, [lightCookie];
|
|
mov.f32 %f356, 0f00000000;
|
|
// inline asm
|
|
call (%f349, %f350, %f351, %f352), _rt_texture_get_f_id, (%r236, %r105, %f353, %f354, %f356, %f356);
|
|
// inline asm
|
|
min.f32 %f373, %f349, %f350;
|
|
min.f32 %f374, %f373, %f351;
|
|
mul.f32 %f73, %f1109, %f374;
|
|
ld.global.f32 %f375, [directColor];
|
|
mul.f32 %f376, %f1109, %f375;
|
|
ld.global.f32 %f377, [directColor+4];
|
|
mul.f32 %f378, %f1109, %f377;
|
|
ld.global.f32 %f379, [directColor+8];
|
|
mul.f32 %f380, %f1109, %f379;
|
|
mul.f32 %f74, %f349, %f376;
|
|
mul.f32 %f75, %f350, %f378;
|
|
mul.f32 %f76, %f351, %f380;
|
|
cvt.sat.f32.f32 %f381, %f70;
|
|
mul.f32 %f77, %f74, %f381;
|
|
mul.f32 %f78, %f75, %f381;
|
|
mul.f32 %f79, %f381, %f76;
|
|
fma.rn.f32 %f382, %f70, 0f3F000000, 0f3F000000;
|
|
cvt.sat.f32.f32 %f383, %f382;
|
|
add.f32 %f80, %f383, %f383;
|
|
mov.f32 %f387, 0f41A00000;
|
|
abs.f32 %f82, %f80;
|
|
setp.lt.f32 %p45, %f82, 0f00800000;
|
|
mul.f32 %f389, %f82, 0f4B800000;
|
|
selp.f32 %f390, 0fC3170000, 0fC2FE0000, %p45;
|
|
selp.f32 %f391, %f389, %f82, %p45;
|
|
mov.b32 %r238, %f391;
|
|
and.b32 %r239, %r238, 8388607;
|
|
or.b32 %r240, %r239, 1065353216;
|
|
mov.b32 %f392, %r240;
|
|
shr.u32 %r241, %r238, 23;
|
|
cvt.rn.f32.u32 %f393, %r241;
|
|
add.f32 %f394, %f390, %f393;
|
|
setp.gt.f32 %p46, %f392, 0f3FB504F3;
|
|
mul.f32 %f395, %f392, 0f3F000000;
|
|
add.f32 %f396, %f394, 0f3F800000;
|
|
selp.f32 %f397, %f395, %f392, %p46;
|
|
selp.f32 %f398, %f396, %f394, %p46;
|
|
add.f32 %f399, %f397, 0fBF800000;
|
|
add.f32 %f358, %f397, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f357,%f358;
|
|
// inline asm
|
|
add.f32 %f400, %f399, %f399;
|
|
mul.f32 %f401, %f357, %f400;
|
|
mul.f32 %f402, %f401, %f401;
|
|
mov.f32 %f403, 0f3C4CAF63;
|
|
mov.f32 %f404, 0f3B18F0FE;
|
|
fma.rn.f32 %f405, %f404, %f402, %f403;
|
|
mov.f32 %f406, 0f3DAAAABD;
|
|
fma.rn.f32 %f407, %f405, %f402, %f406;
|
|
mul.rn.f32 %f408, %f407, %f402;
|
|
mul.rn.f32 %f409, %f408, %f401;
|
|
sub.f32 %f410, %f399, %f401;
|
|
neg.f32 %f411, %f401;
|
|
add.f32 %f412, %f410, %f410;
|
|
fma.rn.f32 %f413, %f411, %f399, %f412;
|
|
mul.rn.f32 %f414, %f357, %f413;
|
|
add.f32 %f415, %f409, %f401;
|
|
sub.f32 %f416, %f401, %f415;
|
|
add.f32 %f417, %f409, %f416;
|
|
add.f32 %f418, %f414, %f417;
|
|
add.f32 %f419, %f415, %f418;
|
|
sub.f32 %f420, %f415, %f419;
|
|
add.f32 %f421, %f418, %f420;
|
|
mov.f32 %f422, 0f3F317200;
|
|
mul.rn.f32 %f423, %f398, %f422;
|
|
mov.f32 %f424, 0f35BFBE8E;
|
|
mul.rn.f32 %f425, %f398, %f424;
|
|
add.f32 %f426, %f423, %f419;
|
|
sub.f32 %f427, %f423, %f426;
|
|
add.f32 %f428, %f419, %f427;
|
|
add.f32 %f429, %f421, %f428;
|
|
add.f32 %f430, %f425, %f429;
|
|
add.f32 %f431, %f426, %f430;
|
|
sub.f32 %f432, %f426, %f431;
|
|
add.f32 %f433, %f430, %f432;
|
|
mul.rn.f32 %f434, %f387, %f431;
|
|
neg.f32 %f435, %f434;
|
|
fma.rn.f32 %f436, %f387, %f431, %f435;
|
|
fma.rn.f32 %f437, %f387, %f433, %f436;
|
|
fma.rn.f32 %f438, %f356, %f431, %f437;
|
|
add.rn.f32 %f439, %f434, %f438;
|
|
neg.f32 %f440, %f439;
|
|
add.rn.f32 %f441, %f434, %f440;
|
|
add.rn.f32 %f442, %f441, %f438;
|
|
mov.b32 %r242, %f439;
|
|
setp.eq.s32 %p47, %r242, 1118925336;
|
|
add.s32 %r243, %r242, -1;
|
|
mov.b32 %f443, %r243;
|
|
add.f32 %f444, %f442, 0f37000000;
|
|
selp.f32 %f445, %f443, %f439, %p47;
|
|
selp.f32 %f83, %f444, %f442, %p47;
|
|
mul.f32 %f446, %f445, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f447, %f446;
|
|
mov.f32 %f448, 0fBF317200;
|
|
fma.rn.f32 %f449, %f447, %f448, %f445;
|
|
mov.f32 %f450, 0fB5BFBE8E;
|
|
fma.rn.f32 %f451, %f447, %f450, %f449;
|
|
mul.f32 %f452, %f451, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f453, %f452;
|
|
add.f32 %f454, %f447, 0f00000000;
|
|
ex2.approx.f32 %f455, %f454;
|
|
mul.f32 %f456, %f453, %f455;
|
|
setp.lt.f32 %p48, %f445, 0fC2D20000;
|
|
selp.f32 %f457, 0f00000000, %f456, %p48;
|
|
setp.gt.f32 %p49, %f445, 0f42D20000;
|
|
selp.f32 %f1110, 0f7F800000, %f457, %p49;
|
|
setp.eq.f32 %p50, %f1110, 0f7F800000;
|
|
@%p50 bra BB0_59;
|
|
|
|
fma.rn.f32 %f1110, %f1110, %f83, %f1110;
|
|
|
|
BB0_59:
|
|
mov.f32 %f1027, 0f41200000;
|
|
cvt.rzi.f32.f32 %f1026, %f1027;
|
|
add.f32 %f1025, %f1026, %f1026;
|
|
mov.f32 %f1024, 0f41A00000;
|
|
sub.f32 %f1023, %f1024, %f1025;
|
|
abs.f32 %f1022, %f1023;
|
|
setp.lt.f32 %p51, %f80, 0f00000000;
|
|
setp.eq.f32 %p52, %f1022, 0f3F800000;
|
|
and.pred %p1, %p51, %p52;
|
|
mov.b32 %r244, %f1110;
|
|
xor.b32 %r245, %r244, -2147483648;
|
|
mov.b32 %f458, %r245;
|
|
selp.f32 %f1112, %f458, %f1110, %p1;
|
|
setp.eq.f32 %p53, %f80, 0f00000000;
|
|
@%p53 bra BB0_62;
|
|
bra.uni BB0_60;
|
|
|
|
BB0_62:
|
|
add.f32 %f461, %f80, %f80;
|
|
selp.f32 %f1112, %f461, 0f00000000, %p52;
|
|
bra.uni BB0_63;
|
|
|
|
BB0_60:
|
|
setp.geu.f32 %p54, %f80, 0f00000000;
|
|
@%p54 bra BB0_63;
|
|
|
|
mov.f32 %f1063, 0f41A00000;
|
|
cvt.rzi.f32.f32 %f460, %f1063;
|
|
setp.neu.f32 %p55, %f460, 0f41A00000;
|
|
selp.f32 %f1112, 0f7FFFFFFF, %f1112, %p55;
|
|
|
|
BB0_63:
|
|
add.f32 %f462, %f82, 0f41A00000;
|
|
mov.b32 %r246, %f462;
|
|
setp.lt.s32 %p57, %r246, 2139095040;
|
|
@%p57 bra BB0_68;
|
|
|
|
setp.gtu.f32 %p58, %f82, 0f7F800000;
|
|
@%p58 bra BB0_67;
|
|
bra.uni BB0_65;
|
|
|
|
BB0_67:
|
|
add.f32 %f1112, %f80, 0f41A00000;
|
|
bra.uni BB0_68;
|
|
|
|
BB0_65:
|
|
setp.neu.f32 %p59, %f82, 0f7F800000;
|
|
@%p59 bra BB0_68;
|
|
|
|
selp.f32 %f1112, 0fFF800000, 0f7F800000, %p1;
|
|
|
|
BB0_68:
|
|
setp.eq.f32 %p60, %f80, 0f3F800000;
|
|
selp.f32 %f463, 0f3F800000, %f1112, %p60;
|
|
cvt.sat.f32.f32 %f464, %f463;
|
|
mul.f32 %f94, %f74, %f464;
|
|
mul.f32 %f95, %f75, %f464;
|
|
mul.f32 %f96, %f76, %f464;
|
|
ld.global.u32 %r409, [imageEnabled];
|
|
and.b32 %r247, %r409, 8;
|
|
setp.eq.s32 %p61, %r247, 0;
|
|
@%p61 bra BB0_81;
|
|
|
|
mov.f32 %f1035, 0fB5BFBE8E;
|
|
mov.f32 %f1034, 0fBF317200;
|
|
mov.f32 %f1033, 0f00000000;
|
|
mov.f32 %f1032, 0f35BFBE8E;
|
|
mov.f32 %f1031, 0f3F317200;
|
|
mov.f32 %f1030, 0f3DAAAABD;
|
|
mov.f32 %f1029, 0f3C4CAF63;
|
|
mov.f32 %f1028, 0f3B18F0FE;
|
|
cvt.u64.u32 %rd71, %r2;
|
|
cvt.u64.u32 %rd72, %r3;
|
|
mov.u64 %rd75, image_Mask;
|
|
cvta.global.u64 %rd70, %rd75;
|
|
// inline asm
|
|
call (%rd69), _rt_buffer_get_64, (%rd70, %r105, %r105, %rd71, %rd72, %rd31, %rd31);
|
|
// inline asm
|
|
abs.f32 %f98, %f73;
|
|
setp.lt.f32 %p62, %f98, 0f00800000;
|
|
mul.f32 %f470, %f98, 0f4B800000;
|
|
selp.f32 %f471, 0fC3170000, 0fC2FE0000, %p62;
|
|
selp.f32 %f472, %f470, %f98, %p62;
|
|
mov.b32 %r250, %f472;
|
|
and.b32 %r251, %r250, 8388607;
|
|
or.b32 %r252, %r251, 1065353216;
|
|
mov.b32 %f473, %r252;
|
|
shr.u32 %r253, %r250, 23;
|
|
cvt.rn.f32.u32 %f474, %r253;
|
|
add.f32 %f475, %f471, %f474;
|
|
setp.gt.f32 %p63, %f473, 0f3FB504F3;
|
|
mul.f32 %f476, %f473, 0f3F000000;
|
|
add.f32 %f477, %f475, 0f3F800000;
|
|
selp.f32 %f478, %f476, %f473, %p63;
|
|
selp.f32 %f479, %f477, %f475, %p63;
|
|
add.f32 %f480, %f478, 0fBF800000;
|
|
add.f32 %f466, %f478, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f465,%f466;
|
|
// inline asm
|
|
add.f32 %f481, %f480, %f480;
|
|
mul.f32 %f482, %f465, %f481;
|
|
mul.f32 %f483, %f482, %f482;
|
|
fma.rn.f32 %f486, %f1028, %f483, %f1029;
|
|
fma.rn.f32 %f488, %f486, %f483, %f1030;
|
|
mul.rn.f32 %f489, %f488, %f483;
|
|
mul.rn.f32 %f490, %f489, %f482;
|
|
sub.f32 %f491, %f480, %f482;
|
|
neg.f32 %f492, %f482;
|
|
add.f32 %f493, %f491, %f491;
|
|
fma.rn.f32 %f494, %f492, %f480, %f493;
|
|
mul.rn.f32 %f495, %f465, %f494;
|
|
add.f32 %f496, %f490, %f482;
|
|
sub.f32 %f497, %f482, %f496;
|
|
add.f32 %f498, %f490, %f497;
|
|
add.f32 %f499, %f495, %f498;
|
|
add.f32 %f500, %f496, %f499;
|
|
sub.f32 %f501, %f496, %f500;
|
|
add.f32 %f502, %f499, %f501;
|
|
mul.rn.f32 %f504, %f479, %f1031;
|
|
mul.rn.f32 %f506, %f479, %f1032;
|
|
add.f32 %f507, %f504, %f500;
|
|
sub.f32 %f508, %f504, %f507;
|
|
add.f32 %f509, %f500, %f508;
|
|
add.f32 %f510, %f502, %f509;
|
|
add.f32 %f511, %f506, %f510;
|
|
add.f32 %f512, %f507, %f511;
|
|
sub.f32 %f513, %f507, %f512;
|
|
add.f32 %f514, %f511, %f513;
|
|
mov.f32 %f515, 0f3EE8BA2E;
|
|
mul.rn.f32 %f516, %f515, %f512;
|
|
neg.f32 %f517, %f516;
|
|
fma.rn.f32 %f518, %f515, %f512, %f517;
|
|
fma.rn.f32 %f519, %f515, %f514, %f518;
|
|
fma.rn.f32 %f521, %f1033, %f512, %f519;
|
|
add.rn.f32 %f522, %f516, %f521;
|
|
neg.f32 %f523, %f522;
|
|
add.rn.f32 %f524, %f516, %f523;
|
|
add.rn.f32 %f525, %f524, %f521;
|
|
mov.b32 %r254, %f522;
|
|
setp.eq.s32 %p64, %r254, 1118925336;
|
|
add.s32 %r255, %r254, -1;
|
|
mov.b32 %f526, %r255;
|
|
add.f32 %f527, %f525, 0f37000000;
|
|
selp.f32 %f528, %f526, %f522, %p64;
|
|
selp.f32 %f99, %f527, %f525, %p64;
|
|
mul.f32 %f529, %f528, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f530, %f529;
|
|
fma.rn.f32 %f532, %f530, %f1034, %f528;
|
|
fma.rn.f32 %f534, %f530, %f1035, %f532;
|
|
mul.f32 %f535, %f534, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f536, %f535;
|
|
add.f32 %f537, %f530, 0f00000000;
|
|
ex2.approx.f32 %f538, %f537;
|
|
mul.f32 %f539, %f536, %f538;
|
|
setp.lt.f32 %p65, %f528, 0fC2D20000;
|
|
selp.f32 %f540, 0f00000000, %f539, %p65;
|
|
setp.gt.f32 %p66, %f528, 0f42D20000;
|
|
selp.f32 %f1113, 0f7F800000, %f540, %p66;
|
|
setp.eq.f32 %p67, %f1113, 0f7F800000;
|
|
@%p67 bra BB0_71;
|
|
|
|
fma.rn.f32 %f1113, %f1113, %f99, %f1113;
|
|
|
|
BB0_71:
|
|
mov.f32 %f1067, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f1066, %f1067;
|
|
fma.rn.f32 %f1065, %f1066, 0fC0000000, 0f3EE8BA2E;
|
|
abs.f32 %f1064, %f1065;
|
|
setp.lt.f32 %p68, %f73, 0f00000000;
|
|
setp.eq.f32 %p69, %f1064, 0f3F800000;
|
|
and.pred %p2, %p68, %p69;
|
|
mov.b32 %r256, %f1113;
|
|
xor.b32 %r257, %r256, -2147483648;
|
|
mov.b32 %f541, %r257;
|
|
selp.f32 %f1115, %f541, %f1113, %p2;
|
|
setp.eq.f32 %p70, %f73, 0f00000000;
|
|
@%p70 bra BB0_74;
|
|
bra.uni BB0_72;
|
|
|
|
BB0_74:
|
|
add.f32 %f544, %f73, %f73;
|
|
selp.f32 %f1115, %f544, 0f00000000, %p69;
|
|
bra.uni BB0_75;
|
|
|
|
BB0_142:
|
|
mov.u64 %rd217, image_HDR;
|
|
cvta.global.u64 %rd212, %rd217;
|
|
mov.u32 %r354, 8;
|
|
mov.u64 %rd216, 0;
|
|
// inline asm
|
|
call (%rd211), _rt_buffer_get_64, (%rd212, %r105, %r354, %rd24, %rd25, %rd216, %rd216);
|
|
// inline asm
|
|
mov.f32 %f1000, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs116, %f1000;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs117, 0;
|
|
st.v4.u16 [%rd211], {%rs116, %rs116, %rs116, %rs117};
|
|
|
|
BB0_143:
|
|
ld.global.u32 %r355, [additive];
|
|
setp.eq.s32 %p145, %r355, 0;
|
|
@%p145 bra BB0_145;
|
|
|
|
mov.u64 %rd230, image_RNM0;
|
|
cvta.global.u64 %rd219, %rd230;
|
|
mov.u32 %r359, 8;
|
|
mov.u64 %rd229, 0;
|
|
// inline asm
|
|
call (%rd218), _rt_buffer_get_64, (%rd219, %r105, %r359, %rd24, %rd25, %rd229, %rd229);
|
|
// inline asm
|
|
ld.v4.u16 {%rs124, %rs125, %rs126, %rs127}, [%rd218];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1001, %rs124;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1002, %rs125;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1003, %rs126;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd224), _rt_buffer_get_64, (%rd219, %r105, %r359, %rd24, %rd25, %rd229, %rd229);
|
|
// inline asm
|
|
add.f32 %f1004, %f1001, 0f00000000;
|
|
add.f32 %f1005, %f1002, 0f00000000;
|
|
add.f32 %f1006, %f1003, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs123, %f1006;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs122, %f1005;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs121, %f1004;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs128, 0;
|
|
st.v4.u16 [%rd224], {%rs121, %rs122, %rs123, %rs128};
|
|
bra.uni BB0_146;
|
|
|
|
BB0_145:
|
|
mov.u64 %rd237, image_RNM0;
|
|
cvta.global.u64 %rd232, %rd237;
|
|
mov.u32 %r361, 8;
|
|
mov.u64 %rd236, 0;
|
|
// inline asm
|
|
call (%rd231), _rt_buffer_get_64, (%rd232, %r105, %r361, %rd24, %rd25, %rd236, %rd236);
|
|
// inline asm
|
|
mov.f32 %f1007, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs129, %f1007;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs130, 0;
|
|
st.v4.u16 [%rd231], {%rs129, %rs129, %rs129, %rs130};
|
|
|
|
BB0_146:
|
|
ld.global.u32 %r362, [additive];
|
|
setp.eq.s32 %p146, %r362, 0;
|
|
@%p146 bra BB0_148;
|
|
|
|
mov.u64 %rd250, image_RNM1;
|
|
cvta.global.u64 %rd239, %rd250;
|
|
mov.u32 %r366, 8;
|
|
mov.u64 %rd249, 0;
|
|
// inline asm
|
|
call (%rd238), _rt_buffer_get_64, (%rd239, %r105, %r366, %rd24, %rd25, %rd249, %rd249);
|
|
// inline asm
|
|
ld.v4.u16 {%rs137, %rs138, %rs139, %rs140}, [%rd238];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1008, %rs137;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1009, %rs138;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1010, %rs139;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd244), _rt_buffer_get_64, (%rd239, %r105, %r366, %rd24, %rd25, %rd249, %rd249);
|
|
// inline asm
|
|
add.f32 %f1011, %f1008, 0f00000000;
|
|
add.f32 %f1012, %f1009, 0f00000000;
|
|
add.f32 %f1013, %f1010, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs136, %f1013;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs135, %f1012;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs134, %f1011;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs141, 0;
|
|
st.v4.u16 [%rd244], {%rs134, %rs135, %rs136, %rs141};
|
|
bra.uni BB0_149;
|
|
|
|
BB0_148:
|
|
mov.u64 %rd257, image_RNM1;
|
|
cvta.global.u64 %rd252, %rd257;
|
|
mov.u32 %r368, 8;
|
|
mov.u64 %rd256, 0;
|
|
// inline asm
|
|
call (%rd251), _rt_buffer_get_64, (%rd252, %r105, %r368, %rd24, %rd25, %rd256, %rd256);
|
|
// inline asm
|
|
mov.f32 %f1014, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs142, %f1014;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs143, 0;
|
|
st.v4.u16 [%rd251], {%rs142, %rs142, %rs142, %rs143};
|
|
|
|
BB0_149:
|
|
ld.global.u32 %r369, [additive];
|
|
setp.eq.s32 %p147, %r369, 0;
|
|
@%p147 bra BB0_151;
|
|
|
|
mov.u64 %rd270, image_RNM2;
|
|
cvta.global.u64 %rd259, %rd270;
|
|
mov.u32 %r373, 8;
|
|
mov.u64 %rd269, 0;
|
|
// inline asm
|
|
call (%rd258), _rt_buffer_get_64, (%rd259, %r105, %r373, %rd24, %rd25, %rd269, %rd269);
|
|
// inline asm
|
|
ld.v4.u16 {%rs150, %rs151, %rs152, %rs153}, [%rd258];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1015, %rs150;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1016, %rs151;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1017, %rs152;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd264), _rt_buffer_get_64, (%rd259, %r105, %r373, %rd24, %rd25, %rd269, %rd269);
|
|
// inline asm
|
|
add.f32 %f1018, %f1015, 0f00000000;
|
|
add.f32 %f1019, %f1016, 0f00000000;
|
|
add.f32 %f1020, %f1017, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs149, %f1020;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs148, %f1019;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs147, %f1018;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs154, 0;
|
|
st.v4.u16 [%rd264], {%rs147, %rs148, %rs149, %rs154};
|
|
bra.uni BB0_152;
|
|
|
|
BB0_151:
|
|
mov.u64 %rd277, image_RNM2;
|
|
cvta.global.u64 %rd272, %rd277;
|
|
mov.u32 %r375, 8;
|
|
mov.u64 %rd276, 0;
|
|
// inline asm
|
|
call (%rd271), _rt_buffer_get_64, (%rd272, %r105, %r375, %rd24, %rd25, %rd276, %rd276);
|
|
// inline asm
|
|
mov.f32 %f1021, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs155, %f1021;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs156, 0;
|
|
st.v4.u16 [%rd271], {%rs155, %rs155, %rs155, %rs156};
|
|
bra.uni BB0_152;
|
|
|
|
BB0_72:
|
|
setp.geu.f32 %p71, %f73, 0f00000000;
|
|
@%p71 bra BB0_75;
|
|
|
|
mov.f32 %f1071, 0f3EE8BA2E;
|
|
cvt.rzi.f32.f32 %f543, %f1071;
|
|
setp.neu.f32 %p72, %f543, 0f3EE8BA2E;
|
|
selp.f32 %f1115, 0f7FFFFFFF, %f1115, %p72;
|
|
|
|
BB0_75:
|
|
abs.f32 %f1068, %f73;
|
|
add.f32 %f545, %f1068, 0f3EE8BA2E;
|
|
mov.b32 %r258, %f545;
|
|
setp.lt.s32 %p74, %r258, 2139095040;
|
|
@%p74 bra BB0_80;
|
|
|
|
abs.f32 %f1069, %f73;
|
|
setp.gtu.f32 %p75, %f1069, 0f7F800000;
|
|
@%p75 bra BB0_79;
|
|
bra.uni BB0_77;
|
|
|
|
BB0_79:
|
|
add.f32 %f1115, %f73, 0f3EE8BA2E;
|
|
bra.uni BB0_80;
|
|
|
|
BB0_77:
|
|
abs.f32 %f1070, %f73;
|
|
setp.neu.f32 %p76, %f1070, 0f7F800000;
|
|
@%p76 bra BB0_80;
|
|
|
|
selp.f32 %f1115, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
BB0_80:
|
|
mul.f32 %f546, %f1115, 0f437F0000;
|
|
setp.eq.f32 %p77, %f73, 0f3F800000;
|
|
selp.f32 %f547, 0f437F0000, %f546, %p77;
|
|
cvt.rzi.u32.f32 %r259, %f547;
|
|
cvt.u16.u32 %rs13, %r259;
|
|
mov.u16 %rs14, 255;
|
|
st.v2.u8 [%rd69], {%rs13, %rs14};
|
|
ld.global.u32 %r409, [imageEnabled];
|
|
|
|
BB0_81:
|
|
and.b32 %r260, %r409, 1;
|
|
setp.eq.b32 %p78, %r260, 1;
|
|
@!%p78 bra BB0_116;
|
|
bra.uni BB0_82;
|
|
|
|
BB0_82:
|
|
mov.f32 %f1043, 0fB5BFBE8E;
|
|
mov.f32 %f1042, 0fBF317200;
|
|
mov.f32 %f1041, 0f00000000;
|
|
mov.f32 %f1040, 0f35BFBE8E;
|
|
mov.f32 %f1039, 0f3F317200;
|
|
mov.f32 %f1038, 0f3DAAAABD;
|
|
mov.f32 %f1037, 0f3C4CAF63;
|
|
mov.f32 %f1036, 0f3B18F0FE;
|
|
abs.f32 %f111, %f77;
|
|
setp.lt.f32 %p79, %f111, 0f00800000;
|
|
mul.f32 %f553, %f111, 0f4B800000;
|
|
selp.f32 %f554, 0fC3170000, 0fC2FE0000, %p79;
|
|
selp.f32 %f555, %f553, %f111, %p79;
|
|
mov.b32 %r261, %f555;
|
|
and.b32 %r262, %r261, 8388607;
|
|
or.b32 %r263, %r262, 1065353216;
|
|
mov.b32 %f556, %r263;
|
|
shr.u32 %r264, %r261, 23;
|
|
cvt.rn.f32.u32 %f557, %r264;
|
|
add.f32 %f558, %f554, %f557;
|
|
setp.gt.f32 %p80, %f556, 0f3FB504F3;
|
|
mul.f32 %f559, %f556, 0f3F000000;
|
|
add.f32 %f560, %f558, 0f3F800000;
|
|
selp.f32 %f561, %f559, %f556, %p80;
|
|
selp.f32 %f562, %f560, %f558, %p80;
|
|
add.f32 %f563, %f561, 0fBF800000;
|
|
add.f32 %f549, %f561, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f548,%f549;
|
|
// inline asm
|
|
add.f32 %f564, %f563, %f563;
|
|
mul.f32 %f565, %f548, %f564;
|
|
mul.f32 %f566, %f565, %f565;
|
|
fma.rn.f32 %f569, %f1036, %f566, %f1037;
|
|
fma.rn.f32 %f571, %f569, %f566, %f1038;
|
|
mul.rn.f32 %f572, %f571, %f566;
|
|
mul.rn.f32 %f573, %f572, %f565;
|
|
sub.f32 %f574, %f563, %f565;
|
|
neg.f32 %f575, %f565;
|
|
add.f32 %f576, %f574, %f574;
|
|
fma.rn.f32 %f577, %f575, %f563, %f576;
|
|
mul.rn.f32 %f578, %f548, %f577;
|
|
add.f32 %f579, %f573, %f565;
|
|
sub.f32 %f580, %f565, %f579;
|
|
add.f32 %f581, %f573, %f580;
|
|
add.f32 %f582, %f578, %f581;
|
|
add.f32 %f583, %f579, %f582;
|
|
sub.f32 %f584, %f579, %f583;
|
|
add.f32 %f585, %f582, %f584;
|
|
mul.rn.f32 %f587, %f562, %f1039;
|
|
mul.rn.f32 %f589, %f562, %f1040;
|
|
add.f32 %f590, %f587, %f583;
|
|
sub.f32 %f591, %f587, %f590;
|
|
add.f32 %f592, %f583, %f591;
|
|
add.f32 %f593, %f585, %f592;
|
|
add.f32 %f594, %f589, %f593;
|
|
add.f32 %f595, %f590, %f594;
|
|
sub.f32 %f596, %f590, %f595;
|
|
add.f32 %f597, %f594, %f596;
|
|
mov.f32 %f598, 0f3EE66666;
|
|
mul.rn.f32 %f599, %f598, %f595;
|
|
neg.f32 %f600, %f599;
|
|
fma.rn.f32 %f601, %f598, %f595, %f600;
|
|
fma.rn.f32 %f602, %f598, %f597, %f601;
|
|
fma.rn.f32 %f604, %f1041, %f595, %f602;
|
|
add.rn.f32 %f605, %f599, %f604;
|
|
neg.f32 %f606, %f605;
|
|
add.rn.f32 %f607, %f599, %f606;
|
|
add.rn.f32 %f608, %f607, %f604;
|
|
mov.b32 %r265, %f605;
|
|
setp.eq.s32 %p81, %r265, 1118925336;
|
|
add.s32 %r266, %r265, -1;
|
|
mov.b32 %f609, %r266;
|
|
add.f32 %f610, %f608, 0f37000000;
|
|
selp.f32 %f611, %f609, %f605, %p81;
|
|
selp.f32 %f112, %f610, %f608, %p81;
|
|
mul.f32 %f612, %f611, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f613, %f612;
|
|
fma.rn.f32 %f615, %f613, %f1042, %f611;
|
|
fma.rn.f32 %f617, %f613, %f1043, %f615;
|
|
mul.f32 %f618, %f617, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f619, %f618;
|
|
add.f32 %f620, %f613, 0f00000000;
|
|
ex2.approx.f32 %f621, %f620;
|
|
mul.f32 %f622, %f619, %f621;
|
|
setp.lt.f32 %p82, %f611, 0fC2D20000;
|
|
selp.f32 %f623, 0f00000000, %f622, %p82;
|
|
setp.gt.f32 %p83, %f611, 0f42D20000;
|
|
selp.f32 %f1116, 0f7F800000, %f623, %p83;
|
|
setp.eq.f32 %p84, %f1116, 0f7F800000;
|
|
@%p84 bra BB0_84;
|
|
|
|
fma.rn.f32 %f1116, %f1116, %f112, %f1116;
|
|
|
|
BB0_84:
|
|
mov.f32 %f1075, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f1074, %f1075;
|
|
fma.rn.f32 %f1073, %f1074, 0fC0000000, 0f3EE66666;
|
|
abs.f32 %f1072, %f1073;
|
|
setp.lt.f32 %p85, %f77, 0f00000000;
|
|
setp.eq.f32 %p86, %f1072, 0f3F800000;
|
|
and.pred %p3, %p85, %p86;
|
|
mov.b32 %r267, %f1116;
|
|
xor.b32 %r268, %r267, -2147483648;
|
|
mov.b32 %f624, %r268;
|
|
selp.f32 %f1118, %f624, %f1116, %p3;
|
|
setp.eq.f32 %p87, %f77, 0f00000000;
|
|
@%p87 bra BB0_87;
|
|
bra.uni BB0_85;
|
|
|
|
BB0_87:
|
|
add.f32 %f627, %f77, %f77;
|
|
selp.f32 %f1118, %f627, 0f00000000, %p86;
|
|
bra.uni BB0_88;
|
|
|
|
BB0_85:
|
|
setp.geu.f32 %p88, %f77, 0f00000000;
|
|
@%p88 bra BB0_88;
|
|
|
|
mov.f32 %f1083, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f626, %f1083;
|
|
setp.neu.f32 %p89, %f626, 0f3EE66666;
|
|
selp.f32 %f1118, 0f7FFFFFFF, %f1118, %p89;
|
|
|
|
BB0_88:
|
|
abs.f32 %f1076, %f77;
|
|
add.f32 %f628, %f1076, 0f3EE66666;
|
|
mov.b32 %r269, %f628;
|
|
setp.lt.s32 %p91, %r269, 2139095040;
|
|
@%p91 bra BB0_93;
|
|
|
|
abs.f32 %f1081, %f77;
|
|
setp.gtu.f32 %p92, %f1081, 0f7F800000;
|
|
@%p92 bra BB0_92;
|
|
bra.uni BB0_90;
|
|
|
|
BB0_92:
|
|
add.f32 %f1118, %f77, 0f3EE66666;
|
|
bra.uni BB0_93;
|
|
|
|
BB0_90:
|
|
abs.f32 %f1082, %f77;
|
|
setp.neu.f32 %p93, %f1082, 0f7F800000;
|
|
@%p93 bra BB0_93;
|
|
|
|
selp.f32 %f1118, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
BB0_93:
|
|
mov.f32 %f1077, 0f3EE66666;
|
|
mov.f32 %f1051, 0fB5BFBE8E;
|
|
mov.f32 %f1050, 0fBF317200;
|
|
mov.f32 %f1049, 0f00000000;
|
|
mov.f32 %f1048, 0f35BFBE8E;
|
|
mov.f32 %f1047, 0f3F317200;
|
|
mov.f32 %f1046, 0f3DAAAABD;
|
|
mov.f32 %f1045, 0f3C4CAF63;
|
|
mov.f32 %f1044, 0f3B18F0FE;
|
|
setp.eq.f32 %p94, %f77, 0f3F800000;
|
|
selp.f32 %f123, 0f3F800000, %f1118, %p94;
|
|
abs.f32 %f124, %f78;
|
|
setp.lt.f32 %p95, %f124, 0f00800000;
|
|
mul.f32 %f631, %f124, 0f4B800000;
|
|
selp.f32 %f632, 0fC3170000, 0fC2FE0000, %p95;
|
|
selp.f32 %f633, %f631, %f124, %p95;
|
|
mov.b32 %r270, %f633;
|
|
and.b32 %r271, %r270, 8388607;
|
|
or.b32 %r272, %r271, 1065353216;
|
|
mov.b32 %f634, %r272;
|
|
shr.u32 %r273, %r270, 23;
|
|
cvt.rn.f32.u32 %f635, %r273;
|
|
add.f32 %f636, %f632, %f635;
|
|
setp.gt.f32 %p96, %f634, 0f3FB504F3;
|
|
mul.f32 %f637, %f634, 0f3F000000;
|
|
add.f32 %f638, %f636, 0f3F800000;
|
|
selp.f32 %f639, %f637, %f634, %p96;
|
|
selp.f32 %f640, %f638, %f636, %p96;
|
|
add.f32 %f641, %f639, 0fBF800000;
|
|
add.f32 %f630, %f639, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f629,%f630;
|
|
// inline asm
|
|
add.f32 %f642, %f641, %f641;
|
|
mul.f32 %f643, %f629, %f642;
|
|
mul.f32 %f644, %f643, %f643;
|
|
fma.rn.f32 %f647, %f1044, %f644, %f1045;
|
|
fma.rn.f32 %f649, %f647, %f644, %f1046;
|
|
mul.rn.f32 %f650, %f649, %f644;
|
|
mul.rn.f32 %f651, %f650, %f643;
|
|
sub.f32 %f652, %f641, %f643;
|
|
neg.f32 %f653, %f643;
|
|
add.f32 %f654, %f652, %f652;
|
|
fma.rn.f32 %f655, %f653, %f641, %f654;
|
|
mul.rn.f32 %f656, %f629, %f655;
|
|
add.f32 %f657, %f651, %f643;
|
|
sub.f32 %f658, %f643, %f657;
|
|
add.f32 %f659, %f651, %f658;
|
|
add.f32 %f660, %f656, %f659;
|
|
add.f32 %f661, %f657, %f660;
|
|
sub.f32 %f662, %f657, %f661;
|
|
add.f32 %f663, %f660, %f662;
|
|
mul.rn.f32 %f665, %f640, %f1047;
|
|
mul.rn.f32 %f667, %f640, %f1048;
|
|
add.f32 %f668, %f665, %f661;
|
|
sub.f32 %f669, %f665, %f668;
|
|
add.f32 %f670, %f661, %f669;
|
|
add.f32 %f671, %f663, %f670;
|
|
add.f32 %f672, %f667, %f671;
|
|
add.f32 %f673, %f668, %f672;
|
|
sub.f32 %f674, %f668, %f673;
|
|
add.f32 %f675, %f672, %f674;
|
|
mul.rn.f32 %f677, %f1077, %f673;
|
|
neg.f32 %f678, %f677;
|
|
fma.rn.f32 %f679, %f1077, %f673, %f678;
|
|
fma.rn.f32 %f680, %f1077, %f675, %f679;
|
|
fma.rn.f32 %f682, %f1049, %f673, %f680;
|
|
add.rn.f32 %f683, %f677, %f682;
|
|
neg.f32 %f684, %f683;
|
|
add.rn.f32 %f685, %f677, %f684;
|
|
add.rn.f32 %f686, %f685, %f682;
|
|
mov.b32 %r274, %f683;
|
|
setp.eq.s32 %p97, %r274, 1118925336;
|
|
add.s32 %r275, %r274, -1;
|
|
mov.b32 %f687, %r275;
|
|
add.f32 %f688, %f686, 0f37000000;
|
|
selp.f32 %f689, %f687, %f683, %p97;
|
|
selp.f32 %f125, %f688, %f686, %p97;
|
|
mul.f32 %f690, %f689, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f691, %f690;
|
|
fma.rn.f32 %f693, %f691, %f1050, %f689;
|
|
fma.rn.f32 %f695, %f691, %f1051, %f693;
|
|
mul.f32 %f696, %f695, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f697, %f696;
|
|
add.f32 %f698, %f691, 0f00000000;
|
|
ex2.approx.f32 %f699, %f698;
|
|
mul.f32 %f700, %f697, %f699;
|
|
setp.lt.f32 %p98, %f689, 0fC2D20000;
|
|
selp.f32 %f701, 0f00000000, %f700, %p98;
|
|
setp.gt.f32 %p99, %f689, 0f42D20000;
|
|
selp.f32 %f1119, 0f7F800000, %f701, %p99;
|
|
setp.eq.f32 %p100, %f1119, 0f7F800000;
|
|
@%p100 bra BB0_95;
|
|
|
|
fma.rn.f32 %f1119, %f1119, %f125, %f1119;
|
|
|
|
BB0_95:
|
|
setp.lt.f32 %p101, %f78, 0f00000000;
|
|
and.pred %p4, %p101, %p86;
|
|
mov.b32 %r276, %f1119;
|
|
xor.b32 %r277, %r276, -2147483648;
|
|
mov.b32 %f702, %r277;
|
|
selp.f32 %f1121, %f702, %f1119, %p4;
|
|
setp.eq.f32 %p103, %f78, 0f00000000;
|
|
@%p103 bra BB0_98;
|
|
bra.uni BB0_96;
|
|
|
|
BB0_98:
|
|
add.f32 %f705, %f78, %f78;
|
|
selp.f32 %f1121, %f705, 0f00000000, %p86;
|
|
bra.uni BB0_99;
|
|
|
|
BB0_96:
|
|
setp.geu.f32 %p104, %f78, 0f00000000;
|
|
@%p104 bra BB0_99;
|
|
|
|
mov.f32 %f1080, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f704, %f1080;
|
|
setp.neu.f32 %p105, %f704, 0f3EE66666;
|
|
selp.f32 %f1121, 0f7FFFFFFF, %f1121, %p105;
|
|
|
|
BB0_99:
|
|
abs.f32 %f1084, %f78;
|
|
add.f32 %f706, %f1084, 0f3EE66666;
|
|
mov.b32 %r278, %f706;
|
|
setp.lt.s32 %p107, %r278, 2139095040;
|
|
@%p107 bra BB0_104;
|
|
|
|
abs.f32 %f1085, %f78;
|
|
setp.gtu.f32 %p108, %f1085, 0f7F800000;
|
|
@%p108 bra BB0_103;
|
|
bra.uni BB0_101;
|
|
|
|
BB0_103:
|
|
add.f32 %f1121, %f78, 0f3EE66666;
|
|
bra.uni BB0_104;
|
|
|
|
BB0_101:
|
|
abs.f32 %f1086, %f78;
|
|
setp.neu.f32 %p109, %f1086, 0f7F800000;
|
|
@%p109 bra BB0_104;
|
|
|
|
selp.f32 %f1121, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
BB0_104:
|
|
mov.f32 %f1078, 0f3EE66666;
|
|
mov.f32 %f1059, 0fB5BFBE8E;
|
|
mov.f32 %f1058, 0fBF317200;
|
|
mov.f32 %f1057, 0f00000000;
|
|
mov.f32 %f1056, 0f35BFBE8E;
|
|
mov.f32 %f1055, 0f3F317200;
|
|
mov.f32 %f1054, 0f3DAAAABD;
|
|
mov.f32 %f1053, 0f3C4CAF63;
|
|
mov.f32 %f1052, 0f3B18F0FE;
|
|
setp.eq.f32 %p110, %f78, 0f3F800000;
|
|
selp.f32 %f136, 0f3F800000, %f1121, %p110;
|
|
abs.f32 %f137, %f79;
|
|
setp.lt.f32 %p111, %f137, 0f00800000;
|
|
mul.f32 %f709, %f137, 0f4B800000;
|
|
selp.f32 %f710, 0fC3170000, 0fC2FE0000, %p111;
|
|
selp.f32 %f711, %f709, %f137, %p111;
|
|
mov.b32 %r279, %f711;
|
|
and.b32 %r280, %r279, 8388607;
|
|
or.b32 %r281, %r280, 1065353216;
|
|
mov.b32 %f712, %r281;
|
|
shr.u32 %r282, %r279, 23;
|
|
cvt.rn.f32.u32 %f713, %r282;
|
|
add.f32 %f714, %f710, %f713;
|
|
setp.gt.f32 %p112, %f712, 0f3FB504F3;
|
|
mul.f32 %f715, %f712, 0f3F000000;
|
|
add.f32 %f716, %f714, 0f3F800000;
|
|
selp.f32 %f717, %f715, %f712, %p112;
|
|
selp.f32 %f718, %f716, %f714, %p112;
|
|
add.f32 %f719, %f717, 0fBF800000;
|
|
add.f32 %f708, %f717, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f707,%f708;
|
|
// inline asm
|
|
add.f32 %f720, %f719, %f719;
|
|
mul.f32 %f721, %f707, %f720;
|
|
mul.f32 %f722, %f721, %f721;
|
|
fma.rn.f32 %f725, %f1052, %f722, %f1053;
|
|
fma.rn.f32 %f727, %f725, %f722, %f1054;
|
|
mul.rn.f32 %f728, %f727, %f722;
|
|
mul.rn.f32 %f729, %f728, %f721;
|
|
sub.f32 %f730, %f719, %f721;
|
|
neg.f32 %f731, %f721;
|
|
add.f32 %f732, %f730, %f730;
|
|
fma.rn.f32 %f733, %f731, %f719, %f732;
|
|
mul.rn.f32 %f734, %f707, %f733;
|
|
add.f32 %f735, %f729, %f721;
|
|
sub.f32 %f736, %f721, %f735;
|
|
add.f32 %f737, %f729, %f736;
|
|
add.f32 %f738, %f734, %f737;
|
|
add.f32 %f739, %f735, %f738;
|
|
sub.f32 %f740, %f735, %f739;
|
|
add.f32 %f741, %f738, %f740;
|
|
mul.rn.f32 %f743, %f718, %f1055;
|
|
mul.rn.f32 %f745, %f718, %f1056;
|
|
add.f32 %f746, %f743, %f739;
|
|
sub.f32 %f747, %f743, %f746;
|
|
add.f32 %f748, %f739, %f747;
|
|
add.f32 %f749, %f741, %f748;
|
|
add.f32 %f750, %f745, %f749;
|
|
add.f32 %f751, %f746, %f750;
|
|
sub.f32 %f752, %f746, %f751;
|
|
add.f32 %f753, %f750, %f752;
|
|
mul.rn.f32 %f755, %f1078, %f751;
|
|
neg.f32 %f756, %f755;
|
|
fma.rn.f32 %f757, %f1078, %f751, %f756;
|
|
fma.rn.f32 %f758, %f1078, %f753, %f757;
|
|
fma.rn.f32 %f760, %f1057, %f751, %f758;
|
|
add.rn.f32 %f761, %f755, %f760;
|
|
neg.f32 %f762, %f761;
|
|
add.rn.f32 %f763, %f755, %f762;
|
|
add.rn.f32 %f764, %f763, %f760;
|
|
mov.b32 %r283, %f761;
|
|
setp.eq.s32 %p113, %r283, 1118925336;
|
|
add.s32 %r284, %r283, -1;
|
|
mov.b32 %f765, %r284;
|
|
add.f32 %f766, %f764, 0f37000000;
|
|
selp.f32 %f767, %f765, %f761, %p113;
|
|
selp.f32 %f138, %f766, %f764, %p113;
|
|
mul.f32 %f768, %f767, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f769, %f768;
|
|
fma.rn.f32 %f771, %f769, %f1058, %f767;
|
|
fma.rn.f32 %f773, %f769, %f1059, %f771;
|
|
mul.f32 %f774, %f773, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f775, %f774;
|
|
add.f32 %f776, %f769, 0f00000000;
|
|
ex2.approx.f32 %f777, %f776;
|
|
mul.f32 %f778, %f775, %f777;
|
|
setp.lt.f32 %p114, %f767, 0fC2D20000;
|
|
selp.f32 %f779, 0f00000000, %f778, %p114;
|
|
setp.gt.f32 %p115, %f767, 0f42D20000;
|
|
selp.f32 %f1122, 0f7F800000, %f779, %p115;
|
|
setp.eq.f32 %p116, %f1122, 0f7F800000;
|
|
@%p116 bra BB0_106;
|
|
|
|
fma.rn.f32 %f1122, %f1122, %f138, %f1122;
|
|
|
|
BB0_106:
|
|
setp.lt.f32 %p117, %f79, 0f00000000;
|
|
and.pred %p5, %p117, %p86;
|
|
mov.b32 %r285, %f1122;
|
|
xor.b32 %r286, %r285, -2147483648;
|
|
mov.b32 %f780, %r286;
|
|
selp.f32 %f1124, %f780, %f1122, %p5;
|
|
setp.eq.f32 %p119, %f79, 0f00000000;
|
|
@%p119 bra BB0_109;
|
|
bra.uni BB0_107;
|
|
|
|
BB0_109:
|
|
add.f32 %f783, %f79, %f79;
|
|
selp.f32 %f1124, %f783, 0f00000000, %p86;
|
|
bra.uni BB0_110;
|
|
|
|
BB0_107:
|
|
setp.geu.f32 %p120, %f79, 0f00000000;
|
|
@%p120 bra BB0_110;
|
|
|
|
mov.f32 %f1079, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f782, %f1079;
|
|
setp.neu.f32 %p121, %f782, 0f3EE66666;
|
|
selp.f32 %f1124, 0f7FFFFFFF, %f1124, %p121;
|
|
|
|
BB0_110:
|
|
abs.f32 %f1087, %f79;
|
|
add.f32 %f784, %f1087, 0f3EE66666;
|
|
mov.b32 %r287, %f784;
|
|
setp.lt.s32 %p123, %r287, 2139095040;
|
|
@%p123 bra BB0_115;
|
|
|
|
abs.f32 %f1088, %f79;
|
|
setp.gtu.f32 %p124, %f1088, 0f7F800000;
|
|
@%p124 bra BB0_114;
|
|
bra.uni BB0_112;
|
|
|
|
BB0_114:
|
|
add.f32 %f1124, %f79, 0f3EE66666;
|
|
bra.uni BB0_115;
|
|
|
|
BB0_112:
|
|
abs.f32 %f1089, %f79;
|
|
setp.neu.f32 %p125, %f1089, 0f7F800000;
|
|
@%p125 bra BB0_115;
|
|
|
|
selp.f32 %f1124, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
BB0_115:
|
|
mov.u32 %r376, 4;
|
|
setp.eq.f32 %p126, %f79, 0f3F800000;
|
|
selp.f32 %f785, 0f3F800000, %f1124, %p126;
|
|
cvt.u64.u32 %rd79, %r3;
|
|
cvt.u64.u32 %rd78, %r2;
|
|
mov.u64 %rd82, image;
|
|
cvta.global.u64 %rd77, %rd82;
|
|
// inline asm
|
|
call (%rd76), _rt_buffer_get_64, (%rd77, %r105, %r376, %rd78, %rd79, %rd31, %rd31);
|
|
// inline asm
|
|
cvt.sat.f32.f32 %f786, %f785;
|
|
mul.f32 %f787, %f786, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r290, %f787;
|
|
cvt.sat.f32.f32 %f788, %f136;
|
|
mul.f32 %f789, %f788, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r291, %f789;
|
|
cvt.sat.f32.f32 %f790, %f123;
|
|
mul.f32 %f791, %f790, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r292, %f791;
|
|
cvt.u16.u32 %rs15, %r290;
|
|
cvt.u16.u32 %rs16, %r292;
|
|
cvt.u16.u32 %rs17, %r291;
|
|
mov.u16 %rs18, 255;
|
|
st.v4.u8 [%rd76], {%rs15, %rs17, %rs16, %rs18};
|
|
ld.global.u32 %r409, [imageEnabled];
|
|
|
|
BB0_116:
|
|
and.b32 %r293, %r409, 4;
|
|
setp.eq.s32 %p127, %r293, 0;
|
|
@%p127 bra BB0_120;
|
|
|
|
ld.global.u32 %r294, [additive];
|
|
setp.eq.s32 %p128, %r294, 0;
|
|
cvt.u64.u32 %rd17, %r2;
|
|
cvt.u64.u32 %rd18, %r3;
|
|
mov.f32 %f792, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs19, %f792;}
|
|
|
|
// inline asm
|
|
@%p128 bra BB0_119;
|
|
|
|
mov.u64 %rd95, image_HDR;
|
|
cvta.global.u64 %rd84, %rd95;
|
|
mov.u32 %r298, 8;
|
|
// inline asm
|
|
call (%rd83), _rt_buffer_get_64, (%rd84, %r105, %r298, %rd17, %rd18, %rd31, %rd31);
|
|
// inline asm
|
|
ld.v4.u16 {%rs26, %rs27, %rs28, %rs29}, [%rd83];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f793, %rs26;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f794, %rs27;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f795, %rs28;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd89), _rt_buffer_get_64, (%rd84, %r105, %r298, %rd17, %rd18, %rd31, %rd31);
|
|
// inline asm
|
|
add.f32 %f796, %f77, %f793;
|
|
add.f32 %f797, %f78, %f794;
|
|
add.f32 %f798, %f79, %f795;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs25, %f798;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs24, %f797;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs23, %f796;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd89], {%rs23, %rs24, %rs25, %rs19};
|
|
bra.uni BB0_120;
|
|
|
|
BB0_119:
|
|
mov.u64 %rd102, image_HDR;
|
|
cvta.global.u64 %rd97, %rd102;
|
|
mov.u32 %r300, 8;
|
|
// inline asm
|
|
call (%rd96), _rt_buffer_get_64, (%rd97, %r105, %r300, %rd17, %rd18, %rd31, %rd31);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs32, %f79;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs31, %f78;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs30, %f77;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd96], {%rs30, %rs31, %rs32, %rs19};
|
|
|
|
BB0_120:
|
|
mov.f32 %f1125, 0f00000000;
|
|
mov.u32 %r377, 4;
|
|
ld.global.v2.u32 {%r303, %r304}, [pixelID];
|
|
cvt.u64.u32 %rd105, %r303;
|
|
cvt.u64.u32 %rd106, %r304;
|
|
mov.u64 %rd109, uvtangent;
|
|
cvta.global.u64 %rd104, %rd109;
|
|
// inline asm
|
|
call (%rd103), _rt_buffer_get_64, (%rd104, %r105, %r377, %rd105, %rd106, %rd31, %rd31);
|
|
// inline asm
|
|
ld.u32 %r94, [%rd103];
|
|
shr.u32 %r95, %r94, 16;
|
|
cvt.u16.u32 %rs33, %r95;
|
|
and.b16 %rs34, %rs33, 255;
|
|
cvt.u16.u32 %rs35, %r94;
|
|
or.b16 %rs36, %rs35, %rs34;
|
|
setp.eq.s16 %p129, %rs36, 0;
|
|
mov.f32 %f1126, %f1125;
|
|
mov.f32 %f1127, %f1125;
|
|
@%p129 bra BB0_122;
|
|
|
|
ld.u8 %rs37, [%rd103+1];
|
|
and.b16 %rs39, %rs35, 255;
|
|
cvt.rn.f32.u16 %f805, %rs39;
|
|
div.rn.f32 %f806, %f805, 0f437F0000;
|
|
fma.rn.f32 %f807, %f806, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f808, %rs37;
|
|
div.rn.f32 %f809, %f808, 0f437F0000;
|
|
fma.rn.f32 %f810, %f809, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f811, %rs34;
|
|
div.rn.f32 %f812, %f811, 0f437F0000;
|
|
fma.rn.f32 %f813, %f812, 0f40000000, 0fBF800000;
|
|
mul.f32 %f814, %f810, %f810;
|
|
fma.rn.f32 %f815, %f807, %f807, %f814;
|
|
fma.rn.f32 %f816, %f813, %f813, %f815;
|
|
sqrt.rn.f32 %f817, %f816;
|
|
rcp.rn.f32 %f818, %f817;
|
|
mul.f32 %f1125, %f807, %f818;
|
|
mul.f32 %f1126, %f810, %f818;
|
|
mul.f32 %f1127, %f813, %f818;
|
|
|
|
BB0_122:
|
|
mov.f32 %f1128, 0f00000000;
|
|
mov.u32 %r378, 4;
|
|
mul.f32 %f822, %f1092, %f1126;
|
|
mul.f32 %f823, %f1091, %f1127;
|
|
sub.f32 %f824, %f823, %f822;
|
|
mul.f32 %f825, %f1090, %f1127;
|
|
mul.f32 %f826, %f1092, %f1125;
|
|
sub.f32 %f827, %f826, %f825;
|
|
mul.f32 %f828, %f1091, %f1125;
|
|
mul.f32 %f829, %f1090, %f1126;
|
|
sub.f32 %f830, %f829, %f828;
|
|
setp.lt.u32 %p130, %r94, 16777216;
|
|
selp.f32 %f831, 0fBF800000, 0f3F800000, %p130;
|
|
mul.f32 %f832, %f824, %f831;
|
|
mul.f32 %f833, %f827, %f831;
|
|
mul.f32 %f834, %f830, %f831;
|
|
mul.f32 %f835, %f832, 0f00000000;
|
|
mul.f32 %f836, %f833, 0f00000000;
|
|
mul.f32 %f837, %f834, 0f00000000;
|
|
fma.rn.f32 %f838, %f1125, 0f3F5105EC, %f835;
|
|
fma.rn.f32 %f839, %f1126, 0f3F5105EC, %f836;
|
|
fma.rn.f32 %f840, %f1127, 0f3F5105EC, %f837;
|
|
mul.f32 %f155, %f1090, 0f3F13CD3A;
|
|
add.f32 %f156, %f155, %f838;
|
|
mul.f32 %f157, %f1091, 0f3F13CD3A;
|
|
add.f32 %f158, %f157, %f839;
|
|
mul.f32 %f159, %f1092, 0f3F13CD3A;
|
|
add.f32 %f160, %f159, %f840;
|
|
ld.global.v2.u32 {%r309, %r310}, [pixelID];
|
|
cvt.u64.u32 %rd112, %r309;
|
|
cvt.u64.u32 %rd113, %r310;
|
|
// inline asm
|
|
call (%rd110), _rt_buffer_get_64, (%rd104, %r105, %r378, %rd112, %rd113, %rd31, %rd31);
|
|
// inline asm
|
|
ld.u32 %r96, [%rd110];
|
|
shr.u32 %r97, %r96, 16;
|
|
cvt.u16.u32 %rs42, %r97;
|
|
and.b16 %rs43, %rs42, 255;
|
|
cvt.u16.u32 %rs44, %r96;
|
|
or.b16 %rs45, %rs44, %rs43;
|
|
setp.eq.s16 %p131, %rs45, 0;
|
|
mov.f32 %f1129, %f1128;
|
|
mov.f32 %f1130, %f1128;
|
|
@%p131 bra BB0_124;
|
|
|
|
ld.u8 %rs46, [%rd110+1];
|
|
and.b16 %rs48, %rs44, 255;
|
|
cvt.rn.f32.u16 %f841, %rs48;
|
|
div.rn.f32 %f842, %f841, 0f437F0000;
|
|
fma.rn.f32 %f843, %f842, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f844, %rs46;
|
|
div.rn.f32 %f845, %f844, 0f437F0000;
|
|
fma.rn.f32 %f846, %f845, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f847, %rs43;
|
|
div.rn.f32 %f848, %f847, 0f437F0000;
|
|
fma.rn.f32 %f849, %f848, 0f40000000, 0fBF800000;
|
|
mul.f32 %f850, %f846, %f846;
|
|
fma.rn.f32 %f851, %f843, %f843, %f850;
|
|
fma.rn.f32 %f852, %f849, %f849, %f851;
|
|
sqrt.rn.f32 %f853, %f852;
|
|
rcp.rn.f32 %f854, %f853;
|
|
mul.f32 %f1128, %f843, %f854;
|
|
mul.f32 %f1129, %f846, %f854;
|
|
mul.f32 %f1130, %f849, %f854;
|
|
|
|
BB0_124:
|
|
mov.f32 %f1131, 0f00000000;
|
|
mov.u32 %r379, 4;
|
|
mul.f32 %f858, %f1092, %f1129;
|
|
mul.f32 %f859, %f1091, %f1130;
|
|
sub.f32 %f860, %f859, %f858;
|
|
mul.f32 %f861, %f1090, %f1130;
|
|
mul.f32 %f862, %f1092, %f1128;
|
|
sub.f32 %f863, %f862, %f861;
|
|
mul.f32 %f864, %f1091, %f1128;
|
|
mul.f32 %f865, %f1090, %f1129;
|
|
sub.f32 %f866, %f865, %f864;
|
|
setp.lt.u32 %p132, %r96, 16777216;
|
|
selp.f32 %f867, 0fBF800000, 0f3F800000, %p132;
|
|
mul.f32 %f868, %f860, %f867;
|
|
mul.f32 %f869, %f863, %f867;
|
|
mul.f32 %f870, %f866, %f867;
|
|
mul.f32 %f871, %f868, 0f3F3504F3;
|
|
mul.f32 %f872, %f869, 0f3F3504F3;
|
|
mul.f32 %f873, %f870, 0f3F3504F3;
|
|
fma.rn.f32 %f874, %f1128, 0fBED105EC, %f871;
|
|
fma.rn.f32 %f875, %f1129, 0fBED105EC, %f872;
|
|
fma.rn.f32 %f876, %f1130, 0fBED105EC, %f873;
|
|
add.f32 %f167, %f155, %f874;
|
|
add.f32 %f168, %f157, %f875;
|
|
add.f32 %f169, %f159, %f876;
|
|
ld.global.v2.u32 {%r315, %r316}, [pixelID];
|
|
cvt.u64.u32 %rd119, %r315;
|
|
cvt.u64.u32 %rd120, %r316;
|
|
// inline asm
|
|
call (%rd117), _rt_buffer_get_64, (%rd104, %r105, %r379, %rd119, %rd120, %rd31, %rd31);
|
|
// inline asm
|
|
ld.u32 %r98, [%rd117];
|
|
shr.u32 %r99, %r98, 16;
|
|
cvt.u16.u32 %rs51, %r99;
|
|
and.b16 %rs52, %rs51, 255;
|
|
cvt.u16.u32 %rs53, %r98;
|
|
or.b16 %rs54, %rs53, %rs52;
|
|
setp.eq.s16 %p133, %rs54, 0;
|
|
mov.f32 %f1132, %f1131;
|
|
mov.f32 %f1133, %f1131;
|
|
@%p133 bra BB0_126;
|
|
|
|
ld.u8 %rs55, [%rd117+1];
|
|
and.b16 %rs57, %rs53, 255;
|
|
cvt.rn.f32.u16 %f877, %rs57;
|
|
div.rn.f32 %f878, %f877, 0f437F0000;
|
|
fma.rn.f32 %f879, %f878, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f880, %rs55;
|
|
div.rn.f32 %f881, %f880, 0f437F0000;
|
|
fma.rn.f32 %f882, %f881, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f883, %rs52;
|
|
div.rn.f32 %f884, %f883, 0f437F0000;
|
|
fma.rn.f32 %f885, %f884, 0f40000000, 0fBF800000;
|
|
mul.f32 %f886, %f882, %f882;
|
|
fma.rn.f32 %f887, %f879, %f879, %f886;
|
|
fma.rn.f32 %f888, %f885, %f885, %f887;
|
|
sqrt.rn.f32 %f889, %f888;
|
|
rcp.rn.f32 %f890, %f889;
|
|
mul.f32 %f1131, %f879, %f890;
|
|
mul.f32 %f1132, %f882, %f890;
|
|
mul.f32 %f1133, %f885, %f890;
|
|
|
|
BB0_126:
|
|
mul.f32 %f892, %f1092, %f1132;
|
|
mul.f32 %f893, %f1091, %f1133;
|
|
sub.f32 %f894, %f893, %f892;
|
|
mul.f32 %f895, %f1090, %f1133;
|
|
mul.f32 %f896, %f1092, %f1131;
|
|
sub.f32 %f897, %f896, %f895;
|
|
mul.f32 %f898, %f1091, %f1131;
|
|
mul.f32 %f899, %f1090, %f1132;
|
|
sub.f32 %f900, %f899, %f898;
|
|
setp.lt.u32 %p134, %r98, 16777216;
|
|
selp.f32 %f901, 0fBF800000, 0f3F800000, %p134;
|
|
mul.f32 %f902, %f894, %f901;
|
|
mul.f32 %f903, %f897, %f901;
|
|
mul.f32 %f904, %f900, %f901;
|
|
mul.f32 %f905, %f902, 0fBF3504F3;
|
|
mul.f32 %f906, %f903, 0fBF3504F3;
|
|
mul.f32 %f907, %f904, 0fBF3504F3;
|
|
fma.rn.f32 %f908, %f1131, 0fBED105EC, %f905;
|
|
fma.rn.f32 %f909, %f1132, 0fBED105EC, %f906;
|
|
fma.rn.f32 %f910, %f1133, 0fBED105EC, %f907;
|
|
add.f32 %f911, %f155, %f908;
|
|
add.f32 %f912, %f157, %f909;
|
|
add.f32 %f913, %f159, %f910;
|
|
ld.global.f32 %f914, [directDir];
|
|
mul.f32 %f915, %f156, %f914;
|
|
ld.global.f32 %f916, [directDir+4];
|
|
mul.f32 %f917, %f158, %f916;
|
|
neg.f32 %f918, %f917;
|
|
sub.f32 %f919, %f918, %f915;
|
|
ld.global.f32 %f920, [directDir+8];
|
|
mul.f32 %f921, %f160, %f920;
|
|
sub.f32 %f922, %f919, %f921;
|
|
cvt.sat.f32.f32 %f923, %f922;
|
|
mul.f32 %f924, %f94, %f923;
|
|
mul.f32 %f925, %f95, %f923;
|
|
mul.f32 %f926, %f96, %f923;
|
|
mul.f32 %f927, %f167, %f914;
|
|
mul.f32 %f928, %f168, %f916;
|
|
neg.f32 %f929, %f928;
|
|
sub.f32 %f930, %f929, %f927;
|
|
mul.f32 %f931, %f169, %f920;
|
|
sub.f32 %f932, %f930, %f931;
|
|
cvt.sat.f32.f32 %f933, %f932;
|
|
mul.f32 %f934, %f94, %f933;
|
|
mul.f32 %f935, %f95, %f933;
|
|
mul.f32 %f936, %f96, %f933;
|
|
mul.f32 %f937, %f911, %f914;
|
|
mul.f32 %f938, %f912, %f916;
|
|
neg.f32 %f939, %f938;
|
|
sub.f32 %f940, %f939, %f937;
|
|
mul.f32 %f941, %f913, %f920;
|
|
sub.f32 %f942, %f940, %f941;
|
|
cvt.sat.f32.f32 %f943, %f942;
|
|
mul.f32 %f944, %f94, %f943;
|
|
mul.f32 %f945, %f95, %f943;
|
|
mul.f32 %f946, %f96, %f943;
|
|
add.f32 %f947, %f924, %f934;
|
|
add.f32 %f948, %f925, %f935;
|
|
add.f32 %f949, %f926, %f936;
|
|
add.f32 %f950, %f947, %f944;
|
|
add.f32 %f951, %f948, %f945;
|
|
add.f32 %f952, %f949, %f946;
|
|
mul.f32 %f953, %f950, 0f3F13CD3A;
|
|
mul.f32 %f954, %f951, 0f3F13CD3A;
|
|
mul.f32 %f955, %f952, 0f3F13CD3A;
|
|
div.rn.f32 %f956, %f77, %f953;
|
|
div.rn.f32 %f957, %f78, %f954;
|
|
div.rn.f32 %f958, %f79, %f955;
|
|
setp.eq.f32 %p135, %f77, 0f00000000;
|
|
selp.f32 %f959, 0f00000000, %f956, %p135;
|
|
setp.eq.f32 %p136, %f78, 0f00000000;
|
|
selp.f32 %f960, 0f00000000, %f957, %p136;
|
|
setp.eq.f32 %p137, %f79, 0f00000000;
|
|
selp.f32 %f961, 0f00000000, %f958, %p137;
|
|
mul.f32 %f176, %f924, %f959;
|
|
mul.f32 %f177, %f925, %f960;
|
|
mul.f32 %f178, %f926, %f961;
|
|
mul.f32 %f179, %f934, %f959;
|
|
mul.f32 %f180, %f935, %f960;
|
|
mul.f32 %f181, %f936, %f961;
|
|
mul.f32 %f182, %f944, %f959;
|
|
mul.f32 %f183, %f945, %f960;
|
|
mul.f32 %f184, %f946, %f961;
|
|
ld.global.u32 %r319, [additive];
|
|
setp.eq.s32 %p138, %r319, 0;
|
|
cvt.u64.u32 %rd22, %r2;
|
|
cvt.u64.u32 %rd23, %r3;
|
|
mov.f32 %f891, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs60, %f891;}
|
|
|
|
// inline asm
|
|
@%p138 bra BB0_128;
|
|
|
|
mov.u64 %rd136, image_RNM0;
|
|
cvta.global.u64 %rd125, %rd136;
|
|
mov.u32 %r323, 8;
|
|
// inline asm
|
|
call (%rd124), _rt_buffer_get_64, (%rd125, %r105, %r323, %rd22, %rd23, %rd31, %rd31);
|
|
// inline asm
|
|
ld.v4.u16 {%rs67, %rs68, %rs69, %rs70}, [%rd124];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f962, %rs67;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f963, %rs68;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f964, %rs69;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd130), _rt_buffer_get_64, (%rd125, %r105, %r323, %rd22, %rd23, %rd31, %rd31);
|
|
// inline asm
|
|
add.f32 %f965, %f176, %f962;
|
|
add.f32 %f966, %f177, %f963;
|
|
add.f32 %f967, %f178, %f964;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs66, %f967;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs65, %f966;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs64, %f965;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd130], {%rs64, %rs65, %rs66, %rs60};
|
|
bra.uni BB0_129;
|
|
|
|
BB0_128:
|
|
mov.u64 %rd143, image_RNM0;
|
|
cvta.global.u64 %rd138, %rd143;
|
|
mov.u32 %r325, 8;
|
|
// inline asm
|
|
call (%rd137), _rt_buffer_get_64, (%rd138, %r105, %r325, %rd22, %rd23, %rd31, %rd31);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs73, %f178;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs72, %f177;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs71, %f176;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd137], {%rs71, %rs72, %rs73, %rs60};
|
|
|
|
BB0_129:
|
|
ld.global.u32 %r326, [additive];
|
|
setp.eq.s32 %p139, %r326, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs74, %f891;}
|
|
|
|
// inline asm
|
|
@%p139 bra BB0_131;
|
|
|
|
mov.u64 %rd156, image_RNM1;
|
|
cvta.global.u64 %rd145, %rd156;
|
|
mov.u32 %r330, 8;
|
|
// inline asm
|
|
call (%rd144), _rt_buffer_get_64, (%rd145, %r105, %r330, %rd22, %rd23, %rd31, %rd31);
|
|
// inline asm
|
|
ld.v4.u16 {%rs81, %rs82, %rs83, %rs84}, [%rd144];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f972, %rs81;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f973, %rs82;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f974, %rs83;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd150), _rt_buffer_get_64, (%rd145, %r105, %r330, %rd22, %rd23, %rd31, %rd31);
|
|
// inline asm
|
|
add.f32 %f975, %f179, %f972;
|
|
add.f32 %f976, %f180, %f973;
|
|
add.f32 %f977, %f181, %f974;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs80, %f977;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs79, %f976;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs78, %f975;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd150], {%rs78, %rs79, %rs80, %rs74};
|
|
bra.uni BB0_132;
|
|
|
|
BB0_131:
|
|
mov.u64 %rd163, image_RNM1;
|
|
cvta.global.u64 %rd158, %rd163;
|
|
mov.u32 %r332, 8;
|
|
// inline asm
|
|
call (%rd157), _rt_buffer_get_64, (%rd158, %r105, %r332, %rd22, %rd23, %rd31, %rd31);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs87, %f181;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs86, %f180;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs85, %f179;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd157], {%rs85, %rs86, %rs87, %rs74};
|
|
|
|
BB0_132:
|
|
ld.global.u32 %r333, [additive];
|
|
setp.eq.s32 %p140, %r333, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs88, %f891;}
|
|
|
|
// inline asm
|
|
@%p140 bra BB0_134;
|
|
|
|
mov.u64 %rd176, image_RNM2;
|
|
cvta.global.u64 %rd165, %rd176;
|
|
mov.u32 %r337, 8;
|
|
// inline asm
|
|
call (%rd164), _rt_buffer_get_64, (%rd165, %r105, %r337, %rd22, %rd23, %rd31, %rd31);
|
|
// inline asm
|
|
ld.v4.u16 {%rs95, %rs96, %rs97, %rs98}, [%rd164];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f982, %rs95;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f983, %rs96;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f984, %rs97;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd170), _rt_buffer_get_64, (%rd165, %r105, %r337, %rd22, %rd23, %rd31, %rd31);
|
|
// inline asm
|
|
add.f32 %f985, %f182, %f982;
|
|
add.f32 %f986, %f183, %f983;
|
|
add.f32 %f987, %f184, %f984;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs94, %f987;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs93, %f986;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs92, %f985;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd170], {%rs92, %rs93, %rs94, %rs88};
|
|
bra.uni BB0_152;
|
|
|
|
BB0_134:
|
|
mov.u64 %rd183, image_RNM2;
|
|
cvta.global.u64 %rd178, %rd183;
|
|
mov.u32 %r339, 8;
|
|
// inline asm
|
|
call (%rd177), _rt_buffer_get_64, (%rd178, %r105, %r339, %rd22, %rd23, %rd31, %rd31);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs101, %f184;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs100, %f183;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs99, %f182;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd177], {%rs99, %rs100, %rs101, %rs88};
|
|
|
|
BB0_152:
|
|
ret;
|
|
}
|
|
|
|
|