2129 lines
60 KiB
Plaintext
2129 lines
60 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-31968024
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// Cuda compilation tools, release 12.0, V12.0.76
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// Based on NVVM 7.0.1
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//
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.version 8.0
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.target sm_52
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.address_size 64
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// .globl __raygen__oxMain
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.const .align 16 .b8 params[1184];
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.global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
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.visible .entry __raygen__oxMain()
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{
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.local .align 4 .b8 __local_depot0[28];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<193>;
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.reg .b16 %rs<57>;
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.reg .f32 %f<1227>;
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.reg .b32 %r<480>;
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.reg .f64 %fd<5>;
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.reg .b64 %rd<95>;
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mov.u64 %SPL, __local_depot0;
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add.u64 %rd1, %SPL, 0;
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// begin inline asm
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call (%r90), _optix_get_launch_index_x, ();
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// end inline asm
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// begin inline asm
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call (%r91), _optix_get_launch_index_y, ();
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// end inline asm
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ld.const.u32 %r3, [params+616];
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abs.s32 %r4, %r3;
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ld.const.u32 %r5, [params+540];
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ld.const.u64 %rd26, [params+400];
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cvta.to.global.u64 %rd27, %rd26;
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ld.const.u32 %r96, [params+392];
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mad.lo.s32 %r97, %r96, %r91, %r90;
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mul.wide.u32 %rd28, %r97, 4;
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add.s64 %rd2, %rd27, %rd28;
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ld.global.v2.u8 {%rs7, %rs56}, [%rd2];
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or.b16 %rs9, %rs7, %rs56;
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and.b16 %rs10, %rs9, 255;
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setp.eq.s16 %p10, %rs10, 0;
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@%p10 bra $L__BB0_2;
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ld.global.u8 %rs55, [%rd2+2];
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bra.uni $L__BB0_3;
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$L__BB0_2:
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ld.global.u8 %rs55, [%rd2+2];
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setp.eq.s16 %p11, %rs55, 0;
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mov.f32 %f1159, 0f00000000;
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mov.u16 %rs56, 0;
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mov.f32 %f1160, %f1159;
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mov.f32 %f1161, %f1159;
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@%p11 bra $L__BB0_4;
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$L__BB0_3:
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cvt.rn.f32.u16 %f227, %rs7;
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div.rn.f32 %f228, %f227, 0f437F0000;
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fma.rn.f32 %f229, %f228, 0f40000000, 0fBF800000;
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and.b16 %rs13, %rs56, 255;
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cvt.rn.f32.u16 %f230, %rs13;
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div.rn.f32 %f231, %f230, 0f437F0000;
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fma.rn.f32 %f232, %f231, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f233, %rs55;
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div.rn.f32 %f234, %f233, 0f437F0000;
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fma.rn.f32 %f235, %f234, 0f40000000, 0fBF800000;
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mul.f32 %f236, %f232, %f232;
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fma.rn.f32 %f237, %f229, %f229, %f236;
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fma.rn.f32 %f238, %f235, %f235, %f237;
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sqrt.rn.f32 %f239, %f238;
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rcp.rn.f32 %f240, %f239;
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mul.f32 %f1161, %f240, %f235;
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mul.f32 %f1160, %f240, %f232;
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mul.f32 %f1159, %f229, %f240;
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$L__BB0_4:
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ld.const.v2.u32 {%r98, %r99}, [params];
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add.s32 %r6, %r98, %r90;
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add.s32 %r7, %r99, %r91;
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setp.eq.f32 %p12, %f1159, 0f00000000;
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setp.eq.f32 %p13, %f1160, 0f00000000;
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and.pred %p14, %p12, %p13;
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setp.eq.f32 %p15, %f1161, 0f00000000;
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and.pred %p16, %p15, %p14;
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@%p16 bra $L__BB0_150;
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bra.uni $L__BB0_5;
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$L__BB0_150:
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ld.const.u32 %r89, [params+104];
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and.b32 %r452, %r89, 1;
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setp.eq.b32 %p185, %r452, 1;
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mov.pred %p186, 0;
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xor.pred %p187, %p185, %p186;
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not.pred %p188, %p187;
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@%p188 bra $L__BB0_152;
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ld.const.u64 %rd77, [params+144];
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cvta.to.global.u64 %rd78, %rd77;
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ld.const.u32 %r453, [params+136];
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mad.lo.s32 %r454, %r453, %r7, %r6;
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mul.wide.u32 %rd79, %r454, 4;
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add.s64 %rd80, %rd78, %rd79;
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mov.u16 %rs37, 0;
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st.global.v4.u8 [%rd80], {%rs37, %rs37, %rs37, %rs37};
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$L__BB0_152:
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and.b32 %r455, %r89, 8;
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setp.eq.s32 %p189, %r455, 0;
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@%p189 bra $L__BB0_154;
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ld.const.u64 %rd81, [params+192];
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cvta.to.global.u64 %rd82, %rd81;
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ld.const.u32 %r456, [params+184];
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mad.lo.s32 %r457, %r456, %r7, %r6;
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mov.f32 %f1141, 0f00000000;
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cvt.rzi.u32.f32 %r458, %f1141;
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mul.wide.u32 %rd83, %r457, 2;
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add.s64 %rd84, %rd82, %rd83;
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mov.u16 %rs38, 0;
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cvt.u16.u32 %rs39, %r458;
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st.global.v2.u8 [%rd84], {%rs39, %rs38};
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$L__BB0_154:
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and.b32 %r459, %r89, 4;
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setp.eq.s32 %p190, %r459, 0;
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@%p190 bra $L__BB0_158;
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ld.const.u32 %r460, [params+108];
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setp.eq.s32 %p191, %r460, 0;
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ld.const.u64 %rd85, [params+224];
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cvta.to.global.u64 %rd86, %rd85;
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ld.const.u32 %r461, [params+216];
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mad.lo.s32 %r462, %r461, %r7, %r6;
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mul.wide.u32 %rd87, %r462, 8;
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add.s64 %rd24, %rd86, %rd87;
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@%p191 bra $L__BB0_157;
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ld.global.v4.u16 {%rs46, %rs47, %rs48, %rs49}, [%rd24];
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// begin inline asm
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{ cvt.f32.f16 %f1142, %rs46;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f1143, %rs47;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f1144, %rs48;}
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// end inline asm
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add.f32 %f1145, %f1142, 0f00000000;
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add.f32 %f1146, %f1143, 0f00000000;
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add.f32 %f1147, %f1144, 0f00000000;
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// begin inline asm
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{ cvt.rn.f16.f32 %rs45, %f1147;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs44, %f1146;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs43, %f1145;}
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// end inline asm
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mov.u16 %rs50, 0;
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st.global.v4.u16 [%rd24], {%rs43, %rs44, %rs45, %rs50};
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bra.uni $L__BB0_158;
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$L__BB0_5:
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ld.const.u64 %rd29, [params+432];
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cvta.to.global.u64 %rd30, %rd29;
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ld.const.u32 %r103, [params+424];
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mad.lo.s32 %r104, %r103, %r91, %r90;
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mul.wide.u32 %rd31, %r104, 12;
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add.s64 %rd32, %rd30, %rd31;
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ld.global.f32 %f10, [%rd32];
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mul.f32 %f245, %f10, 0f3456BF95;
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ld.global.f32 %f11, [%rd32+4];
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mul.f32 %f246, %f11, 0f3456BF95;
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ld.global.f32 %f12, [%rd32+8];
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mul.f32 %f247, %f12, 0f3456BF95;
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abs.f32 %f13, %f1159;
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div.rn.f32 %f248, %f245, %f13;
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abs.f32 %f249, %f1160;
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div.rn.f32 %f250, %f246, %f249;
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abs.f32 %f14, %f1161;
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div.rn.f32 %f251, %f247, %f14;
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abs.f32 %f252, %f248;
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abs.f32 %f253, %f250;
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abs.f32 %f254, %f251;
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mov.f32 %f255, 0f38D1B717;
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max.f32 %f256, %f252, %f255;
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max.f32 %f257, %f253, %f255;
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max.f32 %f258, %f254, %f255;
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fma.rn.f32 %f15, %f1159, %f256, %f10;
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fma.rn.f32 %f16, %f1160, %f257, %f11;
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fma.rn.f32 %f17, %f1161, %f258, %f12;
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ld.const.u64 %rd33, [params+128];
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cvta.to.global.u64 %rd34, %rd33;
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ld.const.u32 %r105, [params+120];
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mad.lo.s32 %r106, %r105, %r91, %r90;
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mul.wide.u32 %rd35, %r106, 4;
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add.s64 %rd36, %rd34, %rd35;
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ld.global.u32 %r472, [%rd36];
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setp.lt.s32 %p18, %r4, 1;
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mov.pred %p17, 0;
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mov.u32 %r468, 0;
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mov.f32 %f1169, 0f00000000;
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mov.f32 %f1170, %f1169;
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mov.f32 %f1171, %f1169;
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mov.f32 %f1172, %f1169;
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mov.pred %p192, %p17;
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@%p18 bra $L__BB0_25;
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ld.const.f32 %f18, [params+620];
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ld.const.u64 %rd37, [params+624];
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cvta.to.global.u64 %rd3, %rd37;
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ld.const.u64 %rd38, [params+640];
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cvta.to.global.u64 %rd39, %rd38;
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ld.const.u32 %r109, [params+632];
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and.b32 %r110, %r91, 255;
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and.b32 %r111, %r90, 255;
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mad.lo.s32 %r112, %r109, %r110, %r111;
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mul.wide.u32 %rd40, %r112, 3;
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add.s64 %rd4, %rd39, %rd40;
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ld.const.f32 %f19, [params+660];
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mul.f32 %f20, %f15, 0f3456BF95;
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mul.f32 %f21, %f16, 0f3456BF95;
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mul.f32 %f22, %f17, 0f3456BF95;
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ld.const.u64 %rd5, [params+96];
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abs.f32 %f391, %f21;
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abs.f32 %f392, %f20;
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max.f32 %f393, %f392, %f391;
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abs.f32 %f394, %f22;
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max.f32 %f395, %f393, %f394;
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mov.u32 %r465, %r468;
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$L__BB0_7:
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shl.b32 %r113, %r465, 1;
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mul.wide.s32 %rd41, %r113, 12;
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add.s64 %rd6, %rd3, %rd41;
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ld.global.f32 %f263, [%rd6];
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sub.f32 %f264, %f263, %f10;
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ld.global.f32 %f265, [%rd6+4];
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sub.f32 %f266, %f265, %f11;
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ld.global.f32 %f267, [%rd6+8];
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sub.f32 %f268, %f267, %f12;
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mul.f32 %f269, %f266, %f266;
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fma.rn.f32 %f270, %f264, %f264, %f269;
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fma.rn.f32 %f271, %f268, %f268, %f270;
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sqrt.rn.f32 %f27, %f271;
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rcp.rn.f32 %f272, %f27;
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mul.f32 %f28, %f264, %f272;
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mul.f32 %f29, %f266, %f272;
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mul.f32 %f30, %f268, %f272;
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mul.f32 %f273, %f1160, %f29;
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fma.rn.f32 %f274, %f1159, %f28, %f273;
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fma.rn.f32 %f31, %f1161, %f30, %f274;
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setp.leu.f32 %p19, %f31, 0f00000000;
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@%p19 bra $L__BB0_24;
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setp.ne.s32 %p21, %r5, 0;
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mul.f32 %f275, %f27, %f27;
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div.rn.f32 %f32, %f18, %f275;
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ld.global.u8 %rs15, [%rd4];
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cvt.rn.f32.u16 %f276, %rs15;
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div.rn.f32 %f277, %f276, 0fC37F0000;
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fma.rn.f32 %f278, %f277, 0f3F333333, 0f3F800000;
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setp.gt.f32 %p22, %f32, %f278;
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and.pred %p23, %p21, %p22;
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mov.pred %p192, -1;
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@%p23 bra $L__BB0_25;
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mul.f32 %f33, %f27, %f19;
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mov.f32 %f283, 0f40800000;
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abs.f32 %f35, %f33;
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setp.lt.f32 %p24, %f35, 0f00800000;
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mul.f32 %f285, %f35, 0f4B800000;
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selp.f32 %f286, %f285, %f35, %p24;
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selp.f32 %f287, 0fC3170000, 0fC2FE0000, %p24;
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mov.b32 %r114, %f286;
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and.b32 %r115, %r114, 8388607;
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or.b32 %r116, %r115, 1065353216;
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mov.b32 %f288, %r116;
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shr.u32 %r117, %r114, 23;
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cvt.rn.f32.u32 %f289, %r117;
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add.f32 %f290, %f287, %f289;
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setp.gt.f32 %p25, %f288, 0f3FB504F3;
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mul.f32 %f291, %f288, 0f3F000000;
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add.f32 %f292, %f290, 0f3F800000;
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selp.f32 %f293, %f292, %f290, %p25;
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selp.f32 %f294, %f291, %f288, %p25;
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add.f32 %f295, %f294, 0fBF800000;
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add.f32 %f296, %f294, 0f3F800000;
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rcp.approx.ftz.f32 %f297, %f296;
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add.f32 %f298, %f295, %f295;
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mul.f32 %f299, %f298, %f297;
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mul.f32 %f300, %f299, %f299;
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mov.f32 %f301, 0f3C4CAF63;
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mov.f32 %f302, 0f3B18F0FE;
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fma.rn.f32 %f303, %f302, %f300, %f301;
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mov.f32 %f304, 0f3DAAAABD;
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fma.rn.f32 %f305, %f303, %f300, %f304;
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mul.rn.f32 %f306, %f305, %f300;
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mul.rn.f32 %f307, %f306, %f299;
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sub.f32 %f308, %f295, %f299;
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add.f32 %f309, %f308, %f308;
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neg.f32 %f310, %f299;
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fma.rn.f32 %f311, %f310, %f295, %f309;
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mul.rn.f32 %f312, %f297, %f311;
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add.f32 %f313, %f307, %f299;
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sub.f32 %f314, %f299, %f313;
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add.f32 %f315, %f307, %f314;
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add.f32 %f316, %f312, %f315;
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add.f32 %f317, %f313, %f316;
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sub.f32 %f318, %f313, %f317;
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add.f32 %f319, %f316, %f318;
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mov.f32 %f320, 0f3F317200;
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mul.rn.f32 %f321, %f293, %f320;
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mov.f32 %f322, 0f35BFBE8E;
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mul.rn.f32 %f323, %f293, %f322;
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add.f32 %f324, %f321, %f317;
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sub.f32 %f325, %f321, %f324;
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add.f32 %f326, %f317, %f325;
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add.f32 %f327, %f319, %f326;
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add.f32 %f328, %f323, %f327;
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add.f32 %f329, %f324, %f328;
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sub.f32 %f330, %f324, %f329;
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add.f32 %f331, %f328, %f330;
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mul.rn.f32 %f332, %f283, %f329;
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neg.f32 %f333, %f332;
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fma.rn.f32 %f334, %f283, %f329, %f333;
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fma.rn.f32 %f335, %f283, %f331, %f334;
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mov.f32 %f336, 0f00000000;
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fma.rn.f32 %f337, %f336, %f329, %f335;
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add.rn.f32 %f338, %f332, %f337;
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neg.f32 %f339, %f338;
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add.rn.f32 %f340, %f332, %f339;
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add.rn.f32 %f341, %f340, %f337;
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mov.b32 %r118, %f338;
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setp.eq.s32 %p26, %r118, 1118925336;
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add.s32 %r119, %r118, -1;
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mov.b32 %f342, %r119;
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add.f32 %f343, %f341, 0f37000000;
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selp.f32 %f36, %f343, %f341, %p26;
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selp.f32 %f344, %f342, %f338, %p26;
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mov.f32 %f345, 0f3FB8AA3B;
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mul.rn.f32 %f346, %f344, %f345;
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cvt.rzi.f32.f32 %f347, %f346;
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abs.f32 %f348, %f347;
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setp.gt.f32 %p27, %f348, 0f42FC0000;
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mov.b32 %r120, %f347;
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and.b32 %r121, %r120, -2147483648;
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or.b32 %r122, %r121, 1123811328;
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mov.b32 %f349, %r122;
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selp.f32 %f350, %f349, %f347, %p27;
|
|
mov.f32 %f351, 0fBF317218;
|
|
fma.rn.f32 %f352, %f350, %f351, %f344;
|
|
mov.f32 %f353, 0f3102E308;
|
|
fma.rn.f32 %f354, %f350, %f353, %f352;
|
|
mul.f32 %f355, %f354, 0f3FB8AA3B;
|
|
add.f32 %f356, %f350, 0f4B40007F;
|
|
mov.b32 %r123, %f356;
|
|
shl.b32 %r124, %r123, 23;
|
|
mov.b32 %f357, %r124;
|
|
ex2.approx.ftz.f32 %f358, %f355;
|
|
mul.f32 %f37, %f358, %f357;
|
|
setp.eq.f32 %p28, %f37, 0f7F800000;
|
|
mov.f32 %f1166, 0f7F800000;
|
|
@%p28 bra $L__BB0_11;
|
|
|
|
fma.rn.f32 %f1166, %f37, %f36, %f37;
|
|
|
|
$L__BB0_11:
|
|
mov.f32 %f1156, 0f40000000;
|
|
cvt.rzi.f32.f32 %f1155, %f1156;
|
|
add.f32 %f1154, %f1155, %f1155;
|
|
mov.f32 %f1153, 0f40800000;
|
|
sub.f32 %f1152, %f1153, %f1154;
|
|
abs.f32 %f1151, %f1152;
|
|
setp.lt.f32 %p29, %f33, 0f00000000;
|
|
setp.eq.f32 %p30, %f1151, 0f3F800000;
|
|
and.pred %p1, %p29, %p30;
|
|
setp.eq.f32 %p31, %f33, 0f00000000;
|
|
@%p31 bra $L__BB0_15;
|
|
bra.uni $L__BB0_12;
|
|
|
|
$L__BB0_15:
|
|
add.f32 %f363, %f33, %f33;
|
|
selp.f32 %f1168, %f363, 0f00000000, %p30;
|
|
bra.uni $L__BB0_16;
|
|
|
|
$L__BB0_12:
|
|
mov.b32 %r125, %f1166;
|
|
xor.b32 %r126, %r125, -2147483648;
|
|
mov.b32 %f359, %r126;
|
|
selp.f32 %f1168, %f359, %f1166, %p1;
|
|
setp.geu.f32 %p32, %f33, 0f00000000;
|
|
@%p32 bra $L__BB0_16;
|
|
|
|
mov.f32 %f360, 0f40800000;
|
|
cvt.rzi.f32.f32 %f361, %f360;
|
|
setp.eq.f32 %p33, %f361, 0f40800000;
|
|
@%p33 bra $L__BB0_16;
|
|
|
|
mov.f32 %f1168, 0f7FFFFFFF;
|
|
|
|
$L__BB0_16:
|
|
add.f32 %f364, %f35, 0f40800000;
|
|
mov.b32 %r127, %f364;
|
|
setp.lt.s32 %p35, %r127, 2139095040;
|
|
@%p35 bra $L__BB0_21;
|
|
|
|
setp.gtu.f32 %p36, %f35, 0f7F800000;
|
|
@%p36 bra $L__BB0_20;
|
|
bra.uni $L__BB0_18;
|
|
|
|
$L__BB0_20:
|
|
add.f32 %f1168, %f33, 0f40800000;
|
|
bra.uni $L__BB0_21;
|
|
|
|
$L__BB0_18:
|
|
setp.neu.f32 %p37, %f35, 0f7F800000;
|
|
@%p37 bra $L__BB0_21;
|
|
|
|
selp.f32 %f1168, 0fFF800000, 0f7F800000, %p1;
|
|
|
|
$L__BB0_21:
|
|
shl.b32 %r463, %r465, 1;
|
|
mul.wide.s32 %rd89, %r463, 12;
|
|
add.s64 %rd88, %rd3, %rd89;
|
|
mov.f32 %f365, 0f3F800000;
|
|
sub.f32 %f366, %f365, %f1168;
|
|
setp.eq.f32 %p38, %f33, 0f3F800000;
|
|
selp.f32 %f367, 0f00000000, %f366, %p38;
|
|
cvt.sat.f32.f32 %f368, %f367;
|
|
mul.f32 %f369, %f32, %f368;
|
|
ld.global.f32 %f370, [%rd88+12];
|
|
mul.f32 %f371, %f28, %f370;
|
|
ld.global.f32 %f372, [%rd88+16];
|
|
mul.f32 %f373, %f29, %f372;
|
|
neg.f32 %f374, %f373;
|
|
sub.f32 %f375, %f374, %f371;
|
|
ld.global.f32 %f376, [%rd88+20];
|
|
mul.f32 %f377, %f30, %f376;
|
|
sub.f32 %f378, %f375, %f377;
|
|
cvt.sat.f32.f32 %f379, %f378;
|
|
mul.f32 %f46, %f369, %f379;
|
|
cvt.sat.f32.f32 %f47, %f31;
|
|
mul.f32 %f380, %f46, %f47;
|
|
setp.leu.f32 %p39, %f380, 0f3727C5AC;
|
|
@%p39 bra $L__BB0_23;
|
|
|
|
mul.f32 %f390, %f46, 0f3EA2F983;
|
|
mov.f32 %f396, 0f38D1B717;
|
|
max.f32 %f387, %f395, %f396;
|
|
sub.f32 %f388, %f27, %f387;
|
|
mov.f32 %f389, 0f00000000;
|
|
mov.u32 %r164, 2;
|
|
mov.u32 %r165, 1;
|
|
mov.u32 %r166, 3;
|
|
mov.u32 %r169, 1065353216;
|
|
mov.u32 %r198, 0;
|
|
// begin inline asm
|
|
call(%r128,%r129,%r130,%r131,%r132,%r133,%r134,%r135,%r136,%r137,%r138,%r139,%r140,%r141,%r142,%r143,%r144,%r145,%r146,%r147,%r148,%r149,%r150,%r151,%r152,%r153,%r154,%r155,%r156,%r157,%r158,%r159),_optix_trace_typed_32,(%r198,%rd5,%f15,%f16,%f17,%f28,%f29,%f30,%f387,%f388,%f389,%r165,%r198,%r165,%r164,%r165,%r166,%r169,%r169,%r169,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198,%r198);
|
|
// end inline asm
|
|
mov.b32 %f397, %r128;
|
|
mov.b32 %f398, %r129;
|
|
mov.b32 %f399, %r130;
|
|
mul.f32 %f400, %f390, %f397;
|
|
mul.f32 %f401, %f390, %f398;
|
|
mul.f32 %f402, %f390, %f399;
|
|
fma.rn.f32 %f1169, %f47, %f400, %f1169;
|
|
fma.rn.f32 %f1170, %f47, %f401, %f1170;
|
|
fma.rn.f32 %f1171, %f47, %f402, %f1171;
|
|
add.f32 %f1172, %f1172, %f397;
|
|
|
|
$L__BB0_23:
|
|
add.s32 %r468, %r468, 1;
|
|
|
|
$L__BB0_24:
|
|
add.s32 %r465, %r465, 1;
|
|
setp.lt.s32 %p41, %r465, %r4;
|
|
mov.pred %p192, %p17;
|
|
@%p41 bra $L__BB0_7;
|
|
|
|
$L__BB0_25:
|
|
cvt.rn.f32.s32 %f403, %r468;
|
|
mov.f32 %f404, 0f3F800000;
|
|
max.f32 %f405, %f403, %f404;
|
|
rcp.rn.f32 %f406, %f405;
|
|
mul.f32 %f1202, %f1169, %f406;
|
|
mul.f32 %f1203, %f1170, %f406;
|
|
mul.f32 %f1204, %f1171, %f406;
|
|
div.rn.f32 %f1205, %f1172, %f405;
|
|
not.pred %p42, %p192;
|
|
@%p42 bra $L__BB0_58;
|
|
|
|
abs.f32 %f1158, %f1161;
|
|
abs.f32 %f1157, %f1159;
|
|
setp.gt.f32 %p43, %f1157, %f1158;
|
|
selp.f32 %f411, 0f00000000, %f1160, %p43;
|
|
mov.f32 %f1188, 0f00000000;
|
|
neg.f32 %f412, %f1161;
|
|
selp.f32 %f413, %f1159, %f412, %p43;
|
|
neg.f32 %f414, %f1160;
|
|
selp.f32 %f415, %f414, 0f00000000, %p43;
|
|
mul.f32 %f416, %f413, %f413;
|
|
fma.rn.f32 %f417, %f415, %f415, %f416;
|
|
fma.rn.f32 %f418, %f411, %f411, %f417;
|
|
sqrt.rn.f32 %f419, %f418;
|
|
rcp.rn.f32 %f420, %f419;
|
|
mul.f32 %f68, %f415, %f420;
|
|
mul.f32 %f69, %f413, %f420;
|
|
mul.f32 %f70, %f411, %f420;
|
|
setp.lt.s32 %p44, %r5, 1;
|
|
mov.f32 %f1187, %f1188;
|
|
mov.f32 %f1186, %f1188;
|
|
mov.f32 %f1185, %f1188;
|
|
@%p44 bra $L__BB0_57;
|
|
|
|
cvt.rn.f32.s32 %f425, %r5;
|
|
rcp.rn.f32 %f71, %f425;
|
|
mul.f32 %f72, %f15, 0f3456BF95;
|
|
mul.f32 %f73, %f16, 0f3456BF95;
|
|
mul.f32 %f74, %f17, 0f3456BF95;
|
|
ld.const.u64 %rd7, [params+96];
|
|
mul.f32 %f426, %f1159, %f69;
|
|
mul.f32 %f427, %f1160, %f68;
|
|
sub.f32 %f75, %f427, %f426;
|
|
mul.f32 %f428, %f1161, %f68;
|
|
mul.f32 %f429, %f1159, %f70;
|
|
sub.f32 %f76, %f429, %f428;
|
|
mul.f32 %f430, %f1160, %f70;
|
|
mul.f32 %f431, %f1161, %f69;
|
|
sub.f32 %f77, %f431, %f430;
|
|
mov.u32 %r199, 0;
|
|
add.s64 %rd8, %rd1, 24;
|
|
mov.u64 %rd43, __cudart_i2opi_f;
|
|
abs.f32 %f500, %f73;
|
|
abs.f32 %f501, %f72;
|
|
max.f32 %f502, %f501, %f500;
|
|
abs.f32 %f503, %f74;
|
|
max.f32 %f504, %f502, %f503;
|
|
mov.u32 %r469, %r199;
|
|
|
|
$L__BB0_28:
|
|
cvt.rn.f32.s32 %f82, %r469;
|
|
mov.u32 %r471, %r199;
|
|
|
|
$L__BB0_29:
|
|
mad.lo.s32 %r201, %r472, 1664525, 1013904223;
|
|
and.b32 %r202, %r201, 16777215;
|
|
cvt.rn.f32.u32 %f432, %r202;
|
|
fma.rn.f32 %f433, %f432, 0f33800000, %f82;
|
|
mul.f32 %f434, %f71, %f433;
|
|
mad.lo.s32 %r472, %r201, 1664525, 1013904223;
|
|
and.b32 %r203, %r472, 16777215;
|
|
cvt.rn.f32.u32 %f435, %r203;
|
|
cvt.rn.f32.s32 %f436, %r471;
|
|
fma.rn.f32 %f437, %f435, 0f33800000, %f436;
|
|
mul.f32 %f438, %f71, %f437;
|
|
sqrt.rn.f32 %f87, %f434;
|
|
mul.f32 %f88, %f438, 0f40C90FDB;
|
|
mul.f32 %f439, %f88, 0f3F22F983;
|
|
cvt.rni.s32.f32 %r479, %f439;
|
|
cvt.rn.f32.s32 %f440, %r479;
|
|
mov.f32 %f441, 0fBFC90FDA;
|
|
fma.rn.f32 %f442, %f440, %f441, %f88;
|
|
mov.f32 %f443, 0fB3A22168;
|
|
fma.rn.f32 %f444, %f440, %f443, %f442;
|
|
mov.f32 %f445, 0fA7C234C5;
|
|
fma.rn.f32 %f1192, %f440, %f445, %f444;
|
|
abs.f32 %f90, %f88;
|
|
setp.ltu.f32 %p45, %f90, 0f47CE4780;
|
|
mov.u32 %r476, %r479;
|
|
mov.f32 %f1189, %f1192;
|
|
@%p45 bra $L__BB0_37;
|
|
|
|
setp.eq.f32 %p46, %f90, 0f7F800000;
|
|
@%p46 bra $L__BB0_36;
|
|
bra.uni $L__BB0_31;
|
|
|
|
$L__BB0_36:
|
|
mov.f32 %f448, 0f00000000;
|
|
mul.rn.f32 %f1189, %f88, %f448;
|
|
mov.u32 %r476, 0;
|
|
bra.uni $L__BB0_37;
|
|
|
|
$L__BB0_31:
|
|
mov.b32 %r21, %f88;
|
|
bfe.u32 %r205, %r21, 23, 8;
|
|
add.s32 %r22, %r205, -128;
|
|
shl.b32 %r206, %r21, 8;
|
|
or.b32 %r23, %r206, -2147483648;
|
|
shr.u32 %r24, %r22, 5;
|
|
mov.u64 %rd92, 0;
|
|
mov.u32 %r473, 0;
|
|
mov.u64 %rd90, %rd1;
|
|
mov.u64 %rd91, %rd43;
|
|
|
|
$L__BB0_32:
|
|
.pragma "nounroll";
|
|
ld.global.nc.u32 %r207, [%rd91];
|
|
mad.wide.u32 %rd45, %r207, %r23, %rd92;
|
|
shr.u64 %rd92, %rd45, 32;
|
|
st.local.u32 [%rd90], %rd45;
|
|
add.s64 %rd91, %rd91, 4;
|
|
add.s64 %rd90, %rd90, 4;
|
|
add.s32 %r473, %r473, 1;
|
|
setp.ne.s32 %p47, %r473, 6;
|
|
@%p47 bra $L__BB0_32;
|
|
|
|
st.local.u32 [%rd8], %rd92;
|
|
mov.u32 %r208, 4;
|
|
sub.s32 %r27, %r208, %r24;
|
|
mov.u32 %r209, 6;
|
|
sub.s32 %r210, %r209, %r24;
|
|
mul.wide.s32 %rd46, %r210, 4;
|
|
add.s64 %rd47, %rd1, %rd46;
|
|
ld.local.u32 %r474, [%rd47];
|
|
ld.local.u32 %r475, [%rd47+-4];
|
|
and.b32 %r30, %r22, 31;
|
|
setp.eq.s32 %p48, %r30, 0;
|
|
@%p48 bra $L__BB0_35;
|
|
|
|
mov.u32 %r211, 32;
|
|
sub.s32 %r212, %r211, %r30;
|
|
shr.u32 %r213, %r475, %r212;
|
|
shl.b32 %r214, %r474, %r30;
|
|
add.s32 %r474, %r213, %r214;
|
|
mul.wide.s32 %rd48, %r27, 4;
|
|
add.s64 %rd49, %rd1, %rd48;
|
|
ld.local.u32 %r215, [%rd49];
|
|
shr.u32 %r216, %r215, %r212;
|
|
shl.b32 %r217, %r475, %r30;
|
|
add.s32 %r475, %r216, %r217;
|
|
|
|
$L__BB0_35:
|
|
and.b32 %r218, %r21, -2147483648;
|
|
shr.u32 %r219, %r475, 30;
|
|
shl.b32 %r220, %r474, 2;
|
|
or.b32 %r221, %r219, %r220;
|
|
shr.u32 %r222, %r221, 31;
|
|
shr.u32 %r223, %r474, 30;
|
|
add.s32 %r224, %r222, %r223;
|
|
neg.s32 %r225, %r224;
|
|
setp.eq.s32 %p49, %r218, 0;
|
|
selp.b32 %r476, %r224, %r225, %p49;
|
|
setp.ne.s32 %p50, %r222, 0;
|
|
xor.b32 %r226, %r218, -2147483648;
|
|
selp.b32 %r227, %r226, %r218, %p50;
|
|
selp.b32 %r228, -1, 0, %p50;
|
|
xor.b32 %r229, %r221, %r228;
|
|
shl.b32 %r230, %r475, 2;
|
|
xor.b32 %r231, %r230, %r228;
|
|
cvt.u64.u32 %rd50, %r229;
|
|
cvt.u64.u32 %rd51, %r231;
|
|
bfi.b64 %rd52, %rd50, %rd51, 32, 32;
|
|
cvt.rn.f64.s64 %fd1, %rd52;
|
|
mul.f64 %fd2, %fd1, 0d3BF921FB54442D19;
|
|
cvt.rn.f32.f64 %f446, %fd2;
|
|
setp.eq.s32 %p51, %r227, 0;
|
|
neg.f32 %f447, %f446;
|
|
selp.f32 %f1189, %f446, %f447, %p51;
|
|
|
|
$L__BB0_37:
|
|
add.s32 %r37, %r476, 1;
|
|
and.b32 %r38, %r37, 1;
|
|
setp.eq.s32 %p52, %r38, 0;
|
|
selp.f32 %f94, %f1189, 0f3F800000, %p52;
|
|
mul.rn.f32 %f95, %f1189, %f1189;
|
|
mov.f32 %f1190, 0fB94D4153;
|
|
@%p52 bra $L__BB0_39;
|
|
|
|
mov.f32 %f450, 0fBAB607ED;
|
|
mov.f32 %f451, 0f37CBAC00;
|
|
fma.rn.f32 %f1190, %f451, %f95, %f450;
|
|
|
|
$L__BB0_39:
|
|
selp.f32 %f452, 0f3C0885E4, 0f3D2AAABB, %p52;
|
|
fma.rn.f32 %f453, %f1190, %f95, %f452;
|
|
selp.f32 %f454, 0fBE2AAAA8, 0fBEFFFFFF, %p52;
|
|
fma.rn.f32 %f455, %f453, %f95, %f454;
|
|
mov.f32 %f456, 0f00000000;
|
|
fma.rn.f32 %f457, %f95, %f94, %f456;
|
|
fma.rn.f32 %f1191, %f455, %f457, %f94;
|
|
and.b32 %r233, %r37, 2;
|
|
setp.eq.s32 %p54, %r233, 0;
|
|
@%p54 bra $L__BB0_41;
|
|
|
|
mov.f32 %f459, 0fBF800000;
|
|
fma.rn.f32 %f1191, %f1191, %f459, %f456;
|
|
|
|
$L__BB0_41:
|
|
@%p45 bra $L__BB0_49;
|
|
|
|
setp.eq.f32 %p56, %f90, 0f7F800000;
|
|
@%p56 bra $L__BB0_48;
|
|
bra.uni $L__BB0_43;
|
|
|
|
$L__BB0_48:
|
|
mov.f32 %f462, 0f00000000;
|
|
mul.rn.f32 %f1192, %f88, %f462;
|
|
mov.u32 %r479, 0;
|
|
bra.uni $L__BB0_49;
|
|
|
|
$L__BB0_43:
|
|
mov.b32 %r39, %f88;
|
|
bfe.u32 %r234, %r39, 23, 8;
|
|
add.s32 %r40, %r234, -128;
|
|
shl.b32 %r235, %r39, 8;
|
|
or.b32 %r41, %r235, -2147483648;
|
|
shr.u32 %r42, %r40, 5;
|
|
mov.u64 %rd93, 0;
|
|
mov.u64 %rd94, %rd93;
|
|
|
|
$L__BB0_44:
|
|
.pragma "nounroll";
|
|
shl.b64 %rd55, %rd93, 2;
|
|
mov.u64 %rd56, __cudart_i2opi_f;
|
|
add.s64 %rd57, %rd56, %rd55;
|
|
ld.global.nc.u32 %r236, [%rd57];
|
|
mad.wide.u32 %rd58, %r236, %r41, %rd94;
|
|
shr.u64 %rd94, %rd58, 32;
|
|
add.s64 %rd59, %rd1, %rd55;
|
|
st.local.u32 [%rd59], %rd58;
|
|
cvt.u32.u64 %r237, %rd93;
|
|
add.s32 %r238, %r237, 1;
|
|
cvt.s64.s32 %rd93, %r238;
|
|
setp.ne.s32 %p57, %r238, 6;
|
|
@%p57 bra $L__BB0_44;
|
|
|
|
st.local.u32 [%rd8], %rd94;
|
|
mov.u32 %r239, 4;
|
|
sub.s32 %r43, %r239, %r42;
|
|
mov.u32 %r240, 6;
|
|
sub.s32 %r241, %r240, %r42;
|
|
mul.wide.s32 %rd60, %r241, 4;
|
|
add.s64 %rd61, %rd1, %rd60;
|
|
ld.local.u32 %r477, [%rd61];
|
|
ld.local.u32 %r478, [%rd61+-4];
|
|
and.b32 %r46, %r40, 31;
|
|
setp.eq.s32 %p58, %r46, 0;
|
|
@%p58 bra $L__BB0_47;
|
|
|
|
mov.u32 %r242, 32;
|
|
sub.s32 %r243, %r242, %r46;
|
|
shr.u32 %r244, %r478, %r243;
|
|
shl.b32 %r245, %r477, %r46;
|
|
add.s32 %r477, %r244, %r245;
|
|
mul.wide.s32 %rd62, %r43, 4;
|
|
add.s64 %rd63, %rd1, %rd62;
|
|
ld.local.u32 %r246, [%rd63];
|
|
shr.u32 %r247, %r246, %r243;
|
|
shl.b32 %r248, %r478, %r46;
|
|
add.s32 %r478, %r247, %r248;
|
|
|
|
$L__BB0_47:
|
|
and.b32 %r249, %r39, -2147483648;
|
|
shr.u32 %r250, %r478, 30;
|
|
shl.b32 %r251, %r477, 2;
|
|
or.b32 %r252, %r250, %r251;
|
|
shr.u32 %r253, %r252, 31;
|
|
shr.u32 %r254, %r477, 30;
|
|
add.s32 %r255, %r253, %r254;
|
|
neg.s32 %r256, %r255;
|
|
setp.eq.s32 %p59, %r249, 0;
|
|
selp.b32 %r479, %r255, %r256, %p59;
|
|
setp.ne.s32 %p60, %r253, 0;
|
|
xor.b32 %r257, %r249, -2147483648;
|
|
selp.b32 %r258, %r257, %r249, %p60;
|
|
selp.b32 %r259, -1, 0, %p60;
|
|
xor.b32 %r260, %r252, %r259;
|
|
shl.b32 %r261, %r478, 2;
|
|
xor.b32 %r262, %r261, %r259;
|
|
cvt.u64.u32 %rd64, %r260;
|
|
cvt.u64.u32 %rd65, %r262;
|
|
bfi.b64 %rd66, %rd64, %rd65, 32, 32;
|
|
cvt.rn.f64.s64 %fd3, %rd66;
|
|
mul.f64 %fd4, %fd3, 0d3BF921FB54442D19;
|
|
cvt.rn.f32.f64 %f460, %fd4;
|
|
setp.eq.s32 %p61, %r258, 0;
|
|
neg.f32 %f461, %f460;
|
|
selp.f32 %f1192, %f460, %f461, %p61;
|
|
|
|
$L__BB0_49:
|
|
mul.f32 %f104, %f87, %f1191;
|
|
and.b32 %r53, %r479, 1;
|
|
setp.eq.s32 %p62, %r53, 0;
|
|
selp.f32 %f105, %f1192, 0f3F800000, %p62;
|
|
mul.rn.f32 %f106, %f1192, %f1192;
|
|
mov.f32 %f1193, 0fB94D4153;
|
|
@%p62 bra $L__BB0_51;
|
|
|
|
mov.f32 %f464, 0fBAB607ED;
|
|
mov.f32 %f465, 0f37CBAC00;
|
|
fma.rn.f32 %f1193, %f465, %f106, %f464;
|
|
|
|
$L__BB0_51:
|
|
selp.f32 %f466, 0f3C0885E4, 0f3D2AAABB, %p62;
|
|
fma.rn.f32 %f467, %f1193, %f106, %f466;
|
|
selp.f32 %f468, 0fBE2AAAA8, 0fBEFFFFFF, %p62;
|
|
fma.rn.f32 %f469, %f467, %f106, %f468;
|
|
mov.f32 %f1195, 0f00000000;
|
|
fma.rn.f32 %f471, %f106, %f105, %f1195;
|
|
fma.rn.f32 %f1194, %f469, %f471, %f105;
|
|
and.b32 %r264, %r479, 2;
|
|
setp.eq.s32 %p64, %r264, 0;
|
|
@%p64 bra $L__BB0_53;
|
|
|
|
mov.f32 %f472, 0f00000000;
|
|
mov.f32 %f473, 0fBF800000;
|
|
fma.rn.f32 %f1194, %f1194, %f473, %f472;
|
|
|
|
$L__BB0_53:
|
|
mul.f32 %f486, %f104, %f104;
|
|
mov.f32 %f487, 0f3F800000;
|
|
sub.f32 %f488, %f487, %f486;
|
|
mul.f32 %f489, %f87, %f1194;
|
|
mul.f32 %f490, %f489, %f489;
|
|
sub.f32 %f491, %f488, %f490;
|
|
max.f32 %f492, %f1195, %f491;
|
|
sqrt.rn.f32 %f493, %f492;
|
|
mul.f32 %f494, %f68, %f489;
|
|
mul.f32 %f495, %f69, %f489;
|
|
mul.f32 %f496, %f70, %f489;
|
|
fma.rn.f32 %f497, %f77, %f104, %f494;
|
|
fma.rn.f32 %f498, %f76, %f104, %f495;
|
|
fma.rn.f32 %f499, %f75, %f104, %f496;
|
|
fma.rn.f32 %f477, %f1159, %f493, %f497;
|
|
fma.rn.f32 %f478, %f1160, %f493, %f498;
|
|
fma.rn.f32 %f479, %f1161, %f493, %f499;
|
|
mov.f32 %f505, 0f38D1B717;
|
|
max.f32 %f480, %f504, %f505;
|
|
mov.f32 %f481, 0f6C4ECB8F;
|
|
mov.u32 %r298, 1;
|
|
mov.u32 %r301, 2;
|
|
mov.u32 %r303, 4;
|
|
mov.u32 %r306, 1065353216;
|
|
mov.u32 %r307, 2139095039;
|
|
mov.u32 %r335, 0;
|
|
// begin inline asm
|
|
call(%r265,%r266,%r267,%r268,%r269,%r270,%r271,%r272,%r273,%r274,%r275,%r276,%r277,%r278,%r279,%r280,%r281,%r282,%r283,%r284,%r285,%r286,%r287,%r288,%r289,%r290,%r291,%r292,%r293,%r294,%r295,%r296),_optix_trace_typed_32,(%r335,%rd7,%f15,%f16,%f17,%f477,%f478,%f479,%f480,%f481,%f1195,%r298,%r335,%r335,%r301,%r335,%r303,%r306,%r306,%r306,%r307,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335,%r335);
|
|
// end inline asm
|
|
mov.b32 %f112, %r268;
|
|
setp.ge.f32 %p65, %f112, 0f00000000;
|
|
mov.f32 %f1196, %f1195;
|
|
mov.f32 %f1197, %f1195;
|
|
@%p65 bra $L__BB0_55;
|
|
|
|
mov.b32 %f1197, %r265;
|
|
mov.b32 %f1196, %r266;
|
|
mov.b32 %f1195, %r267;
|
|
|
|
$L__BB0_55:
|
|
setp.ltu.f32 %p66, %f112, 0f00000000;
|
|
selp.f32 %f506, 0f3F800000, 0f00000000, %p66;
|
|
add.f32 %f1185, %f1185, %f506;
|
|
add.f32 %f1188, %f1188, %f1197;
|
|
add.f32 %f1187, %f1187, %f1196;
|
|
add.f32 %f1186, %f1186, %f1195;
|
|
add.s32 %r471, %r471, 1;
|
|
setp.lt.s32 %p67, %r471, %r5;
|
|
@%p67 bra $L__BB0_29;
|
|
|
|
add.s32 %r469, %r469, 1;
|
|
setp.lt.s32 %p68, %r469, %r5;
|
|
@%p68 bra $L__BB0_28;
|
|
|
|
$L__BB0_57:
|
|
mul.lo.s32 %r336, %r5, %r5;
|
|
cvt.rn.f32.s32 %f507, %r336;
|
|
rcp.rn.f32 %f508, %f507;
|
|
mul.f32 %f1202, %f508, %f1188;
|
|
mul.f32 %f1203, %f508, %f1187;
|
|
mul.f32 %f1204, %f508, %f1186;
|
|
div.rn.f32 %f1205, %f1185, %f507;
|
|
|
|
$L__BB0_58:
|
|
ld.const.u32 %r464, [params+616];
|
|
setp.lt.s32 %p69, %r464, 0;
|
|
selp.f32 %f135, %f1202, %f1205, %p69;
|
|
ld.const.u32 %r88, [params+104];
|
|
and.b32 %r337, %r88, 8;
|
|
setp.eq.s32 %p70, %r337, 0;
|
|
@%p70 bra $L__BB0_72;
|
|
|
|
ld.const.u64 %rd68, [params+192];
|
|
cvta.to.global.u64 %rd19, %rd68;
|
|
ld.const.u32 %r338, [params+184];
|
|
mad.lo.s32 %r339, %r338, %r7, %r6;
|
|
cvt.u64.u32 %rd20, %r339;
|
|
mov.f32 %f510, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f511, %f510;
|
|
add.f32 %f512, %f511, %f511;
|
|
mov.f32 %f513, 0f3EE8BA2E;
|
|
sub.f32 %f514, %f513, %f512;
|
|
abs.f32 %f136, %f514;
|
|
abs.f32 %f137, %f135;
|
|
setp.lt.f32 %p71, %f137, 0f00800000;
|
|
mul.f32 %f515, %f137, 0f4B800000;
|
|
selp.f32 %f516, %f515, %f137, %p71;
|
|
selp.f32 %f517, 0fC3170000, 0fC2FE0000, %p71;
|
|
mov.b32 %r340, %f516;
|
|
and.b32 %r341, %r340, 8388607;
|
|
or.b32 %r342, %r341, 1065353216;
|
|
mov.b32 %f518, %r342;
|
|
shr.u32 %r343, %r340, 23;
|
|
cvt.rn.f32.u32 %f519, %r343;
|
|
add.f32 %f520, %f517, %f519;
|
|
setp.gt.f32 %p72, %f518, 0f3FB504F3;
|
|
mul.f32 %f521, %f518, 0f3F000000;
|
|
add.f32 %f522, %f520, 0f3F800000;
|
|
selp.f32 %f523, %f522, %f520, %p72;
|
|
selp.f32 %f524, %f521, %f518, %p72;
|
|
add.f32 %f525, %f524, 0fBF800000;
|
|
add.f32 %f526, %f524, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f527, %f526;
|
|
add.f32 %f528, %f525, %f525;
|
|
mul.f32 %f529, %f528, %f527;
|
|
mul.f32 %f530, %f529, %f529;
|
|
mov.f32 %f531, 0f3C4CAF63;
|
|
mov.f32 %f532, 0f3B18F0FE;
|
|
fma.rn.f32 %f533, %f532, %f530, %f531;
|
|
mov.f32 %f534, 0f3DAAAABD;
|
|
fma.rn.f32 %f535, %f533, %f530, %f534;
|
|
mul.rn.f32 %f536, %f535, %f530;
|
|
mul.rn.f32 %f537, %f536, %f529;
|
|
sub.f32 %f538, %f525, %f529;
|
|
add.f32 %f539, %f538, %f538;
|
|
neg.f32 %f540, %f529;
|
|
fma.rn.f32 %f541, %f540, %f525, %f539;
|
|
mul.rn.f32 %f542, %f527, %f541;
|
|
add.f32 %f543, %f537, %f529;
|
|
sub.f32 %f544, %f529, %f543;
|
|
add.f32 %f545, %f537, %f544;
|
|
add.f32 %f546, %f542, %f545;
|
|
add.f32 %f547, %f543, %f546;
|
|
sub.f32 %f548, %f543, %f547;
|
|
add.f32 %f549, %f546, %f548;
|
|
mov.f32 %f550, 0f3F317200;
|
|
mul.rn.f32 %f551, %f523, %f550;
|
|
mov.f32 %f552, 0f35BFBE8E;
|
|
mul.rn.f32 %f553, %f523, %f552;
|
|
add.f32 %f554, %f551, %f547;
|
|
sub.f32 %f555, %f551, %f554;
|
|
add.f32 %f556, %f547, %f555;
|
|
add.f32 %f557, %f549, %f556;
|
|
add.f32 %f558, %f553, %f557;
|
|
add.f32 %f559, %f554, %f558;
|
|
sub.f32 %f560, %f554, %f559;
|
|
add.f32 %f561, %f558, %f560;
|
|
mul.rn.f32 %f562, %f513, %f559;
|
|
neg.f32 %f563, %f562;
|
|
fma.rn.f32 %f564, %f513, %f559, %f563;
|
|
fma.rn.f32 %f565, %f513, %f561, %f564;
|
|
mov.f32 %f566, 0f00000000;
|
|
fma.rn.f32 %f567, %f566, %f559, %f565;
|
|
add.rn.f32 %f568, %f562, %f567;
|
|
neg.f32 %f569, %f568;
|
|
add.rn.f32 %f570, %f562, %f569;
|
|
add.rn.f32 %f571, %f570, %f567;
|
|
mov.b32 %r344, %f568;
|
|
setp.eq.s32 %p73, %r344, 1118925336;
|
|
add.s32 %r345, %r344, -1;
|
|
mov.b32 %f572, %r345;
|
|
add.f32 %f573, %f571, 0f37000000;
|
|
selp.f32 %f138, %f573, %f571, %p73;
|
|
selp.f32 %f574, %f572, %f568, %p73;
|
|
mov.f32 %f575, 0f3FB8AA3B;
|
|
mul.rn.f32 %f576, %f574, %f575;
|
|
cvt.rzi.f32.f32 %f577, %f576;
|
|
abs.f32 %f578, %f577;
|
|
setp.gt.f32 %p74, %f578, 0f42FC0000;
|
|
mov.b32 %r346, %f577;
|
|
and.b32 %r347, %r346, -2147483648;
|
|
or.b32 %r348, %r347, 1123811328;
|
|
mov.b32 %f579, %r348;
|
|
selp.f32 %f580, %f579, %f577, %p74;
|
|
mov.f32 %f581, 0fBF317218;
|
|
fma.rn.f32 %f582, %f580, %f581, %f574;
|
|
mov.f32 %f583, 0f3102E308;
|
|
fma.rn.f32 %f584, %f580, %f583, %f582;
|
|
mul.f32 %f585, %f584, 0f3FB8AA3B;
|
|
add.f32 %f586, %f580, 0f4B40007F;
|
|
mov.b32 %r349, %f586;
|
|
shl.b32 %r350, %r349, 23;
|
|
mov.b32 %f587, %r350;
|
|
ex2.approx.ftz.f32 %f588, %f585;
|
|
mul.f32 %f139, %f588, %f587;
|
|
setp.eq.f32 %p75, %f139, 0f7F800000;
|
|
mov.f32 %f1206, 0f7F800000;
|
|
@%p75 bra $L__BB0_61;
|
|
|
|
fma.rn.f32 %f1206, %f139, %f138, %f139;
|
|
|
|
$L__BB0_61:
|
|
setp.lt.f32 %p76, %f135, 0f00000000;
|
|
setp.eq.f32 %p77, %f136, 0f3F800000;
|
|
and.pred %p3, %p76, %p77;
|
|
setp.eq.f32 %p78, %f135, 0f00000000;
|
|
@%p78 bra $L__BB0_65;
|
|
bra.uni $L__BB0_62;
|
|
|
|
$L__BB0_65:
|
|
add.f32 %f593, %f135, %f135;
|
|
selp.f32 %f1208, %f593, 0f00000000, %p77;
|
|
bra.uni $L__BB0_66;
|
|
|
|
$L__BB0_157:
|
|
mov.f32 %f1150, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs53, %f1150;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs52, %f1150;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs51, %f1150;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs54, 0;
|
|
st.global.v4.u16 [%rd24], {%rs51, %rs52, %rs53, %rs54};
|
|
bra.uni $L__BB0_158;
|
|
|
|
$L__BB0_62:
|
|
mov.b32 %r351, %f1206;
|
|
xor.b32 %r352, %r351, -2147483648;
|
|
mov.b32 %f589, %r352;
|
|
selp.f32 %f1208, %f589, %f1206, %p3;
|
|
setp.geu.f32 %p79, %f135, 0f00000000;
|
|
@%p79 bra $L__BB0_66;
|
|
|
|
mov.f32 %f590, 0f3EE8BA2E;
|
|
cvt.rzi.f32.f32 %f591, %f590;
|
|
setp.eq.f32 %p80, %f591, 0f3EE8BA2E;
|
|
@%p80 bra $L__BB0_66;
|
|
|
|
mov.f32 %f1208, 0f7FFFFFFF;
|
|
|
|
$L__BB0_66:
|
|
add.f32 %f594, %f137, 0f3EE8BA2E;
|
|
mov.b32 %r353, %f594;
|
|
setp.lt.s32 %p82, %r353, 2139095040;
|
|
@%p82 bra $L__BB0_71;
|
|
|
|
setp.gtu.f32 %p83, %f137, 0f7F800000;
|
|
@%p83 bra $L__BB0_70;
|
|
bra.uni $L__BB0_68;
|
|
|
|
$L__BB0_70:
|
|
add.f32 %f1208, %f135, 0f3EE8BA2E;
|
|
bra.uni $L__BB0_71;
|
|
|
|
$L__BB0_68:
|
|
setp.neu.f32 %p84, %f137, 0f7F800000;
|
|
@%p84 bra $L__BB0_71;
|
|
|
|
selp.f32 %f1208, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
$L__BB0_71:
|
|
mul.f32 %f595, %f1208, 0f437F0000;
|
|
setp.eq.f32 %p85, %f135, 0f3F800000;
|
|
selp.f32 %f596, 0f437F0000, %f595, %p85;
|
|
cvt.rzi.u32.f32 %r354, %f596;
|
|
shl.b64 %rd69, %rd20, 1;
|
|
add.s64 %rd70, %rd19, %rd69;
|
|
cvt.u16.u32 %rs16, %r354;
|
|
mov.u16 %rs17, 255;
|
|
st.global.v2.u8 [%rd70], {%rs16, %rs17};
|
|
|
|
$L__BB0_72:
|
|
ld.const.v2.f32 {%f597, %f598}, [params+648];
|
|
mul.f32 %f148, %f1202, %f597;
|
|
mul.f32 %f149, %f1203, %f598;
|
|
ld.const.f32 %f601, [params+656];
|
|
mul.f32 %f150, %f1204, %f601;
|
|
and.b32 %r355, %r88, 1;
|
|
setp.eq.b32 %p86, %r355, 1;
|
|
mov.pred %p87, 0;
|
|
xor.pred %p88, %p86, %p87;
|
|
not.pred %p89, %p88;
|
|
@%p89 bra $L__BB0_146;
|
|
|
|
mov.f32 %f603, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f604, %f603;
|
|
add.f32 %f605, %f604, %f604;
|
|
mov.f32 %f606, 0f3EE66666;
|
|
sub.f32 %f607, %f606, %f605;
|
|
abs.f32 %f151, %f607;
|
|
abs.f32 %f152, %f148;
|
|
setp.lt.f32 %p90, %f152, 0f00800000;
|
|
mul.f32 %f608, %f152, 0f4B800000;
|
|
selp.f32 %f609, %f608, %f152, %p90;
|
|
selp.f32 %f610, 0fC3170000, 0fC2FE0000, %p90;
|
|
mov.b32 %r356, %f609;
|
|
and.b32 %r357, %r356, 8388607;
|
|
or.b32 %r358, %r357, 1065353216;
|
|
mov.b32 %f611, %r358;
|
|
shr.u32 %r359, %r356, 23;
|
|
cvt.rn.f32.u32 %f612, %r359;
|
|
add.f32 %f613, %f610, %f612;
|
|
setp.gt.f32 %p91, %f611, 0f3FB504F3;
|
|
mul.f32 %f614, %f611, 0f3F000000;
|
|
add.f32 %f615, %f613, 0f3F800000;
|
|
selp.f32 %f616, %f615, %f613, %p91;
|
|
selp.f32 %f617, %f614, %f611, %p91;
|
|
add.f32 %f618, %f617, 0fBF800000;
|
|
add.f32 %f619, %f617, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f620, %f619;
|
|
add.f32 %f621, %f618, %f618;
|
|
mul.f32 %f622, %f621, %f620;
|
|
mul.f32 %f623, %f622, %f622;
|
|
mov.f32 %f624, 0f3C4CAF63;
|
|
mov.f32 %f625, 0f3B18F0FE;
|
|
fma.rn.f32 %f626, %f625, %f623, %f624;
|
|
mov.f32 %f627, 0f3DAAAABD;
|
|
fma.rn.f32 %f628, %f626, %f623, %f627;
|
|
mul.rn.f32 %f629, %f628, %f623;
|
|
mul.rn.f32 %f630, %f629, %f622;
|
|
sub.f32 %f631, %f618, %f622;
|
|
add.f32 %f632, %f631, %f631;
|
|
neg.f32 %f633, %f622;
|
|
fma.rn.f32 %f634, %f633, %f618, %f632;
|
|
mul.rn.f32 %f635, %f620, %f634;
|
|
add.f32 %f636, %f630, %f622;
|
|
sub.f32 %f637, %f622, %f636;
|
|
add.f32 %f638, %f630, %f637;
|
|
add.f32 %f639, %f635, %f638;
|
|
add.f32 %f640, %f636, %f639;
|
|
sub.f32 %f641, %f636, %f640;
|
|
add.f32 %f642, %f639, %f641;
|
|
mov.f32 %f643, 0f3F317200;
|
|
mul.rn.f32 %f644, %f616, %f643;
|
|
mov.f32 %f645, 0f35BFBE8E;
|
|
mul.rn.f32 %f646, %f616, %f645;
|
|
add.f32 %f647, %f644, %f640;
|
|
sub.f32 %f648, %f644, %f647;
|
|
add.f32 %f649, %f640, %f648;
|
|
add.f32 %f650, %f642, %f649;
|
|
add.f32 %f651, %f646, %f650;
|
|
add.f32 %f652, %f647, %f651;
|
|
sub.f32 %f653, %f647, %f652;
|
|
add.f32 %f654, %f651, %f653;
|
|
mul.rn.f32 %f655, %f606, %f652;
|
|
neg.f32 %f656, %f655;
|
|
fma.rn.f32 %f657, %f606, %f652, %f656;
|
|
fma.rn.f32 %f658, %f606, %f654, %f657;
|
|
mov.f32 %f659, 0f00000000;
|
|
fma.rn.f32 %f660, %f659, %f652, %f658;
|
|
add.rn.f32 %f661, %f655, %f660;
|
|
neg.f32 %f662, %f661;
|
|
add.rn.f32 %f663, %f655, %f662;
|
|
add.rn.f32 %f664, %f663, %f660;
|
|
mov.b32 %r360, %f661;
|
|
setp.eq.s32 %p92, %r360, 1118925336;
|
|
add.s32 %r361, %r360, -1;
|
|
mov.b32 %f665, %r361;
|
|
add.f32 %f666, %f664, 0f37000000;
|
|
selp.f32 %f153, %f666, %f664, %p92;
|
|
selp.f32 %f667, %f665, %f661, %p92;
|
|
mov.f32 %f668, 0f3FB8AA3B;
|
|
mul.rn.f32 %f669, %f667, %f668;
|
|
cvt.rzi.f32.f32 %f670, %f669;
|
|
abs.f32 %f671, %f670;
|
|
setp.gt.f32 %p93, %f671, 0f42FC0000;
|
|
mov.b32 %r362, %f670;
|
|
and.b32 %r363, %r362, -2147483648;
|
|
or.b32 %r364, %r363, 1123811328;
|
|
mov.b32 %f672, %r364;
|
|
selp.f32 %f673, %f672, %f670, %p93;
|
|
mov.f32 %f674, 0fBF317218;
|
|
fma.rn.f32 %f675, %f673, %f674, %f667;
|
|
mov.f32 %f676, 0f3102E308;
|
|
fma.rn.f32 %f677, %f673, %f676, %f675;
|
|
mul.f32 %f678, %f677, 0f3FB8AA3B;
|
|
add.f32 %f679, %f673, 0f4B40007F;
|
|
mov.b32 %r365, %f679;
|
|
shl.b32 %r366, %r365, 23;
|
|
mov.b32 %f680, %r366;
|
|
ex2.approx.ftz.f32 %f681, %f678;
|
|
mul.f32 %f154, %f681, %f680;
|
|
setp.eq.f32 %p94, %f154, 0f7F800000;
|
|
mov.f32 %f1209, 0f7F800000;
|
|
@%p94 bra $L__BB0_75;
|
|
|
|
fma.rn.f32 %f1209, %f154, %f153, %f154;
|
|
|
|
$L__BB0_75:
|
|
setp.lt.f32 %p95, %f148, 0f00000000;
|
|
setp.eq.f32 %p96, %f151, 0f3F800000;
|
|
and.pred %p4, %p95, %p96;
|
|
setp.eq.f32 %p97, %f148, 0f00000000;
|
|
@%p97 bra $L__BB0_79;
|
|
bra.uni $L__BB0_76;
|
|
|
|
$L__BB0_79:
|
|
add.f32 %f686, %f148, %f148;
|
|
selp.f32 %f1211, %f686, 0f00000000, %p96;
|
|
bra.uni $L__BB0_80;
|
|
|
|
$L__BB0_76:
|
|
mov.b32 %r367, %f1209;
|
|
xor.b32 %r368, %r367, -2147483648;
|
|
mov.b32 %f682, %r368;
|
|
selp.f32 %f1211, %f682, %f1209, %p4;
|
|
setp.geu.f32 %p98, %f148, 0f00000000;
|
|
@%p98 bra $L__BB0_80;
|
|
|
|
mov.f32 %f683, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f684, %f683;
|
|
setp.eq.f32 %p99, %f684, 0f3EE66666;
|
|
@%p99 bra $L__BB0_80;
|
|
|
|
mov.f32 %f1211, 0f7FFFFFFF;
|
|
|
|
$L__BB0_80:
|
|
add.f32 %f687, %f152, 0f3EE66666;
|
|
mov.b32 %r369, %f687;
|
|
setp.lt.s32 %p101, %r369, 2139095040;
|
|
@%p101 bra $L__BB0_85;
|
|
|
|
setp.gtu.f32 %p102, %f152, 0f7F800000;
|
|
@%p102 bra $L__BB0_84;
|
|
bra.uni $L__BB0_82;
|
|
|
|
$L__BB0_84:
|
|
add.f32 %f1211, %f148, 0f3EE66666;
|
|
bra.uni $L__BB0_85;
|
|
|
|
$L__BB0_82:
|
|
setp.neu.f32 %p103, %f152, 0f7F800000;
|
|
@%p103 bra $L__BB0_85;
|
|
|
|
selp.f32 %f1211, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
$L__BB0_85:
|
|
setp.eq.f32 %p104, %f148, 0f3F800000;
|
|
selp.f32 %f163, 0f3F800000, %f1211, %p104;
|
|
abs.f32 %f164, %f149;
|
|
setp.lt.f32 %p105, %f164, 0f00800000;
|
|
mul.f32 %f689, %f164, 0f4B800000;
|
|
selp.f32 %f690, %f689, %f164, %p105;
|
|
selp.f32 %f691, 0fC3170000, 0fC2FE0000, %p105;
|
|
mov.b32 %r370, %f690;
|
|
and.b32 %r371, %r370, 8388607;
|
|
or.b32 %r372, %r371, 1065353216;
|
|
mov.b32 %f692, %r372;
|
|
shr.u32 %r373, %r370, 23;
|
|
cvt.rn.f32.u32 %f693, %r373;
|
|
add.f32 %f694, %f691, %f693;
|
|
setp.gt.f32 %p106, %f692, 0f3FB504F3;
|
|
mul.f32 %f695, %f692, 0f3F000000;
|
|
add.f32 %f696, %f694, 0f3F800000;
|
|
selp.f32 %f697, %f696, %f694, %p106;
|
|
selp.f32 %f698, %f695, %f692, %p106;
|
|
add.f32 %f699, %f698, 0fBF800000;
|
|
add.f32 %f700, %f698, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f701, %f700;
|
|
add.f32 %f702, %f699, %f699;
|
|
mul.f32 %f703, %f702, %f701;
|
|
mul.f32 %f704, %f703, %f703;
|
|
mov.f32 %f705, 0f3C4CAF63;
|
|
mov.f32 %f706, 0f3B18F0FE;
|
|
fma.rn.f32 %f707, %f706, %f704, %f705;
|
|
mov.f32 %f708, 0f3DAAAABD;
|
|
fma.rn.f32 %f709, %f707, %f704, %f708;
|
|
mul.rn.f32 %f710, %f709, %f704;
|
|
mul.rn.f32 %f711, %f710, %f703;
|
|
sub.f32 %f712, %f699, %f703;
|
|
add.f32 %f713, %f712, %f712;
|
|
neg.f32 %f714, %f703;
|
|
fma.rn.f32 %f715, %f714, %f699, %f713;
|
|
mul.rn.f32 %f716, %f701, %f715;
|
|
add.f32 %f717, %f711, %f703;
|
|
sub.f32 %f718, %f703, %f717;
|
|
add.f32 %f719, %f711, %f718;
|
|
add.f32 %f720, %f716, %f719;
|
|
add.f32 %f721, %f717, %f720;
|
|
sub.f32 %f722, %f717, %f721;
|
|
add.f32 %f723, %f720, %f722;
|
|
mov.f32 %f724, 0f3F317200;
|
|
mul.rn.f32 %f725, %f697, %f724;
|
|
mov.f32 %f726, 0f35BFBE8E;
|
|
mul.rn.f32 %f727, %f697, %f726;
|
|
add.f32 %f728, %f725, %f721;
|
|
sub.f32 %f729, %f725, %f728;
|
|
add.f32 %f730, %f721, %f729;
|
|
add.f32 %f731, %f723, %f730;
|
|
add.f32 %f732, %f727, %f731;
|
|
add.f32 %f733, %f728, %f732;
|
|
sub.f32 %f734, %f728, %f733;
|
|
add.f32 %f735, %f732, %f734;
|
|
mov.f32 %f736, 0f3EE66666;
|
|
mul.rn.f32 %f737, %f736, %f733;
|
|
neg.f32 %f738, %f737;
|
|
fma.rn.f32 %f739, %f736, %f733, %f738;
|
|
fma.rn.f32 %f740, %f736, %f735, %f739;
|
|
mov.f32 %f741, 0f00000000;
|
|
fma.rn.f32 %f742, %f741, %f733, %f740;
|
|
add.rn.f32 %f743, %f737, %f742;
|
|
neg.f32 %f744, %f743;
|
|
add.rn.f32 %f745, %f737, %f744;
|
|
add.rn.f32 %f746, %f745, %f742;
|
|
mov.b32 %r374, %f743;
|
|
setp.eq.s32 %p107, %r374, 1118925336;
|
|
add.s32 %r375, %r374, -1;
|
|
mov.b32 %f747, %r375;
|
|
add.f32 %f748, %f746, 0f37000000;
|
|
selp.f32 %f165, %f748, %f746, %p107;
|
|
selp.f32 %f749, %f747, %f743, %p107;
|
|
mov.f32 %f750, 0f3FB8AA3B;
|
|
mul.rn.f32 %f751, %f749, %f750;
|
|
cvt.rzi.f32.f32 %f752, %f751;
|
|
abs.f32 %f753, %f752;
|
|
setp.gt.f32 %p108, %f753, 0f42FC0000;
|
|
mov.b32 %r376, %f752;
|
|
and.b32 %r377, %r376, -2147483648;
|
|
or.b32 %r378, %r377, 1123811328;
|
|
mov.b32 %f754, %r378;
|
|
selp.f32 %f755, %f754, %f752, %p108;
|
|
mov.f32 %f756, 0fBF317218;
|
|
fma.rn.f32 %f757, %f755, %f756, %f749;
|
|
mov.f32 %f758, 0f3102E308;
|
|
fma.rn.f32 %f759, %f755, %f758, %f757;
|
|
mul.f32 %f760, %f759, 0f3FB8AA3B;
|
|
add.f32 %f761, %f755, 0f4B40007F;
|
|
mov.b32 %r379, %f761;
|
|
shl.b32 %r380, %r379, 23;
|
|
mov.b32 %f762, %r380;
|
|
ex2.approx.ftz.f32 %f763, %f760;
|
|
mul.f32 %f166, %f763, %f762;
|
|
setp.eq.f32 %p109, %f166, 0f7F800000;
|
|
mov.f32 %f1212, 0f7F800000;
|
|
@%p109 bra $L__BB0_87;
|
|
|
|
fma.rn.f32 %f1212, %f166, %f165, %f166;
|
|
|
|
$L__BB0_87:
|
|
setp.lt.f32 %p110, %f149, 0f00000000;
|
|
and.pred %p5, %p110, %p96;
|
|
setp.eq.f32 %p112, %f149, 0f00000000;
|
|
@%p112 bra $L__BB0_91;
|
|
bra.uni $L__BB0_88;
|
|
|
|
$L__BB0_91:
|
|
add.f32 %f768, %f149, %f149;
|
|
selp.f32 %f1214, %f768, 0f00000000, %p96;
|
|
bra.uni $L__BB0_92;
|
|
|
|
$L__BB0_88:
|
|
mov.b32 %r381, %f1212;
|
|
xor.b32 %r382, %r381, -2147483648;
|
|
mov.b32 %f764, %r382;
|
|
selp.f32 %f1214, %f764, %f1212, %p5;
|
|
setp.geu.f32 %p113, %f149, 0f00000000;
|
|
@%p113 bra $L__BB0_92;
|
|
|
|
mov.f32 %f765, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f766, %f765;
|
|
setp.eq.f32 %p114, %f766, 0f3EE66666;
|
|
@%p114 bra $L__BB0_92;
|
|
|
|
mov.f32 %f1214, 0f7FFFFFFF;
|
|
|
|
$L__BB0_92:
|
|
add.f32 %f769, %f164, 0f3EE66666;
|
|
mov.b32 %r383, %f769;
|
|
setp.lt.s32 %p116, %r383, 2139095040;
|
|
@%p116 bra $L__BB0_97;
|
|
|
|
setp.gtu.f32 %p117, %f164, 0f7F800000;
|
|
@%p117 bra $L__BB0_96;
|
|
bra.uni $L__BB0_94;
|
|
|
|
$L__BB0_96:
|
|
add.f32 %f1214, %f149, 0f3EE66666;
|
|
bra.uni $L__BB0_97;
|
|
|
|
$L__BB0_94:
|
|
setp.neu.f32 %p118, %f164, 0f7F800000;
|
|
@%p118 bra $L__BB0_97;
|
|
|
|
selp.f32 %f1214, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
$L__BB0_97:
|
|
setp.eq.f32 %p119, %f149, 0f3F800000;
|
|
selp.f32 %f175, 0f3F800000, %f1214, %p119;
|
|
abs.f32 %f176, %f150;
|
|
setp.lt.f32 %p120, %f176, 0f00800000;
|
|
mul.f32 %f771, %f176, 0f4B800000;
|
|
selp.f32 %f772, %f771, %f176, %p120;
|
|
selp.f32 %f773, 0fC3170000, 0fC2FE0000, %p120;
|
|
mov.b32 %r384, %f772;
|
|
and.b32 %r385, %r384, 8388607;
|
|
or.b32 %r386, %r385, 1065353216;
|
|
mov.b32 %f774, %r386;
|
|
shr.u32 %r387, %r384, 23;
|
|
cvt.rn.f32.u32 %f775, %r387;
|
|
add.f32 %f776, %f773, %f775;
|
|
setp.gt.f32 %p121, %f774, 0f3FB504F3;
|
|
mul.f32 %f777, %f774, 0f3F000000;
|
|
add.f32 %f778, %f776, 0f3F800000;
|
|
selp.f32 %f779, %f778, %f776, %p121;
|
|
selp.f32 %f780, %f777, %f774, %p121;
|
|
add.f32 %f781, %f780, 0fBF800000;
|
|
add.f32 %f782, %f780, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f783, %f782;
|
|
add.f32 %f784, %f781, %f781;
|
|
mul.f32 %f785, %f784, %f783;
|
|
mul.f32 %f786, %f785, %f785;
|
|
mov.f32 %f787, 0f3C4CAF63;
|
|
mov.f32 %f788, 0f3B18F0FE;
|
|
fma.rn.f32 %f789, %f788, %f786, %f787;
|
|
mov.f32 %f790, 0f3DAAAABD;
|
|
fma.rn.f32 %f791, %f789, %f786, %f790;
|
|
mul.rn.f32 %f792, %f791, %f786;
|
|
mul.rn.f32 %f793, %f792, %f785;
|
|
sub.f32 %f794, %f781, %f785;
|
|
add.f32 %f795, %f794, %f794;
|
|
neg.f32 %f796, %f785;
|
|
fma.rn.f32 %f797, %f796, %f781, %f795;
|
|
mul.rn.f32 %f798, %f783, %f797;
|
|
add.f32 %f799, %f793, %f785;
|
|
sub.f32 %f800, %f785, %f799;
|
|
add.f32 %f801, %f793, %f800;
|
|
add.f32 %f802, %f798, %f801;
|
|
add.f32 %f803, %f799, %f802;
|
|
sub.f32 %f804, %f799, %f803;
|
|
add.f32 %f805, %f802, %f804;
|
|
mov.f32 %f806, 0f3F317200;
|
|
mul.rn.f32 %f807, %f779, %f806;
|
|
mov.f32 %f808, 0f35BFBE8E;
|
|
mul.rn.f32 %f809, %f779, %f808;
|
|
add.f32 %f810, %f807, %f803;
|
|
sub.f32 %f811, %f807, %f810;
|
|
add.f32 %f812, %f803, %f811;
|
|
add.f32 %f813, %f805, %f812;
|
|
add.f32 %f814, %f809, %f813;
|
|
add.f32 %f815, %f810, %f814;
|
|
sub.f32 %f816, %f810, %f815;
|
|
add.f32 %f817, %f814, %f816;
|
|
mov.f32 %f818, 0f3EE66666;
|
|
mul.rn.f32 %f819, %f818, %f815;
|
|
neg.f32 %f820, %f819;
|
|
fma.rn.f32 %f821, %f818, %f815, %f820;
|
|
fma.rn.f32 %f822, %f818, %f817, %f821;
|
|
mov.f32 %f823, 0f00000000;
|
|
fma.rn.f32 %f824, %f823, %f815, %f822;
|
|
add.rn.f32 %f825, %f819, %f824;
|
|
neg.f32 %f826, %f825;
|
|
add.rn.f32 %f827, %f819, %f826;
|
|
add.rn.f32 %f828, %f827, %f824;
|
|
mov.b32 %r388, %f825;
|
|
setp.eq.s32 %p122, %r388, 1118925336;
|
|
add.s32 %r389, %r388, -1;
|
|
mov.b32 %f829, %r389;
|
|
add.f32 %f830, %f828, 0f37000000;
|
|
selp.f32 %f177, %f830, %f828, %p122;
|
|
selp.f32 %f831, %f829, %f825, %p122;
|
|
mov.f32 %f832, 0f3FB8AA3B;
|
|
mul.rn.f32 %f833, %f831, %f832;
|
|
cvt.rzi.f32.f32 %f834, %f833;
|
|
abs.f32 %f835, %f834;
|
|
setp.gt.f32 %p123, %f835, 0f42FC0000;
|
|
mov.b32 %r390, %f834;
|
|
and.b32 %r391, %r390, -2147483648;
|
|
or.b32 %r392, %r391, 1123811328;
|
|
mov.b32 %f836, %r392;
|
|
selp.f32 %f837, %f836, %f834, %p123;
|
|
mov.f32 %f838, 0fBF317218;
|
|
fma.rn.f32 %f839, %f837, %f838, %f831;
|
|
mov.f32 %f840, 0f3102E308;
|
|
fma.rn.f32 %f841, %f837, %f840, %f839;
|
|
mul.f32 %f842, %f841, 0f3FB8AA3B;
|
|
add.f32 %f843, %f837, 0f4B40007F;
|
|
mov.b32 %r393, %f843;
|
|
shl.b32 %r394, %r393, 23;
|
|
mov.b32 %f844, %r394;
|
|
ex2.approx.ftz.f32 %f845, %f842;
|
|
mul.f32 %f178, %f845, %f844;
|
|
setp.eq.f32 %p124, %f178, 0f7F800000;
|
|
mov.f32 %f1215, 0f7F800000;
|
|
@%p124 bra $L__BB0_99;
|
|
|
|
fma.rn.f32 %f1215, %f178, %f177, %f178;
|
|
|
|
$L__BB0_99:
|
|
setp.lt.f32 %p125, %f150, 0f00000000;
|
|
and.pred %p6, %p125, %p96;
|
|
setp.eq.f32 %p127, %f150, 0f00000000;
|
|
@%p127 bra $L__BB0_103;
|
|
bra.uni $L__BB0_100;
|
|
|
|
$L__BB0_103:
|
|
add.f32 %f850, %f150, %f150;
|
|
selp.f32 %f1217, %f850, 0f00000000, %p96;
|
|
bra.uni $L__BB0_104;
|
|
|
|
$L__BB0_100:
|
|
mov.b32 %r395, %f1215;
|
|
xor.b32 %r396, %r395, -2147483648;
|
|
mov.b32 %f846, %r396;
|
|
selp.f32 %f1217, %f846, %f1215, %p6;
|
|
setp.geu.f32 %p128, %f150, 0f00000000;
|
|
@%p128 bra $L__BB0_104;
|
|
|
|
mov.f32 %f847, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f848, %f847;
|
|
setp.eq.f32 %p129, %f848, 0f3EE66666;
|
|
@%p129 bra $L__BB0_104;
|
|
|
|
mov.f32 %f1217, 0f7FFFFFFF;
|
|
|
|
$L__BB0_104:
|
|
add.f32 %f851, %f176, 0f3EE66666;
|
|
mov.b32 %r397, %f851;
|
|
setp.lt.s32 %p131, %r397, 2139095040;
|
|
@%p131 bra $L__BB0_109;
|
|
|
|
setp.gtu.f32 %p132, %f176, 0f7F800000;
|
|
@%p132 bra $L__BB0_108;
|
|
bra.uni $L__BB0_106;
|
|
|
|
$L__BB0_108:
|
|
add.f32 %f1217, %f150, 0f3EE66666;
|
|
bra.uni $L__BB0_109;
|
|
|
|
$L__BB0_106:
|
|
setp.neu.f32 %p133, %f176, 0f7F800000;
|
|
@%p133 bra $L__BB0_109;
|
|
|
|
selp.f32 %f1217, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
$L__BB0_109:
|
|
setp.eq.f32 %p134, %f150, 0f3F800000;
|
|
mov.f32 %f853, 0f3F800000;
|
|
selp.f32 %f854, 0f3F800000, %f1217, %p134;
|
|
ld.const.u64 %rd71, [params+144];
|
|
cvta.to.global.u64 %rd21, %rd71;
|
|
ld.const.u32 %r398, [params+136];
|
|
mad.lo.s32 %r399, %r398, %r7, %r6;
|
|
cvt.u64.u32 %rd22, %r399;
|
|
min.f32 %f855, %f163, %f853;
|
|
mov.f32 %f856, 0f00000000;
|
|
max.f32 %f187, %f856, %f855;
|
|
min.f32 %f857, %f175, %f853;
|
|
max.f32 %f188, %f856, %f857;
|
|
min.f32 %f858, %f854, %f853;
|
|
max.f32 %f189, %f856, %f858;
|
|
mov.f32 %f859, 0f3E555555;
|
|
cvt.rzi.f32.f32 %f860, %f859;
|
|
add.f32 %f861, %f860, %f860;
|
|
mov.f32 %f862, 0f3ED55555;
|
|
sub.f32 %f863, %f862, %f861;
|
|
abs.f32 %f190, %f863;
|
|
abs.f32 %f191, %f187;
|
|
setp.lt.f32 %p135, %f191, 0f00800000;
|
|
mul.f32 %f864, %f191, 0f4B800000;
|
|
selp.f32 %f865, %f864, %f191, %p135;
|
|
selp.f32 %f866, 0fC3170000, 0fC2FE0000, %p135;
|
|
mov.b32 %r400, %f865;
|
|
and.b32 %r401, %r400, 8388607;
|
|
or.b32 %r402, %r401, 1065353216;
|
|
mov.b32 %f867, %r402;
|
|
shr.u32 %r403, %r400, 23;
|
|
cvt.rn.f32.u32 %f868, %r403;
|
|
add.f32 %f869, %f866, %f868;
|
|
setp.gt.f32 %p136, %f867, 0f3FB504F3;
|
|
mul.f32 %f870, %f867, 0f3F000000;
|
|
add.f32 %f871, %f869, 0f3F800000;
|
|
selp.f32 %f872, %f871, %f869, %p136;
|
|
selp.f32 %f873, %f870, %f867, %p136;
|
|
add.f32 %f874, %f873, 0fBF800000;
|
|
add.f32 %f875, %f873, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f876, %f875;
|
|
add.f32 %f877, %f874, %f874;
|
|
mul.f32 %f878, %f877, %f876;
|
|
mul.f32 %f879, %f878, %f878;
|
|
mov.f32 %f880, 0f3C4CAF63;
|
|
mov.f32 %f881, 0f3B18F0FE;
|
|
fma.rn.f32 %f882, %f881, %f879, %f880;
|
|
mov.f32 %f883, 0f3DAAAABD;
|
|
fma.rn.f32 %f884, %f882, %f879, %f883;
|
|
mul.rn.f32 %f885, %f884, %f879;
|
|
mul.rn.f32 %f886, %f885, %f878;
|
|
sub.f32 %f887, %f874, %f878;
|
|
add.f32 %f888, %f887, %f887;
|
|
neg.f32 %f889, %f878;
|
|
fma.rn.f32 %f890, %f889, %f874, %f888;
|
|
mul.rn.f32 %f891, %f876, %f890;
|
|
add.f32 %f892, %f886, %f878;
|
|
sub.f32 %f893, %f878, %f892;
|
|
add.f32 %f894, %f886, %f893;
|
|
add.f32 %f895, %f891, %f894;
|
|
add.f32 %f896, %f892, %f895;
|
|
sub.f32 %f897, %f892, %f896;
|
|
add.f32 %f898, %f895, %f897;
|
|
mov.f32 %f899, 0f3F317200;
|
|
mul.rn.f32 %f900, %f872, %f899;
|
|
mov.f32 %f901, 0f35BFBE8E;
|
|
mul.rn.f32 %f902, %f872, %f901;
|
|
add.f32 %f903, %f900, %f896;
|
|
sub.f32 %f904, %f900, %f903;
|
|
add.f32 %f905, %f896, %f904;
|
|
add.f32 %f906, %f898, %f905;
|
|
add.f32 %f907, %f902, %f906;
|
|
add.f32 %f908, %f903, %f907;
|
|
sub.f32 %f909, %f903, %f908;
|
|
add.f32 %f910, %f907, %f909;
|
|
mul.rn.f32 %f911, %f862, %f908;
|
|
neg.f32 %f912, %f911;
|
|
fma.rn.f32 %f913, %f862, %f908, %f912;
|
|
fma.rn.f32 %f914, %f862, %f910, %f913;
|
|
fma.rn.f32 %f915, %f856, %f908, %f914;
|
|
add.rn.f32 %f916, %f911, %f915;
|
|
neg.f32 %f917, %f916;
|
|
add.rn.f32 %f918, %f911, %f917;
|
|
add.rn.f32 %f919, %f918, %f915;
|
|
mov.b32 %r404, %f916;
|
|
setp.eq.s32 %p137, %r404, 1118925336;
|
|
add.s32 %r405, %r404, -1;
|
|
mov.b32 %f920, %r405;
|
|
add.f32 %f921, %f919, 0f37000000;
|
|
selp.f32 %f192, %f921, %f919, %p137;
|
|
selp.f32 %f922, %f920, %f916, %p137;
|
|
mov.f32 %f923, 0f3FB8AA3B;
|
|
mul.rn.f32 %f924, %f922, %f923;
|
|
cvt.rzi.f32.f32 %f925, %f924;
|
|
abs.f32 %f926, %f925;
|
|
setp.gt.f32 %p138, %f926, 0f42FC0000;
|
|
mov.b32 %r406, %f925;
|
|
and.b32 %r407, %r406, -2147483648;
|
|
or.b32 %r408, %r407, 1123811328;
|
|
mov.b32 %f927, %r408;
|
|
selp.f32 %f928, %f927, %f925, %p138;
|
|
mov.f32 %f929, 0fBF317218;
|
|
fma.rn.f32 %f930, %f928, %f929, %f922;
|
|
mov.f32 %f931, 0f3102E308;
|
|
fma.rn.f32 %f932, %f928, %f931, %f930;
|
|
mul.f32 %f933, %f932, 0f3FB8AA3B;
|
|
add.f32 %f934, %f928, 0f4B40007F;
|
|
mov.b32 %r409, %f934;
|
|
shl.b32 %r410, %r409, 23;
|
|
mov.b32 %f935, %r410;
|
|
ex2.approx.ftz.f32 %f936, %f933;
|
|
mul.f32 %f193, %f936, %f935;
|
|
setp.eq.f32 %p139, %f193, 0f7F800000;
|
|
mov.f32 %f1218, 0f7F800000;
|
|
@%p139 bra $L__BB0_111;
|
|
|
|
fma.rn.f32 %f1218, %f193, %f192, %f193;
|
|
|
|
$L__BB0_111:
|
|
setp.lt.f32 %p140, %f187, 0f00000000;
|
|
setp.eq.f32 %p141, %f190, 0f3F800000;
|
|
and.pred %p7, %p140, %p141;
|
|
setp.eq.f32 %p142, %f187, 0f00000000;
|
|
@%p142 bra $L__BB0_115;
|
|
bra.uni $L__BB0_112;
|
|
|
|
$L__BB0_115:
|
|
add.f32 %f941, %f187, %f187;
|
|
selp.f32 %f1220, %f941, 0f00000000, %p141;
|
|
bra.uni $L__BB0_116;
|
|
|
|
$L__BB0_112:
|
|
mov.b32 %r411, %f1218;
|
|
xor.b32 %r412, %r411, -2147483648;
|
|
mov.b32 %f937, %r412;
|
|
selp.f32 %f1220, %f937, %f1218, %p7;
|
|
setp.geu.f32 %p143, %f187, 0f00000000;
|
|
@%p143 bra $L__BB0_116;
|
|
|
|
mov.f32 %f938, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f939, %f938;
|
|
setp.eq.f32 %p144, %f939, 0f3ED55555;
|
|
@%p144 bra $L__BB0_116;
|
|
|
|
mov.f32 %f1220, 0f7FFFFFFF;
|
|
|
|
$L__BB0_116:
|
|
add.f32 %f942, %f191, 0f3ED55555;
|
|
mov.b32 %r413, %f942;
|
|
setp.lt.s32 %p146, %r413, 2139095040;
|
|
@%p146 bra $L__BB0_121;
|
|
|
|
setp.gtu.f32 %p147, %f191, 0f7F800000;
|
|
@%p147 bra $L__BB0_120;
|
|
bra.uni $L__BB0_118;
|
|
|
|
$L__BB0_120:
|
|
add.f32 %f1220, %f187, 0f3ED55555;
|
|
bra.uni $L__BB0_121;
|
|
|
|
$L__BB0_118:
|
|
setp.neu.f32 %p148, %f191, 0f7F800000;
|
|
@%p148 bra $L__BB0_121;
|
|
|
|
selp.f32 %f1220, 0fFF800000, 0f7F800000, %p7;
|
|
|
|
$L__BB0_121:
|
|
abs.f32 %f202, %f188;
|
|
setp.lt.f32 %p149, %f202, 0f00800000;
|
|
mul.f32 %f944, %f202, 0f4B800000;
|
|
selp.f32 %f945, %f944, %f202, %p149;
|
|
selp.f32 %f946, 0fC3170000, 0fC2FE0000, %p149;
|
|
mov.b32 %r414, %f945;
|
|
and.b32 %r415, %r414, 8388607;
|
|
or.b32 %r416, %r415, 1065353216;
|
|
mov.b32 %f947, %r416;
|
|
shr.u32 %r417, %r414, 23;
|
|
cvt.rn.f32.u32 %f948, %r417;
|
|
add.f32 %f949, %f946, %f948;
|
|
setp.gt.f32 %p150, %f947, 0f3FB504F3;
|
|
mul.f32 %f950, %f947, 0f3F000000;
|
|
add.f32 %f951, %f949, 0f3F800000;
|
|
selp.f32 %f952, %f951, %f949, %p150;
|
|
selp.f32 %f953, %f950, %f947, %p150;
|
|
add.f32 %f954, %f953, 0fBF800000;
|
|
add.f32 %f955, %f953, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f956, %f955;
|
|
add.f32 %f957, %f954, %f954;
|
|
mul.f32 %f958, %f957, %f956;
|
|
mul.f32 %f959, %f958, %f958;
|
|
mov.f32 %f960, 0f3C4CAF63;
|
|
mov.f32 %f961, 0f3B18F0FE;
|
|
fma.rn.f32 %f962, %f961, %f959, %f960;
|
|
mov.f32 %f963, 0f3DAAAABD;
|
|
fma.rn.f32 %f964, %f962, %f959, %f963;
|
|
mul.rn.f32 %f965, %f964, %f959;
|
|
mul.rn.f32 %f966, %f965, %f958;
|
|
sub.f32 %f967, %f954, %f958;
|
|
add.f32 %f968, %f967, %f967;
|
|
neg.f32 %f969, %f958;
|
|
fma.rn.f32 %f970, %f969, %f954, %f968;
|
|
mul.rn.f32 %f971, %f956, %f970;
|
|
add.f32 %f972, %f966, %f958;
|
|
sub.f32 %f973, %f958, %f972;
|
|
add.f32 %f974, %f966, %f973;
|
|
add.f32 %f975, %f971, %f974;
|
|
add.f32 %f976, %f972, %f975;
|
|
sub.f32 %f977, %f972, %f976;
|
|
add.f32 %f978, %f975, %f977;
|
|
mov.f32 %f979, 0f3F317200;
|
|
mul.rn.f32 %f980, %f952, %f979;
|
|
mov.f32 %f981, 0f35BFBE8E;
|
|
mul.rn.f32 %f982, %f952, %f981;
|
|
add.f32 %f983, %f980, %f976;
|
|
sub.f32 %f984, %f980, %f983;
|
|
add.f32 %f985, %f976, %f984;
|
|
add.f32 %f986, %f978, %f985;
|
|
add.f32 %f987, %f982, %f986;
|
|
add.f32 %f988, %f983, %f987;
|
|
sub.f32 %f989, %f983, %f988;
|
|
add.f32 %f990, %f987, %f989;
|
|
mov.f32 %f991, 0f3ED55555;
|
|
mul.rn.f32 %f992, %f991, %f988;
|
|
neg.f32 %f993, %f992;
|
|
fma.rn.f32 %f994, %f991, %f988, %f993;
|
|
fma.rn.f32 %f995, %f991, %f990, %f994;
|
|
mov.f32 %f996, 0f00000000;
|
|
fma.rn.f32 %f997, %f996, %f988, %f995;
|
|
add.rn.f32 %f998, %f992, %f997;
|
|
neg.f32 %f999, %f998;
|
|
add.rn.f32 %f1000, %f992, %f999;
|
|
add.rn.f32 %f1001, %f1000, %f997;
|
|
mov.b32 %r418, %f998;
|
|
setp.eq.s32 %p151, %r418, 1118925336;
|
|
add.s32 %r419, %r418, -1;
|
|
mov.b32 %f1002, %r419;
|
|
add.f32 %f1003, %f1001, 0f37000000;
|
|
selp.f32 %f203, %f1003, %f1001, %p151;
|
|
selp.f32 %f1004, %f1002, %f998, %p151;
|
|
mov.f32 %f1005, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1006, %f1004, %f1005;
|
|
cvt.rzi.f32.f32 %f1007, %f1006;
|
|
abs.f32 %f1008, %f1007;
|
|
setp.gt.f32 %p152, %f1008, 0f42FC0000;
|
|
mov.b32 %r420, %f1007;
|
|
and.b32 %r421, %r420, -2147483648;
|
|
or.b32 %r422, %r421, 1123811328;
|
|
mov.b32 %f1009, %r422;
|
|
selp.f32 %f1010, %f1009, %f1007, %p152;
|
|
mov.f32 %f1011, 0fBF317218;
|
|
fma.rn.f32 %f1012, %f1010, %f1011, %f1004;
|
|
mov.f32 %f1013, 0f3102E308;
|
|
fma.rn.f32 %f1014, %f1010, %f1013, %f1012;
|
|
mul.f32 %f1015, %f1014, 0f3FB8AA3B;
|
|
add.f32 %f1016, %f1010, 0f4B40007F;
|
|
mov.b32 %r423, %f1016;
|
|
shl.b32 %r424, %r423, 23;
|
|
mov.b32 %f1017, %r424;
|
|
ex2.approx.ftz.f32 %f1018, %f1015;
|
|
mul.f32 %f204, %f1018, %f1017;
|
|
setp.eq.f32 %p153, %f204, 0f7F800000;
|
|
mov.f32 %f1221, 0f7F800000;
|
|
@%p153 bra $L__BB0_123;
|
|
|
|
fma.rn.f32 %f1221, %f204, %f203, %f204;
|
|
|
|
$L__BB0_123:
|
|
setp.lt.f32 %p154, %f188, 0f00000000;
|
|
and.pred %p8, %p154, %p141;
|
|
setp.eq.f32 %p156, %f188, 0f00000000;
|
|
@%p156 bra $L__BB0_127;
|
|
bra.uni $L__BB0_124;
|
|
|
|
$L__BB0_127:
|
|
add.f32 %f1023, %f188, %f188;
|
|
selp.f32 %f1223, %f1023, 0f00000000, %p141;
|
|
bra.uni $L__BB0_128;
|
|
|
|
$L__BB0_124:
|
|
mov.b32 %r425, %f1221;
|
|
xor.b32 %r426, %r425, -2147483648;
|
|
mov.b32 %f1019, %r426;
|
|
selp.f32 %f1223, %f1019, %f1221, %p8;
|
|
setp.geu.f32 %p157, %f188, 0f00000000;
|
|
@%p157 bra $L__BB0_128;
|
|
|
|
mov.f32 %f1020, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1021, %f1020;
|
|
setp.eq.f32 %p158, %f1021, 0f3ED55555;
|
|
@%p158 bra $L__BB0_128;
|
|
|
|
mov.f32 %f1223, 0f7FFFFFFF;
|
|
|
|
$L__BB0_128:
|
|
add.f32 %f1024, %f202, 0f3ED55555;
|
|
mov.b32 %r427, %f1024;
|
|
setp.lt.s32 %p160, %r427, 2139095040;
|
|
@%p160 bra $L__BB0_133;
|
|
|
|
setp.gtu.f32 %p161, %f202, 0f7F800000;
|
|
@%p161 bra $L__BB0_132;
|
|
bra.uni $L__BB0_130;
|
|
|
|
$L__BB0_132:
|
|
add.f32 %f1223, %f188, 0f3ED55555;
|
|
bra.uni $L__BB0_133;
|
|
|
|
$L__BB0_130:
|
|
setp.neu.f32 %p162, %f202, 0f7F800000;
|
|
@%p162 bra $L__BB0_133;
|
|
|
|
selp.f32 %f1223, 0fFF800000, 0f7F800000, %p8;
|
|
|
|
$L__BB0_133:
|
|
abs.f32 %f213, %f189;
|
|
setp.lt.f32 %p163, %f213, 0f00800000;
|
|
mul.f32 %f1026, %f213, 0f4B800000;
|
|
selp.f32 %f1027, %f1026, %f213, %p163;
|
|
selp.f32 %f1028, 0fC3170000, 0fC2FE0000, %p163;
|
|
mov.b32 %r428, %f1027;
|
|
and.b32 %r429, %r428, 8388607;
|
|
or.b32 %r430, %r429, 1065353216;
|
|
mov.b32 %f1029, %r430;
|
|
shr.u32 %r431, %r428, 23;
|
|
cvt.rn.f32.u32 %f1030, %r431;
|
|
add.f32 %f1031, %f1028, %f1030;
|
|
setp.gt.f32 %p164, %f1029, 0f3FB504F3;
|
|
mul.f32 %f1032, %f1029, 0f3F000000;
|
|
add.f32 %f1033, %f1031, 0f3F800000;
|
|
selp.f32 %f1034, %f1033, %f1031, %p164;
|
|
selp.f32 %f1035, %f1032, %f1029, %p164;
|
|
add.f32 %f1036, %f1035, 0fBF800000;
|
|
add.f32 %f1037, %f1035, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1038, %f1037;
|
|
add.f32 %f1039, %f1036, %f1036;
|
|
mul.f32 %f1040, %f1039, %f1038;
|
|
mul.f32 %f1041, %f1040, %f1040;
|
|
mov.f32 %f1042, 0f3C4CAF63;
|
|
mov.f32 %f1043, 0f3B18F0FE;
|
|
fma.rn.f32 %f1044, %f1043, %f1041, %f1042;
|
|
mov.f32 %f1045, 0f3DAAAABD;
|
|
fma.rn.f32 %f1046, %f1044, %f1041, %f1045;
|
|
mul.rn.f32 %f1047, %f1046, %f1041;
|
|
mul.rn.f32 %f1048, %f1047, %f1040;
|
|
sub.f32 %f1049, %f1036, %f1040;
|
|
add.f32 %f1050, %f1049, %f1049;
|
|
neg.f32 %f1051, %f1040;
|
|
fma.rn.f32 %f1052, %f1051, %f1036, %f1050;
|
|
mul.rn.f32 %f1053, %f1038, %f1052;
|
|
add.f32 %f1054, %f1048, %f1040;
|
|
sub.f32 %f1055, %f1040, %f1054;
|
|
add.f32 %f1056, %f1048, %f1055;
|
|
add.f32 %f1057, %f1053, %f1056;
|
|
add.f32 %f1058, %f1054, %f1057;
|
|
sub.f32 %f1059, %f1054, %f1058;
|
|
add.f32 %f1060, %f1057, %f1059;
|
|
mov.f32 %f1061, 0f3F317200;
|
|
mul.rn.f32 %f1062, %f1034, %f1061;
|
|
mov.f32 %f1063, 0f35BFBE8E;
|
|
mul.rn.f32 %f1064, %f1034, %f1063;
|
|
add.f32 %f1065, %f1062, %f1058;
|
|
sub.f32 %f1066, %f1062, %f1065;
|
|
add.f32 %f1067, %f1058, %f1066;
|
|
add.f32 %f1068, %f1060, %f1067;
|
|
add.f32 %f1069, %f1064, %f1068;
|
|
add.f32 %f1070, %f1065, %f1069;
|
|
sub.f32 %f1071, %f1065, %f1070;
|
|
add.f32 %f1072, %f1069, %f1071;
|
|
mov.f32 %f1073, 0f3ED55555;
|
|
mul.rn.f32 %f1074, %f1073, %f1070;
|
|
neg.f32 %f1075, %f1074;
|
|
fma.rn.f32 %f1076, %f1073, %f1070, %f1075;
|
|
fma.rn.f32 %f1077, %f1073, %f1072, %f1076;
|
|
mov.f32 %f1078, 0f00000000;
|
|
fma.rn.f32 %f1079, %f1078, %f1070, %f1077;
|
|
add.rn.f32 %f1080, %f1074, %f1079;
|
|
neg.f32 %f1081, %f1080;
|
|
add.rn.f32 %f1082, %f1074, %f1081;
|
|
add.rn.f32 %f1083, %f1082, %f1079;
|
|
mov.b32 %r432, %f1080;
|
|
setp.eq.s32 %p165, %r432, 1118925336;
|
|
add.s32 %r433, %r432, -1;
|
|
mov.b32 %f1084, %r433;
|
|
add.f32 %f1085, %f1083, 0f37000000;
|
|
selp.f32 %f214, %f1085, %f1083, %p165;
|
|
selp.f32 %f1086, %f1084, %f1080, %p165;
|
|
mov.f32 %f1087, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1088, %f1086, %f1087;
|
|
cvt.rzi.f32.f32 %f1089, %f1088;
|
|
abs.f32 %f1090, %f1089;
|
|
setp.gt.f32 %p166, %f1090, 0f42FC0000;
|
|
mov.b32 %r434, %f1089;
|
|
and.b32 %r435, %r434, -2147483648;
|
|
or.b32 %r436, %r435, 1123811328;
|
|
mov.b32 %f1091, %r436;
|
|
selp.f32 %f1092, %f1091, %f1089, %p166;
|
|
mov.f32 %f1093, 0fBF317218;
|
|
fma.rn.f32 %f1094, %f1092, %f1093, %f1086;
|
|
mov.f32 %f1095, 0f3102E308;
|
|
fma.rn.f32 %f1096, %f1092, %f1095, %f1094;
|
|
mul.f32 %f1097, %f1096, 0f3FB8AA3B;
|
|
add.f32 %f1098, %f1092, 0f4B40007F;
|
|
mov.b32 %r437, %f1098;
|
|
shl.b32 %r438, %r437, 23;
|
|
mov.b32 %f1099, %r438;
|
|
ex2.approx.ftz.f32 %f1100, %f1097;
|
|
mul.f32 %f215, %f1100, %f1099;
|
|
setp.eq.f32 %p167, %f215, 0f7F800000;
|
|
mov.f32 %f1224, 0f7F800000;
|
|
@%p167 bra $L__BB0_135;
|
|
|
|
fma.rn.f32 %f1224, %f215, %f214, %f215;
|
|
|
|
$L__BB0_135:
|
|
setp.lt.f32 %p168, %f189, 0f00000000;
|
|
and.pred %p9, %p168, %p141;
|
|
setp.eq.f32 %p170, %f189, 0f00000000;
|
|
@%p170 bra $L__BB0_139;
|
|
bra.uni $L__BB0_136;
|
|
|
|
$L__BB0_139:
|
|
add.f32 %f1105, %f189, %f189;
|
|
selp.f32 %f1226, %f1105, 0f00000000, %p141;
|
|
bra.uni $L__BB0_140;
|
|
|
|
$L__BB0_136:
|
|
mov.b32 %r439, %f1224;
|
|
xor.b32 %r440, %r439, -2147483648;
|
|
mov.b32 %f1101, %r440;
|
|
selp.f32 %f1226, %f1101, %f1224, %p9;
|
|
setp.geu.f32 %p171, %f189, 0f00000000;
|
|
@%p171 bra $L__BB0_140;
|
|
|
|
mov.f32 %f1102, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1103, %f1102;
|
|
setp.eq.f32 %p172, %f1103, 0f3ED55555;
|
|
@%p172 bra $L__BB0_140;
|
|
|
|
mov.f32 %f1226, 0f7FFFFFFF;
|
|
|
|
$L__BB0_140:
|
|
add.f32 %f1106, %f213, 0f3ED55555;
|
|
mov.b32 %r441, %f1106;
|
|
setp.lt.s32 %p174, %r441, 2139095040;
|
|
@%p174 bra $L__BB0_145;
|
|
|
|
setp.gtu.f32 %p175, %f213, 0f7F800000;
|
|
@%p175 bra $L__BB0_144;
|
|
bra.uni $L__BB0_142;
|
|
|
|
$L__BB0_144:
|
|
add.f32 %f1226, %f189, 0f3ED55555;
|
|
bra.uni $L__BB0_145;
|
|
|
|
$L__BB0_142:
|
|
setp.neu.f32 %p176, %f213, 0f7F800000;
|
|
@%p176 bra $L__BB0_145;
|
|
|
|
selp.f32 %f1226, 0fFF800000, 0f7F800000, %p9;
|
|
|
|
$L__BB0_145:
|
|
fma.rn.f32 %f1107, %f1220, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p177, %f187, 0f3F800000;
|
|
mov.f32 %f1108, 0f3F800000;
|
|
selp.f32 %f1109, 0f3F7FFFFF, %f1107, %p177;
|
|
mul.f32 %f1110, %f187, 0f414EB852;
|
|
setp.lt.f32 %p178, %f187, 0f3B4D2E1C;
|
|
selp.f32 %f1111, %f1110, %f1109, %p178;
|
|
fma.rn.f32 %f1112, %f1223, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p179, %f188, 0f3F800000;
|
|
selp.f32 %f1113, 0f3F7FFFFF, %f1112, %p179;
|
|
mul.f32 %f1114, %f188, 0f414EB852;
|
|
setp.lt.f32 %p180, %f188, 0f3B4D2E1C;
|
|
selp.f32 %f1115, %f1114, %f1113, %p180;
|
|
fma.rn.f32 %f1116, %f1226, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p181, %f189, 0f3F800000;
|
|
selp.f32 %f1117, 0f3F7FFFFF, %f1116, %p181;
|
|
mul.f32 %f1118, %f189, 0f414EB852;
|
|
setp.lt.f32 %p182, %f189, 0f3B4D2E1C;
|
|
selp.f32 %f1119, %f1118, %f1117, %p182;
|
|
min.f32 %f1120, %f1111, %f1108;
|
|
mov.f32 %f1121, 0f00000000;
|
|
max.f32 %f1122, %f1121, %f1120;
|
|
mul.f32 %f1123, %f1122, 0f43800000;
|
|
cvt.rzi.u32.f32 %r442, %f1123;
|
|
min.u32 %r443, %r442, 255;
|
|
min.f32 %f1124, %f1115, %f1108;
|
|
max.f32 %f1125, %f1121, %f1124;
|
|
mul.f32 %f1126, %f1125, 0f43800000;
|
|
cvt.rzi.u32.f32 %r444, %f1126;
|
|
min.u32 %r445, %r444, 255;
|
|
min.f32 %f1127, %f1119, %f1108;
|
|
max.f32 %f1128, %f1121, %f1127;
|
|
mul.f32 %f1129, %f1128, 0f43800000;
|
|
cvt.rzi.u32.f32 %r446, %f1129;
|
|
min.u32 %r447, %r446, 255;
|
|
shl.b64 %rd72, %rd22, 2;
|
|
add.s64 %rd73, %rd21, %rd72;
|
|
cvt.u16.u32 %rs18, %r447;
|
|
cvt.u16.u32 %rs19, %r445;
|
|
cvt.u16.u32 %rs20, %r443;
|
|
mov.u16 %rs21, 255;
|
|
st.global.v4.u8 [%rd73], {%rs20, %rs19, %rs18, %rs21};
|
|
|
|
$L__BB0_146:
|
|
and.b32 %r448, %r88, 4;
|
|
setp.eq.s32 %p183, %r448, 0;
|
|
@%p183 bra $L__BB0_158;
|
|
|
|
ld.const.u32 %r449, [params+108];
|
|
setp.eq.s32 %p184, %r449, 0;
|
|
ld.const.u64 %rd74, [params+224];
|
|
cvta.to.global.u64 %rd75, %rd74;
|
|
ld.const.u32 %r450, [params+216];
|
|
mad.lo.s32 %r451, %r450, %r7, %r6;
|
|
mul.wide.u32 %rd76, %r451, 8;
|
|
add.s64 %rd23, %rd75, %rd76;
|
|
@%p184 bra $L__BB0_149;
|
|
|
|
ld.global.v4.u16 {%rs29, %rs30, %rs31, %rs32}, [%rd23];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1130, %rs29;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1131, %rs30;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1132, %rs31;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1133, %f148, %f1130;
|
|
add.f32 %f1134, %f149, %f1131;
|
|
add.f32 %f1135, %f150, %f1132;
|
|
mov.f32 %f1136, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs27, %f1135;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs26, %f1134;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs25, %f1133;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs28, %f1136;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd23], {%rs25, %rs26, %rs27, %rs28};
|
|
bra.uni $L__BB0_158;
|
|
|
|
$L__BB0_149:
|
|
mov.f32 %f1140, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs36, %f1140;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs35, %f150;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs34, %f149;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs33, %f148;}
|
|
|
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// end inline asm
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st.global.v4.u16 [%rd23], {%rs33, %rs34, %rs35, %rs36};
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$L__BB0_158:
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|
ret;
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}
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