2603 lines
73 KiB
Plaintext
2603 lines
73 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-31968024
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// Cuda compilation tools, release 12.0, V12.0.76
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// Based on NVVM 7.0.1
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//
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.version 8.0
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.target sm_52
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.address_size 64
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// .globl __raygen__oxMain
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.const .align 16 .b8 params[1184];
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.visible .entry __raygen__oxMain()
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{
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.reg .pred %p<183>;
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.reg .b16 %rs<180>;
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.reg .f32 %f<1589>;
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.reg .b32 %r<430>;
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.reg .b64 %rd<78>;
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// begin inline asm
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call (%r26), _optix_get_launch_index_x, ();
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// end inline asm
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// begin inline asm
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call (%r27), _optix_get_launch_index_y, ();
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// end inline asm
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ld.const.u64 %rd21, [params+400];
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cvta.to.global.u64 %rd22, %rd21;
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ld.const.u32 %r32, [params+392];
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mad.lo.s32 %r33, %r32, %r27, %r26;
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mul.wide.u32 %rd23, %r33, 4;
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add.s64 %rd1, %rd22, %rd23;
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ld.global.v2.u8 {%rs9, %rs178}, [%rd1];
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or.b16 %rs11, %rs9, %rs178;
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and.b16 %rs12, %rs11, 255;
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setp.eq.s16 %p10, %rs12, 0;
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@%p10 bra $L__BB0_2;
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ld.global.u8 %rs177, [%rd1+2];
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bra.uni $L__BB0_3;
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$L__BB0_2:
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ld.global.u8 %rs177, [%rd1+2];
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setp.eq.s16 %p11, %rs177, 0;
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mov.f32 %f1485, 0f00000000;
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mov.u16 %rs178, 0;
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mov.f32 %f1486, %f1485;
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mov.f32 %f1487, %f1485;
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@%p11 bra $L__BB0_4;
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$L__BB0_3:
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cvt.rn.f32.u16 %f296, %rs9;
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div.rn.f32 %f297, %f296, 0f437F0000;
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fma.rn.f32 %f298, %f297, 0f40000000, 0fBF800000;
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and.b16 %rs15, %rs178, 255;
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cvt.rn.f32.u16 %f299, %rs15;
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div.rn.f32 %f300, %f299, 0f437F0000;
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fma.rn.f32 %f301, %f300, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f302, %rs177;
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div.rn.f32 %f303, %f302, 0f437F0000;
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fma.rn.f32 %f304, %f303, 0f40000000, 0fBF800000;
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mul.f32 %f305, %f301, %f301;
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fma.rn.f32 %f306, %f298, %f298, %f305;
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fma.rn.f32 %f307, %f304, %f304, %f306;
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sqrt.rn.f32 %f308, %f307;
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rcp.rn.f32 %f309, %f308;
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mul.f32 %f1487, %f309, %f304;
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mul.f32 %f1486, %f309, %f301;
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mul.f32 %f1485, %f298, %f309;
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$L__BB0_4:
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ld.const.v2.u32 {%r34, %r35}, [params];
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add.s32 %r3, %r34, %r26;
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add.s32 %r4, %r35, %r27;
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setp.eq.f32 %p12, %f1485, 0f00000000;
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setp.eq.f32 %p13, %f1486, 0f00000000;
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and.pred %p14, %p12, %p13;
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setp.eq.f32 %p15, %f1487, 0f00000000;
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and.pred %p16, %p15, %p14;
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@%p16 bra $L__BB0_149;
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bra.uni $L__BB0_5;
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$L__BB0_149:
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ld.const.u32 %r23, [params+104];
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and.b32 %r404, %r23, 1;
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setp.eq.b32 %p171, %r404, 1;
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mov.pred %p172, 0;
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xor.pred %p173, %p171, %p172;
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not.pred %p174, %p173;
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@%p174 bra $L__BB0_151;
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ld.const.u64 %rd54, [params+144];
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cvta.to.global.u64 %rd55, %rd54;
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ld.const.u32 %r405, [params+136];
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mad.lo.s32 %r406, %r405, %r4, %r3;
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mul.wide.u32 %rd56, %r406, 4;
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add.s64 %rd57, %rd55, %rd56;
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mov.u16 %rs99, 0;
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st.global.v4.u8 [%rd57], {%rs99, %rs99, %rs99, %rs99};
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$L__BB0_151:
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and.b32 %r407, %r23, 8;
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setp.eq.s32 %p175, %r407, 0;
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@%p175 bra $L__BB0_153;
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ld.const.u64 %rd58, [params+192];
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cvta.to.global.u64 %rd59, %rd58;
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ld.const.u32 %r408, [params+184];
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mad.lo.s32 %r409, %r408, %r4, %r3;
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mov.f32 %f1436, 0f00000000;
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cvt.rzi.u32.f32 %r410, %f1436;
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mul.wide.u32 %rd60, %r409, 2;
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add.s64 %rd61, %rd59, %rd60;
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mov.u16 %rs100, 0;
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cvt.u16.u32 %rs101, %r410;
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st.global.v2.u8 [%rd61], {%rs101, %rs100};
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$L__BB0_153:
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and.b32 %r411, %r23, 4;
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setp.eq.s32 %p176, %r411, 0;
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ld.const.u32 %r429, [params+108];
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@%p176 bra $L__BB0_157;
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setp.eq.s32 %p177, %r429, 0;
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ld.const.u64 %rd62, [params+224];
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cvta.to.global.u64 %rd63, %rd62;
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ld.const.u32 %r412, [params+216];
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mad.lo.s32 %r413, %r412, %r4, %r3;
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mul.wide.u32 %rd64, %r413, 8;
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add.s64 %rd16, %rd63, %rd64;
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@%p177 bra $L__BB0_156;
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ld.global.v4.u16 {%rs108, %rs109, %rs110, %rs111}, [%rd16];
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// begin inline asm
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{ cvt.f32.f16 %f1437, %rs108;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f1438, %rs109;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f1439, %rs110;}
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// end inline asm
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add.f32 %f1440, %f1437, 0f00000000;
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add.f32 %f1441, %f1438, 0f00000000;
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add.f32 %f1442, %f1439, 0f00000000;
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// begin inline asm
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{ cvt.rn.f16.f32 %rs107, %f1442;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs106, %f1441;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs105, %f1440;}
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// end inline asm
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mov.u16 %rs112, 0;
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st.global.v4.u16 [%rd16], {%rs105, %rs106, %rs107, %rs112};
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bra.uni $L__BB0_157;
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$L__BB0_5:
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ld.const.u64 %rd24, [params+432];
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cvta.to.global.u64 %rd25, %rd24;
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ld.const.u32 %r38, [params+424];
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mad.lo.s32 %r39, %r38, %r27, %r26;
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mul.wide.u32 %rd26, %r39, 12;
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add.s64 %rd27, %rd25, %rd26;
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ld.global.f32 %f10, [%rd27];
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mul.f32 %f310, %f10, 0f3456BF95;
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ld.global.f32 %f11, [%rd27+4];
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mul.f32 %f311, %f11, 0f3456BF95;
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ld.global.f32 %f12, [%rd27+8];
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mul.f32 %f312, %f12, 0f3456BF95;
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abs.f32 %f313, %f1485;
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div.rn.f32 %f314, %f310, %f313;
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abs.f32 %f315, %f1486;
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div.rn.f32 %f316, %f311, %f315;
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abs.f32 %f317, %f1487;
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div.rn.f32 %f318, %f312, %f317;
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abs.f32 %f319, %f314;
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abs.f32 %f320, %f316;
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abs.f32 %f321, %f318;
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mov.f32 %f322, 0f38D1B717;
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max.f32 %f323, %f319, %f322;
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max.f32 %f324, %f320, %f322;
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max.f32 %f325, %f321, %f322;
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fma.rn.f32 %f13, %f1485, %f323, %f10;
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fma.rn.f32 %f14, %f1486, %f324, %f11;
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fma.rn.f32 %f15, %f1487, %f325, %f12;
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cvt.rn.f32.u32 %f16, %r26;
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cvt.rn.f32.u32 %f17, %r27;
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ld.const.u32 %r5, [params+600];
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setp.eq.s32 %p17, %r5, 0;
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@%p17 bra $L__BB0_44;
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ld.const.u64 %rd28, [params+608];
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cvta.to.global.u64 %rd2, %rd28;
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mov.f32 %f342, 0f40000000;
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cvt.rzi.f32.f32 %f343, %f342;
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add.f32 %f344, %f343, %f343;
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mov.f32 %f345, 0f40800000;
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sub.f32 %f346, %f345, %f344;
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abs.f32 %f18, %f346;
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ld.const.u32 %r6, [params+544];
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ld.const.u32 %r427, [params+104];
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mul.f32 %f19, %f13, 0f3456BF95;
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mul.f32 %f20, %f14, 0f3456BF95;
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mul.f32 %f21, %f15, 0f3456BF95;
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mov.f32 %f341, 0f00000000;
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mov.u32 %r423, 0;
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ld.const.u64 %rd3, [params+96];
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abs.f32 %f545, %f19;
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abs.f32 %f546, %f20;
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max.f32 %f547, %f545, %f546;
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abs.f32 %f548, %f21;
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max.f32 %f549, %f547, %f548;
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mov.f32 %f1551, %f341;
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mov.f32 %f1550, %f341;
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mov.f32 %f1549, %f341;
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mov.f32 %f1548, %f341;
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mov.f32 %f1547, %f341;
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mov.f32 %f1546, %f341;
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mov.f32 %f1545, %f341;
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mov.f32 %f1544, %f341;
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mov.f32 %f1543, %f341;
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mov.f32 %f1542, %f341;
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mov.f32 %f1541, %f341;
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mov.f32 %f1540, %f341;
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mov.f32 %f1539, %f341;
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mov.f32 %f1538, %f341;
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mov.f32 %f1537, %f341;
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mov.f32 %f1536, %f341;
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$L__BB0_7:
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mul.wide.u32 %rd29, %r423, 112;
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add.s64 %rd5, %rd2, %rd29;
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ld.global.v4.f32 {%f348, %f349, %f350, %f351}, [%rd5];
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ld.global.v4.f32 {%f352, %f353, %f354, %f355}, [%rd5+16];
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ld.global.v4.f32 {%f358, %f1512, %f1513, %f361}, [%rd5+32];
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ld.global.v4.f32 {%f362, %f363, %f364, %f1510}, [%rd5+48];
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ld.global.v4.f32 {%f366, %f367, %f368, %f369}, [%rd5+64];
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ld.global.v4.u32 {%r41, %r42, %r43, %r44}, [%rd5+80];
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mov.b32 %f57, %r43;
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mov.b32 %f56, %r42;
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mov.b32 %f55, %r41;
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ld.global.u64 %rd6, [%rd5+96];
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sub.f32 %f370, %f349, %f10;
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sub.f32 %f371, %f350, %f11;
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sub.f32 %f372, %f351, %f12;
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mul.f32 %f373, %f371, %f371;
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fma.rn.f32 %f374, %f370, %f370, %f373;
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fma.rn.f32 %f375, %f372, %f372, %f374;
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sqrt.rn.f32 %f376, %f375;
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rcp.rn.f32 %f377, %f376;
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mul.f32 %f59, %f370, %f377;
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mul.f32 %f60, %f371, %f377;
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mul.f32 %f61, %f372, %f377;
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mul.f32 %f62, %f376, %f353;
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mul.f32 %f63, %f376, %f355;
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abs.f32 %f64, %f63;
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setp.lt.f32 %p18, %f64, 0f00800000;
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mul.f32 %f378, %f64, 0f4B800000;
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selp.f32 %f379, %f378, %f64, %p18;
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selp.f32 %f380, 0fC3170000, 0fC2FE0000, %p18;
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mov.b32 %r48, %f379;
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and.b32 %r49, %r48, 8388607;
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or.b32 %r50, %r49, 1065353216;
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mov.b32 %f381, %r50;
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shr.u32 %r51, %r48, 23;
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cvt.rn.f32.u32 %f382, %r51;
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add.f32 %f383, %f380, %f382;
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setp.gt.f32 %p19, %f381, 0f3FB504F3;
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mul.f32 %f384, %f381, 0f3F000000;
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add.f32 %f385, %f383, 0f3F800000;
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selp.f32 %f386, %f385, %f383, %p19;
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selp.f32 %f387, %f384, %f381, %p19;
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add.f32 %f388, %f387, 0fBF800000;
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add.f32 %f389, %f387, 0f3F800000;
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rcp.approx.ftz.f32 %f390, %f389;
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add.f32 %f391, %f388, %f388;
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mul.f32 %f392, %f391, %f390;
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mul.f32 %f393, %f392, %f392;
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mov.f32 %f394, 0f3C4CAF63;
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mov.f32 %f395, 0f3B18F0FE;
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fma.rn.f32 %f396, %f395, %f393, %f394;
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mov.f32 %f397, 0f3DAAAABD;
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fma.rn.f32 %f398, %f396, %f393, %f397;
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mul.rn.f32 %f399, %f398, %f393;
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mul.rn.f32 %f400, %f399, %f392;
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sub.f32 %f401, %f388, %f392;
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add.f32 %f402, %f401, %f401;
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neg.f32 %f403, %f392;
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fma.rn.f32 %f404, %f403, %f388, %f402;
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mul.rn.f32 %f405, %f390, %f404;
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add.f32 %f406, %f400, %f392;
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sub.f32 %f407, %f392, %f406;
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add.f32 %f408, %f400, %f407;
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add.f32 %f409, %f405, %f408;
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add.f32 %f410, %f406, %f409;
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sub.f32 %f411, %f406, %f410;
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add.f32 %f412, %f409, %f411;
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mov.f32 %f413, 0f3F317200;
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mul.rn.f32 %f414, %f386, %f413;
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mov.f32 %f415, 0f35BFBE8E;
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mul.rn.f32 %f416, %f386, %f415;
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add.f32 %f417, %f414, %f410;
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sub.f32 %f418, %f414, %f417;
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add.f32 %f419, %f410, %f418;
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add.f32 %f420, %f412, %f419;
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add.f32 %f421, %f416, %f420;
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add.f32 %f422, %f417, %f421;
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sub.f32 %f423, %f417, %f422;
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add.f32 %f424, %f421, %f423;
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mul.rn.f32 %f426, %f345, %f422;
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neg.f32 %f427, %f426;
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fma.rn.f32 %f428, %f345, %f422, %f427;
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fma.rn.f32 %f429, %f345, %f424, %f428;
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fma.rn.f32 %f431, %f341, %f422, %f429;
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add.rn.f32 %f432, %f426, %f431;
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neg.f32 %f433, %f432;
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add.rn.f32 %f434, %f426, %f433;
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add.rn.f32 %f435, %f434, %f431;
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mov.b32 %r52, %f432;
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setp.eq.s32 %p20, %r52, 1118925336;
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add.s32 %r53, %r52, -1;
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mov.b32 %f436, %r53;
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add.f32 %f437, %f435, 0f37000000;
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selp.f32 %f65, %f437, %f435, %p20;
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selp.f32 %f438, %f436, %f432, %p20;
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mov.f32 %f439, 0f3FB8AA3B;
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mul.rn.f32 %f440, %f438, %f439;
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cvt.rzi.f32.f32 %f441, %f440;
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abs.f32 %f442, %f441;
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setp.gt.f32 %p21, %f442, 0f42FC0000;
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mov.b32 %r54, %f441;
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and.b32 %r55, %r54, -2147483648;
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or.b32 %r56, %r55, 1123811328;
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mov.b32 %f443, %r56;
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selp.f32 %f444, %f443, %f441, %p21;
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mov.f32 %f445, 0fBF317218;
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fma.rn.f32 %f446, %f444, %f445, %f438;
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mov.f32 %f447, 0f3102E308;
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fma.rn.f32 %f448, %f444, %f447, %f446;
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mul.f32 %f449, %f448, 0f3FB8AA3B;
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add.f32 %f450, %f444, 0f4B40007F;
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mov.b32 %r57, %f450;
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shl.b32 %r58, %r57, 23;
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mov.b32 %f451, %r58;
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|
ex2.approx.ftz.f32 %f452, %f449;
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|
mul.f32 %f66, %f452, %f451;
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setp.eq.f32 %p22, %f66, 0f7F800000;
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mov.f32 %f1504, 0f7F800000;
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@%p22 bra $L__BB0_9;
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fma.rn.f32 %f1504, %f66, %f65, %f66;
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$L__BB0_9:
|
|
setp.lt.f32 %p23, %f63, 0f00000000;
|
|
setp.eq.f32 %p24, %f18, 0f3F800000;
|
|
and.pred %p1, %p23, %p24;
|
|
setp.eq.f32 %p25, %f63, 0f00000000;
|
|
@%p25 bra $L__BB0_13;
|
|
bra.uni $L__BB0_10;
|
|
|
|
$L__BB0_13:
|
|
add.f32 %f457, %f63, %f63;
|
|
selp.f32 %f1506, %f457, 0f00000000, %p24;
|
|
bra.uni $L__BB0_14;
|
|
|
|
$L__BB0_10:
|
|
mov.b32 %r59, %f1504;
|
|
xor.b32 %r60, %r59, -2147483648;
|
|
mov.b32 %f453, %r60;
|
|
selp.f32 %f1506, %f453, %f1504, %p1;
|
|
setp.geu.f32 %p26, %f63, 0f00000000;
|
|
@%p26 bra $L__BB0_14;
|
|
|
|
mov.f32 %f454, 0f40800000;
|
|
cvt.rzi.f32.f32 %f455, %f454;
|
|
setp.eq.f32 %p27, %f455, 0f40800000;
|
|
@%p27 bra $L__BB0_14;
|
|
|
|
mov.f32 %f1506, 0f7FFFFFFF;
|
|
|
|
$L__BB0_14:
|
|
abs.f32 %f1482, %f63;
|
|
add.f32 %f458, %f1482, 0f40800000;
|
|
mov.b32 %r61, %f458;
|
|
setp.lt.s32 %p29, %r61, 2139095040;
|
|
@%p29 bra $L__BB0_19;
|
|
|
|
abs.f32 %f1483, %f63;
|
|
setp.gtu.f32 %p30, %f1483, 0f7F800000;
|
|
@%p30 bra $L__BB0_18;
|
|
bra.uni $L__BB0_16;
|
|
|
|
$L__BB0_18:
|
|
add.f32 %f1506, %f63, 0f40800000;
|
|
bra.uni $L__BB0_19;
|
|
|
|
$L__BB0_16:
|
|
abs.f32 %f1484, %f63;
|
|
setp.neu.f32 %p31, %f1484, 0f7F800000;
|
|
@%p31 bra $L__BB0_19;
|
|
|
|
selp.f32 %f1506, 0fFF800000, 0f7F800000, %p1;
|
|
|
|
$L__BB0_19:
|
|
mov.f32 %f459, 0f3F800000;
|
|
sub.f32 %f460, %f459, %f1506;
|
|
setp.eq.f32 %p32, %f63, 0f3F800000;
|
|
selp.f32 %f461, 0f00000000, %f460, %p32;
|
|
cvt.sat.f32.f32 %f462, %f461;
|
|
fma.rn.f32 %f463, %f62, %f62, %f354;
|
|
div.rn.f32 %f75, %f462, %f463;
|
|
mul.f32 %f464, %f1486, %f60;
|
|
fma.rn.f32 %f465, %f1485, %f59, %f464;
|
|
fma.rn.f32 %f76, %f1487, %f61, %f465;
|
|
setp.eq.f32 %p33, %f348, 0f3F800000;
|
|
@%p33 bra $L__BB0_25;
|
|
bra.uni $L__BB0_20;
|
|
|
|
$L__BB0_25:
|
|
setp.eq.s64 %p37, %rd6, 0;
|
|
mov.f32 %f1511, %f358;
|
|
mov.f32 %f1514, %f75;
|
|
@%p37 bra $L__BB0_29;
|
|
|
|
setp.geu.f32 %p38, %f1510, 0f00000000;
|
|
mov.f32 %f1507, %f59;
|
|
mov.f32 %f1508, %f60;
|
|
mov.f32 %f1509, %f61;
|
|
@%p38 bra $L__BB0_28;
|
|
|
|
mul.f32 %f490, %f56, %f371;
|
|
fma.rn.f32 %f491, %f55, %f370, %f490;
|
|
fma.rn.f32 %f493, %f57, %f372, %f491;
|
|
rcp.rn.f32 %f494, %f493;
|
|
mul.f32 %f1507, %f370, %f494;
|
|
mul.f32 %f1508, %f371, %f494;
|
|
mul.f32 %f1509, %f372, %f494;
|
|
neg.f32 %f1510, %f1510;
|
|
|
|
$L__BB0_28:
|
|
mul.f32 %f495, %f57, %f61;
|
|
mul.f32 %f496, %f56, %f60;
|
|
neg.f32 %f497, %f496;
|
|
mul.f32 %f498, %f55, %f59;
|
|
sub.f32 %f499, %f497, %f498;
|
|
sub.f32 %f500, %f499, %f495;
|
|
setp.gt.f32 %p39, %f500, 0f00000000;
|
|
selp.f32 %f501, 0f3F800000, 0f00000000, %p39;
|
|
mov.f32 %f502, 0f3F800000;
|
|
mul.f32 %f503, %f363, %f1508;
|
|
mul.f32 %f504, %f367, %f1508;
|
|
fma.rn.f32 %f505, %f362, %f1507, %f503;
|
|
fma.rn.f32 %f506, %f366, %f1507, %f504;
|
|
fma.rn.f32 %f507, %f364, %f1509, %f505;
|
|
fma.rn.f32 %f508, %f368, %f1509, %f506;
|
|
fma.rn.f32 %f509, %f1510, %f507, 0f3F000000;
|
|
sub.f32 %f510, %f502, %f509;
|
|
fma.rn.f32 %f511, %f1510, %f508, 0f3F000000;
|
|
tex.2d.v4.f32.f32 {%f512, %f513, %f514, %f515}, [%rd6, {%f510, %f511}];
|
|
mul.f32 %f516, %f501, %f512;
|
|
mul.f32 %f517, %f501, %f513;
|
|
mul.f32 %f518, %f501, %f514;
|
|
mul.f32 %f1511, %f358, %f516;
|
|
mul.f32 %f1512, %f1512, %f517;
|
|
mul.f32 %f1513, %f1513, %f518;
|
|
mov.f32 %f1514, %f75;
|
|
bra.uni $L__BB0_29;
|
|
|
|
$L__BB0_20:
|
|
setp.eq.f32 %p34, %f348, 0f40000000;
|
|
@%p34 bra $L__BB0_23;
|
|
bra.uni $L__BB0_21;
|
|
|
|
$L__BB0_23:
|
|
setp.eq.s64 %p36, %rd6, 0;
|
|
mov.f32 %f1511, %f358;
|
|
mov.f32 %f1514, %f75;
|
|
@%p36 bra $L__BB0_29;
|
|
|
|
mul.f32 %f475, %f363, %f60;
|
|
mul.f32 %f476, %f367, %f60;
|
|
mul.f32 %f477, %f56, %f60;
|
|
fma.rn.f32 %f478, %f362, %f59, %f475;
|
|
fma.rn.f32 %f479, %f366, %f59, %f476;
|
|
fma.rn.f32 %f480, %f55, %f59, %f477;
|
|
fma.rn.f32 %f481, %f364, %f61, %f478;
|
|
fma.rn.f32 %f482, %f368, %f61, %f479;
|
|
fma.rn.f32 %f483, %f57, %f61, %f480;
|
|
tex.cube.v4.f32.f32 {%f484, %f485, %f486, %f487}, [%rd6, {%f481, %f482, %f483, %f483}];
|
|
mul.f32 %f1511, %f358, %f484;
|
|
mul.f32 %f1512, %f1512, %f485;
|
|
mul.f32 %f1513, %f1513, %f486;
|
|
mov.f32 %f1514, %f75;
|
|
bra.uni $L__BB0_29;
|
|
|
|
$L__BB0_21:
|
|
setp.neu.f32 %p35, %f348, 0f40800000;
|
|
mov.f32 %f1511, %f358;
|
|
mov.f32 %f1514, %f75;
|
|
@%p35 bra $L__BB0_29;
|
|
|
|
mul.f32 %f466, %f55, %f59;
|
|
mul.f32 %f467, %f56, %f60;
|
|
neg.f32 %f468, %f467;
|
|
sub.f32 %f469, %f468, %f466;
|
|
mul.f32 %f470, %f57, %f61;
|
|
sub.f32 %f471, %f469, %f470;
|
|
fma.rn.f32 %f472, %f361, %f471, %f1510;
|
|
cvt.sat.f32.f32 %f473, %f472;
|
|
mul.f32 %f474, %f473, %f473;
|
|
mul.f32 %f1514, %f75, %f474;
|
|
mov.f32 %f1511, %f358;
|
|
|
|
$L__BB0_29:
|
|
max.f32 %f534, %f1511, %f1512;
|
|
max.f32 %f535, %f534, %f1513;
|
|
mul.f32 %f536, %f1514, %f535;
|
|
setp.lt.f32 %p41, %f536, 0f3727C5AC;
|
|
mov.pred %p182, -1;
|
|
mov.f32 %f1515, 0f00000000;
|
|
mov.f32 %f1516, %f1515;
|
|
mov.f32 %f1517, %f1515;
|
|
mov.f32 %f1518, %f1515;
|
|
mov.f32 %f1519, %f1515;
|
|
mov.f32 %f1520, %f1515;
|
|
mov.f32 %f1521, %f1515;
|
|
mov.f32 %f1522, %f1515;
|
|
mov.f32 %f1523, %f1515;
|
|
mov.f32 %f1524, %f1515;
|
|
mov.f32 %f1525, %f1515;
|
|
mov.f32 %f1526, %f1515;
|
|
mov.f32 %f1527, %f1515;
|
|
mov.f32 %f1528, %f1515;
|
|
mov.f32 %f1529, %f1515;
|
|
@%p41 bra $L__BB0_31;
|
|
|
|
setp.eq.s32 %p43, %r6, 0;
|
|
selp.f32 %f537, %f76, 0f3F800000, %p43;
|
|
cvt.sat.f32.f32 %f538, %f537;
|
|
mul.f32 %f539, %f1514, %f538;
|
|
mul.f32 %f1516, %f1511, %f539;
|
|
mul.f32 %f1515, %f1512, %f539;
|
|
mul.f32 %f1517, %f1513, %f539;
|
|
mul.f32 %f540, %f1514, 0f3E800000;
|
|
mul.f32 %f1518, %f1511, %f540;
|
|
mul.f32 %f1519, %f1512, %f540;
|
|
mul.f32 %f1520, %f1513, %f540;
|
|
mul.f32 %f1521, %f59, %f1518;
|
|
mul.f32 %f1522, %f59, %f1519;
|
|
mul.f32 %f1523, %f59, %f1520;
|
|
mul.f32 %f1524, %f60, %f1518;
|
|
mul.f32 %f1525, %f60, %f1519;
|
|
mul.f32 %f1526, %f60, %f1520;
|
|
mul.f32 %f1527, %f61, %f1518;
|
|
mul.f32 %f1528, %f61, %f1519;
|
|
mul.f32 %f1529, %f61, %f1520;
|
|
mov.pred %p182, 0;
|
|
|
|
$L__BB0_31:
|
|
@%p182 bra $L__BB0_43;
|
|
|
|
setp.eq.s32 %p44, %r44, 0;
|
|
mov.u16 %rs179, 0;
|
|
mov.f32 %f1535, 0f3F800000;
|
|
@%p44 bra $L__BB0_40;
|
|
|
|
abs.s32 %r10, %r44;
|
|
setp.lt.s32 %p45, %r10, 1;
|
|
mov.f32 %f1531, 0f00000000;
|
|
@%p45 bra $L__BB0_39;
|
|
|
|
mov.f32 %f550, 0f38D1B717;
|
|
max.f32 %f551, %f549, %f550;
|
|
and.b32 %r63, %r427, 32;
|
|
setp.eq.s32 %p46, %r63, 0;
|
|
mov.u32 %r426, 0;
|
|
selp.f32 %f552, 0f3F800000, 0f41200000, %p46;
|
|
mul.f32 %f139, %f552, %f551;
|
|
and.b32 %r11, %r10, 1;
|
|
setp.eq.s32 %p47, %r10, 1;
|
|
mov.f32 %f1531, 0f00000000;
|
|
@%p47 bra $L__BB0_37;
|
|
|
|
sub.s32 %r425, %r10, %r11;
|
|
|
|
$L__BB0_36:
|
|
cvt.rn.f32.s32 %f572, %r426;
|
|
add.f32 %f573, %f16, %f572;
|
|
sub.f32 %f574, %f17, %f572;
|
|
mul.f32 %f575, %f573, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f576, %f575;
|
|
sub.f32 %f577, %f575, %f576;
|
|
mul.f32 %f578, %f574, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f579, %f578;
|
|
sub.f32 %f580, %f578, %f579;
|
|
mul.f32 %f581, %f572, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f582, %f581;
|
|
sub.f32 %f583, %f581, %f582;
|
|
add.f32 %f584, %f580, 0f420551EC;
|
|
add.f32 %f585, %f577, 0f420551EC;
|
|
add.f32 %f586, %f583, 0f420551EC;
|
|
mul.f32 %f587, %f577, %f584;
|
|
fma.rn.f32 %f588, %f580, %f585, %f587;
|
|
fma.rn.f32 %f589, %f583, %f586, %f588;
|
|
add.f32 %f590, %f577, %f589;
|
|
add.f32 %f591, %f580, %f589;
|
|
add.f32 %f592, %f583, %f589;
|
|
add.f32 %f593, %f590, %f591;
|
|
mul.f32 %f594, %f592, %f593;
|
|
cvt.rmi.f32.f32 %f595, %f594;
|
|
sub.f32 %f596, %f594, %f595;
|
|
add.f32 %f597, %f590, %f590;
|
|
mul.f32 %f598, %f591, %f597;
|
|
cvt.rmi.f32.f32 %f599, %f598;
|
|
sub.f32 %f600, %f598, %f599;
|
|
mul.f32 %f601, %f590, %f593;
|
|
cvt.rmi.f32.f32 %f602, %f601;
|
|
sub.f32 %f603, %f601, %f602;
|
|
fma.rn.f32 %f604, %f596, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f605, %f600, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f606, %f603, 0f40000000, 0fBF800000;
|
|
ld.global.f32 %f607, [%rd5+16];
|
|
ld.global.f32 %f608, [%rd5+4];
|
|
fma.rn.f32 %f609, %f607, %f604, %f608;
|
|
ld.global.f32 %f610, [%rd5+8];
|
|
fma.rn.f32 %f611, %f607, %f605, %f610;
|
|
ld.global.f32 %f612, [%rd5+12];
|
|
fma.rn.f32 %f613, %f607, %f606, %f612;
|
|
sub.f32 %f614, %f609, %f10;
|
|
sub.f32 %f615, %f611, %f11;
|
|
sub.f32 %f616, %f613, %f12;
|
|
mul.f32 %f617, %f615, %f615;
|
|
fma.rn.f32 %f618, %f614, %f614, %f617;
|
|
fma.rn.f32 %f619, %f616, %f616, %f618;
|
|
sqrt.rn.f32 %f561, %f619;
|
|
rcp.rn.f32 %f620, %f561;
|
|
mul.f32 %f557, %f620, %f614;
|
|
mul.f32 %f558, %f620, %f615;
|
|
mul.f32 %f559, %f620, %f616;
|
|
mov.f32 %f571, 0f00000000;
|
|
mov.u32 %r172, 2;
|
|
mov.u32 %r174, 1;
|
|
mov.u32 %r175, 1065353216;
|
|
mov.u32 %r206, 0;
|
|
// begin inline asm
|
|
call(%r65,%r66,%r67,%r68,%r69,%r70,%r71,%r72,%r73,%r74,%r75,%r76,%r77,%r78,%r79,%r80,%r81,%r82,%r83,%r84,%r85,%r86,%r87,%r88,%r89,%r90,%r91,%r92,%r93,%r94,%r95,%r96),_optix_trace_typed_32,(%r206,%rd3,%f13,%f14,%f15,%f557,%f558,%f559,%f139,%f561,%f571,%r174,%r206,%r174,%r172,%r174,%r174,%r175,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206);
|
|
// end inline asm
|
|
mov.b32 %f621, %r65;
|
|
add.f32 %f622, %f1531, %f621;
|
|
add.s32 %r207, %r426, 1;
|
|
cvt.rn.f32.s32 %f623, %r207;
|
|
add.f32 %f624, %f16, %f623;
|
|
sub.f32 %f625, %f17, %f623;
|
|
mul.f32 %f626, %f624, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f627, %f626;
|
|
sub.f32 %f628, %f626, %f627;
|
|
mul.f32 %f629, %f625, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f630, %f629;
|
|
sub.f32 %f631, %f629, %f630;
|
|
mul.f32 %f632, %f623, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f633, %f632;
|
|
sub.f32 %f634, %f632, %f633;
|
|
add.f32 %f635, %f631, 0f420551EC;
|
|
add.f32 %f636, %f628, 0f420551EC;
|
|
add.f32 %f637, %f634, 0f420551EC;
|
|
mul.f32 %f638, %f628, %f635;
|
|
fma.rn.f32 %f639, %f631, %f636, %f638;
|
|
fma.rn.f32 %f640, %f634, %f637, %f639;
|
|
add.f32 %f641, %f628, %f640;
|
|
add.f32 %f642, %f631, %f640;
|
|
add.f32 %f643, %f634, %f640;
|
|
add.f32 %f644, %f641, %f642;
|
|
mul.f32 %f645, %f643, %f644;
|
|
cvt.rmi.f32.f32 %f646, %f645;
|
|
sub.f32 %f647, %f645, %f646;
|
|
add.f32 %f648, %f641, %f641;
|
|
mul.f32 %f649, %f642, %f648;
|
|
cvt.rmi.f32.f32 %f650, %f649;
|
|
sub.f32 %f651, %f649, %f650;
|
|
mul.f32 %f652, %f641, %f644;
|
|
cvt.rmi.f32.f32 %f653, %f652;
|
|
sub.f32 %f654, %f652, %f653;
|
|
fma.rn.f32 %f655, %f647, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f656, %f651, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f657, %f654, 0f40000000, 0fBF800000;
|
|
ld.global.f32 %f658, [%rd5+16];
|
|
ld.global.f32 %f659, [%rd5+4];
|
|
fma.rn.f32 %f660, %f658, %f655, %f659;
|
|
ld.global.f32 %f661, [%rd5+8];
|
|
fma.rn.f32 %f662, %f658, %f656, %f661;
|
|
ld.global.f32 %f663, [%rd5+12];
|
|
fma.rn.f32 %f664, %f658, %f657, %f663;
|
|
sub.f32 %f665, %f660, %f10;
|
|
sub.f32 %f666, %f662, %f11;
|
|
sub.f32 %f667, %f664, %f12;
|
|
mul.f32 %f668, %f666, %f666;
|
|
fma.rn.f32 %f669, %f665, %f665, %f668;
|
|
fma.rn.f32 %f670, %f667, %f667, %f669;
|
|
sqrt.rn.f32 %f570, %f670;
|
|
rcp.rn.f32 %f671, %f570;
|
|
mul.f32 %f566, %f671, %f665;
|
|
mul.f32 %f567, %f671, %f666;
|
|
mul.f32 %f568, %f671, %f667;
|
|
// begin inline asm
|
|
call(%r136,%r137,%r138,%r139,%r140,%r141,%r142,%r143,%r144,%r145,%r146,%r147,%r148,%r149,%r150,%r151,%r152,%r153,%r154,%r155,%r156,%r157,%r158,%r159,%r160,%r161,%r162,%r163,%r164,%r165,%r166,%r167),_optix_trace_typed_32,(%r206,%rd3,%f13,%f14,%f15,%f566,%f567,%f568,%f139,%f570,%f571,%r174,%r206,%r174,%r172,%r174,%r174,%r175,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206,%r206);
|
|
// end inline asm
|
|
mov.b32 %f672, %r136;
|
|
add.f32 %f1531, %f622, %f672;
|
|
add.s32 %r426, %r426, 2;
|
|
add.s32 %r425, %r425, -2;
|
|
setp.ne.s32 %p48, %r425, 0;
|
|
@%p48 bra $L__BB0_36;
|
|
|
|
$L__BB0_37:
|
|
setp.eq.s32 %p49, %r11, 0;
|
|
@%p49 bra $L__BB0_39;
|
|
|
|
cvt.rn.f32.s32 %f682, %r426;
|
|
add.f32 %f683, %f16, %f682;
|
|
sub.f32 %f684, %f17, %f682;
|
|
mul.f32 %f685, %f683, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f686, %f685;
|
|
sub.f32 %f687, %f685, %f686;
|
|
mul.f32 %f688, %f684, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f689, %f688;
|
|
sub.f32 %f690, %f688, %f689;
|
|
mul.f32 %f691, %f682, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f692, %f691;
|
|
sub.f32 %f693, %f691, %f692;
|
|
add.f32 %f694, %f690, 0f420551EC;
|
|
add.f32 %f695, %f687, 0f420551EC;
|
|
add.f32 %f696, %f693, 0f420551EC;
|
|
mul.f32 %f697, %f687, %f694;
|
|
fma.rn.f32 %f698, %f690, %f695, %f697;
|
|
fma.rn.f32 %f699, %f693, %f696, %f698;
|
|
add.f32 %f700, %f687, %f699;
|
|
add.f32 %f701, %f690, %f699;
|
|
add.f32 %f702, %f693, %f699;
|
|
add.f32 %f703, %f700, %f701;
|
|
mul.f32 %f704, %f702, %f703;
|
|
cvt.rmi.f32.f32 %f705, %f704;
|
|
sub.f32 %f706, %f704, %f705;
|
|
add.f32 %f707, %f700, %f700;
|
|
mul.f32 %f708, %f701, %f707;
|
|
cvt.rmi.f32.f32 %f709, %f708;
|
|
sub.f32 %f710, %f708, %f709;
|
|
mul.f32 %f711, %f700, %f703;
|
|
cvt.rmi.f32.f32 %f712, %f711;
|
|
sub.f32 %f713, %f711, %f712;
|
|
fma.rn.f32 %f714, %f706, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f715, %f710, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f716, %f713, 0f40000000, 0fBF800000;
|
|
ld.global.f32 %f717, [%rd5+16];
|
|
ld.global.f32 %f718, [%rd5+4];
|
|
fma.rn.f32 %f719, %f717, %f714, %f718;
|
|
ld.global.f32 %f720, [%rd5+8];
|
|
fma.rn.f32 %f721, %f717, %f715, %f720;
|
|
ld.global.f32 %f722, [%rd5+12];
|
|
fma.rn.f32 %f723, %f717, %f716, %f722;
|
|
sub.f32 %f724, %f719, %f10;
|
|
sub.f32 %f725, %f721, %f11;
|
|
sub.f32 %f726, %f723, %f12;
|
|
mul.f32 %f727, %f725, %f725;
|
|
fma.rn.f32 %f728, %f724, %f724, %f727;
|
|
fma.rn.f32 %f729, %f726, %f726, %f728;
|
|
sqrt.rn.f32 %f680, %f729;
|
|
rcp.rn.f32 %f730, %f680;
|
|
mul.f32 %f676, %f730, %f724;
|
|
mul.f32 %f677, %f730, %f725;
|
|
mul.f32 %f678, %f730, %f726;
|
|
mov.f32 %f681, 0f00000000;
|
|
mov.u32 %r244, 2;
|
|
mov.u32 %r246, 1;
|
|
mov.u32 %r247, 1065353216;
|
|
mov.u32 %r278, 0;
|
|
// begin inline asm
|
|
call(%r208,%r209,%r210,%r211,%r212,%r213,%r214,%r215,%r216,%r217,%r218,%r219,%r220,%r221,%r222,%r223,%r224,%r225,%r226,%r227,%r228,%r229,%r230,%r231,%r232,%r233,%r234,%r235,%r236,%r237,%r238,%r239),_optix_trace_typed_32,(%r278,%rd3,%f13,%f14,%f15,%f676,%f677,%f678,%f139,%f680,%f681,%r246,%r278,%r246,%r244,%r246,%r246,%r247,%r278,%r278,%r278,%r278,%r278,%r278,%r278,%r278,%r278,%r278,%r278,%r278,%r278,%r278,%r278,%r278,%r278,%r278,%r278,%r278,%r278,%r278,%r278,%r278,%r278,%r278,%r278,%r278,%r278,%r278,%r278);
|
|
// end inline asm
|
|
mov.b32 %f731, %r208;
|
|
add.f32 %f1531, %f1531, %f731;
|
|
|
|
$L__BB0_39:
|
|
cvt.rn.f32.s32 %f732, %r10;
|
|
div.rn.f32 %f1535, %f1531, %f732;
|
|
shr.u32 %r279, %r44, 31;
|
|
cvt.u16.u32 %rs179, %r279;
|
|
|
|
$L__BB0_40:
|
|
fma.rn.f32 %f1536, %f1516, %f1535, %f1536;
|
|
fma.rn.f32 %f1537, %f1515, %f1535, %f1537;
|
|
fma.rn.f32 %f1538, %f1517, %f1535, %f1538;
|
|
fma.rn.f32 %f1539, %f1518, %f1535, %f1539;
|
|
fma.rn.f32 %f1540, %f1519, %f1535, %f1540;
|
|
fma.rn.f32 %f1541, %f1520, %f1535, %f1541;
|
|
fma.rn.f32 %f1542, %f1521, %f1535, %f1542;
|
|
fma.rn.f32 %f1543, %f1522, %f1535, %f1543;
|
|
fma.rn.f32 %f1544, %f1523, %f1535, %f1544;
|
|
fma.rn.f32 %f1545, %f1524, %f1535, %f1545;
|
|
fma.rn.f32 %f1546, %f1525, %f1535, %f1546;
|
|
fma.rn.f32 %f1547, %f1526, %f1535, %f1547;
|
|
fma.rn.f32 %f1548, %f1527, %f1535, %f1548;
|
|
fma.rn.f32 %f1549, %f1528, %f1535, %f1549;
|
|
fma.rn.f32 %f1550, %f1529, %f1535, %f1550;
|
|
setp.eq.s16 %p50, %rs179, 0;
|
|
@%p50 bra $L__BB0_42;
|
|
|
|
div.rn.f32 %f733, %f1516, %f358;
|
|
div.rn.f32 %f734, %f733, %f75;
|
|
cvt.sat.f32.f32 %f735, %f734;
|
|
mul.f32 %f1535, %f1535, %f735;
|
|
|
|
$L__BB0_42:
|
|
add.f32 %f1551, %f1551, %f1535;
|
|
|
|
$L__BB0_43:
|
|
cvt.u64.u32 %rd77, %r423;
|
|
cvt.u32.u64 %r280, %rd77;
|
|
add.s32 %r423, %r280, 1;
|
|
setp.lt.u32 %p51, %r423, %r5;
|
|
@%p51 bra $L__BB0_7;
|
|
bra.uni $L__BB0_45;
|
|
|
|
$L__BB0_44:
|
|
mov.f32 %f1536, 0f00000000;
|
|
ld.const.u32 %r427, [params+104];
|
|
mov.f32 %f1537, %f1536;
|
|
mov.f32 %f1538, %f1536;
|
|
mov.f32 %f1539, %f1536;
|
|
mov.f32 %f1540, %f1536;
|
|
mov.f32 %f1541, %f1536;
|
|
mov.f32 %f1542, %f1536;
|
|
mov.f32 %f1543, %f1536;
|
|
mov.f32 %f1544, %f1536;
|
|
mov.f32 %f1545, %f1536;
|
|
mov.f32 %f1546, %f1536;
|
|
mov.f32 %f1547, %f1536;
|
|
mov.f32 %f1548, %f1536;
|
|
mov.f32 %f1549, %f1536;
|
|
mov.f32 %f1550, %f1536;
|
|
mov.f32 %f1551, %f1536;
|
|
|
|
$L__BB0_45:
|
|
and.b32 %r281, %r427, 8;
|
|
setp.eq.s32 %p52, %r281, 0;
|
|
@%p52 bra $L__BB0_59;
|
|
|
|
cvt.sat.f32.f32 %f198, %f1551;
|
|
ld.const.u64 %rd33, [params+192];
|
|
cvta.to.global.u64 %rd7, %rd33;
|
|
ld.const.u32 %r282, [params+184];
|
|
mad.lo.s32 %r283, %r282, %r4, %r3;
|
|
cvt.u64.u32 %rd8, %r283;
|
|
mov.f32 %f753, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f754, %f753;
|
|
add.f32 %f755, %f754, %f754;
|
|
mov.f32 %f756, 0f3EE8BA2E;
|
|
sub.f32 %f757, %f756, %f755;
|
|
abs.f32 %f199, %f757;
|
|
abs.f32 %f200, %f198;
|
|
setp.lt.f32 %p53, %f200, 0f00800000;
|
|
mul.f32 %f758, %f200, 0f4B800000;
|
|
selp.f32 %f759, %f758, %f200, %p53;
|
|
selp.f32 %f760, 0fC3170000, 0fC2FE0000, %p53;
|
|
mov.b32 %r284, %f759;
|
|
and.b32 %r285, %r284, 8388607;
|
|
or.b32 %r286, %r285, 1065353216;
|
|
mov.b32 %f761, %r286;
|
|
shr.u32 %r287, %r284, 23;
|
|
cvt.rn.f32.u32 %f762, %r287;
|
|
add.f32 %f763, %f760, %f762;
|
|
setp.gt.f32 %p54, %f761, 0f3FB504F3;
|
|
mul.f32 %f764, %f761, 0f3F000000;
|
|
add.f32 %f765, %f763, 0f3F800000;
|
|
selp.f32 %f766, %f765, %f763, %p54;
|
|
selp.f32 %f767, %f764, %f761, %p54;
|
|
add.f32 %f768, %f767, 0fBF800000;
|
|
add.f32 %f769, %f767, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f770, %f769;
|
|
add.f32 %f771, %f768, %f768;
|
|
mul.f32 %f772, %f771, %f770;
|
|
mul.f32 %f773, %f772, %f772;
|
|
mov.f32 %f774, 0f3C4CAF63;
|
|
mov.f32 %f775, 0f3B18F0FE;
|
|
fma.rn.f32 %f776, %f775, %f773, %f774;
|
|
mov.f32 %f777, 0f3DAAAABD;
|
|
fma.rn.f32 %f778, %f776, %f773, %f777;
|
|
mul.rn.f32 %f779, %f778, %f773;
|
|
mul.rn.f32 %f780, %f779, %f772;
|
|
sub.f32 %f781, %f768, %f772;
|
|
add.f32 %f782, %f781, %f781;
|
|
neg.f32 %f783, %f772;
|
|
fma.rn.f32 %f784, %f783, %f768, %f782;
|
|
mul.rn.f32 %f785, %f770, %f784;
|
|
add.f32 %f786, %f780, %f772;
|
|
sub.f32 %f787, %f772, %f786;
|
|
add.f32 %f788, %f780, %f787;
|
|
add.f32 %f789, %f785, %f788;
|
|
add.f32 %f790, %f786, %f789;
|
|
sub.f32 %f791, %f786, %f790;
|
|
add.f32 %f792, %f789, %f791;
|
|
mov.f32 %f793, 0f3F317200;
|
|
mul.rn.f32 %f794, %f766, %f793;
|
|
mov.f32 %f795, 0f35BFBE8E;
|
|
mul.rn.f32 %f796, %f766, %f795;
|
|
add.f32 %f797, %f794, %f790;
|
|
sub.f32 %f798, %f794, %f797;
|
|
add.f32 %f799, %f790, %f798;
|
|
add.f32 %f800, %f792, %f799;
|
|
add.f32 %f801, %f796, %f800;
|
|
add.f32 %f802, %f797, %f801;
|
|
sub.f32 %f803, %f797, %f802;
|
|
add.f32 %f804, %f801, %f803;
|
|
mul.rn.f32 %f805, %f756, %f802;
|
|
neg.f32 %f806, %f805;
|
|
fma.rn.f32 %f807, %f756, %f802, %f806;
|
|
fma.rn.f32 %f808, %f756, %f804, %f807;
|
|
mov.f32 %f809, 0f00000000;
|
|
fma.rn.f32 %f810, %f809, %f802, %f808;
|
|
add.rn.f32 %f811, %f805, %f810;
|
|
neg.f32 %f812, %f811;
|
|
add.rn.f32 %f813, %f805, %f812;
|
|
add.rn.f32 %f814, %f813, %f810;
|
|
mov.b32 %r288, %f811;
|
|
setp.eq.s32 %p55, %r288, 1118925336;
|
|
add.s32 %r289, %r288, -1;
|
|
mov.b32 %f815, %r289;
|
|
add.f32 %f816, %f814, 0f37000000;
|
|
selp.f32 %f201, %f816, %f814, %p55;
|
|
selp.f32 %f817, %f815, %f811, %p55;
|
|
mov.f32 %f818, 0f3FB8AA3B;
|
|
mul.rn.f32 %f819, %f817, %f818;
|
|
cvt.rzi.f32.f32 %f820, %f819;
|
|
abs.f32 %f821, %f820;
|
|
setp.gt.f32 %p56, %f821, 0f42FC0000;
|
|
mov.b32 %r290, %f820;
|
|
and.b32 %r291, %r290, -2147483648;
|
|
or.b32 %r292, %r291, 1123811328;
|
|
mov.b32 %f822, %r292;
|
|
selp.f32 %f823, %f822, %f820, %p56;
|
|
mov.f32 %f824, 0fBF317218;
|
|
fma.rn.f32 %f825, %f823, %f824, %f817;
|
|
mov.f32 %f826, 0f3102E308;
|
|
fma.rn.f32 %f827, %f823, %f826, %f825;
|
|
mul.f32 %f828, %f827, 0f3FB8AA3B;
|
|
add.f32 %f829, %f823, 0f4B40007F;
|
|
mov.b32 %r293, %f829;
|
|
shl.b32 %r294, %r293, 23;
|
|
mov.b32 %f830, %r294;
|
|
ex2.approx.ftz.f32 %f831, %f828;
|
|
mul.f32 %f202, %f831, %f830;
|
|
setp.eq.f32 %p57, %f202, 0f7F800000;
|
|
mov.f32 %f1568, 0f7F800000;
|
|
@%p57 bra $L__BB0_48;
|
|
|
|
fma.rn.f32 %f1568, %f202, %f201, %f202;
|
|
|
|
$L__BB0_48:
|
|
setp.lt.f32 %p58, %f198, 0f00000000;
|
|
setp.eq.f32 %p59, %f199, 0f3F800000;
|
|
and.pred %p3, %p58, %p59;
|
|
setp.eq.f32 %p60, %f198, 0f00000000;
|
|
@%p60 bra $L__BB0_52;
|
|
bra.uni $L__BB0_49;
|
|
|
|
$L__BB0_52:
|
|
add.f32 %f836, %f198, %f198;
|
|
selp.f32 %f1570, %f836, 0f00000000, %p59;
|
|
bra.uni $L__BB0_53;
|
|
|
|
$L__BB0_156:
|
|
mov.f32 %f1445, 0f00000000;
|
|
mov.u32 %r429, 0;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs115, %f1445;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs114, %f1445;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs113, %f1445;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs116, 0;
|
|
st.global.v4.u16 [%rd16], {%rs113, %rs114, %rs115, %rs116};
|
|
|
|
$L__BB0_157:
|
|
ld.const.u64 %rd65, [params+256];
|
|
cvta.to.global.u64 %rd66, %rd65;
|
|
ld.const.u32 %r415, [params+248];
|
|
mad.lo.s32 %r416, %r415, %r4, %r3;
|
|
mul.wide.u32 %rd67, %r416, 8;
|
|
add.s64 %rd17, %rd66, %rd67;
|
|
setp.eq.s32 %p178, %r429, 0;
|
|
@%p178 bra $L__BB0_159;
|
|
|
|
ld.global.v4.u16 {%rs123, %rs124, %rs125, %rs126}, [%rd17];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1446, %rs123;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1447, %rs124;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1448, %rs125;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1449, %f1446, 0f00000000;
|
|
add.f32 %f1450, %f1447, 0f00000000;
|
|
add.f32 %f1451, %f1448, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs122, %f1451;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs121, %f1450;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs120, %f1449;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs127, 0;
|
|
st.global.v4.u16 [%rd17], {%rs120, %rs121, %rs122, %rs127};
|
|
bra.uni $L__BB0_160;
|
|
|
|
$L__BB0_159:
|
|
mov.f32 %f1454, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs130, %f1454;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs129, %f1454;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs128, %f1454;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs131, 0;
|
|
st.global.v4.u16 [%rd17], {%rs128, %rs129, %rs130, %rs131};
|
|
|
|
$L__BB0_160:
|
|
ld.const.u64 %rd68, [params+272];
|
|
cvta.to.global.u64 %rd69, %rd68;
|
|
ld.const.u32 %r417, [params+264];
|
|
mad.lo.s32 %r418, %r417, %r4, %r3;
|
|
mul.wide.u32 %rd70, %r418, 8;
|
|
add.s64 %rd18, %rd69, %rd70;
|
|
@%p178 bra $L__BB0_162;
|
|
|
|
ld.global.v4.u16 {%rs138, %rs139, %rs140, %rs141}, [%rd18];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1455, %rs138;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1456, %rs139;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1457, %rs140;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1458, %f1455, 0f00000000;
|
|
add.f32 %f1459, %f1456, 0f00000000;
|
|
add.f32 %f1460, %f1457, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs137, %f1460;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs136, %f1459;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs135, %f1458;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs142, 0;
|
|
st.global.v4.u16 [%rd18], {%rs135, %rs136, %rs137, %rs142};
|
|
bra.uni $L__BB0_163;
|
|
|
|
$L__BB0_162:
|
|
mov.f32 %f1463, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs145, %f1463;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs144, %f1463;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs143, %f1463;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs146, 0;
|
|
st.global.v4.u16 [%rd18], {%rs143, %rs144, %rs145, %rs146};
|
|
|
|
$L__BB0_163:
|
|
ld.const.u64 %rd71, [params+288];
|
|
cvta.to.global.u64 %rd72, %rd71;
|
|
ld.const.u32 %r419, [params+280];
|
|
mad.lo.s32 %r420, %r419, %r4, %r3;
|
|
mul.wide.u32 %rd73, %r420, 8;
|
|
add.s64 %rd19, %rd72, %rd73;
|
|
@%p178 bra $L__BB0_165;
|
|
|
|
ld.global.v4.u16 {%rs153, %rs154, %rs155, %rs156}, [%rd19];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1464, %rs153;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1465, %rs154;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1466, %rs155;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1467, %f1464, 0f00000000;
|
|
add.f32 %f1468, %f1465, 0f00000000;
|
|
add.f32 %f1469, %f1466, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs152, %f1469;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs151, %f1468;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs150, %f1467;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs157, 0;
|
|
st.global.v4.u16 [%rd19], {%rs150, %rs151, %rs152, %rs157};
|
|
bra.uni $L__BB0_166;
|
|
|
|
$L__BB0_165:
|
|
mov.f32 %f1472, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs160, %f1472;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs159, %f1472;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs158, %f1472;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs161, 0;
|
|
st.global.v4.u16 [%rd19], {%rs158, %rs159, %rs160, %rs161};
|
|
|
|
$L__BB0_166:
|
|
ld.const.u64 %rd74, [params+304];
|
|
cvta.to.global.u64 %rd75, %rd74;
|
|
ld.const.u32 %r421, [params+296];
|
|
mad.lo.s32 %r422, %r421, %r4, %r3;
|
|
mul.wide.u32 %rd76, %r422, 8;
|
|
add.s64 %rd20, %rd75, %rd76;
|
|
@%p178 bra $L__BB0_168;
|
|
|
|
ld.global.v4.u16 {%rs168, %rs169, %rs170, %rs171}, [%rd20];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1473, %rs168;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1474, %rs169;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1475, %rs170;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1476, %f1473, 0f00000000;
|
|
add.f32 %f1477, %f1474, 0f00000000;
|
|
add.f32 %f1478, %f1475, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs167, %f1478;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs166, %f1477;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs165, %f1476;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs172, 0;
|
|
st.global.v4.u16 [%rd20], {%rs165, %rs166, %rs167, %rs172};
|
|
bra.uni $L__BB0_169;
|
|
|
|
$L__BB0_168:
|
|
mov.f32 %f1481, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs175, %f1481;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs174, %f1481;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs173, %f1481;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs176, 0;
|
|
st.global.v4.u16 [%rd20], {%rs173, %rs174, %rs175, %rs176};
|
|
bra.uni $L__BB0_169;
|
|
|
|
$L__BB0_49:
|
|
mov.b32 %r295, %f1568;
|
|
xor.b32 %r296, %r295, -2147483648;
|
|
mov.b32 %f832, %r296;
|
|
selp.f32 %f1570, %f832, %f1568, %p3;
|
|
setp.geu.f32 %p61, %f198, 0f00000000;
|
|
@%p61 bra $L__BB0_53;
|
|
|
|
mov.f32 %f833, 0f3EE8BA2E;
|
|
cvt.rzi.f32.f32 %f834, %f833;
|
|
setp.eq.f32 %p62, %f834, 0f3EE8BA2E;
|
|
@%p62 bra $L__BB0_53;
|
|
|
|
mov.f32 %f1570, 0f7FFFFFFF;
|
|
|
|
$L__BB0_53:
|
|
add.f32 %f837, %f200, 0f3EE8BA2E;
|
|
mov.b32 %r297, %f837;
|
|
setp.lt.s32 %p64, %r297, 2139095040;
|
|
@%p64 bra $L__BB0_58;
|
|
|
|
setp.gtu.f32 %p65, %f200, 0f7F800000;
|
|
@%p65 bra $L__BB0_57;
|
|
bra.uni $L__BB0_55;
|
|
|
|
$L__BB0_57:
|
|
add.f32 %f1570, %f198, 0f3EE8BA2E;
|
|
bra.uni $L__BB0_58;
|
|
|
|
$L__BB0_55:
|
|
setp.neu.f32 %p66, %f200, 0f7F800000;
|
|
@%p66 bra $L__BB0_58;
|
|
|
|
selp.f32 %f1570, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
$L__BB0_58:
|
|
mul.f32 %f838, %f1570, 0f437F0000;
|
|
setp.eq.f32 %p67, %f198, 0f3F800000;
|
|
selp.f32 %f839, 0f437F0000, %f838, %p67;
|
|
cvt.rzi.u32.f32 %r298, %f839;
|
|
shl.b64 %rd34, %rd8, 1;
|
|
add.s64 %rd35, %rd7, %rd34;
|
|
cvt.u16.u32 %rs18, %r298;
|
|
mov.u16 %rs19, 255;
|
|
st.global.v2.u8 [%rd35], {%rs18, %rs19};
|
|
|
|
$L__BB0_59:
|
|
and.b32 %r299, %r427, 1;
|
|
setp.eq.b32 %p68, %r299, 1;
|
|
mov.pred %p69, 0;
|
|
xor.pred %p70, %p68, %p69;
|
|
not.pred %p71, %p70;
|
|
@%p71 bra $L__BB0_133;
|
|
|
|
mov.f32 %f841, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f842, %f841;
|
|
add.f32 %f843, %f842, %f842;
|
|
mov.f32 %f844, 0f3EE66666;
|
|
sub.f32 %f845, %f844, %f843;
|
|
abs.f32 %f211, %f845;
|
|
abs.f32 %f212, %f1536;
|
|
setp.lt.f32 %p72, %f212, 0f00800000;
|
|
mul.f32 %f846, %f212, 0f4B800000;
|
|
selp.f32 %f847, %f846, %f212, %p72;
|
|
selp.f32 %f848, 0fC3170000, 0fC2FE0000, %p72;
|
|
mov.b32 %r300, %f847;
|
|
and.b32 %r301, %r300, 8388607;
|
|
or.b32 %r302, %r301, 1065353216;
|
|
mov.b32 %f849, %r302;
|
|
shr.u32 %r303, %r300, 23;
|
|
cvt.rn.f32.u32 %f850, %r303;
|
|
add.f32 %f851, %f848, %f850;
|
|
setp.gt.f32 %p73, %f849, 0f3FB504F3;
|
|
mul.f32 %f852, %f849, 0f3F000000;
|
|
add.f32 %f853, %f851, 0f3F800000;
|
|
selp.f32 %f854, %f853, %f851, %p73;
|
|
selp.f32 %f855, %f852, %f849, %p73;
|
|
add.f32 %f856, %f855, 0fBF800000;
|
|
add.f32 %f857, %f855, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f858, %f857;
|
|
add.f32 %f859, %f856, %f856;
|
|
mul.f32 %f860, %f859, %f858;
|
|
mul.f32 %f861, %f860, %f860;
|
|
mov.f32 %f862, 0f3C4CAF63;
|
|
mov.f32 %f863, 0f3B18F0FE;
|
|
fma.rn.f32 %f864, %f863, %f861, %f862;
|
|
mov.f32 %f865, 0f3DAAAABD;
|
|
fma.rn.f32 %f866, %f864, %f861, %f865;
|
|
mul.rn.f32 %f867, %f866, %f861;
|
|
mul.rn.f32 %f868, %f867, %f860;
|
|
sub.f32 %f869, %f856, %f860;
|
|
add.f32 %f870, %f869, %f869;
|
|
neg.f32 %f871, %f860;
|
|
fma.rn.f32 %f872, %f871, %f856, %f870;
|
|
mul.rn.f32 %f873, %f858, %f872;
|
|
add.f32 %f874, %f868, %f860;
|
|
sub.f32 %f875, %f860, %f874;
|
|
add.f32 %f876, %f868, %f875;
|
|
add.f32 %f877, %f873, %f876;
|
|
add.f32 %f878, %f874, %f877;
|
|
sub.f32 %f879, %f874, %f878;
|
|
add.f32 %f880, %f877, %f879;
|
|
mov.f32 %f881, 0f3F317200;
|
|
mul.rn.f32 %f882, %f854, %f881;
|
|
mov.f32 %f883, 0f35BFBE8E;
|
|
mul.rn.f32 %f884, %f854, %f883;
|
|
add.f32 %f885, %f882, %f878;
|
|
sub.f32 %f886, %f882, %f885;
|
|
add.f32 %f887, %f878, %f886;
|
|
add.f32 %f888, %f880, %f887;
|
|
add.f32 %f889, %f884, %f888;
|
|
add.f32 %f890, %f885, %f889;
|
|
sub.f32 %f891, %f885, %f890;
|
|
add.f32 %f892, %f889, %f891;
|
|
mul.rn.f32 %f893, %f844, %f890;
|
|
neg.f32 %f894, %f893;
|
|
fma.rn.f32 %f895, %f844, %f890, %f894;
|
|
fma.rn.f32 %f896, %f844, %f892, %f895;
|
|
mov.f32 %f897, 0f00000000;
|
|
fma.rn.f32 %f898, %f897, %f890, %f896;
|
|
add.rn.f32 %f899, %f893, %f898;
|
|
neg.f32 %f900, %f899;
|
|
add.rn.f32 %f901, %f893, %f900;
|
|
add.rn.f32 %f902, %f901, %f898;
|
|
mov.b32 %r304, %f899;
|
|
setp.eq.s32 %p74, %r304, 1118925336;
|
|
add.s32 %r305, %r304, -1;
|
|
mov.b32 %f903, %r305;
|
|
add.f32 %f904, %f902, 0f37000000;
|
|
selp.f32 %f213, %f904, %f902, %p74;
|
|
selp.f32 %f905, %f903, %f899, %p74;
|
|
mov.f32 %f906, 0f3FB8AA3B;
|
|
mul.rn.f32 %f907, %f905, %f906;
|
|
cvt.rzi.f32.f32 %f908, %f907;
|
|
abs.f32 %f909, %f908;
|
|
setp.gt.f32 %p75, %f909, 0f42FC0000;
|
|
mov.b32 %r306, %f908;
|
|
and.b32 %r307, %r306, -2147483648;
|
|
or.b32 %r308, %r307, 1123811328;
|
|
mov.b32 %f910, %r308;
|
|
selp.f32 %f911, %f910, %f908, %p75;
|
|
mov.f32 %f912, 0fBF317218;
|
|
fma.rn.f32 %f913, %f911, %f912, %f905;
|
|
mov.f32 %f914, 0f3102E308;
|
|
fma.rn.f32 %f915, %f911, %f914, %f913;
|
|
mul.f32 %f916, %f915, 0f3FB8AA3B;
|
|
add.f32 %f917, %f911, 0f4B40007F;
|
|
mov.b32 %r309, %f917;
|
|
shl.b32 %r310, %r309, 23;
|
|
mov.b32 %f918, %r310;
|
|
ex2.approx.ftz.f32 %f919, %f916;
|
|
mul.f32 %f214, %f919, %f918;
|
|
setp.eq.f32 %p76, %f214, 0f7F800000;
|
|
mov.f32 %f1571, 0f7F800000;
|
|
@%p76 bra $L__BB0_62;
|
|
|
|
fma.rn.f32 %f1571, %f214, %f213, %f214;
|
|
|
|
$L__BB0_62:
|
|
setp.lt.f32 %p77, %f1536, 0f00000000;
|
|
setp.eq.f32 %p78, %f211, 0f3F800000;
|
|
and.pred %p4, %p77, %p78;
|
|
setp.eq.f32 %p79, %f1536, 0f00000000;
|
|
@%p79 bra $L__BB0_66;
|
|
bra.uni $L__BB0_63;
|
|
|
|
$L__BB0_66:
|
|
add.f32 %f924, %f1536, %f1536;
|
|
selp.f32 %f1573, %f924, 0f00000000, %p78;
|
|
bra.uni $L__BB0_67;
|
|
|
|
$L__BB0_63:
|
|
mov.b32 %r311, %f1571;
|
|
xor.b32 %r312, %r311, -2147483648;
|
|
mov.b32 %f920, %r312;
|
|
selp.f32 %f1573, %f920, %f1571, %p4;
|
|
setp.geu.f32 %p80, %f1536, 0f00000000;
|
|
@%p80 bra $L__BB0_67;
|
|
|
|
mov.f32 %f921, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f922, %f921;
|
|
setp.eq.f32 %p81, %f922, 0f3EE66666;
|
|
@%p81 bra $L__BB0_67;
|
|
|
|
mov.f32 %f1573, 0f7FFFFFFF;
|
|
|
|
$L__BB0_67:
|
|
add.f32 %f925, %f212, 0f3EE66666;
|
|
mov.b32 %r313, %f925;
|
|
setp.lt.s32 %p83, %r313, 2139095040;
|
|
@%p83 bra $L__BB0_72;
|
|
|
|
setp.gtu.f32 %p84, %f212, 0f7F800000;
|
|
@%p84 bra $L__BB0_71;
|
|
bra.uni $L__BB0_69;
|
|
|
|
$L__BB0_71:
|
|
add.f32 %f1573, %f1536, 0f3EE66666;
|
|
bra.uni $L__BB0_72;
|
|
|
|
$L__BB0_69:
|
|
setp.neu.f32 %p85, %f212, 0f7F800000;
|
|
@%p85 bra $L__BB0_72;
|
|
|
|
selp.f32 %f1573, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
$L__BB0_72:
|
|
setp.eq.f32 %p86, %f1536, 0f3F800000;
|
|
selp.f32 %f223, 0f3F800000, %f1573, %p86;
|
|
abs.f32 %f224, %f1537;
|
|
setp.lt.f32 %p87, %f224, 0f00800000;
|
|
mul.f32 %f927, %f224, 0f4B800000;
|
|
selp.f32 %f928, %f927, %f224, %p87;
|
|
selp.f32 %f929, 0fC3170000, 0fC2FE0000, %p87;
|
|
mov.b32 %r314, %f928;
|
|
and.b32 %r315, %r314, 8388607;
|
|
or.b32 %r316, %r315, 1065353216;
|
|
mov.b32 %f930, %r316;
|
|
shr.u32 %r317, %r314, 23;
|
|
cvt.rn.f32.u32 %f931, %r317;
|
|
add.f32 %f932, %f929, %f931;
|
|
setp.gt.f32 %p88, %f930, 0f3FB504F3;
|
|
mul.f32 %f933, %f930, 0f3F000000;
|
|
add.f32 %f934, %f932, 0f3F800000;
|
|
selp.f32 %f935, %f934, %f932, %p88;
|
|
selp.f32 %f936, %f933, %f930, %p88;
|
|
add.f32 %f937, %f936, 0fBF800000;
|
|
add.f32 %f938, %f936, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f939, %f938;
|
|
add.f32 %f940, %f937, %f937;
|
|
mul.f32 %f941, %f940, %f939;
|
|
mul.f32 %f942, %f941, %f941;
|
|
mov.f32 %f943, 0f3C4CAF63;
|
|
mov.f32 %f944, 0f3B18F0FE;
|
|
fma.rn.f32 %f945, %f944, %f942, %f943;
|
|
mov.f32 %f946, 0f3DAAAABD;
|
|
fma.rn.f32 %f947, %f945, %f942, %f946;
|
|
mul.rn.f32 %f948, %f947, %f942;
|
|
mul.rn.f32 %f949, %f948, %f941;
|
|
sub.f32 %f950, %f937, %f941;
|
|
add.f32 %f951, %f950, %f950;
|
|
neg.f32 %f952, %f941;
|
|
fma.rn.f32 %f953, %f952, %f937, %f951;
|
|
mul.rn.f32 %f954, %f939, %f953;
|
|
add.f32 %f955, %f949, %f941;
|
|
sub.f32 %f956, %f941, %f955;
|
|
add.f32 %f957, %f949, %f956;
|
|
add.f32 %f958, %f954, %f957;
|
|
add.f32 %f959, %f955, %f958;
|
|
sub.f32 %f960, %f955, %f959;
|
|
add.f32 %f961, %f958, %f960;
|
|
mov.f32 %f962, 0f3F317200;
|
|
mul.rn.f32 %f963, %f935, %f962;
|
|
mov.f32 %f964, 0f35BFBE8E;
|
|
mul.rn.f32 %f965, %f935, %f964;
|
|
add.f32 %f966, %f963, %f959;
|
|
sub.f32 %f967, %f963, %f966;
|
|
add.f32 %f968, %f959, %f967;
|
|
add.f32 %f969, %f961, %f968;
|
|
add.f32 %f970, %f965, %f969;
|
|
add.f32 %f971, %f966, %f970;
|
|
sub.f32 %f972, %f966, %f971;
|
|
add.f32 %f973, %f970, %f972;
|
|
mov.f32 %f974, 0f3EE66666;
|
|
mul.rn.f32 %f975, %f974, %f971;
|
|
neg.f32 %f976, %f975;
|
|
fma.rn.f32 %f977, %f974, %f971, %f976;
|
|
fma.rn.f32 %f978, %f974, %f973, %f977;
|
|
mov.f32 %f979, 0f00000000;
|
|
fma.rn.f32 %f980, %f979, %f971, %f978;
|
|
add.rn.f32 %f981, %f975, %f980;
|
|
neg.f32 %f982, %f981;
|
|
add.rn.f32 %f983, %f975, %f982;
|
|
add.rn.f32 %f984, %f983, %f980;
|
|
mov.b32 %r318, %f981;
|
|
setp.eq.s32 %p89, %r318, 1118925336;
|
|
add.s32 %r319, %r318, -1;
|
|
mov.b32 %f985, %r319;
|
|
add.f32 %f986, %f984, 0f37000000;
|
|
selp.f32 %f225, %f986, %f984, %p89;
|
|
selp.f32 %f987, %f985, %f981, %p89;
|
|
mov.f32 %f988, 0f3FB8AA3B;
|
|
mul.rn.f32 %f989, %f987, %f988;
|
|
cvt.rzi.f32.f32 %f990, %f989;
|
|
abs.f32 %f991, %f990;
|
|
setp.gt.f32 %p90, %f991, 0f42FC0000;
|
|
mov.b32 %r320, %f990;
|
|
and.b32 %r321, %r320, -2147483648;
|
|
or.b32 %r322, %r321, 1123811328;
|
|
mov.b32 %f992, %r322;
|
|
selp.f32 %f993, %f992, %f990, %p90;
|
|
mov.f32 %f994, 0fBF317218;
|
|
fma.rn.f32 %f995, %f993, %f994, %f987;
|
|
mov.f32 %f996, 0f3102E308;
|
|
fma.rn.f32 %f997, %f993, %f996, %f995;
|
|
mul.f32 %f998, %f997, 0f3FB8AA3B;
|
|
add.f32 %f999, %f993, 0f4B40007F;
|
|
mov.b32 %r323, %f999;
|
|
shl.b32 %r324, %r323, 23;
|
|
mov.b32 %f1000, %r324;
|
|
ex2.approx.ftz.f32 %f1001, %f998;
|
|
mul.f32 %f226, %f1001, %f1000;
|
|
setp.eq.f32 %p91, %f226, 0f7F800000;
|
|
mov.f32 %f1574, 0f7F800000;
|
|
@%p91 bra $L__BB0_74;
|
|
|
|
fma.rn.f32 %f1574, %f226, %f225, %f226;
|
|
|
|
$L__BB0_74:
|
|
setp.lt.f32 %p92, %f1537, 0f00000000;
|
|
and.pred %p5, %p92, %p78;
|
|
setp.eq.f32 %p94, %f1537, 0f00000000;
|
|
@%p94 bra $L__BB0_78;
|
|
bra.uni $L__BB0_75;
|
|
|
|
$L__BB0_78:
|
|
add.f32 %f1006, %f1537, %f1537;
|
|
selp.f32 %f1576, %f1006, 0f00000000, %p78;
|
|
bra.uni $L__BB0_79;
|
|
|
|
$L__BB0_75:
|
|
mov.b32 %r325, %f1574;
|
|
xor.b32 %r326, %r325, -2147483648;
|
|
mov.b32 %f1002, %r326;
|
|
selp.f32 %f1576, %f1002, %f1574, %p5;
|
|
setp.geu.f32 %p95, %f1537, 0f00000000;
|
|
@%p95 bra $L__BB0_79;
|
|
|
|
mov.f32 %f1003, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f1004, %f1003;
|
|
setp.eq.f32 %p96, %f1004, 0f3EE66666;
|
|
@%p96 bra $L__BB0_79;
|
|
|
|
mov.f32 %f1576, 0f7FFFFFFF;
|
|
|
|
$L__BB0_79:
|
|
add.f32 %f1007, %f224, 0f3EE66666;
|
|
mov.b32 %r327, %f1007;
|
|
setp.lt.s32 %p98, %r327, 2139095040;
|
|
@%p98 bra $L__BB0_84;
|
|
|
|
setp.gtu.f32 %p99, %f224, 0f7F800000;
|
|
@%p99 bra $L__BB0_83;
|
|
bra.uni $L__BB0_81;
|
|
|
|
$L__BB0_83:
|
|
add.f32 %f1576, %f1537, 0f3EE66666;
|
|
bra.uni $L__BB0_84;
|
|
|
|
$L__BB0_81:
|
|
setp.neu.f32 %p100, %f224, 0f7F800000;
|
|
@%p100 bra $L__BB0_84;
|
|
|
|
selp.f32 %f1576, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
$L__BB0_84:
|
|
setp.eq.f32 %p101, %f1537, 0f3F800000;
|
|
selp.f32 %f235, 0f3F800000, %f1576, %p101;
|
|
abs.f32 %f236, %f1538;
|
|
setp.lt.f32 %p102, %f236, 0f00800000;
|
|
mul.f32 %f1009, %f236, 0f4B800000;
|
|
selp.f32 %f1010, %f1009, %f236, %p102;
|
|
selp.f32 %f1011, 0fC3170000, 0fC2FE0000, %p102;
|
|
mov.b32 %r328, %f1010;
|
|
and.b32 %r329, %r328, 8388607;
|
|
or.b32 %r330, %r329, 1065353216;
|
|
mov.b32 %f1012, %r330;
|
|
shr.u32 %r331, %r328, 23;
|
|
cvt.rn.f32.u32 %f1013, %r331;
|
|
add.f32 %f1014, %f1011, %f1013;
|
|
setp.gt.f32 %p103, %f1012, 0f3FB504F3;
|
|
mul.f32 %f1015, %f1012, 0f3F000000;
|
|
add.f32 %f1016, %f1014, 0f3F800000;
|
|
selp.f32 %f1017, %f1016, %f1014, %p103;
|
|
selp.f32 %f1018, %f1015, %f1012, %p103;
|
|
add.f32 %f1019, %f1018, 0fBF800000;
|
|
add.f32 %f1020, %f1018, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1021, %f1020;
|
|
add.f32 %f1022, %f1019, %f1019;
|
|
mul.f32 %f1023, %f1022, %f1021;
|
|
mul.f32 %f1024, %f1023, %f1023;
|
|
mov.f32 %f1025, 0f3C4CAF63;
|
|
mov.f32 %f1026, 0f3B18F0FE;
|
|
fma.rn.f32 %f1027, %f1026, %f1024, %f1025;
|
|
mov.f32 %f1028, 0f3DAAAABD;
|
|
fma.rn.f32 %f1029, %f1027, %f1024, %f1028;
|
|
mul.rn.f32 %f1030, %f1029, %f1024;
|
|
mul.rn.f32 %f1031, %f1030, %f1023;
|
|
sub.f32 %f1032, %f1019, %f1023;
|
|
add.f32 %f1033, %f1032, %f1032;
|
|
neg.f32 %f1034, %f1023;
|
|
fma.rn.f32 %f1035, %f1034, %f1019, %f1033;
|
|
mul.rn.f32 %f1036, %f1021, %f1035;
|
|
add.f32 %f1037, %f1031, %f1023;
|
|
sub.f32 %f1038, %f1023, %f1037;
|
|
add.f32 %f1039, %f1031, %f1038;
|
|
add.f32 %f1040, %f1036, %f1039;
|
|
add.f32 %f1041, %f1037, %f1040;
|
|
sub.f32 %f1042, %f1037, %f1041;
|
|
add.f32 %f1043, %f1040, %f1042;
|
|
mov.f32 %f1044, 0f3F317200;
|
|
mul.rn.f32 %f1045, %f1017, %f1044;
|
|
mov.f32 %f1046, 0f35BFBE8E;
|
|
mul.rn.f32 %f1047, %f1017, %f1046;
|
|
add.f32 %f1048, %f1045, %f1041;
|
|
sub.f32 %f1049, %f1045, %f1048;
|
|
add.f32 %f1050, %f1041, %f1049;
|
|
add.f32 %f1051, %f1043, %f1050;
|
|
add.f32 %f1052, %f1047, %f1051;
|
|
add.f32 %f1053, %f1048, %f1052;
|
|
sub.f32 %f1054, %f1048, %f1053;
|
|
add.f32 %f1055, %f1052, %f1054;
|
|
mov.f32 %f1056, 0f3EE66666;
|
|
mul.rn.f32 %f1057, %f1056, %f1053;
|
|
neg.f32 %f1058, %f1057;
|
|
fma.rn.f32 %f1059, %f1056, %f1053, %f1058;
|
|
fma.rn.f32 %f1060, %f1056, %f1055, %f1059;
|
|
mov.f32 %f1061, 0f00000000;
|
|
fma.rn.f32 %f1062, %f1061, %f1053, %f1060;
|
|
add.rn.f32 %f1063, %f1057, %f1062;
|
|
neg.f32 %f1064, %f1063;
|
|
add.rn.f32 %f1065, %f1057, %f1064;
|
|
add.rn.f32 %f1066, %f1065, %f1062;
|
|
mov.b32 %r332, %f1063;
|
|
setp.eq.s32 %p104, %r332, 1118925336;
|
|
add.s32 %r333, %r332, -1;
|
|
mov.b32 %f1067, %r333;
|
|
add.f32 %f1068, %f1066, 0f37000000;
|
|
selp.f32 %f237, %f1068, %f1066, %p104;
|
|
selp.f32 %f1069, %f1067, %f1063, %p104;
|
|
mov.f32 %f1070, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1071, %f1069, %f1070;
|
|
cvt.rzi.f32.f32 %f1072, %f1071;
|
|
abs.f32 %f1073, %f1072;
|
|
setp.gt.f32 %p105, %f1073, 0f42FC0000;
|
|
mov.b32 %r334, %f1072;
|
|
and.b32 %r335, %r334, -2147483648;
|
|
or.b32 %r336, %r335, 1123811328;
|
|
mov.b32 %f1074, %r336;
|
|
selp.f32 %f1075, %f1074, %f1072, %p105;
|
|
mov.f32 %f1076, 0fBF317218;
|
|
fma.rn.f32 %f1077, %f1075, %f1076, %f1069;
|
|
mov.f32 %f1078, 0f3102E308;
|
|
fma.rn.f32 %f1079, %f1075, %f1078, %f1077;
|
|
mul.f32 %f1080, %f1079, 0f3FB8AA3B;
|
|
add.f32 %f1081, %f1075, 0f4B40007F;
|
|
mov.b32 %r337, %f1081;
|
|
shl.b32 %r338, %r337, 23;
|
|
mov.b32 %f1082, %r338;
|
|
ex2.approx.ftz.f32 %f1083, %f1080;
|
|
mul.f32 %f238, %f1083, %f1082;
|
|
setp.eq.f32 %p106, %f238, 0f7F800000;
|
|
mov.f32 %f1577, 0f7F800000;
|
|
@%p106 bra $L__BB0_86;
|
|
|
|
fma.rn.f32 %f1577, %f238, %f237, %f238;
|
|
|
|
$L__BB0_86:
|
|
setp.lt.f32 %p107, %f1538, 0f00000000;
|
|
and.pred %p6, %p107, %p78;
|
|
setp.eq.f32 %p109, %f1538, 0f00000000;
|
|
@%p109 bra $L__BB0_90;
|
|
bra.uni $L__BB0_87;
|
|
|
|
$L__BB0_90:
|
|
add.f32 %f1088, %f1538, %f1538;
|
|
selp.f32 %f1579, %f1088, 0f00000000, %p78;
|
|
bra.uni $L__BB0_91;
|
|
|
|
$L__BB0_87:
|
|
mov.b32 %r339, %f1577;
|
|
xor.b32 %r340, %r339, -2147483648;
|
|
mov.b32 %f1084, %r340;
|
|
selp.f32 %f1579, %f1084, %f1577, %p6;
|
|
setp.geu.f32 %p110, %f1538, 0f00000000;
|
|
@%p110 bra $L__BB0_91;
|
|
|
|
mov.f32 %f1085, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f1086, %f1085;
|
|
setp.eq.f32 %p111, %f1086, 0f3EE66666;
|
|
@%p111 bra $L__BB0_91;
|
|
|
|
mov.f32 %f1579, 0f7FFFFFFF;
|
|
|
|
$L__BB0_91:
|
|
add.f32 %f1089, %f236, 0f3EE66666;
|
|
mov.b32 %r341, %f1089;
|
|
setp.lt.s32 %p113, %r341, 2139095040;
|
|
@%p113 bra $L__BB0_96;
|
|
|
|
setp.gtu.f32 %p114, %f236, 0f7F800000;
|
|
@%p114 bra $L__BB0_95;
|
|
bra.uni $L__BB0_93;
|
|
|
|
$L__BB0_95:
|
|
add.f32 %f1579, %f1538, 0f3EE66666;
|
|
bra.uni $L__BB0_96;
|
|
|
|
$L__BB0_93:
|
|
setp.neu.f32 %p115, %f236, 0f7F800000;
|
|
@%p115 bra $L__BB0_96;
|
|
|
|
selp.f32 %f1579, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
$L__BB0_96:
|
|
setp.eq.f32 %p116, %f1538, 0f3F800000;
|
|
mov.f32 %f1091, 0f3F800000;
|
|
selp.f32 %f1092, 0f3F800000, %f1579, %p116;
|
|
ld.const.u64 %rd36, [params+144];
|
|
cvta.to.global.u64 %rd9, %rd36;
|
|
ld.const.u32 %r342, [params+136];
|
|
mad.lo.s32 %r343, %r342, %r4, %r3;
|
|
cvt.u64.u32 %rd10, %r343;
|
|
min.f32 %f1093, %f223, %f1091;
|
|
mov.f32 %f1094, 0f00000000;
|
|
max.f32 %f247, %f1094, %f1093;
|
|
min.f32 %f1095, %f235, %f1091;
|
|
max.f32 %f248, %f1094, %f1095;
|
|
min.f32 %f1096, %f1092, %f1091;
|
|
max.f32 %f249, %f1094, %f1096;
|
|
mov.f32 %f1097, 0f3E555555;
|
|
cvt.rzi.f32.f32 %f1098, %f1097;
|
|
add.f32 %f1099, %f1098, %f1098;
|
|
mov.f32 %f1100, 0f3ED55555;
|
|
sub.f32 %f1101, %f1100, %f1099;
|
|
abs.f32 %f250, %f1101;
|
|
abs.f32 %f251, %f247;
|
|
setp.lt.f32 %p117, %f251, 0f00800000;
|
|
mul.f32 %f1102, %f251, 0f4B800000;
|
|
selp.f32 %f1103, %f1102, %f251, %p117;
|
|
selp.f32 %f1104, 0fC3170000, 0fC2FE0000, %p117;
|
|
mov.b32 %r344, %f1103;
|
|
and.b32 %r345, %r344, 8388607;
|
|
or.b32 %r346, %r345, 1065353216;
|
|
mov.b32 %f1105, %r346;
|
|
shr.u32 %r347, %r344, 23;
|
|
cvt.rn.f32.u32 %f1106, %r347;
|
|
add.f32 %f1107, %f1104, %f1106;
|
|
setp.gt.f32 %p118, %f1105, 0f3FB504F3;
|
|
mul.f32 %f1108, %f1105, 0f3F000000;
|
|
add.f32 %f1109, %f1107, 0f3F800000;
|
|
selp.f32 %f1110, %f1109, %f1107, %p118;
|
|
selp.f32 %f1111, %f1108, %f1105, %p118;
|
|
add.f32 %f1112, %f1111, 0fBF800000;
|
|
add.f32 %f1113, %f1111, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1114, %f1113;
|
|
add.f32 %f1115, %f1112, %f1112;
|
|
mul.f32 %f1116, %f1115, %f1114;
|
|
mul.f32 %f1117, %f1116, %f1116;
|
|
mov.f32 %f1118, 0f3C4CAF63;
|
|
mov.f32 %f1119, 0f3B18F0FE;
|
|
fma.rn.f32 %f1120, %f1119, %f1117, %f1118;
|
|
mov.f32 %f1121, 0f3DAAAABD;
|
|
fma.rn.f32 %f1122, %f1120, %f1117, %f1121;
|
|
mul.rn.f32 %f1123, %f1122, %f1117;
|
|
mul.rn.f32 %f1124, %f1123, %f1116;
|
|
sub.f32 %f1125, %f1112, %f1116;
|
|
add.f32 %f1126, %f1125, %f1125;
|
|
neg.f32 %f1127, %f1116;
|
|
fma.rn.f32 %f1128, %f1127, %f1112, %f1126;
|
|
mul.rn.f32 %f1129, %f1114, %f1128;
|
|
add.f32 %f1130, %f1124, %f1116;
|
|
sub.f32 %f1131, %f1116, %f1130;
|
|
add.f32 %f1132, %f1124, %f1131;
|
|
add.f32 %f1133, %f1129, %f1132;
|
|
add.f32 %f1134, %f1130, %f1133;
|
|
sub.f32 %f1135, %f1130, %f1134;
|
|
add.f32 %f1136, %f1133, %f1135;
|
|
mov.f32 %f1137, 0f3F317200;
|
|
mul.rn.f32 %f1138, %f1110, %f1137;
|
|
mov.f32 %f1139, 0f35BFBE8E;
|
|
mul.rn.f32 %f1140, %f1110, %f1139;
|
|
add.f32 %f1141, %f1138, %f1134;
|
|
sub.f32 %f1142, %f1138, %f1141;
|
|
add.f32 %f1143, %f1134, %f1142;
|
|
add.f32 %f1144, %f1136, %f1143;
|
|
add.f32 %f1145, %f1140, %f1144;
|
|
add.f32 %f1146, %f1141, %f1145;
|
|
sub.f32 %f1147, %f1141, %f1146;
|
|
add.f32 %f1148, %f1145, %f1147;
|
|
mul.rn.f32 %f1149, %f1100, %f1146;
|
|
neg.f32 %f1150, %f1149;
|
|
fma.rn.f32 %f1151, %f1100, %f1146, %f1150;
|
|
fma.rn.f32 %f1152, %f1100, %f1148, %f1151;
|
|
fma.rn.f32 %f1153, %f1094, %f1146, %f1152;
|
|
add.rn.f32 %f1154, %f1149, %f1153;
|
|
neg.f32 %f1155, %f1154;
|
|
add.rn.f32 %f1156, %f1149, %f1155;
|
|
add.rn.f32 %f1157, %f1156, %f1153;
|
|
mov.b32 %r348, %f1154;
|
|
setp.eq.s32 %p119, %r348, 1118925336;
|
|
add.s32 %r349, %r348, -1;
|
|
mov.b32 %f1158, %r349;
|
|
add.f32 %f1159, %f1157, 0f37000000;
|
|
selp.f32 %f252, %f1159, %f1157, %p119;
|
|
selp.f32 %f1160, %f1158, %f1154, %p119;
|
|
mov.f32 %f1161, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1162, %f1160, %f1161;
|
|
cvt.rzi.f32.f32 %f1163, %f1162;
|
|
abs.f32 %f1164, %f1163;
|
|
setp.gt.f32 %p120, %f1164, 0f42FC0000;
|
|
mov.b32 %r350, %f1163;
|
|
and.b32 %r351, %r350, -2147483648;
|
|
or.b32 %r352, %r351, 1123811328;
|
|
mov.b32 %f1165, %r352;
|
|
selp.f32 %f1166, %f1165, %f1163, %p120;
|
|
mov.f32 %f1167, 0fBF317218;
|
|
fma.rn.f32 %f1168, %f1166, %f1167, %f1160;
|
|
mov.f32 %f1169, 0f3102E308;
|
|
fma.rn.f32 %f1170, %f1166, %f1169, %f1168;
|
|
mul.f32 %f1171, %f1170, 0f3FB8AA3B;
|
|
add.f32 %f1172, %f1166, 0f4B40007F;
|
|
mov.b32 %r353, %f1172;
|
|
shl.b32 %r354, %r353, 23;
|
|
mov.b32 %f1173, %r354;
|
|
ex2.approx.ftz.f32 %f1174, %f1171;
|
|
mul.f32 %f253, %f1174, %f1173;
|
|
setp.eq.f32 %p121, %f253, 0f7F800000;
|
|
mov.f32 %f1580, 0f7F800000;
|
|
@%p121 bra $L__BB0_98;
|
|
|
|
fma.rn.f32 %f1580, %f253, %f252, %f253;
|
|
|
|
$L__BB0_98:
|
|
setp.lt.f32 %p122, %f247, 0f00000000;
|
|
setp.eq.f32 %p123, %f250, 0f3F800000;
|
|
and.pred %p7, %p122, %p123;
|
|
setp.eq.f32 %p124, %f247, 0f00000000;
|
|
@%p124 bra $L__BB0_102;
|
|
bra.uni $L__BB0_99;
|
|
|
|
$L__BB0_102:
|
|
add.f32 %f1179, %f247, %f247;
|
|
selp.f32 %f1582, %f1179, 0f00000000, %p123;
|
|
bra.uni $L__BB0_103;
|
|
|
|
$L__BB0_99:
|
|
mov.b32 %r355, %f1580;
|
|
xor.b32 %r356, %r355, -2147483648;
|
|
mov.b32 %f1175, %r356;
|
|
selp.f32 %f1582, %f1175, %f1580, %p7;
|
|
setp.geu.f32 %p125, %f247, 0f00000000;
|
|
@%p125 bra $L__BB0_103;
|
|
|
|
mov.f32 %f1176, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1177, %f1176;
|
|
setp.eq.f32 %p126, %f1177, 0f3ED55555;
|
|
@%p126 bra $L__BB0_103;
|
|
|
|
mov.f32 %f1582, 0f7FFFFFFF;
|
|
|
|
$L__BB0_103:
|
|
add.f32 %f1180, %f251, 0f3ED55555;
|
|
mov.b32 %r357, %f1180;
|
|
setp.lt.s32 %p128, %r357, 2139095040;
|
|
@%p128 bra $L__BB0_108;
|
|
|
|
setp.gtu.f32 %p129, %f251, 0f7F800000;
|
|
@%p129 bra $L__BB0_107;
|
|
bra.uni $L__BB0_105;
|
|
|
|
$L__BB0_107:
|
|
add.f32 %f1582, %f247, 0f3ED55555;
|
|
bra.uni $L__BB0_108;
|
|
|
|
$L__BB0_105:
|
|
setp.neu.f32 %p130, %f251, 0f7F800000;
|
|
@%p130 bra $L__BB0_108;
|
|
|
|
selp.f32 %f1582, 0fFF800000, 0f7F800000, %p7;
|
|
|
|
$L__BB0_108:
|
|
abs.f32 %f262, %f248;
|
|
setp.lt.f32 %p131, %f262, 0f00800000;
|
|
mul.f32 %f1182, %f262, 0f4B800000;
|
|
selp.f32 %f1183, %f1182, %f262, %p131;
|
|
selp.f32 %f1184, 0fC3170000, 0fC2FE0000, %p131;
|
|
mov.b32 %r358, %f1183;
|
|
and.b32 %r359, %r358, 8388607;
|
|
or.b32 %r360, %r359, 1065353216;
|
|
mov.b32 %f1185, %r360;
|
|
shr.u32 %r361, %r358, 23;
|
|
cvt.rn.f32.u32 %f1186, %r361;
|
|
add.f32 %f1187, %f1184, %f1186;
|
|
setp.gt.f32 %p132, %f1185, 0f3FB504F3;
|
|
mul.f32 %f1188, %f1185, 0f3F000000;
|
|
add.f32 %f1189, %f1187, 0f3F800000;
|
|
selp.f32 %f1190, %f1189, %f1187, %p132;
|
|
selp.f32 %f1191, %f1188, %f1185, %p132;
|
|
add.f32 %f1192, %f1191, 0fBF800000;
|
|
add.f32 %f1193, %f1191, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1194, %f1193;
|
|
add.f32 %f1195, %f1192, %f1192;
|
|
mul.f32 %f1196, %f1195, %f1194;
|
|
mul.f32 %f1197, %f1196, %f1196;
|
|
mov.f32 %f1198, 0f3C4CAF63;
|
|
mov.f32 %f1199, 0f3B18F0FE;
|
|
fma.rn.f32 %f1200, %f1199, %f1197, %f1198;
|
|
mov.f32 %f1201, 0f3DAAAABD;
|
|
fma.rn.f32 %f1202, %f1200, %f1197, %f1201;
|
|
mul.rn.f32 %f1203, %f1202, %f1197;
|
|
mul.rn.f32 %f1204, %f1203, %f1196;
|
|
sub.f32 %f1205, %f1192, %f1196;
|
|
add.f32 %f1206, %f1205, %f1205;
|
|
neg.f32 %f1207, %f1196;
|
|
fma.rn.f32 %f1208, %f1207, %f1192, %f1206;
|
|
mul.rn.f32 %f1209, %f1194, %f1208;
|
|
add.f32 %f1210, %f1204, %f1196;
|
|
sub.f32 %f1211, %f1196, %f1210;
|
|
add.f32 %f1212, %f1204, %f1211;
|
|
add.f32 %f1213, %f1209, %f1212;
|
|
add.f32 %f1214, %f1210, %f1213;
|
|
sub.f32 %f1215, %f1210, %f1214;
|
|
add.f32 %f1216, %f1213, %f1215;
|
|
mov.f32 %f1217, 0f3F317200;
|
|
mul.rn.f32 %f1218, %f1190, %f1217;
|
|
mov.f32 %f1219, 0f35BFBE8E;
|
|
mul.rn.f32 %f1220, %f1190, %f1219;
|
|
add.f32 %f1221, %f1218, %f1214;
|
|
sub.f32 %f1222, %f1218, %f1221;
|
|
add.f32 %f1223, %f1214, %f1222;
|
|
add.f32 %f1224, %f1216, %f1223;
|
|
add.f32 %f1225, %f1220, %f1224;
|
|
add.f32 %f1226, %f1221, %f1225;
|
|
sub.f32 %f1227, %f1221, %f1226;
|
|
add.f32 %f1228, %f1225, %f1227;
|
|
mov.f32 %f1229, 0f3ED55555;
|
|
mul.rn.f32 %f1230, %f1229, %f1226;
|
|
neg.f32 %f1231, %f1230;
|
|
fma.rn.f32 %f1232, %f1229, %f1226, %f1231;
|
|
fma.rn.f32 %f1233, %f1229, %f1228, %f1232;
|
|
mov.f32 %f1234, 0f00000000;
|
|
fma.rn.f32 %f1235, %f1234, %f1226, %f1233;
|
|
add.rn.f32 %f1236, %f1230, %f1235;
|
|
neg.f32 %f1237, %f1236;
|
|
add.rn.f32 %f1238, %f1230, %f1237;
|
|
add.rn.f32 %f1239, %f1238, %f1235;
|
|
mov.b32 %r362, %f1236;
|
|
setp.eq.s32 %p133, %r362, 1118925336;
|
|
add.s32 %r363, %r362, -1;
|
|
mov.b32 %f1240, %r363;
|
|
add.f32 %f1241, %f1239, 0f37000000;
|
|
selp.f32 %f263, %f1241, %f1239, %p133;
|
|
selp.f32 %f1242, %f1240, %f1236, %p133;
|
|
mov.f32 %f1243, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1244, %f1242, %f1243;
|
|
cvt.rzi.f32.f32 %f1245, %f1244;
|
|
abs.f32 %f1246, %f1245;
|
|
setp.gt.f32 %p134, %f1246, 0f42FC0000;
|
|
mov.b32 %r364, %f1245;
|
|
and.b32 %r365, %r364, -2147483648;
|
|
or.b32 %r366, %r365, 1123811328;
|
|
mov.b32 %f1247, %r366;
|
|
selp.f32 %f1248, %f1247, %f1245, %p134;
|
|
mov.f32 %f1249, 0fBF317218;
|
|
fma.rn.f32 %f1250, %f1248, %f1249, %f1242;
|
|
mov.f32 %f1251, 0f3102E308;
|
|
fma.rn.f32 %f1252, %f1248, %f1251, %f1250;
|
|
mul.f32 %f1253, %f1252, 0f3FB8AA3B;
|
|
add.f32 %f1254, %f1248, 0f4B40007F;
|
|
mov.b32 %r367, %f1254;
|
|
shl.b32 %r368, %r367, 23;
|
|
mov.b32 %f1255, %r368;
|
|
ex2.approx.ftz.f32 %f1256, %f1253;
|
|
mul.f32 %f264, %f1256, %f1255;
|
|
setp.eq.f32 %p135, %f264, 0f7F800000;
|
|
mov.f32 %f1583, 0f7F800000;
|
|
@%p135 bra $L__BB0_110;
|
|
|
|
fma.rn.f32 %f1583, %f264, %f263, %f264;
|
|
|
|
$L__BB0_110:
|
|
setp.lt.f32 %p136, %f248, 0f00000000;
|
|
and.pred %p8, %p136, %p123;
|
|
setp.eq.f32 %p138, %f248, 0f00000000;
|
|
@%p138 bra $L__BB0_114;
|
|
bra.uni $L__BB0_111;
|
|
|
|
$L__BB0_114:
|
|
add.f32 %f1261, %f248, %f248;
|
|
selp.f32 %f1585, %f1261, 0f00000000, %p123;
|
|
bra.uni $L__BB0_115;
|
|
|
|
$L__BB0_111:
|
|
mov.b32 %r369, %f1583;
|
|
xor.b32 %r370, %r369, -2147483648;
|
|
mov.b32 %f1257, %r370;
|
|
selp.f32 %f1585, %f1257, %f1583, %p8;
|
|
setp.geu.f32 %p139, %f248, 0f00000000;
|
|
@%p139 bra $L__BB0_115;
|
|
|
|
mov.f32 %f1258, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1259, %f1258;
|
|
setp.eq.f32 %p140, %f1259, 0f3ED55555;
|
|
@%p140 bra $L__BB0_115;
|
|
|
|
mov.f32 %f1585, 0f7FFFFFFF;
|
|
|
|
$L__BB0_115:
|
|
add.f32 %f1262, %f262, 0f3ED55555;
|
|
mov.b32 %r371, %f1262;
|
|
setp.lt.s32 %p142, %r371, 2139095040;
|
|
@%p142 bra $L__BB0_120;
|
|
|
|
setp.gtu.f32 %p143, %f262, 0f7F800000;
|
|
@%p143 bra $L__BB0_119;
|
|
bra.uni $L__BB0_117;
|
|
|
|
$L__BB0_119:
|
|
add.f32 %f1585, %f248, 0f3ED55555;
|
|
bra.uni $L__BB0_120;
|
|
|
|
$L__BB0_117:
|
|
setp.neu.f32 %p144, %f262, 0f7F800000;
|
|
@%p144 bra $L__BB0_120;
|
|
|
|
selp.f32 %f1585, 0fFF800000, 0f7F800000, %p8;
|
|
|
|
$L__BB0_120:
|
|
abs.f32 %f273, %f249;
|
|
setp.lt.f32 %p145, %f273, 0f00800000;
|
|
mul.f32 %f1264, %f273, 0f4B800000;
|
|
selp.f32 %f1265, %f1264, %f273, %p145;
|
|
selp.f32 %f1266, 0fC3170000, 0fC2FE0000, %p145;
|
|
mov.b32 %r372, %f1265;
|
|
and.b32 %r373, %r372, 8388607;
|
|
or.b32 %r374, %r373, 1065353216;
|
|
mov.b32 %f1267, %r374;
|
|
shr.u32 %r375, %r372, 23;
|
|
cvt.rn.f32.u32 %f1268, %r375;
|
|
add.f32 %f1269, %f1266, %f1268;
|
|
setp.gt.f32 %p146, %f1267, 0f3FB504F3;
|
|
mul.f32 %f1270, %f1267, 0f3F000000;
|
|
add.f32 %f1271, %f1269, 0f3F800000;
|
|
selp.f32 %f1272, %f1271, %f1269, %p146;
|
|
selp.f32 %f1273, %f1270, %f1267, %p146;
|
|
add.f32 %f1274, %f1273, 0fBF800000;
|
|
add.f32 %f1275, %f1273, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1276, %f1275;
|
|
add.f32 %f1277, %f1274, %f1274;
|
|
mul.f32 %f1278, %f1277, %f1276;
|
|
mul.f32 %f1279, %f1278, %f1278;
|
|
mov.f32 %f1280, 0f3C4CAF63;
|
|
mov.f32 %f1281, 0f3B18F0FE;
|
|
fma.rn.f32 %f1282, %f1281, %f1279, %f1280;
|
|
mov.f32 %f1283, 0f3DAAAABD;
|
|
fma.rn.f32 %f1284, %f1282, %f1279, %f1283;
|
|
mul.rn.f32 %f1285, %f1284, %f1279;
|
|
mul.rn.f32 %f1286, %f1285, %f1278;
|
|
sub.f32 %f1287, %f1274, %f1278;
|
|
add.f32 %f1288, %f1287, %f1287;
|
|
neg.f32 %f1289, %f1278;
|
|
fma.rn.f32 %f1290, %f1289, %f1274, %f1288;
|
|
mul.rn.f32 %f1291, %f1276, %f1290;
|
|
add.f32 %f1292, %f1286, %f1278;
|
|
sub.f32 %f1293, %f1278, %f1292;
|
|
add.f32 %f1294, %f1286, %f1293;
|
|
add.f32 %f1295, %f1291, %f1294;
|
|
add.f32 %f1296, %f1292, %f1295;
|
|
sub.f32 %f1297, %f1292, %f1296;
|
|
add.f32 %f1298, %f1295, %f1297;
|
|
mov.f32 %f1299, 0f3F317200;
|
|
mul.rn.f32 %f1300, %f1272, %f1299;
|
|
mov.f32 %f1301, 0f35BFBE8E;
|
|
mul.rn.f32 %f1302, %f1272, %f1301;
|
|
add.f32 %f1303, %f1300, %f1296;
|
|
sub.f32 %f1304, %f1300, %f1303;
|
|
add.f32 %f1305, %f1296, %f1304;
|
|
add.f32 %f1306, %f1298, %f1305;
|
|
add.f32 %f1307, %f1302, %f1306;
|
|
add.f32 %f1308, %f1303, %f1307;
|
|
sub.f32 %f1309, %f1303, %f1308;
|
|
add.f32 %f1310, %f1307, %f1309;
|
|
mov.f32 %f1311, 0f3ED55555;
|
|
mul.rn.f32 %f1312, %f1311, %f1308;
|
|
neg.f32 %f1313, %f1312;
|
|
fma.rn.f32 %f1314, %f1311, %f1308, %f1313;
|
|
fma.rn.f32 %f1315, %f1311, %f1310, %f1314;
|
|
mov.f32 %f1316, 0f00000000;
|
|
fma.rn.f32 %f1317, %f1316, %f1308, %f1315;
|
|
add.rn.f32 %f1318, %f1312, %f1317;
|
|
neg.f32 %f1319, %f1318;
|
|
add.rn.f32 %f1320, %f1312, %f1319;
|
|
add.rn.f32 %f1321, %f1320, %f1317;
|
|
mov.b32 %r376, %f1318;
|
|
setp.eq.s32 %p147, %r376, 1118925336;
|
|
add.s32 %r377, %r376, -1;
|
|
mov.b32 %f1322, %r377;
|
|
add.f32 %f1323, %f1321, 0f37000000;
|
|
selp.f32 %f274, %f1323, %f1321, %p147;
|
|
selp.f32 %f1324, %f1322, %f1318, %p147;
|
|
mov.f32 %f1325, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1326, %f1324, %f1325;
|
|
cvt.rzi.f32.f32 %f1327, %f1326;
|
|
abs.f32 %f1328, %f1327;
|
|
setp.gt.f32 %p148, %f1328, 0f42FC0000;
|
|
mov.b32 %r378, %f1327;
|
|
and.b32 %r379, %r378, -2147483648;
|
|
or.b32 %r380, %r379, 1123811328;
|
|
mov.b32 %f1329, %r380;
|
|
selp.f32 %f1330, %f1329, %f1327, %p148;
|
|
mov.f32 %f1331, 0fBF317218;
|
|
fma.rn.f32 %f1332, %f1330, %f1331, %f1324;
|
|
mov.f32 %f1333, 0f3102E308;
|
|
fma.rn.f32 %f1334, %f1330, %f1333, %f1332;
|
|
mul.f32 %f1335, %f1334, 0f3FB8AA3B;
|
|
add.f32 %f1336, %f1330, 0f4B40007F;
|
|
mov.b32 %r381, %f1336;
|
|
shl.b32 %r382, %r381, 23;
|
|
mov.b32 %f1337, %r382;
|
|
ex2.approx.ftz.f32 %f1338, %f1335;
|
|
mul.f32 %f275, %f1338, %f1337;
|
|
setp.eq.f32 %p149, %f275, 0f7F800000;
|
|
mov.f32 %f1586, 0f7F800000;
|
|
@%p149 bra $L__BB0_122;
|
|
|
|
fma.rn.f32 %f1586, %f275, %f274, %f275;
|
|
|
|
$L__BB0_122:
|
|
setp.lt.f32 %p150, %f249, 0f00000000;
|
|
and.pred %p9, %p150, %p123;
|
|
setp.eq.f32 %p152, %f249, 0f00000000;
|
|
@%p152 bra $L__BB0_126;
|
|
bra.uni $L__BB0_123;
|
|
|
|
$L__BB0_126:
|
|
add.f32 %f1343, %f249, %f249;
|
|
selp.f32 %f1588, %f1343, 0f00000000, %p123;
|
|
bra.uni $L__BB0_127;
|
|
|
|
$L__BB0_123:
|
|
mov.b32 %r383, %f1586;
|
|
xor.b32 %r384, %r383, -2147483648;
|
|
mov.b32 %f1339, %r384;
|
|
selp.f32 %f1588, %f1339, %f1586, %p9;
|
|
setp.geu.f32 %p153, %f249, 0f00000000;
|
|
@%p153 bra $L__BB0_127;
|
|
|
|
mov.f32 %f1340, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1341, %f1340;
|
|
setp.eq.f32 %p154, %f1341, 0f3ED55555;
|
|
@%p154 bra $L__BB0_127;
|
|
|
|
mov.f32 %f1588, 0f7FFFFFFF;
|
|
|
|
$L__BB0_127:
|
|
add.f32 %f1344, %f273, 0f3ED55555;
|
|
mov.b32 %r385, %f1344;
|
|
setp.lt.s32 %p156, %r385, 2139095040;
|
|
@%p156 bra $L__BB0_132;
|
|
|
|
setp.gtu.f32 %p157, %f273, 0f7F800000;
|
|
@%p157 bra $L__BB0_131;
|
|
bra.uni $L__BB0_129;
|
|
|
|
$L__BB0_131:
|
|
add.f32 %f1588, %f249, 0f3ED55555;
|
|
bra.uni $L__BB0_132;
|
|
|
|
$L__BB0_129:
|
|
setp.neu.f32 %p158, %f273, 0f7F800000;
|
|
@%p158 bra $L__BB0_132;
|
|
|
|
selp.f32 %f1588, 0fFF800000, 0f7F800000, %p9;
|
|
|
|
$L__BB0_132:
|
|
fma.rn.f32 %f1345, %f1582, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p159, %f247, 0f3F800000;
|
|
mov.f32 %f1346, 0f3F800000;
|
|
selp.f32 %f1347, 0f3F7FFFFF, %f1345, %p159;
|
|
mul.f32 %f1348, %f247, 0f414EB852;
|
|
setp.lt.f32 %p160, %f247, 0f3B4D2E1C;
|
|
selp.f32 %f1349, %f1348, %f1347, %p160;
|
|
fma.rn.f32 %f1350, %f1585, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p161, %f248, 0f3F800000;
|
|
selp.f32 %f1351, 0f3F7FFFFF, %f1350, %p161;
|
|
mul.f32 %f1352, %f248, 0f414EB852;
|
|
setp.lt.f32 %p162, %f248, 0f3B4D2E1C;
|
|
selp.f32 %f1353, %f1352, %f1351, %p162;
|
|
fma.rn.f32 %f1354, %f1588, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p163, %f249, 0f3F800000;
|
|
selp.f32 %f1355, 0f3F7FFFFF, %f1354, %p163;
|
|
mul.f32 %f1356, %f249, 0f414EB852;
|
|
setp.lt.f32 %p164, %f249, 0f3B4D2E1C;
|
|
selp.f32 %f1357, %f1356, %f1355, %p164;
|
|
min.f32 %f1358, %f1349, %f1346;
|
|
mov.f32 %f1359, 0f00000000;
|
|
max.f32 %f1360, %f1359, %f1358;
|
|
mul.f32 %f1361, %f1360, 0f43800000;
|
|
cvt.rzi.u32.f32 %r386, %f1361;
|
|
min.u32 %r387, %r386, 255;
|
|
min.f32 %f1362, %f1353, %f1346;
|
|
max.f32 %f1363, %f1359, %f1362;
|
|
mul.f32 %f1364, %f1363, 0f43800000;
|
|
cvt.rzi.u32.f32 %r388, %f1364;
|
|
min.u32 %r389, %r388, 255;
|
|
min.f32 %f1365, %f1357, %f1346;
|
|
max.f32 %f1366, %f1359, %f1365;
|
|
mul.f32 %f1367, %f1366, 0f43800000;
|
|
cvt.rzi.u32.f32 %r390, %f1367;
|
|
min.u32 %r391, %r390, 255;
|
|
shl.b64 %rd37, %rd10, 2;
|
|
add.s64 %rd38, %rd9, %rd37;
|
|
cvt.u16.u32 %rs20, %r391;
|
|
cvt.u16.u32 %rs21, %r389;
|
|
cvt.u16.u32 %rs22, %r387;
|
|
mov.u16 %rs23, 255;
|
|
st.global.v4.u8 [%rd38], {%rs22, %rs21, %rs20, %rs23};
|
|
|
|
$L__BB0_133:
|
|
and.b32 %r392, %r427, 4;
|
|
setp.eq.s32 %p165, %r392, 0;
|
|
ld.const.u32 %r428, [params+108];
|
|
@%p165 bra $L__BB0_137;
|
|
|
|
setp.eq.s32 %p166, %r428, 0;
|
|
ld.const.u64 %rd39, [params+224];
|
|
cvta.to.global.u64 %rd40, %rd39;
|
|
ld.const.u32 %r393, [params+216];
|
|
mad.lo.s32 %r394, %r393, %r4, %r3;
|
|
mul.wide.u32 %rd41, %r394, 8;
|
|
add.s64 %rd11, %rd40, %rd41;
|
|
@%p166 bra $L__BB0_136;
|
|
|
|
ld.global.v4.u16 {%rs31, %rs32, %rs33, %rs34}, [%rd11];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1368, %rs31;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1369, %rs32;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1370, %rs33;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1371, %f1536, %f1368;
|
|
add.f32 %f1372, %f1537, %f1369;
|
|
add.f32 %f1373, %f1538, %f1370;
|
|
mov.f32 %f1374, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs29, %f1373;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs28, %f1372;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs27, %f1371;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs30, %f1374;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd11], {%rs27, %rs28, %rs29, %rs30};
|
|
bra.uni $L__BB0_137;
|
|
|
|
$L__BB0_136:
|
|
mov.f32 %f1378, 0f3F800000;
|
|
mov.u32 %r428, 0;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs38, %f1378;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs37, %f1538;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs36, %f1537;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs35, %f1536;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd11], {%rs35, %rs36, %rs37, %rs38};
|
|
|
|
$L__BB0_137:
|
|
mov.f32 %f1379, 0f34000000;
|
|
max.f32 %f1380, %f1539, %f1379;
|
|
div.rn.f32 %f1381, %f1542, %f1380;
|
|
max.f32 %f1382, %f1540, %f1379;
|
|
div.rn.f32 %f1383, %f1543, %f1382;
|
|
max.f32 %f1384, %f1541, %f1379;
|
|
div.rn.f32 %f1385, %f1544, %f1384;
|
|
fma.rn.f32 %f284, %f1381, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f285, %f1383, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f286, %f1385, 0f3F000000, 0f3F000000;
|
|
div.rn.f32 %f1386, %f1545, %f1380;
|
|
div.rn.f32 %f1387, %f1546, %f1382;
|
|
div.rn.f32 %f1388, %f1547, %f1384;
|
|
fma.rn.f32 %f287, %f1386, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f288, %f1387, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f289, %f1388, 0f3F000000, 0f3F000000;
|
|
div.rn.f32 %f1389, %f1548, %f1380;
|
|
div.rn.f32 %f1390, %f1549, %f1382;
|
|
div.rn.f32 %f1391, %f1550, %f1384;
|
|
fma.rn.f32 %f290, %f1389, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f291, %f1390, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f292, %f1391, 0f3F000000, 0f3F000000;
|
|
ld.const.u64 %rd42, [params+256];
|
|
cvta.to.global.u64 %rd43, %rd42;
|
|
ld.const.u32 %r396, [params+248];
|
|
mad.lo.s32 %r397, %r396, %r4, %r3;
|
|
mul.wide.u32 %rd44, %r397, 8;
|
|
add.s64 %rd12, %rd43, %rd44;
|
|
setp.eq.s32 %p167, %r428, 0;
|
|
@%p167 bra $L__BB0_139;
|
|
|
|
ld.global.v4.u16 {%rs46, %rs47, %rs48, %rs49}, [%rd12];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1392, %rs46;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1393, %rs47;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1394, %rs48;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1395, %f1539, %f1392;
|
|
add.f32 %f1396, %f1540, %f1393;
|
|
add.f32 %f1397, %f1541, %f1394;
|
|
mov.f32 %f1398, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs44, %f1397;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs43, %f1396;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs42, %f1395;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs45, %f1398;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd12], {%rs42, %rs43, %rs44, %rs45};
|
|
bra.uni $L__BB0_140;
|
|
|
|
$L__BB0_139:
|
|
mov.f32 %f1402, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs53, %f1402;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs52, %f1541;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs51, %f1540;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs50, %f1539;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd12], {%rs50, %rs51, %rs52, %rs53};
|
|
|
|
$L__BB0_140:
|
|
ld.const.u64 %rd45, [params+272];
|
|
cvta.to.global.u64 %rd46, %rd45;
|
|
ld.const.u32 %r398, [params+264];
|
|
mad.lo.s32 %r399, %r398, %r4, %r3;
|
|
mul.wide.u32 %rd47, %r399, 8;
|
|
add.s64 %rd13, %rd46, %rd47;
|
|
@%p167 bra $L__BB0_142;
|
|
|
|
ld.global.v4.u16 {%rs61, %rs62, %rs63, %rs64}, [%rd13];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1403, %rs61;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1404, %rs62;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1405, %rs63;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1406, %f284, %f1403;
|
|
add.f32 %f1407, %f285, %f1404;
|
|
add.f32 %f1408, %f286, %f1405;
|
|
mov.f32 %f1409, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs59, %f1408;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs58, %f1407;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs57, %f1406;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs60, %f1409;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd13], {%rs57, %rs58, %rs59, %rs60};
|
|
bra.uni $L__BB0_143;
|
|
|
|
$L__BB0_142:
|
|
mov.f32 %f1413, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs68, %f1413;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs67, %f286;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs66, %f285;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs65, %f284;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd13], {%rs65, %rs66, %rs67, %rs68};
|
|
|
|
$L__BB0_143:
|
|
ld.const.u64 %rd48, [params+288];
|
|
cvta.to.global.u64 %rd49, %rd48;
|
|
ld.const.u32 %r400, [params+280];
|
|
mad.lo.s32 %r401, %r400, %r4, %r3;
|
|
mul.wide.u32 %rd50, %r401, 8;
|
|
add.s64 %rd14, %rd49, %rd50;
|
|
@%p167 bra $L__BB0_145;
|
|
|
|
ld.global.v4.u16 {%rs76, %rs77, %rs78, %rs79}, [%rd14];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1414, %rs76;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1415, %rs77;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1416, %rs78;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1417, %f287, %f1414;
|
|
add.f32 %f1418, %f288, %f1415;
|
|
add.f32 %f1419, %f289, %f1416;
|
|
mov.f32 %f1420, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs74, %f1419;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs73, %f1418;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs72, %f1417;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs75, %f1420;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd14], {%rs72, %rs73, %rs74, %rs75};
|
|
bra.uni $L__BB0_146;
|
|
|
|
$L__BB0_145:
|
|
mov.f32 %f1424, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs83, %f1424;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs82, %f289;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs81, %f288;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs80, %f287;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd14], {%rs80, %rs81, %rs82, %rs83};
|
|
|
|
$L__BB0_146:
|
|
ld.const.u64 %rd51, [params+304];
|
|
cvta.to.global.u64 %rd52, %rd51;
|
|
ld.const.u32 %r402, [params+296];
|
|
mad.lo.s32 %r403, %r402, %r4, %r3;
|
|
mul.wide.u32 %rd53, %r403, 8;
|
|
add.s64 %rd15, %rd52, %rd53;
|
|
@%p167 bra $L__BB0_148;
|
|
|
|
ld.global.v4.u16 {%rs91, %rs92, %rs93, %rs94}, [%rd15];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1425, %rs91;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1426, %rs92;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1427, %rs93;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1428, %f290, %f1425;
|
|
add.f32 %f1429, %f291, %f1426;
|
|
add.f32 %f1430, %f292, %f1427;
|
|
mov.f32 %f1431, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs89, %f1430;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs88, %f1429;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs87, %f1428;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs90, %f1431;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd15], {%rs87, %rs88, %rs89, %rs90};
|
|
bra.uni $L__BB0_169;
|
|
|
|
$L__BB0_148:
|
|
mov.f32 %f1435, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs98, %f1435;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs97, %f292;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs96, %f291;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs95, %f290;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd15], {%rs95, %rs96, %rs97, %rs98};
|
|
|
|
$L__BB0_169:
|
|
ret;
|
|
|
|
}
|
|
|