2480 lines
71 KiB
Plaintext
2480 lines
71 KiB
Plaintext
//
|
|
// Generated by NVIDIA NVVM Compiler
|
|
//
|
|
// Compiler Build ID: CL-23083092
|
|
// Cuda compilation tools, release 9.1, V9.1.85
|
|
// Based on LLVM 3.4svn
|
|
//
|
|
|
|
.version 6.1
|
|
.target sm_30
|
|
.address_size 64
|
|
|
|
// .globl _Z6oxMainv
|
|
.global .align 8 .b8 pixelID[8];
|
|
.global .align 8 .b8 resolution[8];
|
|
.global .align 4 .b8 normal[12];
|
|
.global .align 4 .b8 camPos[12];
|
|
.global .align 4 .b8 root[4];
|
|
.global .align 4 .u32 imageEnabled;
|
|
.global .texref lightmap;
|
|
.global .align 16 .b8 tileInfo[16];
|
|
.global .align 4 .u32 additive;
|
|
.global .align 1 .b8 image[1];
|
|
.global .align 1 .b8 image_HDR[1];
|
|
.global .align 1 .b8 image_HDR2[1];
|
|
.global .align 1 .b8 image_Mask[1];
|
|
.global .align 1 .b8 image_RNM0[1];
|
|
.global .align 1 .b8 image_RNM1[1];
|
|
.global .align 1 .b8 image_RNM2[1];
|
|
.global .align 1 .b8 image_RNM3[1];
|
|
.global .align 1 .b8 uvpos[1];
|
|
.global .align 1 .b8 uvnormal[1];
|
|
.global .align 4 .u32 ignoreNormal;
|
|
.global .align 1 .b8 localLights[1];
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
|
|
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
|
|
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
|
|
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
|
|
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
|
|
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
|
|
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
|
|
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
|
|
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
|
|
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
|
|
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
|
|
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
|
|
.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
|
|
.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
|
|
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
|
|
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
|
|
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
|
|
.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
|
|
.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
|
|
|
|
.visible .entry _Z6oxMainv(
|
|
|
|
)
|
|
{
|
|
.local .align 4 .b8 __local_depot0[12];
|
|
.reg .b64 %SP;
|
|
.reg .b64 %SPL;
|
|
.reg .pred %p<138>;
|
|
.reg .b16 %rs<162>;
|
|
.reg .f32 %f<1483>;
|
|
.reg .b32 %r<251>;
|
|
.reg .b64 %rd<272>;
|
|
|
|
|
|
mov.u64 %rd271, __local_depot0;
|
|
cvta.local.u64 %SP, %rd271;
|
|
ld.global.v2.u32 {%r30, %r31}, [pixelID];
|
|
cvt.u64.u32 %rd10, %r30;
|
|
cvt.u64.u32 %rd11, %r31;
|
|
mov.u64 %rd14, uvnormal;
|
|
cvta.global.u64 %rd9, %rd14;
|
|
mov.u32 %r28, 2;
|
|
mov.u32 %r29, 4;
|
|
mov.u64 %rd13, 0;
|
|
// inline asm
|
|
call (%rd8), _rt_buffer_get_64, (%rd9, %r28, %r29, %rd10, %rd11, %rd13, %rd13);
|
|
// inline asm
|
|
ld.u32 %r1, [%rd8];
|
|
shr.u32 %r34, %r1, 16;
|
|
cvt.u16.u32 %rs1, %r34;
|
|
and.b16 %rs9, %rs1, 255;
|
|
cvt.u16.u32 %rs10, %r1;
|
|
or.b16 %rs11, %rs10, %rs9;
|
|
setp.eq.s16 %p8, %rs11, 0;
|
|
mov.f32 %f1375, 0f00000000;
|
|
mov.f32 %f1376, %f1375;
|
|
mov.f32 %f1377, %f1375;
|
|
@%p8 bra BB0_2;
|
|
|
|
ld.u8 %rs12, [%rd8+1];
|
|
and.b16 %rs14, %rs10, 255;
|
|
cvt.rn.f32.u16 %f297, %rs14;
|
|
div.rn.f32 %f298, %f297, 0f437F0000;
|
|
fma.rn.f32 %f299, %f298, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f300, %rs12;
|
|
div.rn.f32 %f301, %f300, 0f437F0000;
|
|
fma.rn.f32 %f302, %f301, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f303, %rs9;
|
|
div.rn.f32 %f304, %f303, 0f437F0000;
|
|
fma.rn.f32 %f305, %f304, 0f40000000, 0fBF800000;
|
|
mul.f32 %f306, %f302, %f302;
|
|
fma.rn.f32 %f307, %f299, %f299, %f306;
|
|
fma.rn.f32 %f308, %f305, %f305, %f307;
|
|
sqrt.rn.f32 %f309, %f308;
|
|
rcp.rn.f32 %f310, %f309;
|
|
mul.f32 %f1375, %f299, %f310;
|
|
mul.f32 %f1376, %f302, %f310;
|
|
mul.f32 %f1377, %f305, %f310;
|
|
|
|
BB0_2:
|
|
ld.global.v2.u32 {%r35, %r36}, [pixelID];
|
|
ld.global.v2.u32 {%r38, %r39}, [tileInfo];
|
|
add.s32 %r2, %r35, %r38;
|
|
add.s32 %r3, %r36, %r39;
|
|
setp.eq.f32 %p9, %f1376, 0f00000000;
|
|
setp.eq.f32 %p10, %f1375, 0f00000000;
|
|
and.pred %p11, %p10, %p9;
|
|
setp.eq.f32 %p12, %f1377, 0f00000000;
|
|
and.pred %p13, %p11, %p12;
|
|
@%p13 bra BB0_111;
|
|
bra.uni BB0_3;
|
|
|
|
BB0_111:
|
|
ld.global.u32 %r250, [imageEnabled];
|
|
and.b32 %r198, %r250, 1;
|
|
setp.eq.b32 %p129, %r198, 1;
|
|
@!%p129 bra BB0_113;
|
|
bra.uni BB0_112;
|
|
|
|
BB0_112:
|
|
cvt.u64.u32 %rd159, %r2;
|
|
cvt.u64.u32 %rd160, %r3;
|
|
mov.u64 %rd163, image;
|
|
cvta.global.u64 %rd158, %rd163;
|
|
// inline asm
|
|
call (%rd157), _rt_buffer_get_64, (%rd158, %r28, %r29, %rd159, %rd160, %rd13, %rd13);
|
|
// inline asm
|
|
mov.u16 %rs93, 0;
|
|
st.v4.u8 [%rd157], {%rs93, %rs93, %rs93, %rs93};
|
|
ld.global.u32 %r250, [imageEnabled];
|
|
|
|
BB0_113:
|
|
and.b32 %r201, %r250, 8;
|
|
setp.eq.s32 %p130, %r201, 0;
|
|
@%p130 bra BB0_115;
|
|
|
|
cvt.u64.u32 %rd167, %r3;
|
|
cvt.u64.u32 %rd166, %r2;
|
|
mov.u64 %rd170, image_Mask;
|
|
cvta.global.u64 %rd165, %rd170;
|
|
// inline asm
|
|
call (%rd164), _rt_buffer_get_64, (%rd165, %r28, %r28, %rd166, %rd167, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f1336, 0f00000000;
|
|
cvt.rzi.u32.f32 %r204, %f1336;
|
|
cvt.u16.u32 %rs94, %r204;
|
|
mov.u16 %rs95, 0;
|
|
st.v2.u8 [%rd164], {%rs94, %rs95};
|
|
ld.global.u32 %r250, [imageEnabled];
|
|
|
|
BB0_115:
|
|
cvt.u64.u32 %rd6, %r2;
|
|
cvt.u64.u32 %rd7, %r3;
|
|
and.b32 %r205, %r250, 4;
|
|
setp.eq.s32 %p131, %r205, 0;
|
|
@%p131 bra BB0_119;
|
|
|
|
ld.global.u32 %r206, [additive];
|
|
setp.eq.s32 %p132, %r206, 0;
|
|
@%p132 bra BB0_118;
|
|
|
|
mov.u64 %rd183, image_HDR;
|
|
cvta.global.u64 %rd172, %rd183;
|
|
mov.u32 %r210, 8;
|
|
// inline asm
|
|
call (%rd171), _rt_buffer_get_64, (%rd172, %r28, %r210, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs102, %rs103, %rs104, %rs105}, [%rd171];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1337, %rs102;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1338, %rs103;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1339, %rs104;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd177), _rt_buffer_get_64, (%rd172, %r28, %r210, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1340, %f1337, 0f00000000;
|
|
add.f32 %f1341, %f1338, 0f00000000;
|
|
add.f32 %f1342, %f1339, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs101, %f1342;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs100, %f1341;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs99, %f1340;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs106, 0;
|
|
st.v4.u16 [%rd177], {%rs99, %rs100, %rs101, %rs106};
|
|
bra.uni BB0_119;
|
|
|
|
BB0_3:
|
|
ld.global.v2.u32 {%r47, %r48}, [pixelID];
|
|
cvt.u64.u32 %rd17, %r47;
|
|
cvt.u64.u32 %rd18, %r48;
|
|
mov.u64 %rd26, uvpos;
|
|
cvta.global.u64 %rd16, %rd26;
|
|
mov.u32 %r44, 12;
|
|
// inline asm
|
|
call (%rd15), _rt_buffer_get_64, (%rd16, %r28, %r44, %rd17, %rd18, %rd13, %rd13);
|
|
// inline asm
|
|
ld.f32 %f9, [%rd15+8];
|
|
ld.f32 %f8, [%rd15+4];
|
|
ld.f32 %f7, [%rd15];
|
|
mul.f32 %f327, %f7, 0f3456BF95;
|
|
mul.f32 %f328, %f8, 0f3456BF95;
|
|
mul.f32 %f329, %f9, 0f3456BF95;
|
|
abs.f32 %f330, %f1375;
|
|
div.rn.f32 %f331, %f327, %f330;
|
|
abs.f32 %f332, %f1376;
|
|
div.rn.f32 %f333, %f328, %f332;
|
|
abs.f32 %f334, %f1377;
|
|
div.rn.f32 %f335, %f329, %f334;
|
|
abs.f32 %f336, %f331;
|
|
abs.f32 %f337, %f333;
|
|
abs.f32 %f338, %f335;
|
|
mov.f32 %f339, 0f38D1B717;
|
|
max.f32 %f340, %f336, %f339;
|
|
max.f32 %f341, %f337, %f339;
|
|
max.f32 %f342, %f338, %f339;
|
|
fma.rn.f32 %f10, %f1375, %f340, %f7;
|
|
fma.rn.f32 %f11, %f1376, %f341, %f8;
|
|
fma.rn.f32 %f12, %f1377, %f342, %f9;
|
|
mov.u64 %rd27, localLights;
|
|
cvta.global.u64 %rd25, %rd27;
|
|
mov.u32 %r45, 1;
|
|
mov.u32 %r46, 96;
|
|
// inline asm
|
|
call (%rd21, %rd22, %rd23, %rd24), _rt_buffer_get_size_64, (%rd25, %r45, %r46);
|
|
// inline asm
|
|
cvt.u32.u64 %r4, %rd21;
|
|
setp.eq.s32 %p14, %r4, 0;
|
|
mov.f32 %f1378, 0f00000000;
|
|
mov.f32 %f1379, %f1378;
|
|
mov.f32 %f1380, %f1378;
|
|
mov.f32 %f1381, %f1378;
|
|
mov.f32 %f1382, %f1378;
|
|
mov.f32 %f1383, %f1378;
|
|
mov.f32 %f1384, %f1378;
|
|
mov.f32 %f1385, %f1378;
|
|
mov.f32 %f1386, %f1378;
|
|
mov.f32 %f1387, %f1378;
|
|
mov.f32 %f1388, %f1378;
|
|
mov.f32 %f1389, %f1378;
|
|
mov.f32 %f1390, %f1378;
|
|
mov.f32 %f1391, %f1378;
|
|
mov.f32 %f1392, %f1378;
|
|
mov.f32 %f1393, %f1378;
|
|
@%p14 bra BB0_47;
|
|
|
|
mov.f32 %f359, 0f40000000;
|
|
cvt.rzi.f32.f32 %f360, %f359;
|
|
add.f32 %f361, %f360, %f360;
|
|
mov.f32 %f362, 0f40800000;
|
|
sub.f32 %f363, %f362, %f361;
|
|
abs.f32 %f13, %f363;
|
|
mul.f32 %f14, %f10, 0f3456BF95;
|
|
mul.f32 %f15, %f11, 0f3456BF95;
|
|
mul.f32 %f16, %f12, 0f3456BF95;
|
|
mov.f32 %f358, 0f00000000;
|
|
mov.u32 %r242, 0;
|
|
abs.f32 %f560, %f14;
|
|
abs.f32 %f561, %f15;
|
|
max.f32 %f562, %f560, %f561;
|
|
abs.f32 %f563, %f16;
|
|
max.f32 %f564, %f562, %f563;
|
|
mov.f32 %f1378, %f358;
|
|
mov.f32 %f1379, %f358;
|
|
mov.f32 %f1380, %f358;
|
|
mov.f32 %f1381, %f358;
|
|
mov.f32 %f1382, %f358;
|
|
mov.f32 %f1383, %f358;
|
|
mov.f32 %f1384, %f358;
|
|
mov.f32 %f1385, %f358;
|
|
mov.f32 %f1386, %f358;
|
|
mov.f32 %f1387, %f358;
|
|
mov.f32 %f1388, %f358;
|
|
mov.f32 %f1389, %f358;
|
|
mov.f32 %f1390, %f358;
|
|
mov.f32 %f1391, %f358;
|
|
mov.f32 %f1392, %f358;
|
|
mov.f32 %f1393, %f358;
|
|
|
|
BB0_5:
|
|
cvt.u64.u32 %rd30, %r242;
|
|
// inline asm
|
|
call (%rd28), _rt_buffer_get_64, (%rd25, %r45, %r46, %rd30, %rd13, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.f32 {%f366, %f367, %f368, %f369}, [%rd28+80];
|
|
ld.v4.f32 {%f370, %f371, %f372, %f373}, [%rd28+64];
|
|
ld.v4.f32 {%f374, %f375, %f376, %f377}, [%rd28+48];
|
|
ld.v4.f32 {%f378, %f1402, %f1403, %f381}, [%rd28+32];
|
|
ld.v4.f32 {%f382, %f383, %f384, %f385}, [%rd28+16];
|
|
ld.v4.f32 {%f386, %f387, %f388, %f389}, [%rd28];
|
|
mov.b32 %r6, %f369;
|
|
sub.f32 %f57, %f387, %f7;
|
|
sub.f32 %f59, %f388, %f8;
|
|
sub.f32 %f61, %f389, %f9;
|
|
mul.f32 %f391, %f59, %f59;
|
|
fma.rn.f32 %f392, %f57, %f57, %f391;
|
|
fma.rn.f32 %f393, %f61, %f61, %f392;
|
|
sqrt.rn.f32 %f62, %f393;
|
|
rcp.rn.f32 %f394, %f62;
|
|
mul.f32 %f63, %f57, %f394;
|
|
mul.f32 %f64, %f59, %f394;
|
|
mul.f32 %f65, %f61, %f394;
|
|
mul.f32 %f66, %f62, %f385;
|
|
abs.f32 %f67, %f66;
|
|
setp.lt.f32 %p15, %f67, 0f00800000;
|
|
mul.f32 %f395, %f67, 0f4B800000;
|
|
selp.f32 %f396, 0fC3170000, 0fC2FE0000, %p15;
|
|
selp.f32 %f397, %f395, %f67, %p15;
|
|
mov.b32 %r54, %f397;
|
|
and.b32 %r55, %r54, 8388607;
|
|
or.b32 %r56, %r55, 1065353216;
|
|
mov.b32 %f398, %r56;
|
|
shr.u32 %r57, %r54, 23;
|
|
cvt.rn.f32.u32 %f399, %r57;
|
|
add.f32 %f400, %f396, %f399;
|
|
setp.gt.f32 %p16, %f398, 0f3FB504F3;
|
|
mul.f32 %f401, %f398, 0f3F000000;
|
|
add.f32 %f402, %f400, 0f3F800000;
|
|
selp.f32 %f403, %f401, %f398, %p16;
|
|
selp.f32 %f404, %f402, %f400, %p16;
|
|
add.f32 %f405, %f403, 0fBF800000;
|
|
add.f32 %f365, %f403, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f364,%f365;
|
|
// inline asm
|
|
add.f32 %f406, %f405, %f405;
|
|
mul.f32 %f407, %f364, %f406;
|
|
mul.f32 %f408, %f407, %f407;
|
|
mov.f32 %f409, 0f3C4CAF63;
|
|
mov.f32 %f410, 0f3B18F0FE;
|
|
fma.rn.f32 %f411, %f410, %f408, %f409;
|
|
mov.f32 %f412, 0f3DAAAABD;
|
|
fma.rn.f32 %f413, %f411, %f408, %f412;
|
|
mul.rn.f32 %f414, %f413, %f408;
|
|
mul.rn.f32 %f415, %f414, %f407;
|
|
sub.f32 %f416, %f405, %f407;
|
|
neg.f32 %f417, %f407;
|
|
add.f32 %f418, %f416, %f416;
|
|
fma.rn.f32 %f419, %f417, %f405, %f418;
|
|
mul.rn.f32 %f420, %f364, %f419;
|
|
add.f32 %f421, %f415, %f407;
|
|
sub.f32 %f422, %f407, %f421;
|
|
add.f32 %f423, %f415, %f422;
|
|
add.f32 %f424, %f420, %f423;
|
|
add.f32 %f425, %f421, %f424;
|
|
sub.f32 %f426, %f421, %f425;
|
|
add.f32 %f427, %f424, %f426;
|
|
mov.f32 %f428, 0f3F317200;
|
|
mul.rn.f32 %f429, %f404, %f428;
|
|
mov.f32 %f430, 0f35BFBE8E;
|
|
mul.rn.f32 %f431, %f404, %f430;
|
|
add.f32 %f432, %f429, %f425;
|
|
sub.f32 %f433, %f429, %f432;
|
|
add.f32 %f434, %f425, %f433;
|
|
add.f32 %f435, %f427, %f434;
|
|
add.f32 %f436, %f431, %f435;
|
|
add.f32 %f437, %f432, %f436;
|
|
sub.f32 %f438, %f432, %f437;
|
|
add.f32 %f439, %f436, %f438;
|
|
mul.rn.f32 %f68, %f362, %f437;
|
|
neg.f32 %f441, %f68;
|
|
fma.rn.f32 %f442, %f362, %f437, %f441;
|
|
fma.rn.f32 %f443, %f362, %f439, %f442;
|
|
fma.rn.f32 %f69, %f358, %f437, %f443;
|
|
add.rn.f32 %f70, %f68, %f69;
|
|
mov.b32 %r58, %f70;
|
|
setp.eq.s32 %p1, %r58, 1118925336;
|
|
add.s32 %r59, %r58, -1;
|
|
mov.b32 %f445, %r59;
|
|
selp.f32 %f446, %f445, %f70, %p1;
|
|
mul.f32 %f447, %f446, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f448, %f447;
|
|
mov.f32 %f449, 0fBF317200;
|
|
fma.rn.f32 %f450, %f448, %f449, %f446;
|
|
mov.f32 %f451, 0fB5BFBE8E;
|
|
fma.rn.f32 %f452, %f448, %f451, %f450;
|
|
mul.f32 %f453, %f452, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f454, %f453;
|
|
add.f32 %f455, %f448, 0f00000000;
|
|
ex2.approx.f32 %f456, %f455;
|
|
mul.f32 %f457, %f454, %f456;
|
|
setp.lt.f32 %p17, %f446, 0fC2D20000;
|
|
selp.f32 %f458, 0f00000000, %f457, %p17;
|
|
setp.gt.f32 %p18, %f446, 0f42D20000;
|
|
selp.f32 %f1394, 0f7F800000, %f458, %p18;
|
|
setp.eq.f32 %p19, %f1394, 0f7F800000;
|
|
@%p19 bra BB0_7;
|
|
|
|
neg.f32 %f459, %f70;
|
|
add.rn.f32 %f460, %f68, %f459;
|
|
add.rn.f32 %f461, %f460, %f69;
|
|
add.f32 %f462, %f461, 0f37000000;
|
|
selp.f32 %f463, %f462, %f461, %p1;
|
|
fma.rn.f32 %f1394, %f1394, %f463, %f1394;
|
|
|
|
BB0_7:
|
|
setp.lt.f32 %p20, %f66, 0f00000000;
|
|
setp.eq.f32 %p21, %f13, 0f3F800000;
|
|
and.pred %p2, %p20, %p21;
|
|
mov.b32 %r60, %f1394;
|
|
xor.b32 %r61, %r60, -2147483648;
|
|
mov.b32 %f464, %r61;
|
|
selp.f32 %f1396, %f464, %f1394, %p2;
|
|
setp.eq.f32 %p22, %f66, 0f00000000;
|
|
@%p22 bra BB0_10;
|
|
bra.uni BB0_8;
|
|
|
|
BB0_10:
|
|
add.f32 %f467, %f66, %f66;
|
|
selp.f32 %f1396, %f467, 0f00000000, %p21;
|
|
bra.uni BB0_11;
|
|
|
|
BB0_8:
|
|
setp.geu.f32 %p23, %f66, 0f00000000;
|
|
@%p23 bra BB0_11;
|
|
|
|
cvt.rzi.f32.f32 %f466, %f362;
|
|
setp.neu.f32 %p24, %f466, 0f40800000;
|
|
selp.f32 %f1396, 0f7FFFFFFF, %f1396, %p24;
|
|
|
|
BB0_11:
|
|
add.f32 %f468, %f67, 0f40800000;
|
|
mov.b32 %r62, %f468;
|
|
setp.lt.s32 %p26, %r62, 2139095040;
|
|
@%p26 bra BB0_16;
|
|
|
|
setp.gtu.f32 %p27, %f67, 0f7F800000;
|
|
@%p27 bra BB0_15;
|
|
bra.uni BB0_13;
|
|
|
|
BB0_15:
|
|
add.f32 %f1396, %f66, 0f40800000;
|
|
bra.uni BB0_16;
|
|
|
|
BB0_13:
|
|
setp.neu.f32 %p28, %f67, 0f7F800000;
|
|
@%p28 bra BB0_16;
|
|
|
|
selp.f32 %f1396, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
BB0_16:
|
|
mul.f32 %f469, %f62, %f383;
|
|
mov.f32 %f1435, 0f3F800000;
|
|
sub.f32 %f471, %f1435, %f1396;
|
|
setp.eq.f32 %p29, %f66, 0f3F800000;
|
|
selp.f32 %f472, 0f00000000, %f471, %p29;
|
|
cvt.sat.f32.f32 %f473, %f472;
|
|
fma.rn.f32 %f474, %f469, %f469, %f384;
|
|
div.rn.f32 %f96, %f473, %f474;
|
|
mul.f32 %f475, %f1376, %f64;
|
|
fma.rn.f32 %f476, %f1375, %f63, %f475;
|
|
fma.rn.f32 %f97, %f1377, %f65, %f476;
|
|
setp.eq.f32 %p30, %f386, 0f3F800000;
|
|
@%p30 bra BB0_23;
|
|
bra.uni BB0_17;
|
|
|
|
BB0_23:
|
|
setp.leu.f32 %p34, %f381, 0f00000000;
|
|
@%p34 bra BB0_19;
|
|
|
|
setp.geu.f32 %p35, %f377, 0f00000000;
|
|
@%p35 bra BB0_25;
|
|
|
|
sub.f32 %f1374, %f389, %f9;
|
|
sub.f32 %f1373, %f387, %f7;
|
|
sub.f32 %f1372, %f388, %f8;
|
|
mul.f32 %f499, %f367, %f1372;
|
|
fma.rn.f32 %f500, %f366, %f1373, %f499;
|
|
fma.rn.f32 %f501, %f368, %f1374, %f500;
|
|
rcp.rn.f32 %f502, %f501;
|
|
mul.f32 %f1397, %f1373, %f502;
|
|
mul.f32 %f1398, %f1372, %f502;
|
|
mul.f32 %f1399, %f1374, %f502;
|
|
neg.f32 %f377, %f377;
|
|
bra.uni BB0_27;
|
|
|
|
BB0_17:
|
|
setp.eq.f32 %p31, %f386, 0f40000000;
|
|
@%p31 bra BB0_21;
|
|
bra.uni BB0_18;
|
|
|
|
BB0_21:
|
|
setp.leu.f32 %p33, %f381, 0f00000000;
|
|
@%p33 bra BB0_19;
|
|
|
|
mul.f32 %f493, %f375, %f64;
|
|
fma.rn.f32 %f494, %f374, %f63, %f493;
|
|
mul.f32 %f495, %f371, %f64;
|
|
fma.rn.f32 %f496, %f370, %f63, %f495;
|
|
mul.f32 %f497, %f367, %f64;
|
|
fma.rn.f32 %f498, %f366, %f63, %f497;
|
|
fma.rn.f32 %f490, %f376, %f65, %f494;
|
|
fma.rn.f32 %f491, %f372, %f65, %f496;
|
|
fma.rn.f32 %f492, %f368, %f65, %f498;
|
|
cvt.rzi.s32.f32 %r63, %f381;
|
|
mov.u32 %r64, 6;
|
|
mov.u32 %r65, 0;
|
|
// inline asm
|
|
call (%f486, %f487, %f488, %f489), _rt_texture_get_base_id, (%r63, %r64, %f490, %f491, %f492, %r65);
|
|
// inline asm
|
|
mul.f32 %f1401, %f378, %f486;
|
|
mul.f32 %f1402, %f1402, %f487;
|
|
mul.f32 %f1403, %f1403, %f488;
|
|
bra.uni BB0_28;
|
|
|
|
BB0_18:
|
|
setp.neu.f32 %p32, %f386, 0f40800000;
|
|
@%p32 bra BB0_19;
|
|
|
|
mul.f32 %f477, %f366, %f63;
|
|
mul.f32 %f478, %f367, %f64;
|
|
neg.f32 %f479, %f478;
|
|
sub.f32 %f480, %f479, %f477;
|
|
mul.f32 %f481, %f368, %f65;
|
|
sub.f32 %f482, %f480, %f481;
|
|
fma.rn.f32 %f483, %f381, %f482, %f377;
|
|
cvt.sat.f32.f32 %f484, %f483;
|
|
mul.f32 %f485, %f484, %f484;
|
|
mul.f32 %f1404, %f96, %f485;
|
|
mov.f32 %f1401, %f378;
|
|
bra.uni BB0_29;
|
|
|
|
BB0_19:
|
|
mov.f32 %f1401, %f378;
|
|
bra.uni BB0_28;
|
|
|
|
BB0_25:
|
|
mov.f32 %f1397, %f63;
|
|
mov.f32 %f1398, %f64;
|
|
mov.f32 %f1399, %f65;
|
|
|
|
BB0_27:
|
|
mul.f32 %f511, %f368, %f65;
|
|
mul.f32 %f512, %f367, %f64;
|
|
neg.f32 %f513, %f512;
|
|
mul.f32 %f514, %f366, %f63;
|
|
sub.f32 %f515, %f513, %f514;
|
|
sub.f32 %f516, %f515, %f511;
|
|
setp.gt.f32 %p36, %f516, 0f00000000;
|
|
selp.f32 %f517, 0f3F800000, 0f00000000, %p36;
|
|
mul.f32 %f518, %f375, %f1398;
|
|
fma.rn.f32 %f519, %f374, %f1397, %f518;
|
|
mul.f32 %f520, %f371, %f1398;
|
|
fma.rn.f32 %f521, %f370, %f1397, %f520;
|
|
fma.rn.f32 %f522, %f376, %f1399, %f519;
|
|
fma.rn.f32 %f523, %f372, %f1399, %f521;
|
|
fma.rn.f32 %f524, %f377, %f522, 0f3F000000;
|
|
mov.f32 %f525, 0f3F800000;
|
|
sub.f32 %f507, %f525, %f524;
|
|
fma.rn.f32 %f508, %f377, %f523, 0f3F000000;
|
|
cvt.rzi.s32.f32 %r66, %f381;
|
|
mov.f32 %f510, 0f00000000;
|
|
// inline asm
|
|
call (%f503, %f504, %f505, %f506), _rt_texture_get_f_id, (%r66, %r28, %f507, %f508, %f510, %f510);
|
|
// inline asm
|
|
mul.f32 %f526, %f517, %f503;
|
|
mul.f32 %f527, %f517, %f504;
|
|
mul.f32 %f528, %f517, %f505;
|
|
mul.f32 %f1401, %f378, %f526;
|
|
mul.f32 %f1402, %f1402, %f527;
|
|
mul.f32 %f1403, %f1403, %f528;
|
|
|
|
BB0_28:
|
|
mov.f32 %f1404, %f96;
|
|
|
|
BB0_29:
|
|
max.f32 %f544, %f1401, %f1402;
|
|
max.f32 %f545, %f544, %f1403;
|
|
mul.f32 %f546, %f1404, %f545;
|
|
setp.lt.f32 %p38, %f546, 0f3727C5AC;
|
|
mov.pred %p137, -1;
|
|
mov.f32 %f132, 0f00000000;
|
|
mov.f32 %f1406, %f132;
|
|
mov.f32 %f1407, %f132;
|
|
mov.f32 %f1408, %f132;
|
|
mov.f32 %f1409, %f132;
|
|
mov.f32 %f1410, %f132;
|
|
mov.f32 %f1411, %f132;
|
|
mov.f32 %f1412, %f132;
|
|
mov.f32 %f1413, %f132;
|
|
mov.f32 %f1414, %f132;
|
|
mov.f32 %f1415, %f132;
|
|
mov.f32 %f1416, %f132;
|
|
mov.f32 %f1417, %f132;
|
|
mov.f32 %f1418, %f132;
|
|
mov.f32 %f1419, %f132;
|
|
@%p38 bra BB0_31;
|
|
|
|
ld.global.u32 %r68, [ignoreNormal];
|
|
setp.eq.s32 %p40, %r68, 0;
|
|
selp.f32 %f547, %f97, 0f3F800000, %p40;
|
|
cvt.sat.f32.f32 %f548, %f547;
|
|
mul.f32 %f549, %f1404, %f548;
|
|
mul.f32 %f132, %f1401, %f549;
|
|
mul.f32 %f1406, %f1402, %f549;
|
|
mul.f32 %f1407, %f1403, %f549;
|
|
mul.f32 %f550, %f1404, 0f3E800000;
|
|
mul.f32 %f1408, %f1401, %f550;
|
|
mul.f32 %f1409, %f1402, %f550;
|
|
mul.f32 %f1410, %f1403, %f550;
|
|
mul.f32 %f1411, %f63, %f1408;
|
|
mul.f32 %f1412, %f63, %f1409;
|
|
mul.f32 %f1413, %f63, %f1410;
|
|
mul.f32 %f1414, %f64, %f1408;
|
|
mul.f32 %f1415, %f64, %f1409;
|
|
mul.f32 %f1416, %f64, %f1410;
|
|
mul.f32 %f1417, %f65, %f1408;
|
|
mul.f32 %f1418, %f65, %f1409;
|
|
mul.f32 %f1419, %f65, %f1410;
|
|
mov.pred %p137, 0;
|
|
|
|
BB0_31:
|
|
@%p137 bra BB0_46;
|
|
|
|
setp.eq.s32 %p41, %r6, 0;
|
|
mov.u16 %rs161, 0;
|
|
mov.f32 %f1436, %f1435;
|
|
mov.f32 %f1437, %f1435;
|
|
@%p41 bra BB0_43;
|
|
|
|
abs.s32 %r8, %r6;
|
|
mov.f32 %f1432, 0f00000000;
|
|
setp.lt.s32 %p42, %r8, 1;
|
|
mov.f32 %f1433, %f1432;
|
|
mov.f32 %f1434, %f1432;
|
|
@%p42 bra BB0_42;
|
|
|
|
max.f32 %f148, %f564, %f339;
|
|
and.b32 %r9, %r8, 3;
|
|
setp.eq.s32 %p43, %r9, 0;
|
|
add.u64 %rd35, %SP, 0;
|
|
cvta.to.local.u64 %rd2, %rd35;
|
|
mov.f32 %f1432, 0f00000000;
|
|
mov.u32 %r246, 0;
|
|
mov.f32 %f1433, %f1432;
|
|
mov.f32 %f1434, %f1432;
|
|
@%p43 bra BB0_40;
|
|
|
|
setp.eq.s32 %p44, %r9, 1;
|
|
mov.f32 %f1423, 0f00000000;
|
|
mov.u32 %r244, 0;
|
|
mov.f32 %f1424, %f1423;
|
|
mov.f32 %f1425, %f1423;
|
|
@%p44 bra BB0_39;
|
|
|
|
setp.eq.s32 %p45, %r9, 2;
|
|
mov.f32 %f1420, 0f00000000;
|
|
mov.u32 %r243, 0;
|
|
mov.f32 %f1421, %f1420;
|
|
mov.f32 %f1422, %f1420;
|
|
@%p45 bra BB0_38;
|
|
|
|
sub.f32 %f580, %f387, %f382;
|
|
sub.f32 %f581, %f388, %f382;
|
|
sub.f32 %f582, %f389, %f382;
|
|
sub.f32 %f583, %f580, %f7;
|
|
sub.f32 %f584, %f581, %f8;
|
|
sub.f32 %f585, %f582, %f9;
|
|
mul.f32 %f586, %f584, %f584;
|
|
fma.rn.f32 %f587, %f583, %f583, %f586;
|
|
fma.rn.f32 %f588, %f585, %f585, %f587;
|
|
sqrt.rn.f32 %f579, %f588;
|
|
rcp.rn.f32 %f589, %f579;
|
|
mul.f32 %f575, %f589, %f583;
|
|
mul.f32 %f576, %f589, %f584;
|
|
mul.f32 %f577, %f589, %f585;
|
|
ld.global.u32 %r76, [imageEnabled];
|
|
and.b32 %r77, %r76, 32;
|
|
setp.eq.s32 %p46, %r77, 0;
|
|
selp.f32 %f590, 0f3F800000, 0f41200000, %p46;
|
|
mul.f32 %f578, %f590, %f148;
|
|
mov.u32 %r78, 1065353216;
|
|
st.local.u32 [%rd2+8], %r78;
|
|
st.local.u32 [%rd2+4], %r78;
|
|
st.local.u32 [%rd2], %r78;
|
|
ld.global.u32 %r72, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r72, %f10, %f11, %f12, %f575, %f576, %f577, %r45, %f578, %f579, %rd35, %r44);
|
|
// inline asm
|
|
ld.local.f32 %f591, [%rd2];
|
|
add.f32 %f1422, %f591, 0f00000000;
|
|
ld.local.f32 %f592, [%rd2+4];
|
|
add.f32 %f1421, %f592, 0f00000000;
|
|
ld.local.f32 %f593, [%rd2+8];
|
|
add.f32 %f1420, %f593, 0f00000000;
|
|
mov.u32 %r243, %r45;
|
|
|
|
BB0_38:
|
|
cvt.rn.f32.s32 %f602, %r243;
|
|
mul.f32 %f603, %f602, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f604, %f603;
|
|
sub.f32 %f605, %f603, %f604;
|
|
mul.f32 %f606, %f602, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f607, %f606;
|
|
sub.f32 %f608, %f606, %f607;
|
|
mul.f32 %f609, %f602, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f610, %f609;
|
|
sub.f32 %f611, %f609, %f610;
|
|
add.f32 %f612, %f608, 0f4199851F;
|
|
add.f32 %f613, %f611, 0f4199851F;
|
|
add.f32 %f614, %f605, 0f4199851F;
|
|
mul.f32 %f615, %f608, %f613;
|
|
fma.rn.f32 %f616, %f605, %f612, %f615;
|
|
fma.rn.f32 %f617, %f614, %f611, %f616;
|
|
add.f32 %f618, %f605, %f617;
|
|
add.f32 %f619, %f608, %f617;
|
|
add.f32 %f620, %f611, %f617;
|
|
add.f32 %f621, %f618, %f619;
|
|
mul.f32 %f622, %f620, %f621;
|
|
cvt.rmi.f32.f32 %f623, %f622;
|
|
sub.f32 %f624, %f622, %f623;
|
|
add.f32 %f625, %f618, %f620;
|
|
mul.f32 %f626, %f619, %f625;
|
|
cvt.rmi.f32.f32 %f627, %f626;
|
|
sub.f32 %f628, %f626, %f627;
|
|
add.f32 %f629, %f619, %f620;
|
|
mul.f32 %f630, %f618, %f629;
|
|
cvt.rmi.f32.f32 %f631, %f630;
|
|
sub.f32 %f632, %f630, %f631;
|
|
fma.rn.f32 %f633, %f624, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f634, %f628, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f635, %f632, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f636, %f382, %f633, %f387;
|
|
fma.rn.f32 %f637, %f382, %f634, %f388;
|
|
fma.rn.f32 %f638, %f382, %f635, %f389;
|
|
sub.f32 %f639, %f636, %f7;
|
|
sub.f32 %f640, %f637, %f8;
|
|
sub.f32 %f641, %f638, %f9;
|
|
mul.f32 %f642, %f640, %f640;
|
|
fma.rn.f32 %f643, %f639, %f639, %f642;
|
|
fma.rn.f32 %f644, %f641, %f641, %f643;
|
|
sqrt.rn.f32 %f601, %f644;
|
|
rcp.rn.f32 %f645, %f601;
|
|
mul.f32 %f597, %f645, %f639;
|
|
mul.f32 %f598, %f645, %f640;
|
|
mul.f32 %f599, %f645, %f641;
|
|
ld.global.u32 %r82, [imageEnabled];
|
|
and.b32 %r83, %r82, 32;
|
|
setp.eq.s32 %p47, %r83, 0;
|
|
selp.f32 %f646, 0f3F800000, 0f41200000, %p47;
|
|
mul.f32 %f600, %f646, %f148;
|
|
mov.u32 %r84, 1065353216;
|
|
st.local.u32 [%rd2+8], %r84;
|
|
st.local.u32 [%rd2+4], %r84;
|
|
st.local.u32 [%rd2], %r84;
|
|
ld.global.u32 %r79, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r79, %f10, %f11, %f12, %f597, %f598, %f599, %r45, %f600, %f601, %rd35, %r44);
|
|
// inline asm
|
|
ld.local.f32 %f647, [%rd2];
|
|
add.f32 %f1425, %f1422, %f647;
|
|
ld.local.f32 %f648, [%rd2+4];
|
|
add.f32 %f1424, %f1421, %f648;
|
|
ld.local.f32 %f649, [%rd2+8];
|
|
add.f32 %f1423, %f1420, %f649;
|
|
add.s32 %r244, %r243, 1;
|
|
|
|
BB0_39:
|
|
cvt.rn.f32.s32 %f658, %r244;
|
|
mul.f32 %f659, %f658, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f660, %f659;
|
|
sub.f32 %f661, %f659, %f660;
|
|
mul.f32 %f662, %f658, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f663, %f662;
|
|
sub.f32 %f664, %f662, %f663;
|
|
mul.f32 %f665, %f658, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f666, %f665;
|
|
sub.f32 %f667, %f665, %f666;
|
|
add.f32 %f668, %f664, 0f4199851F;
|
|
add.f32 %f669, %f667, 0f4199851F;
|
|
add.f32 %f670, %f661, 0f4199851F;
|
|
mul.f32 %f671, %f664, %f669;
|
|
fma.rn.f32 %f672, %f661, %f668, %f671;
|
|
fma.rn.f32 %f673, %f670, %f667, %f672;
|
|
add.f32 %f674, %f661, %f673;
|
|
add.f32 %f675, %f664, %f673;
|
|
add.f32 %f676, %f667, %f673;
|
|
add.f32 %f677, %f674, %f675;
|
|
mul.f32 %f678, %f676, %f677;
|
|
cvt.rmi.f32.f32 %f679, %f678;
|
|
sub.f32 %f680, %f678, %f679;
|
|
add.f32 %f681, %f674, %f676;
|
|
mul.f32 %f682, %f675, %f681;
|
|
cvt.rmi.f32.f32 %f683, %f682;
|
|
sub.f32 %f684, %f682, %f683;
|
|
add.f32 %f685, %f675, %f676;
|
|
mul.f32 %f686, %f674, %f685;
|
|
cvt.rmi.f32.f32 %f687, %f686;
|
|
sub.f32 %f688, %f686, %f687;
|
|
fma.rn.f32 %f689, %f680, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f690, %f684, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f691, %f688, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f692, %f382, %f689, %f387;
|
|
fma.rn.f32 %f693, %f382, %f690, %f388;
|
|
fma.rn.f32 %f694, %f382, %f691, %f389;
|
|
sub.f32 %f695, %f692, %f7;
|
|
sub.f32 %f696, %f693, %f8;
|
|
sub.f32 %f697, %f694, %f9;
|
|
mul.f32 %f698, %f696, %f696;
|
|
fma.rn.f32 %f699, %f695, %f695, %f698;
|
|
fma.rn.f32 %f700, %f697, %f697, %f699;
|
|
sqrt.rn.f32 %f657, %f700;
|
|
rcp.rn.f32 %f701, %f657;
|
|
mul.f32 %f653, %f701, %f695;
|
|
mul.f32 %f654, %f701, %f696;
|
|
mul.f32 %f655, %f701, %f697;
|
|
ld.global.u32 %r88, [imageEnabled];
|
|
and.b32 %r89, %r88, 32;
|
|
setp.eq.s32 %p48, %r89, 0;
|
|
selp.f32 %f702, 0f3F800000, 0f41200000, %p48;
|
|
mul.f32 %f656, %f702, %f148;
|
|
mov.u32 %r90, 1065353216;
|
|
st.local.u32 [%rd2+8], %r90;
|
|
st.local.u32 [%rd2+4], %r90;
|
|
st.local.u32 [%rd2], %r90;
|
|
ld.global.u32 %r85, [root];
|
|
mov.u32 %r86, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r85, %f10, %f11, %f12, %f653, %f654, %f655, %r86, %f656, %f657, %rd35, %r44);
|
|
// inline asm
|
|
ld.local.f32 %f703, [%rd2];
|
|
add.f32 %f1434, %f1425, %f703;
|
|
ld.local.f32 %f704, [%rd2+4];
|
|
add.f32 %f1433, %f1424, %f704;
|
|
ld.local.f32 %f705, [%rd2+8];
|
|
add.f32 %f1432, %f1423, %f705;
|
|
add.s32 %r246, %r244, 1;
|
|
|
|
BB0_40:
|
|
setp.lt.u32 %p49, %r8, 4;
|
|
@%p49 bra BB0_42;
|
|
|
|
BB0_41:
|
|
cvt.rn.f32.s32 %f738, %r246;
|
|
mul.f32 %f739, %f738, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f740, %f739;
|
|
sub.f32 %f741, %f739, %f740;
|
|
mul.f32 %f742, %f738, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f743, %f742;
|
|
sub.f32 %f744, %f742, %f743;
|
|
mul.f32 %f745, %f738, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f746, %f745;
|
|
sub.f32 %f747, %f745, %f746;
|
|
add.f32 %f748, %f744, 0f4199851F;
|
|
add.f32 %f749, %f747, 0f4199851F;
|
|
add.f32 %f750, %f741, 0f4199851F;
|
|
mul.f32 %f751, %f744, %f749;
|
|
fma.rn.f32 %f752, %f741, %f748, %f751;
|
|
fma.rn.f32 %f753, %f750, %f747, %f752;
|
|
add.f32 %f754, %f741, %f753;
|
|
add.f32 %f755, %f744, %f753;
|
|
add.f32 %f756, %f747, %f753;
|
|
add.f32 %f757, %f754, %f755;
|
|
mul.f32 %f758, %f756, %f757;
|
|
cvt.rmi.f32.f32 %f759, %f758;
|
|
sub.f32 %f760, %f758, %f759;
|
|
add.f32 %f761, %f754, %f756;
|
|
mul.f32 %f762, %f755, %f761;
|
|
cvt.rmi.f32.f32 %f763, %f762;
|
|
sub.f32 %f764, %f762, %f763;
|
|
add.f32 %f765, %f755, %f756;
|
|
mul.f32 %f766, %f754, %f765;
|
|
cvt.rmi.f32.f32 %f767, %f766;
|
|
sub.f32 %f768, %f766, %f767;
|
|
fma.rn.f32 %f769, %f760, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f770, %f764, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f771, %f768, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f772, %f382, %f769, %f387;
|
|
fma.rn.f32 %f773, %f382, %f770, %f388;
|
|
fma.rn.f32 %f774, %f382, %f771, %f389;
|
|
sub.f32 %f775, %f772, %f7;
|
|
sub.f32 %f776, %f773, %f8;
|
|
sub.f32 %f777, %f774, %f9;
|
|
mul.f32 %f778, %f776, %f776;
|
|
fma.rn.f32 %f779, %f775, %f775, %f778;
|
|
fma.rn.f32 %f780, %f777, %f777, %f779;
|
|
sqrt.rn.f32 %f713, %f780;
|
|
rcp.rn.f32 %f781, %f713;
|
|
mul.f32 %f709, %f781, %f775;
|
|
mul.f32 %f710, %f781, %f776;
|
|
mul.f32 %f711, %f781, %f777;
|
|
ld.global.u32 %r103, [imageEnabled];
|
|
and.b32 %r104, %r103, 32;
|
|
setp.eq.s32 %p50, %r104, 0;
|
|
selp.f32 %f782, 0f3F800000, 0f41200000, %p50;
|
|
mul.f32 %f712, %f782, %f148;
|
|
mov.u32 %r105, 1065353216;
|
|
st.local.u32 [%rd2+8], %r105;
|
|
st.local.u32 [%rd2+4], %r105;
|
|
st.local.u32 [%rd2], %r105;
|
|
ld.global.u32 %r91, [root];
|
|
mov.u32 %r101, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r91, %f10, %f11, %f12, %f709, %f710, %f711, %r101, %f712, %f713, %rd35, %r44);
|
|
// inline asm
|
|
ld.local.f32 %f783, [%rd2];
|
|
add.f32 %f784, %f1434, %f783;
|
|
ld.local.f32 %f785, [%rd2+4];
|
|
add.f32 %f786, %f1433, %f785;
|
|
ld.local.f32 %f787, [%rd2+8];
|
|
add.f32 %f788, %f1432, %f787;
|
|
add.s32 %r106, %r246, 1;
|
|
cvt.rn.f32.s32 %f789, %r106;
|
|
mul.f32 %f790, %f789, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f791, %f790;
|
|
sub.f32 %f792, %f790, %f791;
|
|
mul.f32 %f793, %f789, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f794, %f793;
|
|
sub.f32 %f795, %f793, %f794;
|
|
mul.f32 %f796, %f789, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f797, %f796;
|
|
sub.f32 %f798, %f796, %f797;
|
|
add.f32 %f799, %f795, 0f4199851F;
|
|
add.f32 %f800, %f798, 0f4199851F;
|
|
add.f32 %f801, %f792, 0f4199851F;
|
|
mul.f32 %f802, %f795, %f800;
|
|
fma.rn.f32 %f803, %f792, %f799, %f802;
|
|
fma.rn.f32 %f804, %f801, %f798, %f803;
|
|
add.f32 %f805, %f792, %f804;
|
|
add.f32 %f806, %f795, %f804;
|
|
add.f32 %f807, %f798, %f804;
|
|
add.f32 %f808, %f805, %f806;
|
|
mul.f32 %f809, %f807, %f808;
|
|
cvt.rmi.f32.f32 %f810, %f809;
|
|
sub.f32 %f811, %f809, %f810;
|
|
add.f32 %f812, %f805, %f807;
|
|
mul.f32 %f813, %f806, %f812;
|
|
cvt.rmi.f32.f32 %f814, %f813;
|
|
sub.f32 %f815, %f813, %f814;
|
|
add.f32 %f816, %f806, %f807;
|
|
mul.f32 %f817, %f805, %f816;
|
|
cvt.rmi.f32.f32 %f818, %f817;
|
|
sub.f32 %f819, %f817, %f818;
|
|
fma.rn.f32 %f820, %f811, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f821, %f815, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f822, %f819, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f823, %f382, %f820, %f387;
|
|
fma.rn.f32 %f824, %f382, %f821, %f388;
|
|
fma.rn.f32 %f825, %f382, %f822, %f389;
|
|
sub.f32 %f826, %f823, %f7;
|
|
sub.f32 %f827, %f824, %f8;
|
|
sub.f32 %f828, %f825, %f9;
|
|
mul.f32 %f829, %f827, %f827;
|
|
fma.rn.f32 %f830, %f826, %f826, %f829;
|
|
fma.rn.f32 %f831, %f828, %f828, %f830;
|
|
sqrt.rn.f32 %f721, %f831;
|
|
rcp.rn.f32 %f832, %f721;
|
|
mul.f32 %f717, %f832, %f826;
|
|
mul.f32 %f718, %f832, %f827;
|
|
mul.f32 %f719, %f832, %f828;
|
|
ld.global.u32 %r107, [imageEnabled];
|
|
and.b32 %r108, %r107, 32;
|
|
setp.eq.s32 %p51, %r108, 0;
|
|
selp.f32 %f833, 0f3F800000, 0f41200000, %p51;
|
|
mul.f32 %f720, %f833, %f148;
|
|
st.local.u32 [%rd2+8], %r105;
|
|
st.local.u32 [%rd2+4], %r105;
|
|
st.local.u32 [%rd2], %r105;
|
|
ld.global.u32 %r94, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r94, %f10, %f11, %f12, %f717, %f718, %f719, %r101, %f720, %f721, %rd35, %r44);
|
|
// inline asm
|
|
ld.local.f32 %f834, [%rd2];
|
|
add.f32 %f835, %f784, %f834;
|
|
ld.local.f32 %f836, [%rd2+4];
|
|
add.f32 %f837, %f786, %f836;
|
|
ld.local.f32 %f838, [%rd2+8];
|
|
add.f32 %f839, %f788, %f838;
|
|
add.s32 %r109, %r246, 2;
|
|
cvt.rn.f32.s32 %f840, %r109;
|
|
mul.f32 %f841, %f840, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f842, %f841;
|
|
sub.f32 %f843, %f841, %f842;
|
|
mul.f32 %f844, %f840, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f845, %f844;
|
|
sub.f32 %f846, %f844, %f845;
|
|
mul.f32 %f847, %f840, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f848, %f847;
|
|
sub.f32 %f849, %f847, %f848;
|
|
add.f32 %f850, %f846, 0f4199851F;
|
|
add.f32 %f851, %f849, 0f4199851F;
|
|
add.f32 %f852, %f843, 0f4199851F;
|
|
mul.f32 %f853, %f846, %f851;
|
|
fma.rn.f32 %f854, %f843, %f850, %f853;
|
|
fma.rn.f32 %f855, %f852, %f849, %f854;
|
|
add.f32 %f856, %f843, %f855;
|
|
add.f32 %f857, %f846, %f855;
|
|
add.f32 %f858, %f849, %f855;
|
|
add.f32 %f859, %f856, %f857;
|
|
mul.f32 %f860, %f858, %f859;
|
|
cvt.rmi.f32.f32 %f861, %f860;
|
|
sub.f32 %f862, %f860, %f861;
|
|
add.f32 %f863, %f856, %f858;
|
|
mul.f32 %f864, %f857, %f863;
|
|
cvt.rmi.f32.f32 %f865, %f864;
|
|
sub.f32 %f866, %f864, %f865;
|
|
add.f32 %f867, %f857, %f858;
|
|
mul.f32 %f868, %f856, %f867;
|
|
cvt.rmi.f32.f32 %f869, %f868;
|
|
sub.f32 %f870, %f868, %f869;
|
|
fma.rn.f32 %f871, %f862, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f872, %f866, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f873, %f870, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f874, %f382, %f871, %f387;
|
|
fma.rn.f32 %f875, %f382, %f872, %f388;
|
|
fma.rn.f32 %f876, %f382, %f873, %f389;
|
|
sub.f32 %f877, %f874, %f7;
|
|
sub.f32 %f878, %f875, %f8;
|
|
sub.f32 %f879, %f876, %f9;
|
|
mul.f32 %f880, %f878, %f878;
|
|
fma.rn.f32 %f881, %f877, %f877, %f880;
|
|
fma.rn.f32 %f882, %f879, %f879, %f881;
|
|
sqrt.rn.f32 %f729, %f882;
|
|
rcp.rn.f32 %f883, %f729;
|
|
mul.f32 %f725, %f883, %f877;
|
|
mul.f32 %f726, %f883, %f878;
|
|
mul.f32 %f727, %f883, %f879;
|
|
ld.global.u32 %r110, [imageEnabled];
|
|
and.b32 %r111, %r110, 32;
|
|
setp.eq.s32 %p52, %r111, 0;
|
|
selp.f32 %f884, 0f3F800000, 0f41200000, %p52;
|
|
mul.f32 %f728, %f884, %f148;
|
|
st.local.u32 [%rd2+8], %r105;
|
|
st.local.u32 [%rd2+4], %r105;
|
|
st.local.u32 [%rd2], %r105;
|
|
ld.global.u32 %r97, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r97, %f10, %f11, %f12, %f725, %f726, %f727, %r101, %f728, %f729, %rd35, %r44);
|
|
// inline asm
|
|
ld.local.f32 %f885, [%rd2];
|
|
add.f32 %f886, %f835, %f885;
|
|
ld.local.f32 %f887, [%rd2+4];
|
|
add.f32 %f888, %f837, %f887;
|
|
ld.local.f32 %f889, [%rd2+8];
|
|
add.f32 %f890, %f839, %f889;
|
|
add.s32 %r112, %r246, 3;
|
|
cvt.rn.f32.s32 %f891, %r112;
|
|
mul.f32 %f892, %f891, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f893, %f892;
|
|
sub.f32 %f894, %f892, %f893;
|
|
mul.f32 %f895, %f891, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f896, %f895;
|
|
sub.f32 %f897, %f895, %f896;
|
|
mul.f32 %f898, %f891, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f899, %f898;
|
|
sub.f32 %f900, %f898, %f899;
|
|
add.f32 %f901, %f897, 0f4199851F;
|
|
add.f32 %f902, %f900, 0f4199851F;
|
|
add.f32 %f903, %f894, 0f4199851F;
|
|
mul.f32 %f904, %f897, %f902;
|
|
fma.rn.f32 %f905, %f894, %f901, %f904;
|
|
fma.rn.f32 %f906, %f903, %f900, %f905;
|
|
add.f32 %f907, %f894, %f906;
|
|
add.f32 %f908, %f897, %f906;
|
|
add.f32 %f909, %f900, %f906;
|
|
add.f32 %f910, %f907, %f908;
|
|
mul.f32 %f911, %f909, %f910;
|
|
cvt.rmi.f32.f32 %f912, %f911;
|
|
sub.f32 %f913, %f911, %f912;
|
|
add.f32 %f914, %f907, %f909;
|
|
mul.f32 %f915, %f908, %f914;
|
|
cvt.rmi.f32.f32 %f916, %f915;
|
|
sub.f32 %f917, %f915, %f916;
|
|
add.f32 %f918, %f908, %f909;
|
|
mul.f32 %f919, %f907, %f918;
|
|
cvt.rmi.f32.f32 %f920, %f919;
|
|
sub.f32 %f921, %f919, %f920;
|
|
fma.rn.f32 %f922, %f913, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f923, %f917, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f924, %f921, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f925, %f382, %f922, %f387;
|
|
fma.rn.f32 %f926, %f382, %f923, %f388;
|
|
fma.rn.f32 %f927, %f382, %f924, %f389;
|
|
sub.f32 %f928, %f925, %f7;
|
|
sub.f32 %f929, %f926, %f8;
|
|
sub.f32 %f930, %f927, %f9;
|
|
mul.f32 %f931, %f929, %f929;
|
|
fma.rn.f32 %f932, %f928, %f928, %f931;
|
|
fma.rn.f32 %f933, %f930, %f930, %f932;
|
|
sqrt.rn.f32 %f737, %f933;
|
|
rcp.rn.f32 %f934, %f737;
|
|
mul.f32 %f733, %f934, %f928;
|
|
mul.f32 %f734, %f934, %f929;
|
|
mul.f32 %f735, %f934, %f930;
|
|
ld.global.u32 %r113, [imageEnabled];
|
|
and.b32 %r114, %r113, 32;
|
|
setp.eq.s32 %p53, %r114, 0;
|
|
selp.f32 %f935, 0f3F800000, 0f41200000, %p53;
|
|
mul.f32 %f736, %f935, %f148;
|
|
st.local.u32 [%rd2+8], %r105;
|
|
st.local.u32 [%rd2+4], %r105;
|
|
st.local.u32 [%rd2], %r105;
|
|
ld.global.u32 %r100, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r100, %f10, %f11, %f12, %f733, %f734, %f735, %r101, %f736, %f737, %rd35, %r44);
|
|
// inline asm
|
|
ld.local.f32 %f936, [%rd2];
|
|
add.f32 %f1434, %f886, %f936;
|
|
ld.local.f32 %f937, [%rd2+4];
|
|
add.f32 %f1433, %f888, %f937;
|
|
ld.local.f32 %f938, [%rd2+8];
|
|
add.f32 %f1432, %f890, %f938;
|
|
add.s32 %r246, %r246, 4;
|
|
setp.lt.s32 %p54, %r246, %r8;
|
|
@%p54 bra BB0_41;
|
|
|
|
BB0_42:
|
|
cvt.rn.f32.s32 %f939, %r8;
|
|
rcp.rn.f32 %f940, %f939;
|
|
mul.f32 %f1435, %f1434, %f940;
|
|
mul.f32 %f1436, %f1433, %f940;
|
|
mul.f32 %f1437, %f1432, %f940;
|
|
shr.u32 %r115, %r6, 31;
|
|
cvt.u16.u32 %rs161, %r115;
|
|
|
|
BB0_43:
|
|
fma.rn.f32 %f1393, %f132, %f1435, %f1393;
|
|
fma.rn.f32 %f1392, %f1406, %f1436, %f1392;
|
|
fma.rn.f32 %f1391, %f1407, %f1437, %f1391;
|
|
fma.rn.f32 %f1390, %f1408, %f1435, %f1390;
|
|
fma.rn.f32 %f1389, %f1409, %f1436, %f1389;
|
|
fma.rn.f32 %f1388, %f1410, %f1437, %f1388;
|
|
fma.rn.f32 %f1387, %f1411, %f1435, %f1387;
|
|
fma.rn.f32 %f1386, %f1412, %f1436, %f1386;
|
|
fma.rn.f32 %f1385, %f1413, %f1437, %f1385;
|
|
fma.rn.f32 %f1384, %f1414, %f1435, %f1384;
|
|
fma.rn.f32 %f1383, %f1415, %f1436, %f1383;
|
|
fma.rn.f32 %f1382, %f1416, %f1437, %f1382;
|
|
fma.rn.f32 %f1381, %f1417, %f1435, %f1381;
|
|
fma.rn.f32 %f1380, %f1418, %f1436, %f1380;
|
|
fma.rn.f32 %f1379, %f1419, %f1437, %f1379;
|
|
setp.eq.s16 %p55, %rs161, 0;
|
|
@%p55 bra BB0_45;
|
|
|
|
div.rn.f32 %f941, %f132, %f378;
|
|
div.rn.f32 %f942, %f941, %f96;
|
|
cvt.sat.f32.f32 %f943, %f942;
|
|
mul.f32 %f1435, %f1435, %f943;
|
|
|
|
BB0_45:
|
|
add.f32 %f1378, %f1378, %f1435;
|
|
|
|
BB0_46:
|
|
add.s32 %r242, %r242, 1;
|
|
setp.lt.u32 %p56, %r242, %r4;
|
|
@%p56 bra BB0_5;
|
|
|
|
BB0_47:
|
|
ld.global.u32 %r248, [imageEnabled];
|
|
and.b32 %r116, %r248, 8;
|
|
setp.eq.s32 %p57, %r116, 0;
|
|
@%p57 bra BB0_60;
|
|
|
|
cvt.sat.f32.f32 %f232, %f1378;
|
|
cvt.u64.u32 %rd46, %r3;
|
|
cvt.u64.u32 %rd45, %r2;
|
|
mov.u64 %rd49, image_Mask;
|
|
cvta.global.u64 %rd44, %rd49;
|
|
// inline asm
|
|
call (%rd43), _rt_buffer_get_64, (%rd44, %r28, %r28, %rd45, %rd46, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f946, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f947, %f946;
|
|
fma.rn.f32 %f948, %f947, 0fC0000000, 0f3EE8BA2E;
|
|
abs.f32 %f233, %f948;
|
|
abs.f32 %f234, %f232;
|
|
setp.lt.f32 %p58, %f234, 0f00800000;
|
|
mul.f32 %f949, %f234, 0f4B800000;
|
|
selp.f32 %f950, 0fC3170000, 0fC2FE0000, %p58;
|
|
selp.f32 %f951, %f949, %f234, %p58;
|
|
mov.b32 %r119, %f951;
|
|
and.b32 %r120, %r119, 8388607;
|
|
or.b32 %r121, %r120, 1065353216;
|
|
mov.b32 %f952, %r121;
|
|
shr.u32 %r122, %r119, 23;
|
|
cvt.rn.f32.u32 %f953, %r122;
|
|
add.f32 %f954, %f950, %f953;
|
|
setp.gt.f32 %p59, %f952, 0f3FB504F3;
|
|
mul.f32 %f955, %f952, 0f3F000000;
|
|
add.f32 %f956, %f954, 0f3F800000;
|
|
selp.f32 %f957, %f955, %f952, %p59;
|
|
selp.f32 %f958, %f956, %f954, %p59;
|
|
add.f32 %f959, %f957, 0fBF800000;
|
|
add.f32 %f945, %f957, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f944,%f945;
|
|
// inline asm
|
|
add.f32 %f960, %f959, %f959;
|
|
mul.f32 %f961, %f944, %f960;
|
|
mul.f32 %f962, %f961, %f961;
|
|
mov.f32 %f963, 0f3C4CAF63;
|
|
mov.f32 %f964, 0f3B18F0FE;
|
|
fma.rn.f32 %f965, %f964, %f962, %f963;
|
|
mov.f32 %f966, 0f3DAAAABD;
|
|
fma.rn.f32 %f967, %f965, %f962, %f966;
|
|
mul.rn.f32 %f968, %f967, %f962;
|
|
mul.rn.f32 %f969, %f968, %f961;
|
|
sub.f32 %f970, %f959, %f961;
|
|
neg.f32 %f971, %f961;
|
|
add.f32 %f972, %f970, %f970;
|
|
fma.rn.f32 %f973, %f971, %f959, %f972;
|
|
mul.rn.f32 %f974, %f944, %f973;
|
|
add.f32 %f975, %f969, %f961;
|
|
sub.f32 %f976, %f961, %f975;
|
|
add.f32 %f977, %f969, %f976;
|
|
add.f32 %f978, %f974, %f977;
|
|
add.f32 %f979, %f975, %f978;
|
|
sub.f32 %f980, %f975, %f979;
|
|
add.f32 %f981, %f978, %f980;
|
|
mov.f32 %f982, 0f3F317200;
|
|
mul.rn.f32 %f983, %f958, %f982;
|
|
mov.f32 %f984, 0f35BFBE8E;
|
|
mul.rn.f32 %f985, %f958, %f984;
|
|
add.f32 %f986, %f983, %f979;
|
|
sub.f32 %f987, %f983, %f986;
|
|
add.f32 %f988, %f979, %f987;
|
|
add.f32 %f989, %f981, %f988;
|
|
add.f32 %f990, %f985, %f989;
|
|
add.f32 %f991, %f986, %f990;
|
|
sub.f32 %f992, %f986, %f991;
|
|
add.f32 %f993, %f990, %f992;
|
|
mov.f32 %f994, 0f3EE8BA2E;
|
|
mul.rn.f32 %f995, %f994, %f991;
|
|
neg.f32 %f996, %f995;
|
|
fma.rn.f32 %f997, %f994, %f991, %f996;
|
|
fma.rn.f32 %f998, %f994, %f993, %f997;
|
|
mov.f32 %f999, 0f00000000;
|
|
fma.rn.f32 %f1000, %f999, %f991, %f998;
|
|
add.rn.f32 %f1001, %f995, %f1000;
|
|
neg.f32 %f1002, %f1001;
|
|
add.rn.f32 %f1003, %f995, %f1002;
|
|
add.rn.f32 %f1004, %f1003, %f1000;
|
|
mov.b32 %r123, %f1001;
|
|
setp.eq.s32 %p60, %r123, 1118925336;
|
|
add.s32 %r124, %r123, -1;
|
|
mov.b32 %f1005, %r124;
|
|
add.f32 %f1006, %f1004, 0f37000000;
|
|
selp.f32 %f1007, %f1005, %f1001, %p60;
|
|
selp.f32 %f235, %f1006, %f1004, %p60;
|
|
mul.f32 %f1008, %f1007, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1009, %f1008;
|
|
mov.f32 %f1010, 0fBF317200;
|
|
fma.rn.f32 %f1011, %f1009, %f1010, %f1007;
|
|
mov.f32 %f1012, 0fB5BFBE8E;
|
|
fma.rn.f32 %f1013, %f1009, %f1012, %f1011;
|
|
mul.f32 %f1014, %f1013, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1015, %f1014;
|
|
add.f32 %f1016, %f1009, 0f00000000;
|
|
ex2.approx.f32 %f1017, %f1016;
|
|
mul.f32 %f1018, %f1015, %f1017;
|
|
setp.lt.f32 %p61, %f1007, 0fC2D20000;
|
|
selp.f32 %f1019, 0f00000000, %f1018, %p61;
|
|
setp.gt.f32 %p62, %f1007, 0f42D20000;
|
|
selp.f32 %f1471, 0f7F800000, %f1019, %p62;
|
|
setp.eq.f32 %p63, %f1471, 0f7F800000;
|
|
@%p63 bra BB0_50;
|
|
|
|
fma.rn.f32 %f1471, %f1471, %f235, %f1471;
|
|
|
|
BB0_50:
|
|
setp.lt.f32 %p64, %f232, 0f00000000;
|
|
setp.eq.f32 %p65, %f233, 0f3F800000;
|
|
and.pred %p4, %p64, %p65;
|
|
mov.b32 %r125, %f1471;
|
|
xor.b32 %r126, %r125, -2147483648;
|
|
mov.b32 %f1020, %r126;
|
|
selp.f32 %f1473, %f1020, %f1471, %p4;
|
|
setp.eq.f32 %p66, %f232, 0f00000000;
|
|
@%p66 bra BB0_53;
|
|
bra.uni BB0_51;
|
|
|
|
BB0_53:
|
|
add.f32 %f1023, %f232, %f232;
|
|
selp.f32 %f1473, %f1023, 0f00000000, %p65;
|
|
bra.uni BB0_54;
|
|
|
|
BB0_118:
|
|
mov.u64 %rd190, image_HDR;
|
|
cvta.global.u64 %rd185, %rd190;
|
|
mov.u32 %r212, 8;
|
|
// inline asm
|
|
call (%rd184), _rt_buffer_get_64, (%rd185, %r28, %r212, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f1343, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs107, %f1343;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs108, 0;
|
|
st.v4.u16 [%rd184], {%rs107, %rs107, %rs107, %rs108};
|
|
|
|
BB0_119:
|
|
ld.global.u32 %r213, [additive];
|
|
setp.eq.s32 %p133, %r213, 0;
|
|
@%p133 bra BB0_121;
|
|
|
|
mov.u64 %rd203, image_RNM0;
|
|
cvta.global.u64 %rd192, %rd203;
|
|
mov.u32 %r217, 8;
|
|
// inline asm
|
|
call (%rd191), _rt_buffer_get_64, (%rd192, %r28, %r217, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs115, %rs116, %rs117, %rs118}, [%rd191];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1344, %rs115;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1345, %rs116;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1346, %rs117;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd197), _rt_buffer_get_64, (%rd192, %r28, %r217, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1347, %f1344, 0f00000000;
|
|
add.f32 %f1348, %f1345, 0f00000000;
|
|
add.f32 %f1349, %f1346, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs114, %f1349;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs113, %f1348;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs112, %f1347;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs119, 0;
|
|
st.v4.u16 [%rd197], {%rs112, %rs113, %rs114, %rs119};
|
|
bra.uni BB0_122;
|
|
|
|
BB0_121:
|
|
mov.u64 %rd210, image_RNM0;
|
|
cvta.global.u64 %rd205, %rd210;
|
|
mov.u32 %r219, 8;
|
|
// inline asm
|
|
call (%rd204), _rt_buffer_get_64, (%rd205, %r28, %r219, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f1350, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs120, %f1350;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs121, 0;
|
|
st.v4.u16 [%rd204], {%rs120, %rs120, %rs120, %rs121};
|
|
|
|
BB0_122:
|
|
ld.global.u32 %r220, [additive];
|
|
setp.eq.s32 %p134, %r220, 0;
|
|
@%p134 bra BB0_124;
|
|
|
|
mov.u64 %rd223, image_RNM1;
|
|
cvta.global.u64 %rd212, %rd223;
|
|
mov.u32 %r224, 8;
|
|
// inline asm
|
|
call (%rd211), _rt_buffer_get_64, (%rd212, %r28, %r224, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs128, %rs129, %rs130, %rs131}, [%rd211];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1351, %rs128;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1352, %rs129;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1353, %rs130;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd217), _rt_buffer_get_64, (%rd212, %r28, %r224, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1354, %f1351, 0f00000000;
|
|
add.f32 %f1355, %f1352, 0f00000000;
|
|
add.f32 %f1356, %f1353, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs127, %f1356;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs126, %f1355;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs125, %f1354;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs132, 0;
|
|
st.v4.u16 [%rd217], {%rs125, %rs126, %rs127, %rs132};
|
|
bra.uni BB0_125;
|
|
|
|
BB0_124:
|
|
mov.u64 %rd230, image_RNM1;
|
|
cvta.global.u64 %rd225, %rd230;
|
|
mov.u32 %r226, 8;
|
|
// inline asm
|
|
call (%rd224), _rt_buffer_get_64, (%rd225, %r28, %r226, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f1357, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs133, %f1357;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs134, 0;
|
|
st.v4.u16 [%rd224], {%rs133, %rs133, %rs133, %rs134};
|
|
|
|
BB0_125:
|
|
ld.global.u32 %r227, [additive];
|
|
setp.eq.s32 %p135, %r227, 0;
|
|
@%p135 bra BB0_127;
|
|
|
|
mov.u64 %rd243, image_RNM2;
|
|
cvta.global.u64 %rd232, %rd243;
|
|
mov.u32 %r231, 8;
|
|
// inline asm
|
|
call (%rd231), _rt_buffer_get_64, (%rd232, %r28, %r231, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs141, %rs142, %rs143, %rs144}, [%rd231];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1358, %rs141;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1359, %rs142;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1360, %rs143;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd237), _rt_buffer_get_64, (%rd232, %r28, %r231, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1361, %f1358, 0f00000000;
|
|
add.f32 %f1362, %f1359, 0f00000000;
|
|
add.f32 %f1363, %f1360, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs140, %f1363;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs139, %f1362;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs138, %f1361;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs145, 0;
|
|
st.v4.u16 [%rd237], {%rs138, %rs139, %rs140, %rs145};
|
|
bra.uni BB0_128;
|
|
|
|
BB0_127:
|
|
mov.u64 %rd250, image_RNM2;
|
|
cvta.global.u64 %rd245, %rd250;
|
|
mov.u32 %r233, 8;
|
|
// inline asm
|
|
call (%rd244), _rt_buffer_get_64, (%rd245, %r28, %r233, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f1364, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs146, %f1364;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs147, 0;
|
|
st.v4.u16 [%rd244], {%rs146, %rs146, %rs146, %rs147};
|
|
|
|
BB0_128:
|
|
ld.global.u32 %r234, [additive];
|
|
setp.eq.s32 %p136, %r234, 0;
|
|
@%p136 bra BB0_130;
|
|
|
|
mov.u64 %rd263, image_RNM3;
|
|
cvta.global.u64 %rd252, %rd263;
|
|
mov.u32 %r238, 8;
|
|
// inline asm
|
|
call (%rd251), _rt_buffer_get_64, (%rd252, %r28, %r238, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs154, %rs155, %rs156, %rs157}, [%rd251];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1365, %rs154;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1366, %rs155;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1367, %rs156;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd257), _rt_buffer_get_64, (%rd252, %r28, %r238, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1368, %f1365, 0f00000000;
|
|
add.f32 %f1369, %f1366, 0f00000000;
|
|
add.f32 %f1370, %f1367, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs153, %f1370;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs152, %f1369;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs151, %f1368;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs158, 0;
|
|
st.v4.u16 [%rd257], {%rs151, %rs152, %rs153, %rs158};
|
|
bra.uni BB0_131;
|
|
|
|
BB0_130:
|
|
mov.u64 %rd270, image_RNM3;
|
|
cvta.global.u64 %rd265, %rd270;
|
|
mov.u32 %r240, 8;
|
|
// inline asm
|
|
call (%rd264), _rt_buffer_get_64, (%rd265, %r28, %r240, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f1371, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs159, %f1371;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs160, 0;
|
|
st.v4.u16 [%rd264], {%rs159, %rs159, %rs159, %rs160};
|
|
bra.uni BB0_131;
|
|
|
|
BB0_51:
|
|
setp.geu.f32 %p67, %f232, 0f00000000;
|
|
@%p67 bra BB0_54;
|
|
|
|
cvt.rzi.f32.f32 %f1022, %f994;
|
|
setp.neu.f32 %p68, %f1022, 0f3EE8BA2E;
|
|
selp.f32 %f1473, 0f7FFFFFFF, %f1473, %p68;
|
|
|
|
BB0_54:
|
|
add.f32 %f1024, %f234, 0f3EE8BA2E;
|
|
mov.b32 %r127, %f1024;
|
|
setp.lt.s32 %p70, %r127, 2139095040;
|
|
@%p70 bra BB0_59;
|
|
|
|
setp.gtu.f32 %p71, %f234, 0f7F800000;
|
|
@%p71 bra BB0_58;
|
|
bra.uni BB0_56;
|
|
|
|
BB0_58:
|
|
add.f32 %f1473, %f232, 0f3EE8BA2E;
|
|
bra.uni BB0_59;
|
|
|
|
BB0_56:
|
|
setp.neu.f32 %p72, %f234, 0f7F800000;
|
|
@%p72 bra BB0_59;
|
|
|
|
selp.f32 %f1473, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
BB0_59:
|
|
mul.f32 %f1025, %f1473, 0f437F0000;
|
|
setp.eq.f32 %p73, %f232, 0f3F800000;
|
|
selp.f32 %f1026, 0f437F0000, %f1025, %p73;
|
|
cvt.rzi.u32.f32 %r128, %f1026;
|
|
cvt.u16.u32 %rs17, %r128;
|
|
mov.u16 %rs18, 255;
|
|
st.v2.u8 [%rd43], {%rs17, %rs18};
|
|
ld.global.u32 %r248, [imageEnabled];
|
|
|
|
BB0_60:
|
|
and.b32 %r129, %r248, 1;
|
|
setp.eq.b32 %p74, %r129, 1;
|
|
@!%p74 bra BB0_95;
|
|
bra.uni BB0_61;
|
|
|
|
BB0_61:
|
|
mov.f32 %f1029, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f1030, %f1029;
|
|
fma.rn.f32 %f1031, %f1030, 0fC0000000, 0f3EE66666;
|
|
abs.f32 %f246, %f1031;
|
|
abs.f32 %f247, %f1393;
|
|
setp.lt.f32 %p75, %f247, 0f00800000;
|
|
mul.f32 %f1032, %f247, 0f4B800000;
|
|
selp.f32 %f1033, 0fC3170000, 0fC2FE0000, %p75;
|
|
selp.f32 %f1034, %f1032, %f247, %p75;
|
|
mov.b32 %r130, %f1034;
|
|
and.b32 %r131, %r130, 8388607;
|
|
or.b32 %r132, %r131, 1065353216;
|
|
mov.b32 %f1035, %r132;
|
|
shr.u32 %r133, %r130, 23;
|
|
cvt.rn.f32.u32 %f1036, %r133;
|
|
add.f32 %f1037, %f1033, %f1036;
|
|
setp.gt.f32 %p76, %f1035, 0f3FB504F3;
|
|
mul.f32 %f1038, %f1035, 0f3F000000;
|
|
add.f32 %f1039, %f1037, 0f3F800000;
|
|
selp.f32 %f1040, %f1038, %f1035, %p76;
|
|
selp.f32 %f1041, %f1039, %f1037, %p76;
|
|
add.f32 %f1042, %f1040, 0fBF800000;
|
|
add.f32 %f1028, %f1040, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1027,%f1028;
|
|
// inline asm
|
|
add.f32 %f1043, %f1042, %f1042;
|
|
mul.f32 %f1044, %f1027, %f1043;
|
|
mul.f32 %f1045, %f1044, %f1044;
|
|
mov.f32 %f1046, 0f3C4CAF63;
|
|
mov.f32 %f1047, 0f3B18F0FE;
|
|
fma.rn.f32 %f1048, %f1047, %f1045, %f1046;
|
|
mov.f32 %f1049, 0f3DAAAABD;
|
|
fma.rn.f32 %f1050, %f1048, %f1045, %f1049;
|
|
mul.rn.f32 %f1051, %f1050, %f1045;
|
|
mul.rn.f32 %f1052, %f1051, %f1044;
|
|
sub.f32 %f1053, %f1042, %f1044;
|
|
neg.f32 %f1054, %f1044;
|
|
add.f32 %f1055, %f1053, %f1053;
|
|
fma.rn.f32 %f1056, %f1054, %f1042, %f1055;
|
|
mul.rn.f32 %f1057, %f1027, %f1056;
|
|
add.f32 %f1058, %f1052, %f1044;
|
|
sub.f32 %f1059, %f1044, %f1058;
|
|
add.f32 %f1060, %f1052, %f1059;
|
|
add.f32 %f1061, %f1057, %f1060;
|
|
add.f32 %f1062, %f1058, %f1061;
|
|
sub.f32 %f1063, %f1058, %f1062;
|
|
add.f32 %f1064, %f1061, %f1063;
|
|
mov.f32 %f1065, 0f3F317200;
|
|
mul.rn.f32 %f1066, %f1041, %f1065;
|
|
mov.f32 %f1067, 0f35BFBE8E;
|
|
mul.rn.f32 %f1068, %f1041, %f1067;
|
|
add.f32 %f1069, %f1066, %f1062;
|
|
sub.f32 %f1070, %f1066, %f1069;
|
|
add.f32 %f1071, %f1062, %f1070;
|
|
add.f32 %f1072, %f1064, %f1071;
|
|
add.f32 %f1073, %f1068, %f1072;
|
|
add.f32 %f1074, %f1069, %f1073;
|
|
sub.f32 %f1075, %f1069, %f1074;
|
|
add.f32 %f1076, %f1073, %f1075;
|
|
mov.f32 %f1077, 0f3EE66666;
|
|
mul.rn.f32 %f1078, %f1077, %f1074;
|
|
neg.f32 %f1079, %f1078;
|
|
fma.rn.f32 %f1080, %f1077, %f1074, %f1079;
|
|
fma.rn.f32 %f1081, %f1077, %f1076, %f1080;
|
|
mov.f32 %f1082, 0f00000000;
|
|
fma.rn.f32 %f1083, %f1082, %f1074, %f1081;
|
|
add.rn.f32 %f1084, %f1078, %f1083;
|
|
neg.f32 %f1085, %f1084;
|
|
add.rn.f32 %f1086, %f1078, %f1085;
|
|
add.rn.f32 %f1087, %f1086, %f1083;
|
|
mov.b32 %r134, %f1084;
|
|
setp.eq.s32 %p77, %r134, 1118925336;
|
|
add.s32 %r135, %r134, -1;
|
|
mov.b32 %f1088, %r135;
|
|
add.f32 %f1089, %f1087, 0f37000000;
|
|
selp.f32 %f1090, %f1088, %f1084, %p77;
|
|
selp.f32 %f248, %f1089, %f1087, %p77;
|
|
mul.f32 %f1091, %f1090, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1092, %f1091;
|
|
mov.f32 %f1093, 0fBF317200;
|
|
fma.rn.f32 %f1094, %f1092, %f1093, %f1090;
|
|
mov.f32 %f1095, 0fB5BFBE8E;
|
|
fma.rn.f32 %f1096, %f1092, %f1095, %f1094;
|
|
mul.f32 %f1097, %f1096, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1098, %f1097;
|
|
add.f32 %f1099, %f1092, 0f00000000;
|
|
ex2.approx.f32 %f1100, %f1099;
|
|
mul.f32 %f1101, %f1098, %f1100;
|
|
setp.lt.f32 %p78, %f1090, 0fC2D20000;
|
|
selp.f32 %f1102, 0f00000000, %f1101, %p78;
|
|
setp.gt.f32 %p79, %f1090, 0f42D20000;
|
|
selp.f32 %f1474, 0f7F800000, %f1102, %p79;
|
|
setp.eq.f32 %p80, %f1474, 0f7F800000;
|
|
@%p80 bra BB0_63;
|
|
|
|
fma.rn.f32 %f1474, %f1474, %f248, %f1474;
|
|
|
|
BB0_63:
|
|
setp.lt.f32 %p81, %f1393, 0f00000000;
|
|
setp.eq.f32 %p82, %f246, 0f3F800000;
|
|
and.pred %p5, %p81, %p82;
|
|
mov.b32 %r136, %f1474;
|
|
xor.b32 %r137, %r136, -2147483648;
|
|
mov.b32 %f1103, %r137;
|
|
selp.f32 %f1476, %f1103, %f1474, %p5;
|
|
setp.eq.f32 %p83, %f1393, 0f00000000;
|
|
@%p83 bra BB0_66;
|
|
bra.uni BB0_64;
|
|
|
|
BB0_66:
|
|
add.f32 %f1106, %f1393, %f1393;
|
|
selp.f32 %f1476, %f1106, 0f00000000, %p82;
|
|
bra.uni BB0_67;
|
|
|
|
BB0_64:
|
|
setp.geu.f32 %p84, %f1393, 0f00000000;
|
|
@%p84 bra BB0_67;
|
|
|
|
cvt.rzi.f32.f32 %f1105, %f1077;
|
|
setp.neu.f32 %p85, %f1105, 0f3EE66666;
|
|
selp.f32 %f1476, 0f7FFFFFFF, %f1476, %p85;
|
|
|
|
BB0_67:
|
|
add.f32 %f1107, %f247, 0f3EE66666;
|
|
mov.b32 %r138, %f1107;
|
|
setp.lt.s32 %p87, %r138, 2139095040;
|
|
@%p87 bra BB0_72;
|
|
|
|
setp.gtu.f32 %p88, %f247, 0f7F800000;
|
|
@%p88 bra BB0_71;
|
|
bra.uni BB0_69;
|
|
|
|
BB0_71:
|
|
add.f32 %f1476, %f1393, 0f3EE66666;
|
|
bra.uni BB0_72;
|
|
|
|
BB0_69:
|
|
setp.neu.f32 %p89, %f247, 0f7F800000;
|
|
@%p89 bra BB0_72;
|
|
|
|
selp.f32 %f1476, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
BB0_72:
|
|
setp.eq.f32 %p90, %f1393, 0f3F800000;
|
|
selp.f32 %f259, 0f3F800000, %f1476, %p90;
|
|
abs.f32 %f260, %f1392;
|
|
setp.lt.f32 %p91, %f260, 0f00800000;
|
|
mul.f32 %f1110, %f260, 0f4B800000;
|
|
selp.f32 %f1111, 0fC3170000, 0fC2FE0000, %p91;
|
|
selp.f32 %f1112, %f1110, %f260, %p91;
|
|
mov.b32 %r139, %f1112;
|
|
and.b32 %r140, %r139, 8388607;
|
|
or.b32 %r141, %r140, 1065353216;
|
|
mov.b32 %f1113, %r141;
|
|
shr.u32 %r142, %r139, 23;
|
|
cvt.rn.f32.u32 %f1114, %r142;
|
|
add.f32 %f1115, %f1111, %f1114;
|
|
setp.gt.f32 %p92, %f1113, 0f3FB504F3;
|
|
mul.f32 %f1116, %f1113, 0f3F000000;
|
|
add.f32 %f1117, %f1115, 0f3F800000;
|
|
selp.f32 %f1118, %f1116, %f1113, %p92;
|
|
selp.f32 %f1119, %f1117, %f1115, %p92;
|
|
add.f32 %f1120, %f1118, 0fBF800000;
|
|
add.f32 %f1109, %f1118, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1108,%f1109;
|
|
// inline asm
|
|
add.f32 %f1121, %f1120, %f1120;
|
|
mul.f32 %f1122, %f1108, %f1121;
|
|
mul.f32 %f1123, %f1122, %f1122;
|
|
fma.rn.f32 %f1126, %f1047, %f1123, %f1046;
|
|
fma.rn.f32 %f1128, %f1126, %f1123, %f1049;
|
|
mul.rn.f32 %f1129, %f1128, %f1123;
|
|
mul.rn.f32 %f1130, %f1129, %f1122;
|
|
sub.f32 %f1131, %f1120, %f1122;
|
|
neg.f32 %f1132, %f1122;
|
|
add.f32 %f1133, %f1131, %f1131;
|
|
fma.rn.f32 %f1134, %f1132, %f1120, %f1133;
|
|
mul.rn.f32 %f1135, %f1108, %f1134;
|
|
add.f32 %f1136, %f1130, %f1122;
|
|
sub.f32 %f1137, %f1122, %f1136;
|
|
add.f32 %f1138, %f1130, %f1137;
|
|
add.f32 %f1139, %f1135, %f1138;
|
|
add.f32 %f1140, %f1136, %f1139;
|
|
sub.f32 %f1141, %f1136, %f1140;
|
|
add.f32 %f1142, %f1139, %f1141;
|
|
mul.rn.f32 %f1144, %f1119, %f1065;
|
|
mul.rn.f32 %f1146, %f1119, %f1067;
|
|
add.f32 %f1147, %f1144, %f1140;
|
|
sub.f32 %f1148, %f1144, %f1147;
|
|
add.f32 %f1149, %f1140, %f1148;
|
|
add.f32 %f1150, %f1142, %f1149;
|
|
add.f32 %f1151, %f1146, %f1150;
|
|
add.f32 %f1152, %f1147, %f1151;
|
|
sub.f32 %f1153, %f1147, %f1152;
|
|
add.f32 %f1154, %f1151, %f1153;
|
|
mul.rn.f32 %f1156, %f1077, %f1152;
|
|
neg.f32 %f1157, %f1156;
|
|
fma.rn.f32 %f1158, %f1077, %f1152, %f1157;
|
|
fma.rn.f32 %f1159, %f1077, %f1154, %f1158;
|
|
fma.rn.f32 %f1161, %f1082, %f1152, %f1159;
|
|
add.rn.f32 %f1162, %f1156, %f1161;
|
|
neg.f32 %f1163, %f1162;
|
|
add.rn.f32 %f1164, %f1156, %f1163;
|
|
add.rn.f32 %f1165, %f1164, %f1161;
|
|
mov.b32 %r143, %f1162;
|
|
setp.eq.s32 %p93, %r143, 1118925336;
|
|
add.s32 %r144, %r143, -1;
|
|
mov.b32 %f1166, %r144;
|
|
add.f32 %f1167, %f1165, 0f37000000;
|
|
selp.f32 %f1168, %f1166, %f1162, %p93;
|
|
selp.f32 %f261, %f1167, %f1165, %p93;
|
|
mul.f32 %f1169, %f1168, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1170, %f1169;
|
|
fma.rn.f32 %f1172, %f1170, %f1093, %f1168;
|
|
fma.rn.f32 %f1174, %f1170, %f1095, %f1172;
|
|
mul.f32 %f1175, %f1174, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1176, %f1175;
|
|
add.f32 %f1177, %f1170, 0f00000000;
|
|
ex2.approx.f32 %f1178, %f1177;
|
|
mul.f32 %f1179, %f1176, %f1178;
|
|
setp.lt.f32 %p94, %f1168, 0fC2D20000;
|
|
selp.f32 %f1180, 0f00000000, %f1179, %p94;
|
|
setp.gt.f32 %p95, %f1168, 0f42D20000;
|
|
selp.f32 %f1477, 0f7F800000, %f1180, %p95;
|
|
setp.eq.f32 %p96, %f1477, 0f7F800000;
|
|
@%p96 bra BB0_74;
|
|
|
|
fma.rn.f32 %f1477, %f1477, %f261, %f1477;
|
|
|
|
BB0_74:
|
|
setp.lt.f32 %p97, %f1392, 0f00000000;
|
|
and.pred %p6, %p97, %p82;
|
|
mov.b32 %r145, %f1477;
|
|
xor.b32 %r146, %r145, -2147483648;
|
|
mov.b32 %f1181, %r146;
|
|
selp.f32 %f1479, %f1181, %f1477, %p6;
|
|
setp.eq.f32 %p99, %f1392, 0f00000000;
|
|
@%p99 bra BB0_77;
|
|
bra.uni BB0_75;
|
|
|
|
BB0_77:
|
|
add.f32 %f1184, %f1392, %f1392;
|
|
selp.f32 %f1479, %f1184, 0f00000000, %p82;
|
|
bra.uni BB0_78;
|
|
|
|
BB0_75:
|
|
setp.geu.f32 %p100, %f1392, 0f00000000;
|
|
@%p100 bra BB0_78;
|
|
|
|
cvt.rzi.f32.f32 %f1183, %f1077;
|
|
setp.neu.f32 %p101, %f1183, 0f3EE66666;
|
|
selp.f32 %f1479, 0f7FFFFFFF, %f1479, %p101;
|
|
|
|
BB0_78:
|
|
add.f32 %f1185, %f260, 0f3EE66666;
|
|
mov.b32 %r147, %f1185;
|
|
setp.lt.s32 %p103, %r147, 2139095040;
|
|
@%p103 bra BB0_83;
|
|
|
|
setp.gtu.f32 %p104, %f260, 0f7F800000;
|
|
@%p104 bra BB0_82;
|
|
bra.uni BB0_80;
|
|
|
|
BB0_82:
|
|
add.f32 %f1479, %f1392, 0f3EE66666;
|
|
bra.uni BB0_83;
|
|
|
|
BB0_80:
|
|
setp.neu.f32 %p105, %f260, 0f7F800000;
|
|
@%p105 bra BB0_83;
|
|
|
|
selp.f32 %f1479, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
BB0_83:
|
|
setp.eq.f32 %p106, %f1392, 0f3F800000;
|
|
selp.f32 %f272, 0f3F800000, %f1479, %p106;
|
|
abs.f32 %f273, %f1391;
|
|
setp.lt.f32 %p107, %f273, 0f00800000;
|
|
mul.f32 %f1188, %f273, 0f4B800000;
|
|
selp.f32 %f1189, 0fC3170000, 0fC2FE0000, %p107;
|
|
selp.f32 %f1190, %f1188, %f273, %p107;
|
|
mov.b32 %r148, %f1190;
|
|
and.b32 %r149, %r148, 8388607;
|
|
or.b32 %r150, %r149, 1065353216;
|
|
mov.b32 %f1191, %r150;
|
|
shr.u32 %r151, %r148, 23;
|
|
cvt.rn.f32.u32 %f1192, %r151;
|
|
add.f32 %f1193, %f1189, %f1192;
|
|
setp.gt.f32 %p108, %f1191, 0f3FB504F3;
|
|
mul.f32 %f1194, %f1191, 0f3F000000;
|
|
add.f32 %f1195, %f1193, 0f3F800000;
|
|
selp.f32 %f1196, %f1194, %f1191, %p108;
|
|
selp.f32 %f1197, %f1195, %f1193, %p108;
|
|
add.f32 %f1198, %f1196, 0fBF800000;
|
|
add.f32 %f1187, %f1196, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1186,%f1187;
|
|
// inline asm
|
|
add.f32 %f1199, %f1198, %f1198;
|
|
mul.f32 %f1200, %f1186, %f1199;
|
|
mul.f32 %f1201, %f1200, %f1200;
|
|
fma.rn.f32 %f1204, %f1047, %f1201, %f1046;
|
|
fma.rn.f32 %f1206, %f1204, %f1201, %f1049;
|
|
mul.rn.f32 %f1207, %f1206, %f1201;
|
|
mul.rn.f32 %f1208, %f1207, %f1200;
|
|
sub.f32 %f1209, %f1198, %f1200;
|
|
neg.f32 %f1210, %f1200;
|
|
add.f32 %f1211, %f1209, %f1209;
|
|
fma.rn.f32 %f1212, %f1210, %f1198, %f1211;
|
|
mul.rn.f32 %f1213, %f1186, %f1212;
|
|
add.f32 %f1214, %f1208, %f1200;
|
|
sub.f32 %f1215, %f1200, %f1214;
|
|
add.f32 %f1216, %f1208, %f1215;
|
|
add.f32 %f1217, %f1213, %f1216;
|
|
add.f32 %f1218, %f1214, %f1217;
|
|
sub.f32 %f1219, %f1214, %f1218;
|
|
add.f32 %f1220, %f1217, %f1219;
|
|
mul.rn.f32 %f1222, %f1197, %f1065;
|
|
mul.rn.f32 %f1224, %f1197, %f1067;
|
|
add.f32 %f1225, %f1222, %f1218;
|
|
sub.f32 %f1226, %f1222, %f1225;
|
|
add.f32 %f1227, %f1218, %f1226;
|
|
add.f32 %f1228, %f1220, %f1227;
|
|
add.f32 %f1229, %f1224, %f1228;
|
|
add.f32 %f1230, %f1225, %f1229;
|
|
sub.f32 %f1231, %f1225, %f1230;
|
|
add.f32 %f1232, %f1229, %f1231;
|
|
mul.rn.f32 %f1234, %f1077, %f1230;
|
|
neg.f32 %f1235, %f1234;
|
|
fma.rn.f32 %f1236, %f1077, %f1230, %f1235;
|
|
fma.rn.f32 %f1237, %f1077, %f1232, %f1236;
|
|
fma.rn.f32 %f1239, %f1082, %f1230, %f1237;
|
|
add.rn.f32 %f1240, %f1234, %f1239;
|
|
neg.f32 %f1241, %f1240;
|
|
add.rn.f32 %f1242, %f1234, %f1241;
|
|
add.rn.f32 %f1243, %f1242, %f1239;
|
|
mov.b32 %r152, %f1240;
|
|
setp.eq.s32 %p109, %r152, 1118925336;
|
|
add.s32 %r153, %r152, -1;
|
|
mov.b32 %f1244, %r153;
|
|
add.f32 %f1245, %f1243, 0f37000000;
|
|
selp.f32 %f1246, %f1244, %f1240, %p109;
|
|
selp.f32 %f274, %f1245, %f1243, %p109;
|
|
mul.f32 %f1247, %f1246, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1248, %f1247;
|
|
fma.rn.f32 %f1250, %f1248, %f1093, %f1246;
|
|
fma.rn.f32 %f1252, %f1248, %f1095, %f1250;
|
|
mul.f32 %f1253, %f1252, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1254, %f1253;
|
|
add.f32 %f1255, %f1248, 0f00000000;
|
|
ex2.approx.f32 %f1256, %f1255;
|
|
mul.f32 %f1257, %f1254, %f1256;
|
|
setp.lt.f32 %p110, %f1246, 0fC2D20000;
|
|
selp.f32 %f1258, 0f00000000, %f1257, %p110;
|
|
setp.gt.f32 %p111, %f1246, 0f42D20000;
|
|
selp.f32 %f1480, 0f7F800000, %f1258, %p111;
|
|
setp.eq.f32 %p112, %f1480, 0f7F800000;
|
|
@%p112 bra BB0_85;
|
|
|
|
fma.rn.f32 %f1480, %f1480, %f274, %f1480;
|
|
|
|
BB0_85:
|
|
setp.lt.f32 %p113, %f1391, 0f00000000;
|
|
and.pred %p7, %p113, %p82;
|
|
mov.b32 %r154, %f1480;
|
|
xor.b32 %r155, %r154, -2147483648;
|
|
mov.b32 %f1259, %r155;
|
|
selp.f32 %f1482, %f1259, %f1480, %p7;
|
|
setp.eq.f32 %p115, %f1391, 0f00000000;
|
|
@%p115 bra BB0_88;
|
|
bra.uni BB0_86;
|
|
|
|
BB0_88:
|
|
add.f32 %f1262, %f1391, %f1391;
|
|
selp.f32 %f1482, %f1262, 0f00000000, %p82;
|
|
bra.uni BB0_89;
|
|
|
|
BB0_86:
|
|
setp.geu.f32 %p116, %f1391, 0f00000000;
|
|
@%p116 bra BB0_89;
|
|
|
|
cvt.rzi.f32.f32 %f1261, %f1077;
|
|
setp.neu.f32 %p117, %f1261, 0f3EE66666;
|
|
selp.f32 %f1482, 0f7FFFFFFF, %f1482, %p117;
|
|
|
|
BB0_89:
|
|
add.f32 %f1263, %f273, 0f3EE66666;
|
|
mov.b32 %r156, %f1263;
|
|
setp.lt.s32 %p119, %r156, 2139095040;
|
|
@%p119 bra BB0_94;
|
|
|
|
setp.gtu.f32 %p120, %f273, 0f7F800000;
|
|
@%p120 bra BB0_93;
|
|
bra.uni BB0_91;
|
|
|
|
BB0_93:
|
|
add.f32 %f1482, %f1391, 0f3EE66666;
|
|
bra.uni BB0_94;
|
|
|
|
BB0_91:
|
|
setp.neu.f32 %p121, %f273, 0f7F800000;
|
|
@%p121 bra BB0_94;
|
|
|
|
selp.f32 %f1482, 0fFF800000, 0f7F800000, %p7;
|
|
|
|
BB0_94:
|
|
mov.u32 %r241, 4;
|
|
setp.eq.f32 %p122, %f1391, 0f3F800000;
|
|
selp.f32 %f1264, 0f3F800000, %f1482, %p122;
|
|
cvt.u64.u32 %rd53, %r3;
|
|
cvt.u64.u32 %rd52, %r2;
|
|
mov.u64 %rd56, image;
|
|
cvta.global.u64 %rd51, %rd56;
|
|
// inline asm
|
|
call (%rd50), _rt_buffer_get_64, (%rd51, %r28, %r241, %rd52, %rd53, %rd13, %rd13);
|
|
// inline asm
|
|
cvt.sat.f32.f32 %f1265, %f1264;
|
|
mul.f32 %f1266, %f1265, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r159, %f1266;
|
|
cvt.sat.f32.f32 %f1267, %f272;
|
|
mul.f32 %f1268, %f1267, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r160, %f1268;
|
|
cvt.sat.f32.f32 %f1269, %f259;
|
|
mul.f32 %f1270, %f1269, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r161, %f1270;
|
|
cvt.u16.u32 %rs19, %r159;
|
|
cvt.u16.u32 %rs20, %r161;
|
|
cvt.u16.u32 %rs21, %r160;
|
|
mov.u16 %rs22, 255;
|
|
st.v4.u8 [%rd50], {%rs19, %rs21, %rs20, %rs22};
|
|
ld.global.u32 %r248, [imageEnabled];
|
|
|
|
BB0_95:
|
|
cvt.u64.u32 %rd4, %r2;
|
|
cvt.u64.u32 %rd5, %r3;
|
|
and.b32 %r162, %r248, 4;
|
|
setp.eq.s32 %p123, %r162, 0;
|
|
@%p123 bra BB0_99;
|
|
|
|
ld.global.u32 %r163, [additive];
|
|
setp.eq.s32 %p124, %r163, 0;
|
|
mov.f32 %f1271, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs23, %f1271;}
|
|
|
|
// inline asm
|
|
@%p124 bra BB0_98;
|
|
|
|
mov.u64 %rd69, image_HDR;
|
|
cvta.global.u64 %rd58, %rd69;
|
|
mov.u32 %r167, 8;
|
|
// inline asm
|
|
call (%rd57), _rt_buffer_get_64, (%rd58, %r28, %r167, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs30, %rs31, %rs32, %rs33}, [%rd57];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1272, %rs30;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1273, %rs31;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1274, %rs32;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd63), _rt_buffer_get_64, (%rd58, %r28, %r167, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1275, %f1393, %f1272;
|
|
add.f32 %f1276, %f1392, %f1273;
|
|
add.f32 %f1277, %f1391, %f1274;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs29, %f1277;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs28, %f1276;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs27, %f1275;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd63], {%rs27, %rs28, %rs29, %rs23};
|
|
bra.uni BB0_99;
|
|
|
|
BB0_98:
|
|
mov.u64 %rd76, image_HDR;
|
|
cvta.global.u64 %rd71, %rd76;
|
|
mov.u32 %r169, 8;
|
|
// inline asm
|
|
call (%rd70), _rt_buffer_get_64, (%rd71, %r28, %r169, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs36, %f1391;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs35, %f1392;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs34, %f1393;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd70], {%rs34, %rs35, %rs36, %rs23};
|
|
|
|
BB0_99:
|
|
mov.f32 %f1282, 0f34000000;
|
|
max.f32 %f1283, %f1390, %f1282;
|
|
div.rn.f32 %f1284, %f1387, %f1283;
|
|
max.f32 %f1285, %f1389, %f1282;
|
|
div.rn.f32 %f1286, %f1386, %f1285;
|
|
max.f32 %f1287, %f1388, %f1282;
|
|
div.rn.f32 %f1288, %f1385, %f1287;
|
|
fma.rn.f32 %f285, %f1284, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f286, %f1286, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f287, %f1288, 0f3F000000, 0f3F000000;
|
|
div.rn.f32 %f1289, %f1384, %f1283;
|
|
div.rn.f32 %f1290, %f1383, %f1285;
|
|
div.rn.f32 %f1291, %f1382, %f1287;
|
|
fma.rn.f32 %f288, %f1289, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f289, %f1290, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f290, %f1291, 0f3F000000, 0f3F000000;
|
|
div.rn.f32 %f1292, %f1381, %f1283;
|
|
div.rn.f32 %f1293, %f1380, %f1285;
|
|
div.rn.f32 %f1294, %f1379, %f1287;
|
|
fma.rn.f32 %f291, %f1292, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f292, %f1293, 0f3F000000, 0f3F000000;
|
|
fma.rn.f32 %f293, %f1294, 0f3F000000, 0f3F000000;
|
|
ld.global.u32 %r170, [additive];
|
|
setp.eq.s32 %p125, %r170, 0;
|
|
mov.f32 %f1281, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs37, %f1281;}
|
|
|
|
// inline asm
|
|
@%p125 bra BB0_101;
|
|
|
|
mov.u64 %rd89, image_RNM0;
|
|
cvta.global.u64 %rd78, %rd89;
|
|
mov.u32 %r174, 8;
|
|
// inline asm
|
|
call (%rd77), _rt_buffer_get_64, (%rd78, %r28, %r174, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs44, %rs45, %rs46, %rs47}, [%rd77];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1295, %rs44;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1296, %rs45;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1297, %rs46;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd83), _rt_buffer_get_64, (%rd78, %r28, %r174, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1298, %f1390, %f1295;
|
|
add.f32 %f1299, %f1389, %f1296;
|
|
add.f32 %f1300, %f1388, %f1297;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs43, %f1300;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs42, %f1299;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs41, %f1298;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd83], {%rs41, %rs42, %rs43, %rs37};
|
|
bra.uni BB0_102;
|
|
|
|
BB0_101:
|
|
mov.u64 %rd96, image_RNM0;
|
|
cvta.global.u64 %rd91, %rd96;
|
|
mov.u32 %r176, 8;
|
|
// inline asm
|
|
call (%rd90), _rt_buffer_get_64, (%rd91, %r28, %r176, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs50, %f1388;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs49, %f1389;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs48, %f1390;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd90], {%rs48, %rs49, %rs50, %rs37};
|
|
|
|
BB0_102:
|
|
ld.global.u32 %r177, [additive];
|
|
setp.eq.s32 %p126, %r177, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs51, %f1281;}
|
|
|
|
// inline asm
|
|
@%p126 bra BB0_104;
|
|
|
|
mov.u64 %rd109, image_RNM1;
|
|
cvta.global.u64 %rd98, %rd109;
|
|
mov.u32 %r181, 8;
|
|
// inline asm
|
|
call (%rd97), _rt_buffer_get_64, (%rd98, %r28, %r181, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs58, %rs59, %rs60, %rs61}, [%rd97];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1305, %rs58;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1306, %rs59;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1307, %rs60;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd103), _rt_buffer_get_64, (%rd98, %r28, %r181, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1308, %f285, %f1305;
|
|
add.f32 %f1309, %f286, %f1306;
|
|
add.f32 %f1310, %f287, %f1307;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs57, %f1310;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs56, %f1309;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs55, %f1308;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd103], {%rs55, %rs56, %rs57, %rs51};
|
|
bra.uni BB0_105;
|
|
|
|
BB0_104:
|
|
mov.u64 %rd116, image_RNM1;
|
|
cvta.global.u64 %rd111, %rd116;
|
|
mov.u32 %r183, 8;
|
|
// inline asm
|
|
call (%rd110), _rt_buffer_get_64, (%rd111, %r28, %r183, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs64, %f287;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs63, %f286;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs62, %f285;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd110], {%rs62, %rs63, %rs64, %rs51};
|
|
|
|
BB0_105:
|
|
ld.global.u32 %r184, [additive];
|
|
setp.eq.s32 %p127, %r184, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs65, %f1281;}
|
|
|
|
// inline asm
|
|
@%p127 bra BB0_107;
|
|
|
|
mov.u64 %rd129, image_RNM2;
|
|
cvta.global.u64 %rd118, %rd129;
|
|
mov.u32 %r188, 8;
|
|
// inline asm
|
|
call (%rd117), _rt_buffer_get_64, (%rd118, %r28, %r188, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs72, %rs73, %rs74, %rs75}, [%rd117];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1315, %rs72;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1316, %rs73;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1317, %rs74;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd123), _rt_buffer_get_64, (%rd118, %r28, %r188, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1318, %f288, %f1315;
|
|
add.f32 %f1319, %f289, %f1316;
|
|
add.f32 %f1320, %f290, %f1317;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs71, %f1320;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs70, %f1319;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs69, %f1318;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd123], {%rs69, %rs70, %rs71, %rs65};
|
|
bra.uni BB0_108;
|
|
|
|
BB0_107:
|
|
mov.u64 %rd136, image_RNM2;
|
|
cvta.global.u64 %rd131, %rd136;
|
|
mov.u32 %r190, 8;
|
|
// inline asm
|
|
call (%rd130), _rt_buffer_get_64, (%rd131, %r28, %r190, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs78, %f290;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs77, %f289;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs76, %f288;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd130], {%rs76, %rs77, %rs78, %rs65};
|
|
|
|
BB0_108:
|
|
ld.global.u32 %r191, [additive];
|
|
setp.eq.s32 %p128, %r191, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs79, %f1281;}
|
|
|
|
// inline asm
|
|
@%p128 bra BB0_110;
|
|
|
|
mov.u64 %rd149, image_RNM3;
|
|
cvta.global.u64 %rd138, %rd149;
|
|
mov.u32 %r195, 8;
|
|
// inline asm
|
|
call (%rd137), _rt_buffer_get_64, (%rd138, %r28, %r195, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs86, %rs87, %rs88, %rs89}, [%rd137];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1325, %rs86;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1326, %rs87;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1327, %rs88;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd143), _rt_buffer_get_64, (%rd138, %r28, %r195, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1328, %f291, %f1325;
|
|
add.f32 %f1329, %f292, %f1326;
|
|
add.f32 %f1330, %f293, %f1327;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs85, %f1330;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs84, %f1329;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs83, %f1328;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd143], {%rs83, %rs84, %rs85, %rs79};
|
|
bra.uni BB0_131;
|
|
|
|
BB0_110:
|
|
mov.u64 %rd156, image_RNM3;
|
|
cvta.global.u64 %rd151, %rd156;
|
|
mov.u32 %r197, 8;
|
|
// inline asm
|
|
call (%rd150), _rt_buffer_get_64, (%rd151, %r28, %r197, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs92, %f293;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs91, %f292;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs90, %f291;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd150], {%rs90, %rs91, %rs92, %rs79};
|
|
|
|
BB0_131:
|
|
ret;
|
|
}
|
|
|
|
|