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FORT-BO/Assets/Editor/x64/Bakery/lmSkyDirTranslucent.ptx
2026-08-06 18:56:32 +03:00

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//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//
.version 6.1
.target sm_30
.address_size 64
// .globl _Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image[1];
.global .align 1 .b8 image_HDR[1];
.global .align 1 .b8 image_HDR2[1];
.global .align 1 .b8 image_Dir[1];
.global .align 1 .b8 uvpos[1];
.global .align 1 .b8 uvnormal[1];
.global .align 1 .b8 rnd_seeds[1];
.global .texref sky;
.global .align 4 .b8 skyColor[12];
.global .align 4 .u32 samples;
.global .align 4 .u32 hemispherical;
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8skyColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo13hemisphericalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8skyColorE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename13hemisphericalE[4] = {105, 110, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8skyColorE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum13hemisphericalE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8skyColorE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic13hemisphericalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8skyColorE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation13hemisphericalE[1];
.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
.visible .entry _Z6oxMainv(
)
{
.local .align 4 .b8 __local_depot0[40];
.reg .b64 %SP;
.reg .b64 %SPL;
.reg .pred %p<99>;
.reg .b16 %rs<51>;
.reg .f32 %f<653>;
.reg .b32 %r<311>;
.reg .b64 %rd<141>;
mov.u64 %rd140, __local_depot0;
cvta.local.u64 %SP, %rd140;
ld.global.u32 %r1, [samples];
ld.global.v2.u32 {%r93, %r94}, [pixelID];
cvt.u64.u32 %rd22, %r93;
cvt.u64.u32 %rd23, %r94;
mov.u64 %rd26, uvnormal;
cvta.global.u64 %rd21, %rd26;
mov.u32 %r91, 2;
mov.u32 %r92, 4;
mov.u64 %rd25, 0;
// inline asm
call (%rd20), _rt_buffer_get_64, (%rd21, %r91, %r92, %rd22, %rd23, %rd25, %rd25);
// inline asm
ld.u32 %r2, [%rd20];
shr.u32 %r97, %r2, 16;
cvt.u16.u32 %rs1, %r97;
and.b16 %rs3, %rs1, 255;
cvt.u16.u32 %rs4, %r2;
or.b16 %rs5, %rs4, %rs3;
setp.eq.s16 %p4, %rs5, 0;
mov.f32 %f605, 0f00000000;
mov.f32 %f606, %f605;
mov.f32 %f607, %f605;
@%p4 bra BB0_2;
ld.u8 %rs6, [%rd20+1];
and.b16 %rs8, %rs4, 255;
cvt.rn.f32.u16 %f137, %rs8;
div.rn.f32 %f138, %f137, 0f437F0000;
fma.rn.f32 %f139, %f138, 0f40000000, 0fBF800000;
cvt.rn.f32.u16 %f140, %rs6;
div.rn.f32 %f141, %f140, 0f437F0000;
fma.rn.f32 %f142, %f141, 0f40000000, 0fBF800000;
cvt.rn.f32.u16 %f143, %rs3;
div.rn.f32 %f144, %f143, 0f437F0000;
fma.rn.f32 %f145, %f144, 0f40000000, 0fBF800000;
mul.f32 %f146, %f142, %f142;
fma.rn.f32 %f147, %f139, %f139, %f146;
fma.rn.f32 %f148, %f145, %f145, %f147;
sqrt.rn.f32 %f149, %f148;
rcp.rn.f32 %f150, %f149;
mul.f32 %f605, %f139, %f150;
mul.f32 %f606, %f142, %f150;
mul.f32 %f607, %f145, %f150;
BB0_2:
ld.global.v2.u32 {%r98, %r99}, [pixelID];
ld.global.v2.u32 {%r101, %r102}, [tileInfo];
add.s32 %r3, %r98, %r101;
add.s32 %r4, %r99, %r102;
setp.eq.f32 %p5, %f606, 0f00000000;
setp.eq.f32 %p6, %f605, 0f00000000;
and.pred %p7, %p6, %p5;
setp.eq.f32 %p8, %f607, 0f00000000;
and.pred %p9, %p7, %p8;
@%p9 bra BB0_97;
bra.uni BB0_3;
BB0_97:
ld.global.u32 %r310, [imageEnabled];
and.b32 %r266, %r310, 1;
setp.eq.b32 %p95, %r266, 1;
@!%p95 bra BB0_99;
bra.uni BB0_98;
BB0_98:
cvt.u64.u32 %rd99, %r3;
cvt.u64.u32 %rd100, %r4;
mov.u64 %rd103, image;
cvta.global.u64 %rd98, %rd103;
mov.u64 %rd102, 0;
// inline asm
call (%rd97), _rt_buffer_get_64, (%rd98, %r91, %r92, %rd99, %rd100, %rd102, %rd102);
// inline asm
mov.u16 %rs34, 0;
st.v4.u8 [%rd97], {%rs34, %rs34, %rs34, %rs34};
ld.global.u32 %r310, [imageEnabled];
BB0_99:
and.b32 %r269, %r310, 4;
setp.eq.s32 %p96, %r269, 0;
@%p96 bra BB0_103;
ld.global.u32 %r270, [additive];
setp.eq.s32 %p97, %r270, 0;
cvt.u64.u32 %rd18, %r3;
cvt.u64.u32 %rd19, %r4;
@%p97 bra BB0_102;
mov.u64 %rd116, image_HDR;
cvta.global.u64 %rd105, %rd116;
mov.u32 %r274, 8;
mov.u64 %rd115, 0;
// inline asm
call (%rd104), _rt_buffer_get_64, (%rd105, %r91, %r274, %rd18, %rd19, %rd115, %rd115);
// inline asm
ld.v4.u16 {%rs41, %rs42, %rs43, %rs44}, [%rd104];
// inline asm
{ cvt.f32.f16 %f564, %rs41;}
// inline asm
// inline asm
{ cvt.f32.f16 %f565, %rs42;}
// inline asm
// inline asm
{ cvt.f32.f16 %f566, %rs43;}
// inline asm
// inline asm
call (%rd110), _rt_buffer_get_64, (%rd105, %r91, %r274, %rd18, %rd19, %rd115, %rd115);
// inline asm
add.f32 %f567, %f564, 0f00000000;
add.f32 %f568, %f565, 0f00000000;
add.f32 %f569, %f566, 0f00000000;
// inline asm
{ cvt.rn.f16.f32 %rs40, %f569;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs39, %f568;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs38, %f567;}
// inline asm
mov.u16 %rs45, 0;
st.v4.u16 [%rd110], {%rs38, %rs39, %rs40, %rs45};
bra.uni BB0_103;
BB0_3:
ld.global.v2.u32 {%r110, %r111}, [pixelID];
cvt.u64.u32 %rd29, %r110;
cvt.u64.u32 %rd30, %r111;
mov.u64 %rd39, uvpos;
cvta.global.u64 %rd28, %rd39;
mov.u32 %r107, 12;
// inline asm
call (%rd27), _rt_buffer_get_64, (%rd28, %r91, %r107, %rd29, %rd30, %rd25, %rd25);
// inline asm
ld.f32 %f157, [%rd27+8];
ld.f32 %f158, [%rd27+4];
ld.f32 %f159, [%rd27];
mul.f32 %f160, %f159, 0f3456BF95;
mul.f32 %f161, %f158, 0f3456BF95;
mul.f32 %f162, %f157, 0f3456BF95;
abs.f32 %f163, %f605;
div.rn.f32 %f164, %f160, %f163;
abs.f32 %f165, %f606;
div.rn.f32 %f166, %f161, %f165;
abs.f32 %f167, %f607;
div.rn.f32 %f168, %f162, %f167;
abs.f32 %f169, %f164;
abs.f32 %f170, %f166;
abs.f32 %f171, %f168;
mov.f32 %f172, 0f38D1B717;
max.f32 %f173, %f169, %f172;
max.f32 %f174, %f170, %f172;
max.f32 %f175, %f171, %f172;
fma.rn.f32 %f7, %f605, %f173, %f159;
fma.rn.f32 %f8, %f606, %f174, %f158;
fma.rn.f32 %f9, %f607, %f175, %f157;
ld.global.u32 %r5, [hemispherical];
setp.gt.f32 %p10, %f163, %f167;
neg.f32 %f176, %f606;
selp.f32 %f177, %f176, 0f00000000, %p10;
neg.f32 %f178, %f607;
selp.f32 %f179, %f605, %f178, %p10;
selp.f32 %f180, 0f00000000, %f606, %p10;
mul.f32 %f181, %f179, %f179;
fma.rn.f32 %f182, %f177, %f177, %f181;
fma.rn.f32 %f183, %f180, %f180, %f182;
sqrt.rn.f32 %f184, %f183;
rcp.rn.f32 %f185, %f184;
mul.f32 %f10, %f177, %f185;
mul.f32 %f11, %f179, %f185;
mul.f32 %f12, %f180, %f185;
ld.global.v2.u32 {%r114, %r115}, [pixelID];
cvt.u64.u32 %rd35, %r114;
cvt.u64.u32 %rd36, %r115;
mov.u64 %rd40, rnd_seeds;
cvta.global.u64 %rd34, %rd40;
// inline asm
call (%rd33), _rt_buffer_get_64, (%rd34, %r91, %r92, %rd35, %rd36, %rd25, %rd25);
// inline asm
mov.f32 %f637, 0f00000000;
setp.lt.s32 %p11, %r1, 1;
mov.f32 %f636, %f637;
mov.f32 %f635, %f637;
mov.f32 %f634, %f637;
mov.f32 %f633, %f637;
mov.f32 %f632, %f637;
@%p11 bra BB0_56;
cvt.rn.f32.s32 %f192, %r1;
rcp.rn.f32 %f13, %f192;
ld.u32 %r288, [%rd33];
mul.f32 %f14, %f7, 0f3456BF95;
mul.f32 %f15, %f8, 0f3456BF95;
mul.f32 %f16, %f9, 0f3456BF95;
mul.f32 %f193, %f605, %f11;
mul.f32 %f194, %f606, %f10;
sub.f32 %f17, %f194, %f193;
mul.f32 %f195, %f607, %f10;
mul.f32 %f196, %f605, %f12;
sub.f32 %f18, %f196, %f195;
mul.f32 %f197, %f606, %f12;
mul.f32 %f198, %f607, %f11;
sub.f32 %f19, %f198, %f197;
mov.f32 %f637, 0f00000000;
mov.u32 %r118, 0;
abs.f32 %f272, %f15;
abs.f32 %f273, %f14;
max.f32 %f274, %f273, %f272;
abs.f32 %f275, %f16;
max.f32 %f276, %f274, %f275;
mov.u32 %r285, %r118;
mov.f32 %f636, %f637;
mov.f32 %f635, %f637;
mov.f32 %f634, %f637;
mov.f32 %f633, %f637;
mov.f32 %f632, %f637;
BB0_5:
mov.u32 %r287, %r118;
BB0_6:
cvt.rn.f32.s32 %f598, %r285;
mad.lo.s32 %r120, %r288, 1664525, 1013904223;
and.b32 %r121, %r120, 16777215;
cvt.rn.f32.u32 %f199, %r121;
fma.rn.f32 %f200, %f199, 0f33800000, %f598;
mul.f32 %f33, %f13, %f200;
mad.lo.s32 %r288, %r120, 1664525, 1013904223;
and.b32 %r122, %r288, 16777215;
cvt.rn.f32.u32 %f201, %r122;
cvt.rn.f32.s32 %f202, %r287;
fma.rn.f32 %f203, %f201, 0f33800000, %f202;
mul.f32 %f204, %f13, %f203;
mul.f32 %f205, %f33, %f33;
mov.f32 %f206, 0f3F800000;
sub.f32 %f207, %f206, %f205;
mov.f32 %f208, 0f00000000;
max.f32 %f209, %f208, %f207;
sqrt.rn.f32 %f34, %f209;
mul.f32 %f626, %f204, 0f40C90FDB;
abs.f32 %f36, %f626;
setp.neu.f32 %p12, %f36, 0f7F800000;
mov.f32 %f620, %f626;
@%p12 bra BB0_8;
mul.rn.f32 %f620, %f626, %f208;
BB0_8:
mul.f32 %f211, %f620, 0f3F22F983;
cvt.rni.s32.f32 %r298, %f211;
cvt.rn.f32.s32 %f212, %r298;
neg.f32 %f213, %f212;
mov.f32 %f214, 0f3FC90FDA;
fma.rn.f32 %f215, %f213, %f214, %f620;
mov.f32 %f216, 0f33A22168;
fma.rn.f32 %f217, %f213, %f216, %f215;
mov.f32 %f218, 0f27C234C5;
fma.rn.f32 %f621, %f213, %f218, %f217;
abs.f32 %f219, %f620;
setp.leu.f32 %p13, %f219, 0f47CE4780;
@%p13 bra BB0_19;
add.u64 %rd42, %SP, 0;
cvta.to.local.u64 %rd3, %rd42;
mov.b32 %r13, %f620;
shr.u32 %r14, %r13, 23;
shl.b32 %r125, %r13, 8;
or.b32 %r15, %r125, -2147483648;
mov.u32 %r289, 0;
mov.u64 %rd137, 0;
mov.u64 %rd136, %rd3;
mov.u32 %r290, %r289;
BB0_10:
.pragma "nounroll";
shl.b64 %rd43, %rd137, 2;
mov.u64 %rd44, __cudart_i2opi_f;
add.s64 %rd45, %rd44, %rd43;
ld.const.u32 %r128, [%rd45];
// inline asm
{
mad.lo.cc.u32 %r126, %r128, %r15, %r290;
madc.hi.u32 %r290, %r128, %r15, 0;
}
// inline asm
st.local.u32 [%rd136], %r126;
add.s32 %r289, %r289, 1;
cvt.s64.s32 %rd137, %r289;
mul.wide.s32 %rd48, %r289, 4;
add.s64 %rd136, %rd3, %rd48;
setp.ne.s32 %p14, %r289, 6;
@%p14 bra BB0_10;
add.u64 %rd135, %SP, 0;
and.b32 %r131, %r14, 255;
add.s32 %r132, %r131, -128;
shr.u32 %r133, %r132, 5;
and.b32 %r20, %r13, -2147483648;
cvta.to.local.u64 %rd50, %rd135;
st.local.u32 [%rd50+24], %r290;
mov.u32 %r134, 6;
sub.s32 %r135, %r134, %r133;
mul.wide.s32 %rd51, %r135, 4;
add.s64 %rd8, %rd50, %rd51;
ld.local.u32 %r291, [%rd8];
ld.local.u32 %r292, [%rd8+-4];
and.b32 %r23, %r14, 31;
setp.eq.s32 %p15, %r23, 0;
@%p15 bra BB0_13;
mov.u32 %r136, 32;
sub.s32 %r137, %r136, %r23;
shr.u32 %r138, %r292, %r137;
shl.b32 %r139, %r291, %r23;
add.s32 %r291, %r138, %r139;
ld.local.u32 %r140, [%rd8+-8];
shr.u32 %r141, %r140, %r137;
shl.b32 %r142, %r292, %r23;
add.s32 %r292, %r141, %r142;
BB0_13:
shr.u32 %r143, %r292, 30;
shl.b32 %r144, %r291, 2;
add.s32 %r293, %r143, %r144;
shl.b32 %r29, %r292, 2;
shr.u32 %r145, %r293, 31;
shr.u32 %r146, %r291, 30;
add.s32 %r30, %r145, %r146;
setp.eq.s32 %p16, %r145, 0;
@%p16 bra BB0_14;
bra.uni BB0_15;
BB0_14:
mov.u32 %r294, %r20;
mov.u32 %r295, %r29;
bra.uni BB0_16;
BB0_15:
not.b32 %r147, %r293;
neg.s32 %r295, %r29;
setp.eq.s32 %p17, %r29, 0;
selp.u32 %r148, 1, 0, %p17;
add.s32 %r293, %r148, %r147;
xor.b32 %r294, %r20, -2147483648;
BB0_16:
clz.b32 %r297, %r293;
setp.eq.s32 %p18, %r297, 0;
shl.b32 %r149, %r293, %r297;
mov.u32 %r150, 32;
sub.s32 %r151, %r150, %r297;
shr.u32 %r152, %r295, %r151;
add.s32 %r153, %r152, %r149;
selp.b32 %r38, %r293, %r153, %p18;
mov.u32 %r154, -921707870;
mul.hi.u32 %r296, %r38, %r154;
setp.eq.s32 %p19, %r20, 0;
neg.s32 %r155, %r30;
selp.b32 %r298, %r30, %r155, %p19;
setp.lt.s32 %p20, %r296, 1;
@%p20 bra BB0_18;
mul.lo.s32 %r156, %r38, -921707870;
shr.u32 %r157, %r156, 31;
shl.b32 %r158, %r296, 1;
add.s32 %r296, %r157, %r158;
add.s32 %r297, %r297, 1;
BB0_18:
mov.u32 %r159, 126;
sub.s32 %r160, %r159, %r297;
shl.b32 %r161, %r160, 23;
add.s32 %r162, %r296, 1;
shr.u32 %r163, %r162, 7;
add.s32 %r164, %r163, 1;
shr.u32 %r165, %r164, 1;
add.s32 %r166, %r165, %r161;
or.b32 %r167, %r166, %r294;
mov.b32 %f621, %r167;
BB0_19:
mul.rn.f32 %f42, %f621, %f621;
add.s32 %r46, %r298, 1;
and.b32 %r47, %r46, 1;
setp.eq.s32 %p21, %r47, 0;
@%p21 bra BB0_21;
bra.uni BB0_20;
BB0_21:
mov.f32 %f222, 0f3C08839E;
mov.f32 %f223, 0fB94CA1F9;
fma.rn.f32 %f622, %f223, %f42, %f222;
bra.uni BB0_22;
BB0_20:
mov.f32 %f220, 0fBAB6061A;
mov.f32 %f221, 0f37CCF5CE;
fma.rn.f32 %f622, %f221, %f42, %f220;
BB0_22:
@%p21 bra BB0_24;
bra.uni BB0_23;
BB0_24:
mov.f32 %f227, 0fBE2AAAA3;
fma.rn.f32 %f228, %f622, %f42, %f227;
fma.rn.f32 %f623, %f228, %f42, %f208;
bra.uni BB0_25;
BB0_23:
mov.f32 %f224, 0f3D2AAAA5;
fma.rn.f32 %f225, %f622, %f42, %f224;
mov.f32 %f226, 0fBF000000;
fma.rn.f32 %f623, %f225, %f42, %f226;
BB0_25:
fma.rn.f32 %f624, %f623, %f621, %f621;
@%p21 bra BB0_27;
fma.rn.f32 %f624, %f623, %f42, %f206;
BB0_27:
and.b32 %r168, %r46, 2;
setp.eq.s32 %p24, %r168, 0;
@%p24 bra BB0_29;
mov.f32 %f232, 0fBF800000;
fma.rn.f32 %f624, %f624, %f232, %f208;
BB0_29:
@%p12 bra BB0_31;
mul.rn.f32 %f626, %f626, %f208;
BB0_31:
mov.f32 %f601, 0f27C234C5;
mov.f32 %f600, 0f33A22168;
mov.f32 %f599, 0f3FC90FDA;
mul.f32 %f234, %f626, 0f3F22F983;
cvt.rni.s32.f32 %r308, %f234;
cvt.rn.f32.s32 %f235, %r308;
neg.f32 %f236, %f235;
fma.rn.f32 %f238, %f236, %f599, %f626;
fma.rn.f32 %f240, %f236, %f600, %f238;
fma.rn.f32 %f627, %f236, %f601, %f240;
abs.f32 %f242, %f626;
setp.leu.f32 %p26, %f242, 0f47CE4780;
@%p26 bra BB0_42;
add.u64 %rd53, %SP, 0;
cvta.to.local.u64 %rd9, %rd53;
mov.b32 %r49, %f626;
shr.u32 %r50, %r49, 23;
shl.b32 %r171, %r49, 8;
or.b32 %r51, %r171, -2147483648;
mov.u32 %r299, 0;
mov.u64 %rd138, %rd9;
mov.u64 %rd139, %rd25;
mov.u32 %r300, %r299;
BB0_33:
.pragma "nounroll";
shl.b64 %rd54, %rd139, 2;
mov.u64 %rd55, __cudart_i2opi_f;
add.s64 %rd56, %rd55, %rd54;
ld.const.u32 %r174, [%rd56];
// inline asm
{
mad.lo.cc.u32 %r172, %r174, %r51, %r300;
madc.hi.u32 %r300, %r174, %r51, 0;
}
// inline asm
st.local.u32 [%rd138], %r172;
add.s32 %r299, %r299, 1;
cvt.s64.s32 %rd139, %r299;
mul.wide.s32 %rd57, %r299, 4;
add.s64 %rd138, %rd9, %rd57;
setp.ne.s32 %p27, %r299, 6;
@%p27 bra BB0_33;
and.b32 %r177, %r50, 255;
add.s32 %r178, %r177, -128;
shr.u32 %r179, %r178, 5;
and.b32 %r56, %r49, -2147483648;
cvta.to.local.u64 %rd59, %rd53;
st.local.u32 [%rd59+24], %r300;
mov.u32 %r180, 6;
sub.s32 %r181, %r180, %r179;
mul.wide.s32 %rd60, %r181, 4;
add.s64 %rd15, %rd59, %rd60;
ld.local.u32 %r301, [%rd15];
ld.local.u32 %r302, [%rd15+-4];
and.b32 %r59, %r50, 31;
setp.eq.s32 %p28, %r59, 0;
@%p28 bra BB0_36;
mov.u32 %r182, 32;
sub.s32 %r183, %r182, %r59;
shr.u32 %r184, %r302, %r183;
shl.b32 %r185, %r301, %r59;
add.s32 %r301, %r184, %r185;
ld.local.u32 %r186, [%rd15+-8];
shr.u32 %r187, %r186, %r183;
shl.b32 %r188, %r302, %r59;
add.s32 %r302, %r187, %r188;
BB0_36:
shr.u32 %r189, %r302, 30;
shl.b32 %r190, %r301, 2;
add.s32 %r303, %r189, %r190;
shl.b32 %r65, %r302, 2;
shr.u32 %r191, %r303, 31;
shr.u32 %r192, %r301, 30;
add.s32 %r66, %r191, %r192;
setp.eq.s32 %p29, %r191, 0;
@%p29 bra BB0_37;
bra.uni BB0_38;
BB0_37:
mov.u32 %r304, %r56;
mov.u32 %r305, %r65;
bra.uni BB0_39;
BB0_38:
not.b32 %r193, %r303;
neg.s32 %r305, %r65;
setp.eq.s32 %p30, %r65, 0;
selp.u32 %r194, 1, 0, %p30;
add.s32 %r303, %r194, %r193;
xor.b32 %r304, %r56, -2147483648;
BB0_39:
clz.b32 %r307, %r303;
setp.eq.s32 %p31, %r307, 0;
shl.b32 %r195, %r303, %r307;
mov.u32 %r196, 32;
sub.s32 %r197, %r196, %r307;
shr.u32 %r198, %r305, %r197;
add.s32 %r199, %r198, %r195;
selp.b32 %r74, %r303, %r199, %p31;
mov.u32 %r200, -921707870;
mul.hi.u32 %r306, %r74, %r200;
setp.eq.s32 %p32, %r56, 0;
neg.s32 %r201, %r66;
selp.b32 %r308, %r66, %r201, %p32;
setp.lt.s32 %p33, %r306, 1;
@%p33 bra BB0_41;
mul.lo.s32 %r202, %r74, -921707870;
shr.u32 %r203, %r202, 31;
shl.b32 %r204, %r306, 1;
add.s32 %r306, %r203, %r204;
add.s32 %r307, %r307, 1;
BB0_41:
mov.u32 %r205, 126;
sub.s32 %r206, %r205, %r307;
shl.b32 %r207, %r206, 23;
add.s32 %r208, %r306, 1;
shr.u32 %r209, %r208, 7;
add.s32 %r210, %r209, 1;
shr.u32 %r211, %r210, 1;
add.s32 %r212, %r211, %r207;
or.b32 %r213, %r212, %r304;
mov.b32 %f627, %r213;
BB0_42:
mul.rn.f32 %f59, %f627, %f627;
and.b32 %r82, %r308, 1;
setp.eq.s32 %p34, %r82, 0;
@%p34 bra BB0_44;
bra.uni BB0_43;
BB0_44:
mov.f32 %f245, 0f3C08839E;
mov.f32 %f246, 0fB94CA1F9;
fma.rn.f32 %f628, %f246, %f59, %f245;
bra.uni BB0_45;
BB0_43:
mov.f32 %f243, 0fBAB6061A;
mov.f32 %f244, 0f37CCF5CE;
fma.rn.f32 %f628, %f244, %f59, %f243;
BB0_45:
@%p34 bra BB0_47;
bra.uni BB0_46;
BB0_47:
mov.f32 %f250, 0fBE2AAAA3;
fma.rn.f32 %f251, %f628, %f59, %f250;
fma.rn.f32 %f629, %f251, %f59, %f208;
bra.uni BB0_48;
BB0_46:
mov.f32 %f247, 0f3D2AAAA5;
fma.rn.f32 %f248, %f628, %f59, %f247;
mov.f32 %f249, 0fBF000000;
fma.rn.f32 %f629, %f248, %f59, %f249;
BB0_48:
fma.rn.f32 %f630, %f629, %f627, %f627;
@%p34 bra BB0_50;
fma.rn.f32 %f630, %f629, %f59, %f206;
BB0_50:
and.b32 %r214, %r308, 2;
setp.eq.s32 %p37, %r214, 0;
@%p37 bra BB0_52;
mov.f32 %f255, 0fBF800000;
fma.rn.f32 %f630, %f630, %f255, %f208;
BB0_52:
mul.f32 %f256, %f34, %f624;
mul.f32 %f257, %f34, %f630;
mul.f32 %f258, %f10, %f257;
mul.f32 %f259, %f11, %f257;
mul.f32 %f260, %f12, %f257;
fma.rn.f32 %f261, %f19, %f256, %f258;
fma.rn.f32 %f262, %f18, %f256, %f259;
fma.rn.f32 %f263, %f17, %f256, %f260;
fma.rn.f32 %f71, %f605, %f33, %f261;
fma.rn.f32 %f72, %f606, %f33, %f262;
fma.rn.f32 %f73, %f607, %f33, %f263;
setp.gt.f32 %p38, %f72, 0f00000000;
setp.eq.s32 %p39, %r5, 0;
or.pred %p40, %p39, %p38;
@!%p40 bra BB0_54;
bra.uni BB0_53;
BB0_53:
add.u64 %rd61, %SP, 28;
cvta.to.local.u64 %rd62, %rd61;
max.f32 %f270, %f276, %f172;
mov.u32 %r218, 1065353216;
st.local.u32 [%rd62+8], %r218;
st.local.u32 [%rd62+4], %r218;
st.local.u32 [%rd62], %r218;
ld.global.u32 %r215, [root];
mov.u32 %r216, 1;
mov.f32 %f271, 0f6C4ECB8F;
// inline asm
call _rt_trace_64, (%r215, %f7, %f8, %f9, %f71, %f72, %f73, %r216, %f270, %f271, %rd61, %r107);
// inline asm
ld.local.f32 %f278, [%rd62];
ld.local.f32 %f279, [%rd62+4];
ld.local.f32 %f280, [%rd62+8];
fma.rn.f32 %f632, %f71, %f278, %f632;
fma.rn.f32 %f633, %f72, %f279, %f633;
fma.rn.f32 %f634, %f73, %f280, %f634;
mul.f32 %f281, %f606, %f72;
fma.rn.f32 %f282, %f605, %f71, %f281;
fma.rn.f32 %f283, %f607, %f73, %f282;
cvt.sat.f32.f32 %f284, %f283;
fma.rn.f32 %f635, %f284, %f278, %f635;
fma.rn.f32 %f636, %f284, %f279, %f636;
fma.rn.f32 %f637, %f284, %f280, %f637;
BB0_54:
add.s32 %r287, %r287, 1;
setp.lt.s32 %p41, %r287, %r1;
@%p41 bra BB0_6;
add.s32 %r285, %r285, 1;
setp.lt.s32 %p42, %r285, %r1;
@%p42 bra BB0_5;
BB0_56:
mul.lo.s32 %r219, %r1, %r1;
cvt.rn.f32.s32 %f285, %r219;
rcp.rn.f32 %f286, %f285;
mul.f32 %f287, %f635, %f286;
mul.f32 %f288, %f636, %f286;
mul.f32 %f289, %f637, %f286;
fma.rn.f32 %f290, %f635, %f286, %f287;
fma.rn.f32 %f291, %f636, %f286, %f288;
fma.rn.f32 %f292, %f637, %f286, %f289;
ld.global.f32 %f293, [skyColor];
mul.f32 %f92, %f293, %f290;
ld.global.f32 %f294, [skyColor+4];
mul.f32 %f93, %f294, %f291;
ld.global.f32 %f295, [skyColor+8];
mul.f32 %f94, %f292, %f295;
ld.global.u32 %r309, [imageEnabled];
and.b32 %r220, %r309, 1;
setp.eq.b32 %p43, %r220, 1;
@!%p43 bra BB0_91;
bra.uni BB0_57;
BB0_57:
mov.f32 %f298, 0f3E666666;
cvt.rzi.f32.f32 %f299, %f298;
fma.rn.f32 %f300, %f299, 0fC0000000, 0f3EE66666;
abs.f32 %f95, %f300;
abs.f32 %f96, %f92;
setp.lt.f32 %p44, %f96, 0f00800000;
mul.f32 %f301, %f96, 0f4B800000;
selp.f32 %f302, 0fC3170000, 0fC2FE0000, %p44;
selp.f32 %f303, %f301, %f96, %p44;
mov.b32 %r221, %f303;
and.b32 %r222, %r221, 8388607;
or.b32 %r223, %r222, 1065353216;
mov.b32 %f304, %r223;
shr.u32 %r224, %r221, 23;
cvt.rn.f32.u32 %f305, %r224;
add.f32 %f306, %f302, %f305;
setp.gt.f32 %p45, %f304, 0f3FB504F3;
mul.f32 %f307, %f304, 0f3F000000;
add.f32 %f308, %f306, 0f3F800000;
selp.f32 %f309, %f307, %f304, %p45;
selp.f32 %f310, %f308, %f306, %p45;
add.f32 %f311, %f309, 0fBF800000;
add.f32 %f297, %f309, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f296,%f297;
// inline asm
add.f32 %f312, %f311, %f311;
mul.f32 %f313, %f296, %f312;
mul.f32 %f314, %f313, %f313;
mov.f32 %f315, 0f3C4CAF63;
mov.f32 %f316, 0f3B18F0FE;
fma.rn.f32 %f317, %f316, %f314, %f315;
mov.f32 %f318, 0f3DAAAABD;
fma.rn.f32 %f319, %f317, %f314, %f318;
mul.rn.f32 %f320, %f319, %f314;
mul.rn.f32 %f321, %f320, %f313;
sub.f32 %f322, %f311, %f313;
neg.f32 %f323, %f313;
add.f32 %f324, %f322, %f322;
fma.rn.f32 %f325, %f323, %f311, %f324;
mul.rn.f32 %f326, %f296, %f325;
add.f32 %f327, %f321, %f313;
sub.f32 %f328, %f313, %f327;
add.f32 %f329, %f321, %f328;
add.f32 %f330, %f326, %f329;
add.f32 %f331, %f327, %f330;
sub.f32 %f332, %f327, %f331;
add.f32 %f333, %f330, %f332;
mov.f32 %f334, 0f3F317200;
mul.rn.f32 %f335, %f310, %f334;
mov.f32 %f336, 0f35BFBE8E;
mul.rn.f32 %f337, %f310, %f336;
add.f32 %f338, %f335, %f331;
sub.f32 %f339, %f335, %f338;
add.f32 %f340, %f331, %f339;
add.f32 %f341, %f333, %f340;
add.f32 %f342, %f337, %f341;
add.f32 %f343, %f338, %f342;
sub.f32 %f344, %f338, %f343;
add.f32 %f345, %f342, %f344;
mov.f32 %f346, 0f3EE66666;
mul.rn.f32 %f347, %f346, %f343;
neg.f32 %f348, %f347;
fma.rn.f32 %f349, %f346, %f343, %f348;
fma.rn.f32 %f350, %f346, %f345, %f349;
mov.f32 %f351, 0f00000000;
fma.rn.f32 %f352, %f351, %f343, %f350;
add.rn.f32 %f353, %f347, %f352;
neg.f32 %f354, %f353;
add.rn.f32 %f355, %f347, %f354;
add.rn.f32 %f356, %f355, %f352;
mov.b32 %r225, %f353;
setp.eq.s32 %p46, %r225, 1118925336;
add.s32 %r226, %r225, -1;
mov.b32 %f357, %r226;
add.f32 %f358, %f356, 0f37000000;
selp.f32 %f359, %f357, %f353, %p46;
selp.f32 %f97, %f358, %f356, %p46;
mul.f32 %f360, %f359, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f361, %f360;
mov.f32 %f362, 0fBF317200;
fma.rn.f32 %f363, %f361, %f362, %f359;
mov.f32 %f364, 0fB5BFBE8E;
fma.rn.f32 %f365, %f361, %f364, %f363;
mul.f32 %f366, %f365, 0f3FB8AA3B;
ex2.approx.ftz.f32 %f367, %f366;
add.f32 %f368, %f361, 0f00000000;
ex2.approx.f32 %f369, %f368;
mul.f32 %f370, %f367, %f369;
setp.lt.f32 %p47, %f359, 0fC2D20000;
selp.f32 %f371, 0f00000000, %f370, %p47;
setp.gt.f32 %p48, %f359, 0f42D20000;
selp.f32 %f644, 0f7F800000, %f371, %p48;
setp.eq.f32 %p49, %f644, 0f7F800000;
@%p49 bra BB0_59;
fma.rn.f32 %f644, %f644, %f97, %f644;
BB0_59:
setp.lt.f32 %p50, %f92, 0f00000000;
setp.eq.f32 %p51, %f95, 0f3F800000;
and.pred %p1, %p50, %p51;
mov.b32 %r227, %f644;
xor.b32 %r228, %r227, -2147483648;
mov.b32 %f372, %r228;
selp.f32 %f646, %f372, %f644, %p1;
setp.eq.f32 %p52, %f92, 0f00000000;
@%p52 bra BB0_62;
bra.uni BB0_60;
BB0_62:
add.f32 %f375, %f92, %f92;
selp.f32 %f646, %f375, 0f00000000, %p51;
bra.uni BB0_63;
BB0_102:
mov.u64 %rd123, image_HDR;
cvta.global.u64 %rd118, %rd123;
mov.u32 %r276, 8;
mov.u64 %rd122, 0;
// inline asm
call (%rd117), _rt_buffer_get_64, (%rd118, %r91, %r276, %rd18, %rd19, %rd122, %rd122);
// inline asm
mov.f32 %f570, 0f00000000;
// inline asm
{ cvt.rn.f16.f32 %rs46, %f570;}
// inline asm
mov.u16 %rs47, 0;
st.v4.u16 [%rd117], {%rs46, %rs46, %rs46, %rs47};
BB0_103:
ld.global.u8 %rs48, [imageEnabled];
and.b16 %rs49, %rs48, 64;
setp.eq.s16 %p98, %rs49, 0;
@%p98 bra BB0_105;
cvt.u64.u32 %rd126, %r3;
cvt.u64.u32 %rd127, %r4;
mov.u64 %rd130, image_Dir;
cvta.global.u64 %rd125, %rd130;
mov.u64 %rd129, 0;
// inline asm
call (%rd124), _rt_buffer_get_64, (%rd125, %r91, %r92, %rd126, %rd127, %rd129, %rd129);
// inline asm
mov.u16 %rs50, 0;
st.v4.u8 [%rd124], {%rs50, %rs50, %rs50, %rs50};
bra.uni BB0_105;
BB0_60:
setp.geu.f32 %p53, %f92, 0f00000000;
@%p53 bra BB0_63;
mov.f32 %f594, 0f3EE66666;
cvt.rzi.f32.f32 %f374, %f594;
setp.neu.f32 %p54, %f374, 0f3EE66666;
selp.f32 %f646, 0f7FFFFFFF, %f646, %p54;
BB0_63:
abs.f32 %f571, %f92;
add.f32 %f376, %f571, 0f3EE66666;
mov.b32 %r229, %f376;
setp.lt.s32 %p56, %r229, 2139095040;
@%p56 bra BB0_68;
abs.f32 %f592, %f92;
setp.gtu.f32 %p57, %f592, 0f7F800000;
@%p57 bra BB0_67;
bra.uni BB0_65;
BB0_67:
add.f32 %f646, %f92, 0f3EE66666;
bra.uni BB0_68;
BB0_65:
abs.f32 %f593, %f92;
setp.neu.f32 %p58, %f593, 0f7F800000;
@%p58 bra BB0_68;
selp.f32 %f646, 0fFF800000, 0f7F800000, %p1;
BB0_68:
mov.f32 %f580, 0fB5BFBE8E;
mov.f32 %f579, 0fBF317200;
mov.f32 %f578, 0f00000000;
mov.f32 %f577, 0f35BFBE8E;
mov.f32 %f576, 0f3F317200;
mov.f32 %f575, 0f3DAAAABD;
mov.f32 %f574, 0f3C4CAF63;
mov.f32 %f573, 0f3B18F0FE;
mov.f32 %f572, 0f3EE66666;
setp.eq.f32 %p59, %f92, 0f3F800000;
selp.f32 %f108, 0f3F800000, %f646, %p59;
abs.f32 %f109, %f93;
setp.lt.f32 %p60, %f109, 0f00800000;
mul.f32 %f379, %f109, 0f4B800000;
selp.f32 %f380, 0fC3170000, 0fC2FE0000, %p60;
selp.f32 %f381, %f379, %f109, %p60;
mov.b32 %r230, %f381;
and.b32 %r231, %r230, 8388607;
or.b32 %r232, %r231, 1065353216;
mov.b32 %f382, %r232;
shr.u32 %r233, %r230, 23;
cvt.rn.f32.u32 %f383, %r233;
add.f32 %f384, %f380, %f383;
setp.gt.f32 %p61, %f382, 0f3FB504F3;
mul.f32 %f385, %f382, 0f3F000000;
add.f32 %f386, %f384, 0f3F800000;
selp.f32 %f387, %f385, %f382, %p61;
selp.f32 %f388, %f386, %f384, %p61;
add.f32 %f389, %f387, 0fBF800000;
add.f32 %f378, %f387, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f377,%f378;
// inline asm
add.f32 %f390, %f389, %f389;
mul.f32 %f391, %f377, %f390;
mul.f32 %f392, %f391, %f391;
fma.rn.f32 %f395, %f573, %f392, %f574;
fma.rn.f32 %f397, %f395, %f392, %f575;
mul.rn.f32 %f398, %f397, %f392;
mul.rn.f32 %f399, %f398, %f391;
sub.f32 %f400, %f389, %f391;
neg.f32 %f401, %f391;
add.f32 %f402, %f400, %f400;
fma.rn.f32 %f403, %f401, %f389, %f402;
mul.rn.f32 %f404, %f377, %f403;
add.f32 %f405, %f399, %f391;
sub.f32 %f406, %f391, %f405;
add.f32 %f407, %f399, %f406;
add.f32 %f408, %f404, %f407;
add.f32 %f409, %f405, %f408;
sub.f32 %f410, %f405, %f409;
add.f32 %f411, %f408, %f410;
mul.rn.f32 %f413, %f388, %f576;
mul.rn.f32 %f415, %f388, %f577;
add.f32 %f416, %f413, %f409;
sub.f32 %f417, %f413, %f416;
add.f32 %f418, %f409, %f417;
add.f32 %f419, %f411, %f418;
add.f32 %f420, %f415, %f419;
add.f32 %f421, %f416, %f420;
sub.f32 %f422, %f416, %f421;
add.f32 %f423, %f420, %f422;
mul.rn.f32 %f425, %f572, %f421;
neg.f32 %f426, %f425;
fma.rn.f32 %f427, %f572, %f421, %f426;
fma.rn.f32 %f428, %f572, %f423, %f427;
fma.rn.f32 %f430, %f578, %f421, %f428;
add.rn.f32 %f431, %f425, %f430;
neg.f32 %f432, %f431;
add.rn.f32 %f433, %f425, %f432;
add.rn.f32 %f434, %f433, %f430;
mov.b32 %r234, %f431;
setp.eq.s32 %p62, %r234, 1118925336;
add.s32 %r235, %r234, -1;
mov.b32 %f435, %r235;
add.f32 %f436, %f434, 0f37000000;
selp.f32 %f437, %f435, %f431, %p62;
selp.f32 %f110, %f436, %f434, %p62;
mul.f32 %f438, %f437, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f439, %f438;
fma.rn.f32 %f441, %f439, %f579, %f437;
fma.rn.f32 %f443, %f439, %f580, %f441;
mul.f32 %f444, %f443, 0f3FB8AA3B;
ex2.approx.ftz.f32 %f445, %f444;
add.f32 %f446, %f439, 0f00000000;
ex2.approx.f32 %f447, %f446;
mul.f32 %f448, %f445, %f447;
setp.lt.f32 %p63, %f437, 0fC2D20000;
selp.f32 %f449, 0f00000000, %f448, %p63;
setp.gt.f32 %p64, %f437, 0f42D20000;
selp.f32 %f647, 0f7F800000, %f449, %p64;
setp.eq.f32 %p65, %f647, 0f7F800000;
@%p65 bra BB0_70;
fma.rn.f32 %f647, %f647, %f110, %f647;
BB0_70:
setp.lt.f32 %p66, %f93, 0f00000000;
and.pred %p2, %p66, %p51;
mov.b32 %r236, %f647;
xor.b32 %r237, %r236, -2147483648;
mov.b32 %f450, %r237;
selp.f32 %f649, %f450, %f647, %p2;
setp.eq.f32 %p68, %f93, 0f00000000;
@%p68 bra BB0_73;
bra.uni BB0_71;
BB0_73:
add.f32 %f453, %f93, %f93;
selp.f32 %f649, %f453, 0f00000000, %p51;
bra.uni BB0_74;
BB0_71:
setp.geu.f32 %p69, %f93, 0f00000000;
@%p69 bra BB0_74;
mov.f32 %f591, 0f3EE66666;
cvt.rzi.f32.f32 %f452, %f591;
setp.neu.f32 %p70, %f452, 0f3EE66666;
selp.f32 %f649, 0f7FFFFFFF, %f649, %p70;
BB0_74:
abs.f32 %f595, %f93;
add.f32 %f454, %f595, 0f3EE66666;
mov.b32 %r238, %f454;
setp.lt.s32 %p72, %r238, 2139095040;
@%p72 bra BB0_79;
abs.f32 %f596, %f93;
setp.gtu.f32 %p73, %f596, 0f7F800000;
@%p73 bra BB0_78;
bra.uni BB0_76;
BB0_78:
add.f32 %f649, %f93, 0f3EE66666;
bra.uni BB0_79;
BB0_76:
abs.f32 %f597, %f93;
setp.neu.f32 %p74, %f597, 0f7F800000;
@%p74 bra BB0_79;
selp.f32 %f649, 0fFF800000, 0f7F800000, %p2;
BB0_79:
mov.f32 %f589, 0fB5BFBE8E;
mov.f32 %f588, 0fBF317200;
mov.f32 %f587, 0f00000000;
mov.f32 %f586, 0f35BFBE8E;
mov.f32 %f585, 0f3F317200;
mov.f32 %f584, 0f3DAAAABD;
mov.f32 %f583, 0f3C4CAF63;
mov.f32 %f582, 0f3B18F0FE;
mov.f32 %f581, 0f3EE66666;
setp.eq.f32 %p75, %f93, 0f3F800000;
selp.f32 %f121, 0f3F800000, %f649, %p75;
abs.f32 %f122, %f94;
setp.lt.f32 %p76, %f122, 0f00800000;
mul.f32 %f457, %f122, 0f4B800000;
selp.f32 %f458, 0fC3170000, 0fC2FE0000, %p76;
selp.f32 %f459, %f457, %f122, %p76;
mov.b32 %r239, %f459;
and.b32 %r240, %r239, 8388607;
or.b32 %r241, %r240, 1065353216;
mov.b32 %f460, %r241;
shr.u32 %r242, %r239, 23;
cvt.rn.f32.u32 %f461, %r242;
add.f32 %f462, %f458, %f461;
setp.gt.f32 %p77, %f460, 0f3FB504F3;
mul.f32 %f463, %f460, 0f3F000000;
add.f32 %f464, %f462, 0f3F800000;
selp.f32 %f465, %f463, %f460, %p77;
selp.f32 %f466, %f464, %f462, %p77;
add.f32 %f467, %f465, 0fBF800000;
add.f32 %f456, %f465, 0f3F800000;
// inline asm
rcp.approx.ftz.f32 %f455,%f456;
// inline asm
add.f32 %f468, %f467, %f467;
mul.f32 %f469, %f455, %f468;
mul.f32 %f470, %f469, %f469;
fma.rn.f32 %f473, %f582, %f470, %f583;
fma.rn.f32 %f475, %f473, %f470, %f584;
mul.rn.f32 %f476, %f475, %f470;
mul.rn.f32 %f477, %f476, %f469;
sub.f32 %f478, %f467, %f469;
neg.f32 %f479, %f469;
add.f32 %f480, %f478, %f478;
fma.rn.f32 %f481, %f479, %f467, %f480;
mul.rn.f32 %f482, %f455, %f481;
add.f32 %f483, %f477, %f469;
sub.f32 %f484, %f469, %f483;
add.f32 %f485, %f477, %f484;
add.f32 %f486, %f482, %f485;
add.f32 %f487, %f483, %f486;
sub.f32 %f488, %f483, %f487;
add.f32 %f489, %f486, %f488;
mul.rn.f32 %f491, %f466, %f585;
mul.rn.f32 %f493, %f466, %f586;
add.f32 %f494, %f491, %f487;
sub.f32 %f495, %f491, %f494;
add.f32 %f496, %f487, %f495;
add.f32 %f497, %f489, %f496;
add.f32 %f498, %f493, %f497;
add.f32 %f499, %f494, %f498;
sub.f32 %f500, %f494, %f499;
add.f32 %f501, %f498, %f500;
mul.rn.f32 %f503, %f581, %f499;
neg.f32 %f504, %f503;
fma.rn.f32 %f505, %f581, %f499, %f504;
fma.rn.f32 %f506, %f581, %f501, %f505;
fma.rn.f32 %f508, %f587, %f499, %f506;
add.rn.f32 %f509, %f503, %f508;
neg.f32 %f510, %f509;
add.rn.f32 %f511, %f503, %f510;
add.rn.f32 %f512, %f511, %f508;
mov.b32 %r243, %f509;
setp.eq.s32 %p78, %r243, 1118925336;
add.s32 %r244, %r243, -1;
mov.b32 %f513, %r244;
add.f32 %f514, %f512, 0f37000000;
selp.f32 %f515, %f513, %f509, %p78;
selp.f32 %f123, %f514, %f512, %p78;
mul.f32 %f516, %f515, 0f3FB8AA3B;
cvt.rzi.f32.f32 %f517, %f516;
fma.rn.f32 %f519, %f517, %f588, %f515;
fma.rn.f32 %f521, %f517, %f589, %f519;
mul.f32 %f522, %f521, 0f3FB8AA3B;
ex2.approx.ftz.f32 %f523, %f522;
add.f32 %f524, %f517, 0f00000000;
ex2.approx.f32 %f525, %f524;
mul.f32 %f526, %f523, %f525;
setp.lt.f32 %p79, %f515, 0fC2D20000;
selp.f32 %f527, 0f00000000, %f526, %p79;
setp.gt.f32 %p80, %f515, 0f42D20000;
selp.f32 %f650, 0f7F800000, %f527, %p80;
setp.eq.f32 %p81, %f650, 0f7F800000;
@%p81 bra BB0_81;
fma.rn.f32 %f650, %f650, %f123, %f650;
BB0_81:
setp.lt.f32 %p82, %f94, 0f00000000;
and.pred %p3, %p82, %p51;
mov.b32 %r245, %f650;
xor.b32 %r246, %r245, -2147483648;
mov.b32 %f528, %r246;
selp.f32 %f652, %f528, %f650, %p3;
setp.eq.f32 %p84, %f94, 0f00000000;
@%p84 bra BB0_84;
bra.uni BB0_82;
BB0_84:
add.f32 %f531, %f94, %f94;
selp.f32 %f652, %f531, 0f00000000, %p51;
bra.uni BB0_85;
BB0_82:
setp.geu.f32 %p85, %f94, 0f00000000;
@%p85 bra BB0_85;
mov.f32 %f590, 0f3EE66666;
cvt.rzi.f32.f32 %f530, %f590;
setp.neu.f32 %p86, %f530, 0f3EE66666;
selp.f32 %f652, 0f7FFFFFFF, %f652, %p86;
BB0_85:
abs.f32 %f602, %f94;
add.f32 %f532, %f602, 0f3EE66666;
mov.b32 %r247, %f532;
setp.lt.s32 %p88, %r247, 2139095040;
@%p88 bra BB0_90;
abs.f32 %f603, %f94;
setp.gtu.f32 %p89, %f603, 0f7F800000;
@%p89 bra BB0_89;
bra.uni BB0_87;
BB0_89:
add.f32 %f652, %f94, 0f3EE66666;
bra.uni BB0_90;
BB0_87:
abs.f32 %f604, %f94;
setp.neu.f32 %p90, %f604, 0f7F800000;
@%p90 bra BB0_90;
selp.f32 %f652, 0fFF800000, 0f7F800000, %p3;
BB0_90:
mov.u32 %r280, 4;
mov.u64 %rd131, 0;
mov.u32 %r279, 2;
setp.eq.f32 %p91, %f94, 0f3F800000;
selp.f32 %f533, 0f3F800000, %f652, %p91;
cvt.u64.u32 %rd66, %r4;
cvt.u64.u32 %rd65, %r3;
mov.u64 %rd69, image;
cvta.global.u64 %rd64, %rd69;
// inline asm
call (%rd63), _rt_buffer_get_64, (%rd64, %r279, %r280, %rd65, %rd66, %rd131, %rd131);
// inline asm
cvt.sat.f32.f32 %f534, %f533;
mul.f32 %f535, %f534, 0f437FFD71;
cvt.rzi.u32.f32 %r250, %f535;
cvt.sat.f32.f32 %f536, %f121;
mul.f32 %f537, %f536, 0f437FFD71;
cvt.rzi.u32.f32 %r251, %f537;
cvt.sat.f32.f32 %f538, %f108;
mul.f32 %f539, %f538, 0f437FFD71;
cvt.rzi.u32.f32 %r252, %f539;
cvt.u16.u32 %rs10, %r250;
cvt.u16.u32 %rs11, %r252;
cvt.u16.u32 %rs12, %r251;
mov.u16 %rs13, 255;
st.v4.u8 [%rd63], {%rs10, %rs12, %rs11, %rs13};
ld.global.u32 %r309, [imageEnabled];
BB0_91:
and.b32 %r253, %r309, 4;
setp.eq.s32 %p92, %r253, 0;
@%p92 bra BB0_95;
ld.global.u32 %r254, [additive];
setp.eq.s32 %p93, %r254, 0;
cvt.u64.u32 %rd16, %r3;
cvt.u64.u32 %rd17, %r4;
mov.f32 %f540, 0f3F800000;
// inline asm
{ cvt.rn.f16.f32 %rs14, %f540;}
// inline asm
@%p93 bra BB0_94;
mov.u64 %rd132, 0;
mov.u32 %r281, 2;
mov.u64 %rd82, image_HDR;
cvta.global.u64 %rd71, %rd82;
mov.u32 %r258, 8;
// inline asm
call (%rd70), _rt_buffer_get_64, (%rd71, %r281, %r258, %rd16, %rd17, %rd132, %rd132);
// inline asm
ld.v4.u16 {%rs21, %rs22, %rs23, %rs24}, [%rd70];
// inline asm
{ cvt.f32.f16 %f541, %rs21;}
// inline asm
// inline asm
{ cvt.f32.f16 %f542, %rs22;}
// inline asm
// inline asm
{ cvt.f32.f16 %f543, %rs23;}
// inline asm
// inline asm
call (%rd76), _rt_buffer_get_64, (%rd71, %r281, %r258, %rd16, %rd17, %rd132, %rd132);
// inline asm
add.f32 %f544, %f92, %f541;
add.f32 %f545, %f93, %f542;
add.f32 %f546, %f94, %f543;
// inline asm
{ cvt.rn.f16.f32 %rs20, %f546;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs19, %f545;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs18, %f544;}
// inline asm
st.v4.u16 [%rd76], {%rs18, %rs19, %rs20, %rs14};
bra.uni BB0_95;
BB0_94:
mov.u64 %rd133, 0;
mov.u32 %r282, 2;
mov.u64 %rd89, image_HDR;
cvta.global.u64 %rd84, %rd89;
mov.u32 %r260, 8;
// inline asm
call (%rd83), _rt_buffer_get_64, (%rd84, %r282, %r260, %rd16, %rd17, %rd133, %rd133);
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs27, %f94;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs26, %f93;}
// inline asm
// inline asm
{ cvt.rn.f16.f32 %rs25, %f92;}
// inline asm
st.v4.u16 [%rd83], {%rs25, %rs26, %rs27, %rs14};
BB0_95:
ld.global.u8 %rs28, [imageEnabled];
and.b16 %rs29, %rs28, 64;
setp.eq.s16 %p94, %rs29, 0;
@%p94 bra BB0_105;
mov.u32 %r284, 4;
mov.u64 %rd134, 0;
mov.u32 %r283, 2;
mul.f32 %f550, %f633, %f633;
fma.rn.f32 %f551, %f632, %f632, %f550;
fma.rn.f32 %f552, %f634, %f634, %f551;
sqrt.rn.f32 %f553, %f552;
rcp.rn.f32 %f554, %f553;
mul.f32 %f555, %f632, %f554;
mul.f32 %f556, %f633, %f554;
mul.f32 %f557, %f634, %f554;
cvt.u64.u32 %rd93, %r4;
cvt.u64.u32 %rd92, %r3;
mov.u64 %rd96, image_Dir;
cvta.global.u64 %rd91, %rd96;
// inline asm
call (%rd90), _rt_buffer_get_64, (%rd91, %r283, %r284, %rd92, %rd93, %rd134, %rd134);
// inline asm
fma.rn.f32 %f558, %f555, 0f3F000000, 0f3F000000;
mul.f32 %f559, %f558, 0f437F0000;
cvt.rzi.u32.f32 %r263, %f559;
fma.rn.f32 %f560, %f556, 0f3F000000, 0f3F000000;
mul.f32 %f561, %f560, 0f437F0000;
cvt.rzi.u32.f32 %r264, %f561;
fma.rn.f32 %f562, %f557, 0f3F000000, 0f3F000000;
mul.f32 %f563, %f562, 0f437F0000;
cvt.rzi.u32.f32 %r265, %f563;
cvt.u16.u32 %rs30, %r265;
cvt.u16.u32 %rs31, %r264;
cvt.u16.u32 %rs32, %r263;
mov.u16 %rs33, 255;
st.v4.u8 [%rd90], {%rs32, %rs31, %rs30, %rs33};
BB0_105:
ret;
}