2544 lines
75 KiB
Plaintext
2544 lines
75 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-23083092
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// Cuda compilation tools, release 9.1, V9.1.85
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// Based on LLVM 3.4svn
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//
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.version 6.1
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.target sm_30
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.address_size 64
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// .globl _Z6oxMainv
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.global .align 8 .b8 pixelID[8];
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.global .align 8 .b8 resolution[8];
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.global .align 4 .b8 normal[12];
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.global .align 4 .b8 camPos[12];
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.global .align 4 .b8 root[4];
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.global .align 4 .u32 imageEnabled;
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.global .texref lightmap;
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.global .align 16 .b8 tileInfo[16];
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.global .align 4 .u32 additive;
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.global .align 1 .b8 image[1];
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.global .align 1 .b8 image_HDR[1];
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.global .align 1 .b8 image_HDR2[1];
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.global .align 1 .b8 image_Mask[1];
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.global .align 1 .b8 image_RNM0[1];
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.global .align 1 .b8 image_RNM1[1];
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.global .align 1 .b8 image_RNM2[1];
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.global .align 1 .b8 uvtangent[1];
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.global .align 1 .b8 uvpos[1];
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.global .align 1 .b8 uvnormal[1];
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.global .align 4 .u32 ignoreNormal;
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.global .align 1 .b8 localLights[1];
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
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.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
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.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
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.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
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.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
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.visible .entry _Z6oxMainv(
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)
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{
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.local .align 4 .b8 __local_depot0[12];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<145>;
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.reg .b16 %rs<161>;
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.reg .f32 %f<1590>;
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.reg .b32 %r<261>;
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.reg .b64 %rd<256>;
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mov.u64 %rd255, __local_depot0;
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cvta.local.u64 %SP, %rd255;
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ld.global.v2.u32 {%r36, %r37}, [pixelID];
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cvt.u64.u32 %rd13, %r36;
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cvt.u64.u32 %rd14, %r37;
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mov.u64 %rd17, uvnormal;
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cvta.global.u64 %rd12, %rd17;
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mov.u32 %r34, 2;
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mov.u32 %r35, 4;
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mov.u64 %rd16, 0;
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// inline asm
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call (%rd11), _rt_buffer_get_64, (%rd12, %r34, %r35, %rd13, %rd14, %rd16, %rd16);
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// inline asm
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ld.u32 %r1, [%rd11];
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shr.u32 %r40, %r1, 16;
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cvt.u16.u32 %rs1, %r40;
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and.b16 %rs8, %rs1, 255;
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cvt.u16.u32 %rs9, %r1;
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or.b16 %rs10, %rs9, %rs8;
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setp.eq.s16 %p8, %rs10, 0;
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mov.f32 %f1485, 0f00000000;
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mov.f32 %f1486, %f1485;
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mov.f32 %f1487, %f1485;
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@%p8 bra BB0_2;
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ld.u8 %rs11, [%rd11+1];
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and.b16 %rs13, %rs9, 255;
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cvt.rn.f32.u16 %f301, %rs13;
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div.rn.f32 %f302, %f301, 0f437F0000;
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fma.rn.f32 %f303, %f302, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f304, %rs11;
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div.rn.f32 %f305, %f304, 0f437F0000;
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fma.rn.f32 %f306, %f305, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f307, %rs8;
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div.rn.f32 %f308, %f307, 0f437F0000;
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fma.rn.f32 %f309, %f308, 0f40000000, 0fBF800000;
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mul.f32 %f310, %f306, %f306;
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fma.rn.f32 %f311, %f303, %f303, %f310;
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fma.rn.f32 %f312, %f309, %f309, %f311;
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sqrt.rn.f32 %f313, %f312;
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rcp.rn.f32 %f314, %f313;
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mul.f32 %f1485, %f303, %f314;
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mul.f32 %f1486, %f306, %f314;
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mul.f32 %f1487, %f309, %f314;
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BB0_2:
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ld.global.v2.u32 {%r41, %r42}, [pixelID];
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ld.global.v2.u32 {%r44, %r45}, [tileInfo];
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add.s32 %r2, %r41, %r44;
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add.s32 %r3, %r42, %r45;
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setp.eq.f32 %p9, %f1486, 0f00000000;
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setp.eq.f32 %p10, %f1485, 0f00000000;
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and.pred %p11, %p10, %p9;
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setp.eq.f32 %p12, %f1487, 0f00000000;
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and.pred %p13, %p11, %p12;
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@%p13 bra BB0_114;
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bra.uni BB0_3;
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BB0_114:
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ld.global.u32 %r260, [imageEnabled];
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and.b32 %r215, %r260, 1;
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setp.eq.b32 %p137, %r215, 1;
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@!%p137 bra BB0_116;
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bra.uni BB0_115;
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BB0_115:
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cvt.u64.u32 %rd163, %r2;
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cvt.u64.u32 %rd164, %r3;
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mov.u64 %rd167, image;
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cvta.global.u64 %rd162, %rd167;
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// inline asm
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call (%rd161), _rt_buffer_get_64, (%rd162, %r34, %r35, %rd163, %rd164, %rd16, %rd16);
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// inline asm
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mov.u16 %rs105, 0;
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st.v4.u8 [%rd161], {%rs105, %rs105, %rs105, %rs105};
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ld.global.u32 %r260, [imageEnabled];
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BB0_116:
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and.b32 %r218, %r260, 8;
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setp.eq.s32 %p138, %r218, 0;
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@%p138 bra BB0_118;
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cvt.u64.u32 %rd171, %r3;
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cvt.u64.u32 %rd170, %r2;
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mov.u64 %rd174, image_Mask;
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cvta.global.u64 %rd169, %rd174;
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// inline asm
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call (%rd168), _rt_buffer_get_64, (%rd169, %r34, %r34, %rd170, %rd171, %rd16, %rd16);
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// inline asm
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mov.f32 %f1453, 0f00000000;
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cvt.rzi.u32.f32 %r221, %f1453;
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cvt.u16.u32 %rs106, %r221;
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mov.u16 %rs107, 0;
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st.v2.u8 [%rd168], {%rs106, %rs107};
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ld.global.u32 %r260, [imageEnabled];
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BB0_118:
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cvt.u64.u32 %rd9, %r2;
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cvt.u64.u32 %rd10, %r3;
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and.b32 %r222, %r260, 4;
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setp.eq.s32 %p139, %r222, 0;
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@%p139 bra BB0_122;
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ld.global.u32 %r223, [additive];
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setp.eq.s32 %p140, %r223, 0;
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@%p140 bra BB0_121;
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mov.u64 %rd187, image_HDR;
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cvta.global.u64 %rd176, %rd187;
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mov.u32 %r227, 8;
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// inline asm
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call (%rd175), _rt_buffer_get_64, (%rd176, %r34, %r227, %rd9, %rd10, %rd16, %rd16);
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// inline asm
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ld.v4.u16 {%rs114, %rs115, %rs116, %rs117}, [%rd175];
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// inline asm
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{ cvt.f32.f16 %f1454, %rs114;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f1455, %rs115;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f1456, %rs116;}
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// inline asm
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// inline asm
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call (%rd181), _rt_buffer_get_64, (%rd176, %r34, %r227, %rd9, %rd10, %rd16, %rd16);
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// inline asm
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add.f32 %f1457, %f1454, 0f00000000;
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add.f32 %f1458, %f1455, 0f00000000;
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add.f32 %f1459, %f1456, 0f00000000;
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// inline asm
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{ cvt.rn.f16.f32 %rs113, %f1459;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs112, %f1458;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs111, %f1457;}
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// inline asm
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mov.u16 %rs118, 0;
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st.v4.u16 [%rd181], {%rs111, %rs112, %rs113, %rs118};
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bra.uni BB0_122;
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BB0_3:
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ld.global.v2.u32 {%r53, %r54}, [pixelID];
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cvt.u64.u32 %rd20, %r53;
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cvt.u64.u32 %rd21, %r54;
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mov.u64 %rd30, uvpos;
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cvta.global.u64 %rd19, %rd30;
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mov.u32 %r50, 12;
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// inline asm
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call (%rd18), _rt_buffer_get_64, (%rd19, %r34, %r50, %rd20, %rd21, %rd16, %rd16);
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// inline asm
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ld.f32 %f9, [%rd18+8];
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ld.f32 %f8, [%rd18+4];
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ld.f32 %f7, [%rd18];
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mul.f32 %f318, %f7, 0f3456BF95;
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mul.f32 %f319, %f8, 0f3456BF95;
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mul.f32 %f320, %f9, 0f3456BF95;
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abs.f32 %f321, %f1485;
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div.rn.f32 %f322, %f318, %f321;
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abs.f32 %f323, %f1486;
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div.rn.f32 %f324, %f319, %f323;
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abs.f32 %f325, %f1487;
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div.rn.f32 %f326, %f320, %f325;
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abs.f32 %f327, %f322;
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abs.f32 %f328, %f324;
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abs.f32 %f329, %f326;
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mov.f32 %f330, 0f38D1B717;
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max.f32 %f331, %f327, %f330;
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max.f32 %f332, %f328, %f330;
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max.f32 %f333, %f329, %f330;
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fma.rn.f32 %f10, %f1485, %f331, %f7;
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fma.rn.f32 %f11, %f1486, %f332, %f8;
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fma.rn.f32 %f12, %f1487, %f333, %f9;
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ld.global.v2.u32 {%r57, %r58}, [pixelID];
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cvt.u64.u32 %rd26, %r57;
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cvt.u64.u32 %rd27, %r58;
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mov.u64 %rd31, uvtangent;
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cvta.global.u64 %rd25, %rd31;
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// inline asm
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call (%rd24), _rt_buffer_get_64, (%rd25, %r34, %r35, %rd26, %rd27, %rd16, %rd16);
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// inline asm
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ld.u32 %r4, [%rd24];
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shr.u32 %r5, %r4, 16;
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cvt.u16.u32 %rs15, %r5;
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and.b16 %rs16, %rs15, 255;
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cvt.u16.u32 %rs17, %r4;
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or.b16 %rs18, %rs17, %rs16;
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setp.eq.s16 %p14, %rs18, 0;
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mov.f32 %f1497, 0f00000000;
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mov.f32 %f1488, %f1497;
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mov.f32 %f1489, %f1497;
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mov.f32 %f1490, %f1497;
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@%p14 bra BB0_5;
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ld.u8 %rs19, [%rd24+1];
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and.b16 %rs21, %rs17, 255;
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cvt.rn.f32.u16 %f334, %rs21;
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div.rn.f32 %f335, %f334, 0f437F0000;
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fma.rn.f32 %f336, %f335, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f337, %rs19;
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div.rn.f32 %f338, %f337, 0f437F0000;
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fma.rn.f32 %f339, %f338, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f340, %rs16;
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div.rn.f32 %f341, %f340, 0f437F0000;
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|
fma.rn.f32 %f342, %f341, 0f40000000, 0fBF800000;
|
|
mul.f32 %f343, %f339, %f339;
|
|
fma.rn.f32 %f344, %f336, %f336, %f343;
|
|
fma.rn.f32 %f345, %f342, %f342, %f344;
|
|
sqrt.rn.f32 %f346, %f345;
|
|
rcp.rn.f32 %f347, %f346;
|
|
mul.f32 %f1488, %f336, %f347;
|
|
mul.f32 %f1489, %f339, %f347;
|
|
mul.f32 %f1490, %f342, %f347;
|
|
|
|
BB0_5:
|
|
mul.f32 %f351, %f1487, %f1489;
|
|
mul.f32 %f352, %f1486, %f1490;
|
|
sub.f32 %f353, %f352, %f351;
|
|
mul.f32 %f354, %f1485, %f1490;
|
|
mul.f32 %f355, %f1487, %f1488;
|
|
sub.f32 %f356, %f355, %f354;
|
|
mul.f32 %f357, %f1486, %f1488;
|
|
mul.f32 %f358, %f1485, %f1489;
|
|
sub.f32 %f359, %f358, %f357;
|
|
setp.lt.u32 %p15, %r4, 16777216;
|
|
selp.f32 %f360, 0fBF800000, 0f3F800000, %p15;
|
|
mul.f32 %f361, %f353, %f360;
|
|
mul.f32 %f362, %f356, %f360;
|
|
mul.f32 %f363, %f359, %f360;
|
|
mul.f32 %f364, %f361, 0f00000000;
|
|
mul.f32 %f365, %f362, 0f00000000;
|
|
mul.f32 %f366, %f363, 0f00000000;
|
|
fma.rn.f32 %f367, %f1488, 0f3F5105EC, %f364;
|
|
fma.rn.f32 %f368, %f1489, 0f3F5105EC, %f365;
|
|
fma.rn.f32 %f369, %f1490, 0f3F5105EC, %f366;
|
|
mul.f32 %f19, %f1485, 0f3F13CD3A;
|
|
add.f32 %f20, %f19, %f367;
|
|
mul.f32 %f21, %f1486, 0f3F13CD3A;
|
|
add.f32 %f22, %f21, %f368;
|
|
mul.f32 %f23, %f1487, 0f3F13CD3A;
|
|
add.f32 %f24, %f23, %f369;
|
|
ld.global.v2.u32 {%r63, %r64}, [pixelID];
|
|
cvt.u64.u32 %rd34, %r63;
|
|
cvt.u64.u32 %rd35, %r64;
|
|
// inline asm
|
|
call (%rd32), _rt_buffer_get_64, (%rd25, %r34, %r35, %rd34, %rd35, %rd16, %rd16);
|
|
// inline asm
|
|
ld.u32 %r6, [%rd32];
|
|
shr.u32 %r7, %r6, 16;
|
|
cvt.u16.u32 %rs24, %r7;
|
|
and.b16 %rs25, %rs24, 255;
|
|
cvt.u16.u32 %rs26, %r6;
|
|
or.b16 %rs27, %rs26, %rs25;
|
|
setp.eq.s16 %p16, %rs27, 0;
|
|
mov.f32 %f1491, %f1497;
|
|
mov.f32 %f1492, %f1497;
|
|
mov.f32 %f1493, %f1497;
|
|
@%p16 bra BB0_7;
|
|
|
|
ld.u8 %rs28, [%rd32+1];
|
|
and.b16 %rs30, %rs26, 255;
|
|
cvt.rn.f32.u16 %f370, %rs30;
|
|
div.rn.f32 %f371, %f370, 0f437F0000;
|
|
fma.rn.f32 %f372, %f371, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f373, %rs28;
|
|
div.rn.f32 %f374, %f373, 0f437F0000;
|
|
fma.rn.f32 %f375, %f374, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f376, %rs25;
|
|
div.rn.f32 %f377, %f376, 0f437F0000;
|
|
fma.rn.f32 %f378, %f377, 0f40000000, 0fBF800000;
|
|
mul.f32 %f379, %f375, %f375;
|
|
fma.rn.f32 %f380, %f372, %f372, %f379;
|
|
fma.rn.f32 %f381, %f378, %f378, %f380;
|
|
sqrt.rn.f32 %f382, %f381;
|
|
rcp.rn.f32 %f383, %f382;
|
|
mul.f32 %f1491, %f372, %f383;
|
|
mul.f32 %f1492, %f375, %f383;
|
|
mul.f32 %f1493, %f378, %f383;
|
|
|
|
BB0_7:
|
|
mul.f32 %f387, %f1487, %f1492;
|
|
mul.f32 %f388, %f1486, %f1493;
|
|
sub.f32 %f389, %f388, %f387;
|
|
mul.f32 %f390, %f1485, %f1493;
|
|
mul.f32 %f391, %f1487, %f1491;
|
|
sub.f32 %f392, %f391, %f390;
|
|
mul.f32 %f393, %f1486, %f1491;
|
|
mul.f32 %f394, %f1485, %f1492;
|
|
sub.f32 %f395, %f394, %f393;
|
|
setp.lt.u32 %p17, %r6, 16777216;
|
|
selp.f32 %f396, 0fBF800000, 0f3F800000, %p17;
|
|
mul.f32 %f397, %f389, %f396;
|
|
mul.f32 %f398, %f392, %f396;
|
|
mul.f32 %f399, %f395, %f396;
|
|
mul.f32 %f400, %f397, 0f3F3504F3;
|
|
mul.f32 %f401, %f398, 0f3F3504F3;
|
|
mul.f32 %f402, %f399, 0f3F3504F3;
|
|
fma.rn.f32 %f403, %f1491, 0fBED105EC, %f400;
|
|
fma.rn.f32 %f404, %f1492, 0fBED105EC, %f401;
|
|
fma.rn.f32 %f405, %f1493, 0fBED105EC, %f402;
|
|
add.f32 %f31, %f19, %f403;
|
|
add.f32 %f32, %f21, %f404;
|
|
add.f32 %f33, %f23, %f405;
|
|
ld.global.v2.u32 {%r69, %r70}, [pixelID];
|
|
cvt.u64.u32 %rd41, %r69;
|
|
cvt.u64.u32 %rd42, %r70;
|
|
// inline asm
|
|
call (%rd39), _rt_buffer_get_64, (%rd25, %r34, %r35, %rd41, %rd42, %rd16, %rd16);
|
|
// inline asm
|
|
ld.u32 %r8, [%rd39];
|
|
shr.u32 %r9, %r8, 16;
|
|
cvt.u16.u32 %rs33, %r9;
|
|
and.b16 %rs34, %rs33, 255;
|
|
cvt.u16.u32 %rs35, %r8;
|
|
or.b16 %rs36, %rs35, %rs34;
|
|
setp.eq.s16 %p18, %rs36, 0;
|
|
mov.f32 %f1494, %f1497;
|
|
mov.f32 %f1495, %f1497;
|
|
mov.f32 %f1496, %f1497;
|
|
@%p18 bra BB0_9;
|
|
|
|
ld.u8 %rs37, [%rd39+1];
|
|
and.b16 %rs39, %rs35, 255;
|
|
cvt.rn.f32.u16 %f406, %rs39;
|
|
div.rn.f32 %f407, %f406, 0f437F0000;
|
|
fma.rn.f32 %f408, %f407, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f409, %rs37;
|
|
div.rn.f32 %f410, %f409, 0f437F0000;
|
|
fma.rn.f32 %f411, %f410, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f412, %rs34;
|
|
div.rn.f32 %f413, %f412, 0f437F0000;
|
|
fma.rn.f32 %f414, %f413, 0f40000000, 0fBF800000;
|
|
mul.f32 %f415, %f411, %f411;
|
|
fma.rn.f32 %f416, %f408, %f408, %f415;
|
|
fma.rn.f32 %f417, %f414, %f414, %f416;
|
|
sqrt.rn.f32 %f418, %f417;
|
|
rcp.rn.f32 %f419, %f418;
|
|
mul.f32 %f1494, %f408, %f419;
|
|
mul.f32 %f1495, %f411, %f419;
|
|
mul.f32 %f1496, %f414, %f419;
|
|
|
|
BB0_9:
|
|
mul.f32 %f433, %f1487, %f1495;
|
|
mul.f32 %f434, %f1486, %f1496;
|
|
sub.f32 %f435, %f434, %f433;
|
|
mul.f32 %f436, %f1485, %f1496;
|
|
mul.f32 %f437, %f1487, %f1494;
|
|
sub.f32 %f438, %f437, %f436;
|
|
mul.f32 %f439, %f1486, %f1494;
|
|
mul.f32 %f440, %f1485, %f1495;
|
|
sub.f32 %f441, %f440, %f439;
|
|
setp.lt.u32 %p19, %r8, 16777216;
|
|
selp.f32 %f442, 0fBF800000, 0f3F800000, %p19;
|
|
mul.f32 %f443, %f435, %f442;
|
|
mul.f32 %f444, %f438, %f442;
|
|
mul.f32 %f445, %f441, %f442;
|
|
mul.f32 %f446, %f443, 0fBF3504F3;
|
|
mul.f32 %f447, %f444, 0fBF3504F3;
|
|
mul.f32 %f448, %f445, 0fBF3504F3;
|
|
fma.rn.f32 %f449, %f1494, 0fBED105EC, %f446;
|
|
fma.rn.f32 %f450, %f1495, 0fBED105EC, %f447;
|
|
fma.rn.f32 %f451, %f1496, 0fBED105EC, %f448;
|
|
add.f32 %f40, %f19, %f449;
|
|
add.f32 %f41, %f21, %f450;
|
|
add.f32 %f42, %f23, %f451;
|
|
mov.u64 %rd51, localLights;
|
|
cvta.global.u64 %rd50, %rd51;
|
|
mov.u32 %r73, 1;
|
|
mov.u32 %r74, 96;
|
|
// inline asm
|
|
call (%rd46, %rd47, %rd48, %rd49), _rt_buffer_get_size_64, (%rd50, %r73, %r74);
|
|
// inline asm
|
|
cvt.u32.u64 %r10, %rd46;
|
|
setp.eq.s32 %p20, %r10, 0;
|
|
mov.f32 %f1498, %f1497;
|
|
mov.f32 %f1499, %f1497;
|
|
mov.f32 %f1500, %f1497;
|
|
mov.f32 %f1501, %f1497;
|
|
mov.f32 %f1502, %f1497;
|
|
mov.f32 %f1503, %f1497;
|
|
mov.f32 %f1504, %f1497;
|
|
mov.f32 %f1505, %f1497;
|
|
mov.f32 %f1506, %f1497;
|
|
mov.f32 %f1507, %f1497;
|
|
mov.f32 %f1508, %f1497;
|
|
mov.f32 %f1509, %f1497;
|
|
@%p20 bra BB0_53;
|
|
|
|
mov.f32 %f465, 0f40000000;
|
|
cvt.rzi.f32.f32 %f466, %f465;
|
|
add.f32 %f467, %f466, %f466;
|
|
mov.f32 %f468, 0f40800000;
|
|
sub.f32 %f469, %f468, %f467;
|
|
abs.f32 %f43, %f469;
|
|
mul.f32 %f44, %f10, 0f3456BF95;
|
|
mul.f32 %f45, %f11, 0f3456BF95;
|
|
mul.f32 %f46, %f12, 0f3456BF95;
|
|
mov.f32 %f464, 0f00000000;
|
|
mov.u32 %r252, 0;
|
|
abs.f32 %f700, %f44;
|
|
abs.f32 %f701, %f45;
|
|
max.f32 %f702, %f700, %f701;
|
|
abs.f32 %f703, %f46;
|
|
max.f32 %f704, %f702, %f703;
|
|
mov.f32 %f1497, %f464;
|
|
mov.f32 %f1498, %f464;
|
|
mov.f32 %f1499, %f464;
|
|
mov.f32 %f1500, %f464;
|
|
mov.f32 %f1501, %f464;
|
|
mov.f32 %f1502, %f464;
|
|
mov.f32 %f1503, %f464;
|
|
mov.f32 %f1504, %f464;
|
|
mov.f32 %f1505, %f464;
|
|
mov.f32 %f1506, %f464;
|
|
mov.f32 %f1507, %f464;
|
|
mov.f32 %f1508, %f464;
|
|
mov.f32 %f1509, %f464;
|
|
|
|
BB0_11:
|
|
cvt.u64.u32 %rd54, %r252;
|
|
// inline asm
|
|
call (%rd52), _rt_buffer_get_64, (%rd50, %r73, %r74, %rd54, %rd16, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.f32 {%f472, %f473, %f474, %f475}, [%rd52+80];
|
|
ld.v4.f32 {%f476, %f477, %f478, %f479}, [%rd52+64];
|
|
ld.v4.f32 {%f480, %f481, %f482, %f483}, [%rd52+48];
|
|
ld.v4.f32 {%f484, %f1518, %f1519, %f487}, [%rd52+32];
|
|
ld.v4.f32 {%f488, %f489, %f490, %f491}, [%rd52+16];
|
|
ld.v4.f32 {%f492, %f493, %f494, %f495}, [%rd52];
|
|
mov.b32 %r12, %f475;
|
|
sub.f32 %f84, %f493, %f7;
|
|
sub.f32 %f86, %f494, %f8;
|
|
sub.f32 %f88, %f495, %f9;
|
|
mul.f32 %f497, %f86, %f86;
|
|
fma.rn.f32 %f498, %f84, %f84, %f497;
|
|
fma.rn.f32 %f499, %f88, %f88, %f498;
|
|
sqrt.rn.f32 %f89, %f499;
|
|
rcp.rn.f32 %f500, %f89;
|
|
mul.f32 %f90, %f84, %f500;
|
|
mul.f32 %f91, %f86, %f500;
|
|
mul.f32 %f92, %f88, %f500;
|
|
mul.f32 %f93, %f89, %f491;
|
|
abs.f32 %f94, %f93;
|
|
setp.lt.f32 %p21, %f94, 0f00800000;
|
|
mul.f32 %f501, %f94, 0f4B800000;
|
|
selp.f32 %f502, 0fC3170000, 0fC2FE0000, %p21;
|
|
selp.f32 %f503, %f501, %f94, %p21;
|
|
mov.b32 %r78, %f503;
|
|
and.b32 %r79, %r78, 8388607;
|
|
or.b32 %r80, %r79, 1065353216;
|
|
mov.b32 %f504, %r80;
|
|
shr.u32 %r81, %r78, 23;
|
|
cvt.rn.f32.u32 %f505, %r81;
|
|
add.f32 %f506, %f502, %f505;
|
|
setp.gt.f32 %p22, %f504, 0f3FB504F3;
|
|
mul.f32 %f507, %f504, 0f3F000000;
|
|
add.f32 %f508, %f506, 0f3F800000;
|
|
selp.f32 %f509, %f507, %f504, %p22;
|
|
selp.f32 %f510, %f508, %f506, %p22;
|
|
add.f32 %f511, %f509, 0fBF800000;
|
|
add.f32 %f471, %f509, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f470,%f471;
|
|
// inline asm
|
|
add.f32 %f512, %f511, %f511;
|
|
mul.f32 %f513, %f470, %f512;
|
|
mul.f32 %f514, %f513, %f513;
|
|
mov.f32 %f515, 0f3C4CAF63;
|
|
mov.f32 %f516, 0f3B18F0FE;
|
|
fma.rn.f32 %f517, %f516, %f514, %f515;
|
|
mov.f32 %f518, 0f3DAAAABD;
|
|
fma.rn.f32 %f519, %f517, %f514, %f518;
|
|
mul.rn.f32 %f520, %f519, %f514;
|
|
mul.rn.f32 %f521, %f520, %f513;
|
|
sub.f32 %f522, %f511, %f513;
|
|
neg.f32 %f523, %f513;
|
|
add.f32 %f524, %f522, %f522;
|
|
fma.rn.f32 %f525, %f523, %f511, %f524;
|
|
mul.rn.f32 %f526, %f470, %f525;
|
|
add.f32 %f527, %f521, %f513;
|
|
sub.f32 %f528, %f513, %f527;
|
|
add.f32 %f529, %f521, %f528;
|
|
add.f32 %f530, %f526, %f529;
|
|
add.f32 %f531, %f527, %f530;
|
|
sub.f32 %f532, %f527, %f531;
|
|
add.f32 %f533, %f530, %f532;
|
|
mov.f32 %f534, 0f3F317200;
|
|
mul.rn.f32 %f535, %f510, %f534;
|
|
mov.f32 %f536, 0f35BFBE8E;
|
|
mul.rn.f32 %f537, %f510, %f536;
|
|
add.f32 %f538, %f535, %f531;
|
|
sub.f32 %f539, %f535, %f538;
|
|
add.f32 %f540, %f531, %f539;
|
|
add.f32 %f541, %f533, %f540;
|
|
add.f32 %f542, %f537, %f541;
|
|
add.f32 %f543, %f538, %f542;
|
|
sub.f32 %f544, %f538, %f543;
|
|
add.f32 %f545, %f542, %f544;
|
|
mul.rn.f32 %f95, %f468, %f543;
|
|
neg.f32 %f547, %f95;
|
|
fma.rn.f32 %f548, %f468, %f543, %f547;
|
|
fma.rn.f32 %f549, %f468, %f545, %f548;
|
|
fma.rn.f32 %f96, %f464, %f543, %f549;
|
|
add.rn.f32 %f97, %f95, %f96;
|
|
mov.b32 %r82, %f97;
|
|
setp.eq.s32 %p1, %r82, 1118925336;
|
|
add.s32 %r83, %r82, -1;
|
|
mov.b32 %f551, %r83;
|
|
selp.f32 %f552, %f551, %f97, %p1;
|
|
mul.f32 %f553, %f552, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f554, %f553;
|
|
mov.f32 %f555, 0fBF317200;
|
|
fma.rn.f32 %f556, %f554, %f555, %f552;
|
|
mov.f32 %f557, 0fB5BFBE8E;
|
|
fma.rn.f32 %f558, %f554, %f557, %f556;
|
|
mul.f32 %f559, %f558, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f560, %f559;
|
|
add.f32 %f561, %f554, 0f00000000;
|
|
ex2.approx.f32 %f562, %f561;
|
|
mul.f32 %f563, %f560, %f562;
|
|
setp.lt.f32 %p23, %f552, 0fC2D20000;
|
|
selp.f32 %f564, 0f00000000, %f563, %p23;
|
|
setp.gt.f32 %p24, %f552, 0f42D20000;
|
|
selp.f32 %f1510, 0f7F800000, %f564, %p24;
|
|
setp.eq.f32 %p25, %f1510, 0f7F800000;
|
|
@%p25 bra BB0_13;
|
|
|
|
neg.f32 %f565, %f97;
|
|
add.rn.f32 %f566, %f95, %f565;
|
|
add.rn.f32 %f567, %f566, %f96;
|
|
add.f32 %f568, %f567, 0f37000000;
|
|
selp.f32 %f569, %f568, %f567, %p1;
|
|
fma.rn.f32 %f1510, %f1510, %f569, %f1510;
|
|
|
|
BB0_13:
|
|
setp.lt.f32 %p26, %f93, 0f00000000;
|
|
setp.eq.f32 %p27, %f43, 0f3F800000;
|
|
and.pred %p2, %p26, %p27;
|
|
mov.b32 %r84, %f1510;
|
|
xor.b32 %r85, %r84, -2147483648;
|
|
mov.b32 %f570, %r85;
|
|
selp.f32 %f1512, %f570, %f1510, %p2;
|
|
setp.eq.f32 %p28, %f93, 0f00000000;
|
|
@%p28 bra BB0_16;
|
|
bra.uni BB0_14;
|
|
|
|
BB0_16:
|
|
add.f32 %f573, %f93, %f93;
|
|
selp.f32 %f1512, %f573, 0f00000000, %p27;
|
|
bra.uni BB0_17;
|
|
|
|
BB0_14:
|
|
setp.geu.f32 %p29, %f93, 0f00000000;
|
|
@%p29 bra BB0_17;
|
|
|
|
cvt.rzi.f32.f32 %f572, %f468;
|
|
setp.neu.f32 %p30, %f572, 0f40800000;
|
|
selp.f32 %f1512, 0f7FFFFFFF, %f1512, %p30;
|
|
|
|
BB0_17:
|
|
add.f32 %f574, %f94, 0f40800000;
|
|
mov.b32 %r86, %f574;
|
|
setp.lt.s32 %p32, %r86, 2139095040;
|
|
@%p32 bra BB0_22;
|
|
|
|
setp.gtu.f32 %p33, %f94, 0f7F800000;
|
|
@%p33 bra BB0_21;
|
|
bra.uni BB0_19;
|
|
|
|
BB0_21:
|
|
add.f32 %f1512, %f93, 0f40800000;
|
|
bra.uni BB0_22;
|
|
|
|
BB0_19:
|
|
setp.neu.f32 %p34, %f94, 0f7F800000;
|
|
@%p34 bra BB0_22;
|
|
|
|
selp.f32 %f1512, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
BB0_22:
|
|
mul.f32 %f575, %f89, %f489;
|
|
mov.f32 %f1548, 0f3F800000;
|
|
sub.f32 %f577, %f1548, %f1512;
|
|
setp.eq.f32 %p35, %f93, 0f3F800000;
|
|
selp.f32 %f578, 0f00000000, %f577, %p35;
|
|
cvt.sat.f32.f32 %f579, %f578;
|
|
fma.rn.f32 %f580, %f575, %f575, %f490;
|
|
div.rn.f32 %f123, %f579, %f580;
|
|
mul.f32 %f581, %f1486, %f91;
|
|
fma.rn.f32 %f582, %f1485, %f90, %f581;
|
|
fma.rn.f32 %f583, %f1487, %f92, %f582;
|
|
ld.global.u32 %r87, [ignoreNormal];
|
|
setp.eq.s32 %p36, %r87, 0;
|
|
selp.f32 %f584, %f583, 0f3F800000, %p36;
|
|
cvt.sat.f32.f32 %f124, %f584;
|
|
setp.eq.f32 %p37, %f492, 0f3F800000;
|
|
@%p37 bra BB0_29;
|
|
bra.uni BB0_23;
|
|
|
|
BB0_29:
|
|
setp.leu.f32 %p41, %f487, 0f00000000;
|
|
@%p41 bra BB0_25;
|
|
|
|
setp.geu.f32 %p42, %f483, 0f00000000;
|
|
@%p42 bra BB0_31;
|
|
|
|
sub.f32 %f1484, %f495, %f9;
|
|
sub.f32 %f1483, %f493, %f7;
|
|
sub.f32 %f1482, %f494, %f8;
|
|
mul.f32 %f607, %f473, %f1482;
|
|
fma.rn.f32 %f608, %f472, %f1483, %f607;
|
|
fma.rn.f32 %f609, %f474, %f1484, %f608;
|
|
rcp.rn.f32 %f610, %f609;
|
|
mul.f32 %f1513, %f1483, %f610;
|
|
mul.f32 %f1514, %f1482, %f610;
|
|
mul.f32 %f1515, %f1484, %f610;
|
|
neg.f32 %f483, %f483;
|
|
bra.uni BB0_33;
|
|
|
|
BB0_23:
|
|
setp.eq.f32 %p38, %f492, 0f40000000;
|
|
@%p38 bra BB0_27;
|
|
bra.uni BB0_24;
|
|
|
|
BB0_27:
|
|
setp.leu.f32 %p40, %f487, 0f00000000;
|
|
@%p40 bra BB0_25;
|
|
|
|
mul.f32 %f601, %f481, %f91;
|
|
fma.rn.f32 %f602, %f480, %f90, %f601;
|
|
mul.f32 %f603, %f477, %f91;
|
|
fma.rn.f32 %f604, %f476, %f90, %f603;
|
|
mul.f32 %f605, %f473, %f91;
|
|
fma.rn.f32 %f606, %f472, %f90, %f605;
|
|
fma.rn.f32 %f598, %f482, %f92, %f602;
|
|
fma.rn.f32 %f599, %f478, %f92, %f604;
|
|
fma.rn.f32 %f600, %f474, %f92, %f606;
|
|
cvt.rzi.s32.f32 %r88, %f487;
|
|
mov.u32 %r89, 6;
|
|
mov.u32 %r90, 0;
|
|
// inline asm
|
|
call (%f594, %f595, %f596, %f597), _rt_texture_get_base_id, (%r88, %r89, %f598, %f599, %f600, %r90);
|
|
// inline asm
|
|
mul.f32 %f1517, %f484, %f594;
|
|
mul.f32 %f1518, %f1518, %f595;
|
|
mul.f32 %f1519, %f1519, %f596;
|
|
bra.uni BB0_34;
|
|
|
|
BB0_24:
|
|
setp.neu.f32 %p39, %f492, 0f40800000;
|
|
@%p39 bra BB0_25;
|
|
|
|
mul.f32 %f585, %f472, %f90;
|
|
mul.f32 %f586, %f473, %f91;
|
|
neg.f32 %f587, %f586;
|
|
sub.f32 %f588, %f587, %f585;
|
|
mul.f32 %f589, %f474, %f92;
|
|
sub.f32 %f590, %f588, %f589;
|
|
fma.rn.f32 %f591, %f487, %f590, %f483;
|
|
cvt.sat.f32.f32 %f592, %f591;
|
|
mul.f32 %f593, %f592, %f592;
|
|
mul.f32 %f1520, %f123, %f593;
|
|
mov.f32 %f1517, %f484;
|
|
bra.uni BB0_35;
|
|
|
|
BB0_25:
|
|
mov.f32 %f1517, %f484;
|
|
bra.uni BB0_34;
|
|
|
|
BB0_31:
|
|
mov.f32 %f1513, %f90;
|
|
mov.f32 %f1514, %f91;
|
|
mov.f32 %f1515, %f92;
|
|
|
|
BB0_33:
|
|
mul.f32 %f619, %f474, %f92;
|
|
mul.f32 %f620, %f473, %f91;
|
|
neg.f32 %f621, %f620;
|
|
mul.f32 %f622, %f472, %f90;
|
|
sub.f32 %f623, %f621, %f622;
|
|
sub.f32 %f624, %f623, %f619;
|
|
setp.gt.f32 %p43, %f624, 0f00000000;
|
|
selp.f32 %f625, 0f3F800000, 0f00000000, %p43;
|
|
mul.f32 %f626, %f481, %f1514;
|
|
fma.rn.f32 %f627, %f480, %f1513, %f626;
|
|
mul.f32 %f628, %f477, %f1514;
|
|
fma.rn.f32 %f629, %f476, %f1513, %f628;
|
|
fma.rn.f32 %f630, %f482, %f1515, %f627;
|
|
fma.rn.f32 %f631, %f478, %f1515, %f629;
|
|
fma.rn.f32 %f632, %f483, %f630, 0f3F000000;
|
|
mov.f32 %f633, 0f3F800000;
|
|
sub.f32 %f615, %f633, %f632;
|
|
fma.rn.f32 %f616, %f483, %f631, 0f3F000000;
|
|
cvt.rzi.s32.f32 %r91, %f487;
|
|
mov.f32 %f618, 0f00000000;
|
|
// inline asm
|
|
call (%f611, %f612, %f613, %f614), _rt_texture_get_f_id, (%r91, %r34, %f615, %f616, %f618, %f618);
|
|
// inline asm
|
|
mul.f32 %f634, %f625, %f611;
|
|
mul.f32 %f635, %f625, %f612;
|
|
mul.f32 %f636, %f625, %f613;
|
|
mul.f32 %f1517, %f484, %f634;
|
|
mul.f32 %f1518, %f1518, %f635;
|
|
mul.f32 %f1519, %f1519, %f636;
|
|
|
|
BB0_34:
|
|
mov.f32 %f1520, %f123;
|
|
|
|
BB0_35:
|
|
max.f32 %f649, %f1517, %f1518;
|
|
max.f32 %f650, %f649, %f1519;
|
|
mul.f32 %f144, %f124, %f1520;
|
|
mul.f32 %f651, %f144, %f650;
|
|
setp.lt.f32 %p45, %f651, 0f3727C5AC;
|
|
mov.pred %p144, -1;
|
|
mov.f32 %f157, 0f00000000;
|
|
mov.f32 %f1522, %f157;
|
|
mov.f32 %f1523, %f157;
|
|
mov.f32 %f1524, %f157;
|
|
mov.f32 %f1525, %f157;
|
|
mov.f32 %f1526, %f157;
|
|
mov.f32 %f1527, %f157;
|
|
mov.f32 %f1528, %f157;
|
|
mov.f32 %f1529, %f157;
|
|
mov.f32 %f1530, %f157;
|
|
mov.f32 %f1531, %f157;
|
|
mov.f32 %f1532, %f157;
|
|
@%p45 bra BB0_37;
|
|
|
|
mul.f32 %f157, %f1517, %f144;
|
|
mul.f32 %f652, %f22, %f91;
|
|
fma.rn.f32 %f653, %f20, %f90, %f652;
|
|
fma.rn.f32 %f654, %f24, %f92, %f653;
|
|
cvt.sat.f32.f32 %f655, %f654;
|
|
mul.f32 %f656, %f1517, %f1520;
|
|
mul.f32 %f657, %f656, %f655;
|
|
mul.f32 %f658, %f1518, %f1520;
|
|
mul.f32 %f659, %f658, %f655;
|
|
mul.f32 %f660, %f1519, %f1520;
|
|
mul.f32 %f661, %f660, %f655;
|
|
mul.f32 %f662, %f32, %f91;
|
|
fma.rn.f32 %f663, %f31, %f90, %f662;
|
|
fma.rn.f32 %f664, %f33, %f92, %f663;
|
|
cvt.sat.f32.f32 %f665, %f664;
|
|
mul.f32 %f666, %f656, %f665;
|
|
mul.f32 %f667, %f658, %f665;
|
|
mul.f32 %f668, %f660, %f665;
|
|
mul.f32 %f669, %f41, %f91;
|
|
fma.rn.f32 %f670, %f40, %f90, %f669;
|
|
fma.rn.f32 %f671, %f42, %f92, %f670;
|
|
cvt.sat.f32.f32 %f672, %f671;
|
|
mul.f32 %f673, %f656, %f672;
|
|
mul.f32 %f674, %f658, %f672;
|
|
mul.f32 %f675, %f660, %f672;
|
|
add.f32 %f676, %f657, %f666;
|
|
add.f32 %f677, %f659, %f667;
|
|
add.f32 %f678, %f661, %f668;
|
|
add.f32 %f679, %f676, %f673;
|
|
add.f32 %f680, %f677, %f674;
|
|
add.f32 %f681, %f678, %f675;
|
|
mul.f32 %f682, %f679, 0f3F13CD3A;
|
|
mul.f32 %f683, %f680, 0f3F13CD3A;
|
|
mul.f32 %f684, %f681, 0f3F13CD3A;
|
|
div.rn.f32 %f685, %f157, %f682;
|
|
mul.f32 %f1522, %f1518, %f144;
|
|
div.rn.f32 %f686, %f1522, %f683;
|
|
mul.f32 %f1523, %f1519, %f144;
|
|
div.rn.f32 %f687, %f1523, %f684;
|
|
setp.eq.f32 %p47, %f157, 0f00000000;
|
|
selp.f32 %f688, 0f00000000, %f685, %p47;
|
|
setp.eq.f32 %p48, %f1522, 0f00000000;
|
|
selp.f32 %f689, 0f00000000, %f686, %p48;
|
|
setp.eq.f32 %p49, %f1523, 0f00000000;
|
|
selp.f32 %f690, 0f00000000, %f687, %p49;
|
|
mul.f32 %f1524, %f657, %f688;
|
|
mul.f32 %f1525, %f659, %f689;
|
|
mul.f32 %f1526, %f661, %f690;
|
|
mul.f32 %f1527, %f666, %f688;
|
|
mul.f32 %f1528, %f667, %f689;
|
|
mul.f32 %f1529, %f668, %f690;
|
|
mul.f32 %f1530, %f673, %f688;
|
|
mul.f32 %f1531, %f674, %f689;
|
|
mul.f32 %f1532, %f675, %f690;
|
|
mov.pred %p144, 0;
|
|
|
|
BB0_37:
|
|
@%p144 bra BB0_52;
|
|
|
|
setp.eq.s32 %p50, %r12, 0;
|
|
mov.u16 %rs160, 0;
|
|
mov.f32 %f1549, %f1548;
|
|
mov.f32 %f1550, %f1548;
|
|
@%p50 bra BB0_49;
|
|
|
|
abs.s32 %r14, %r12;
|
|
mov.f32 %f1545, 0f00000000;
|
|
setp.lt.s32 %p51, %r14, 1;
|
|
mov.f32 %f1546, %f1545;
|
|
mov.f32 %f1547, %f1545;
|
|
@%p51 bra BB0_48;
|
|
|
|
max.f32 %f170, %f704, %f330;
|
|
and.b32 %r15, %r14, 3;
|
|
setp.eq.s32 %p52, %r15, 0;
|
|
add.u64 %rd59, %SP, 0;
|
|
cvta.to.local.u64 %rd5, %rd59;
|
|
mov.f32 %f1545, 0f00000000;
|
|
mov.u32 %r256, 0;
|
|
mov.f32 %f1546, %f1545;
|
|
mov.f32 %f1547, %f1545;
|
|
@%p52 bra BB0_46;
|
|
|
|
setp.eq.s32 %p53, %r15, 1;
|
|
mov.f32 %f1536, 0f00000000;
|
|
mov.u32 %r254, 0;
|
|
mov.f32 %f1537, %f1536;
|
|
mov.f32 %f1538, %f1536;
|
|
@%p53 bra BB0_45;
|
|
|
|
setp.eq.s32 %p54, %r15, 2;
|
|
mov.f32 %f1533, 0f00000000;
|
|
mov.u32 %r253, 0;
|
|
mov.f32 %f1534, %f1533;
|
|
mov.f32 %f1535, %f1533;
|
|
@%p54 bra BB0_44;
|
|
|
|
sub.f32 %f720, %f493, %f488;
|
|
sub.f32 %f721, %f494, %f488;
|
|
sub.f32 %f722, %f495, %f488;
|
|
sub.f32 %f723, %f720, %f7;
|
|
sub.f32 %f724, %f721, %f8;
|
|
sub.f32 %f725, %f722, %f9;
|
|
mul.f32 %f726, %f724, %f724;
|
|
fma.rn.f32 %f727, %f723, %f723, %f726;
|
|
fma.rn.f32 %f728, %f725, %f725, %f727;
|
|
sqrt.rn.f32 %f719, %f728;
|
|
rcp.rn.f32 %f729, %f719;
|
|
mul.f32 %f715, %f729, %f723;
|
|
mul.f32 %f716, %f729, %f724;
|
|
mul.f32 %f717, %f729, %f725;
|
|
ld.global.u32 %r100, [imageEnabled];
|
|
and.b32 %r101, %r100, 32;
|
|
setp.eq.s32 %p55, %r101, 0;
|
|
selp.f32 %f730, 0f3F800000, 0f41200000, %p55;
|
|
mul.f32 %f718, %f730, %f170;
|
|
mov.u32 %r102, 1065353216;
|
|
st.local.u32 [%rd5+8], %r102;
|
|
st.local.u32 [%rd5+4], %r102;
|
|
st.local.u32 [%rd5], %r102;
|
|
ld.global.u32 %r96, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r96, %f10, %f11, %f12, %f715, %f716, %f717, %r73, %f718, %f719, %rd59, %r50);
|
|
// inline asm
|
|
ld.local.f32 %f731, [%rd5];
|
|
add.f32 %f1535, %f731, 0f00000000;
|
|
ld.local.f32 %f732, [%rd5+4];
|
|
add.f32 %f1534, %f732, 0f00000000;
|
|
ld.local.f32 %f733, [%rd5+8];
|
|
add.f32 %f1533, %f733, 0f00000000;
|
|
mov.u32 %r253, %r73;
|
|
|
|
BB0_44:
|
|
cvt.rn.f32.s32 %f742, %r253;
|
|
mul.f32 %f743, %f742, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f744, %f743;
|
|
sub.f32 %f745, %f743, %f744;
|
|
mul.f32 %f746, %f742, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f747, %f746;
|
|
sub.f32 %f748, %f746, %f747;
|
|
mul.f32 %f749, %f742, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f750, %f749;
|
|
sub.f32 %f751, %f749, %f750;
|
|
add.f32 %f752, %f748, 0f4199851F;
|
|
add.f32 %f753, %f751, 0f4199851F;
|
|
add.f32 %f754, %f745, 0f4199851F;
|
|
mul.f32 %f755, %f748, %f753;
|
|
fma.rn.f32 %f756, %f745, %f752, %f755;
|
|
fma.rn.f32 %f757, %f754, %f751, %f756;
|
|
add.f32 %f758, %f745, %f757;
|
|
add.f32 %f759, %f748, %f757;
|
|
add.f32 %f760, %f751, %f757;
|
|
add.f32 %f761, %f758, %f759;
|
|
mul.f32 %f762, %f760, %f761;
|
|
cvt.rmi.f32.f32 %f763, %f762;
|
|
sub.f32 %f764, %f762, %f763;
|
|
add.f32 %f765, %f758, %f760;
|
|
mul.f32 %f766, %f759, %f765;
|
|
cvt.rmi.f32.f32 %f767, %f766;
|
|
sub.f32 %f768, %f766, %f767;
|
|
add.f32 %f769, %f759, %f760;
|
|
mul.f32 %f770, %f758, %f769;
|
|
cvt.rmi.f32.f32 %f771, %f770;
|
|
sub.f32 %f772, %f770, %f771;
|
|
fma.rn.f32 %f773, %f764, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f774, %f768, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f775, %f772, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f776, %f488, %f773, %f493;
|
|
fma.rn.f32 %f777, %f488, %f774, %f494;
|
|
fma.rn.f32 %f778, %f488, %f775, %f495;
|
|
sub.f32 %f779, %f776, %f7;
|
|
sub.f32 %f780, %f777, %f8;
|
|
sub.f32 %f781, %f778, %f9;
|
|
mul.f32 %f782, %f780, %f780;
|
|
fma.rn.f32 %f783, %f779, %f779, %f782;
|
|
fma.rn.f32 %f784, %f781, %f781, %f783;
|
|
sqrt.rn.f32 %f741, %f784;
|
|
rcp.rn.f32 %f785, %f741;
|
|
mul.f32 %f737, %f785, %f779;
|
|
mul.f32 %f738, %f785, %f780;
|
|
mul.f32 %f739, %f785, %f781;
|
|
ld.global.u32 %r106, [imageEnabled];
|
|
and.b32 %r107, %r106, 32;
|
|
setp.eq.s32 %p56, %r107, 0;
|
|
selp.f32 %f786, 0f3F800000, 0f41200000, %p56;
|
|
mul.f32 %f740, %f786, %f170;
|
|
mov.u32 %r108, 1065353216;
|
|
st.local.u32 [%rd5+8], %r108;
|
|
st.local.u32 [%rd5+4], %r108;
|
|
st.local.u32 [%rd5], %r108;
|
|
ld.global.u32 %r103, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r103, %f10, %f11, %f12, %f737, %f738, %f739, %r73, %f740, %f741, %rd59, %r50);
|
|
// inline asm
|
|
ld.local.f32 %f787, [%rd5];
|
|
add.f32 %f1538, %f1535, %f787;
|
|
ld.local.f32 %f788, [%rd5+4];
|
|
add.f32 %f1537, %f1534, %f788;
|
|
ld.local.f32 %f789, [%rd5+8];
|
|
add.f32 %f1536, %f1533, %f789;
|
|
add.s32 %r254, %r253, 1;
|
|
|
|
BB0_45:
|
|
cvt.rn.f32.s32 %f798, %r254;
|
|
mul.f32 %f799, %f798, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f800, %f799;
|
|
sub.f32 %f801, %f799, %f800;
|
|
mul.f32 %f802, %f798, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f803, %f802;
|
|
sub.f32 %f804, %f802, %f803;
|
|
mul.f32 %f805, %f798, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f806, %f805;
|
|
sub.f32 %f807, %f805, %f806;
|
|
add.f32 %f808, %f804, 0f4199851F;
|
|
add.f32 %f809, %f807, 0f4199851F;
|
|
add.f32 %f810, %f801, 0f4199851F;
|
|
mul.f32 %f811, %f804, %f809;
|
|
fma.rn.f32 %f812, %f801, %f808, %f811;
|
|
fma.rn.f32 %f813, %f810, %f807, %f812;
|
|
add.f32 %f814, %f801, %f813;
|
|
add.f32 %f815, %f804, %f813;
|
|
add.f32 %f816, %f807, %f813;
|
|
add.f32 %f817, %f814, %f815;
|
|
mul.f32 %f818, %f816, %f817;
|
|
cvt.rmi.f32.f32 %f819, %f818;
|
|
sub.f32 %f820, %f818, %f819;
|
|
add.f32 %f821, %f814, %f816;
|
|
mul.f32 %f822, %f815, %f821;
|
|
cvt.rmi.f32.f32 %f823, %f822;
|
|
sub.f32 %f824, %f822, %f823;
|
|
add.f32 %f825, %f815, %f816;
|
|
mul.f32 %f826, %f814, %f825;
|
|
cvt.rmi.f32.f32 %f827, %f826;
|
|
sub.f32 %f828, %f826, %f827;
|
|
fma.rn.f32 %f829, %f820, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f830, %f824, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f831, %f828, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f832, %f488, %f829, %f493;
|
|
fma.rn.f32 %f833, %f488, %f830, %f494;
|
|
fma.rn.f32 %f834, %f488, %f831, %f495;
|
|
sub.f32 %f835, %f832, %f7;
|
|
sub.f32 %f836, %f833, %f8;
|
|
sub.f32 %f837, %f834, %f9;
|
|
mul.f32 %f838, %f836, %f836;
|
|
fma.rn.f32 %f839, %f835, %f835, %f838;
|
|
fma.rn.f32 %f840, %f837, %f837, %f839;
|
|
sqrt.rn.f32 %f797, %f840;
|
|
rcp.rn.f32 %f841, %f797;
|
|
mul.f32 %f793, %f841, %f835;
|
|
mul.f32 %f794, %f841, %f836;
|
|
mul.f32 %f795, %f841, %f837;
|
|
ld.global.u32 %r112, [imageEnabled];
|
|
and.b32 %r113, %r112, 32;
|
|
setp.eq.s32 %p57, %r113, 0;
|
|
selp.f32 %f842, 0f3F800000, 0f41200000, %p57;
|
|
mul.f32 %f796, %f842, %f170;
|
|
mov.u32 %r114, 1065353216;
|
|
st.local.u32 [%rd5+8], %r114;
|
|
st.local.u32 [%rd5+4], %r114;
|
|
st.local.u32 [%rd5], %r114;
|
|
ld.global.u32 %r109, [root];
|
|
mov.u32 %r110, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r109, %f10, %f11, %f12, %f793, %f794, %f795, %r110, %f796, %f797, %rd59, %r50);
|
|
// inline asm
|
|
ld.local.f32 %f843, [%rd5];
|
|
add.f32 %f1547, %f1538, %f843;
|
|
ld.local.f32 %f844, [%rd5+4];
|
|
add.f32 %f1546, %f1537, %f844;
|
|
ld.local.f32 %f845, [%rd5+8];
|
|
add.f32 %f1545, %f1536, %f845;
|
|
add.s32 %r256, %r254, 1;
|
|
|
|
BB0_46:
|
|
setp.lt.u32 %p58, %r14, 4;
|
|
@%p58 bra BB0_48;
|
|
|
|
BB0_47:
|
|
cvt.rn.f32.s32 %f878, %r256;
|
|
mul.f32 %f879, %f878, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f880, %f879;
|
|
sub.f32 %f881, %f879, %f880;
|
|
mul.f32 %f882, %f878, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f883, %f882;
|
|
sub.f32 %f884, %f882, %f883;
|
|
mul.f32 %f885, %f878, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f886, %f885;
|
|
sub.f32 %f887, %f885, %f886;
|
|
add.f32 %f888, %f884, 0f4199851F;
|
|
add.f32 %f889, %f887, 0f4199851F;
|
|
add.f32 %f890, %f881, 0f4199851F;
|
|
mul.f32 %f891, %f884, %f889;
|
|
fma.rn.f32 %f892, %f881, %f888, %f891;
|
|
fma.rn.f32 %f893, %f890, %f887, %f892;
|
|
add.f32 %f894, %f881, %f893;
|
|
add.f32 %f895, %f884, %f893;
|
|
add.f32 %f896, %f887, %f893;
|
|
add.f32 %f897, %f894, %f895;
|
|
mul.f32 %f898, %f896, %f897;
|
|
cvt.rmi.f32.f32 %f899, %f898;
|
|
sub.f32 %f900, %f898, %f899;
|
|
add.f32 %f901, %f894, %f896;
|
|
mul.f32 %f902, %f895, %f901;
|
|
cvt.rmi.f32.f32 %f903, %f902;
|
|
sub.f32 %f904, %f902, %f903;
|
|
add.f32 %f905, %f895, %f896;
|
|
mul.f32 %f906, %f894, %f905;
|
|
cvt.rmi.f32.f32 %f907, %f906;
|
|
sub.f32 %f908, %f906, %f907;
|
|
fma.rn.f32 %f909, %f900, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f910, %f904, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f911, %f908, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f912, %f488, %f909, %f493;
|
|
fma.rn.f32 %f913, %f488, %f910, %f494;
|
|
fma.rn.f32 %f914, %f488, %f911, %f495;
|
|
sub.f32 %f915, %f912, %f7;
|
|
sub.f32 %f916, %f913, %f8;
|
|
sub.f32 %f917, %f914, %f9;
|
|
mul.f32 %f918, %f916, %f916;
|
|
fma.rn.f32 %f919, %f915, %f915, %f918;
|
|
fma.rn.f32 %f920, %f917, %f917, %f919;
|
|
sqrt.rn.f32 %f853, %f920;
|
|
rcp.rn.f32 %f921, %f853;
|
|
mul.f32 %f849, %f921, %f915;
|
|
mul.f32 %f850, %f921, %f916;
|
|
mul.f32 %f851, %f921, %f917;
|
|
ld.global.u32 %r127, [imageEnabled];
|
|
and.b32 %r128, %r127, 32;
|
|
setp.eq.s32 %p59, %r128, 0;
|
|
selp.f32 %f922, 0f3F800000, 0f41200000, %p59;
|
|
mul.f32 %f852, %f922, %f170;
|
|
mov.u32 %r129, 1065353216;
|
|
st.local.u32 [%rd5+8], %r129;
|
|
st.local.u32 [%rd5+4], %r129;
|
|
st.local.u32 [%rd5], %r129;
|
|
ld.global.u32 %r115, [root];
|
|
mov.u32 %r125, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r115, %f10, %f11, %f12, %f849, %f850, %f851, %r125, %f852, %f853, %rd59, %r50);
|
|
// inline asm
|
|
ld.local.f32 %f923, [%rd5];
|
|
add.f32 %f924, %f1547, %f923;
|
|
ld.local.f32 %f925, [%rd5+4];
|
|
add.f32 %f926, %f1546, %f925;
|
|
ld.local.f32 %f927, [%rd5+8];
|
|
add.f32 %f928, %f1545, %f927;
|
|
add.s32 %r130, %r256, 1;
|
|
cvt.rn.f32.s32 %f929, %r130;
|
|
mul.f32 %f930, %f929, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f931, %f930;
|
|
sub.f32 %f932, %f930, %f931;
|
|
mul.f32 %f933, %f929, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f934, %f933;
|
|
sub.f32 %f935, %f933, %f934;
|
|
mul.f32 %f936, %f929, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f937, %f936;
|
|
sub.f32 %f938, %f936, %f937;
|
|
add.f32 %f939, %f935, 0f4199851F;
|
|
add.f32 %f940, %f938, 0f4199851F;
|
|
add.f32 %f941, %f932, 0f4199851F;
|
|
mul.f32 %f942, %f935, %f940;
|
|
fma.rn.f32 %f943, %f932, %f939, %f942;
|
|
fma.rn.f32 %f944, %f941, %f938, %f943;
|
|
add.f32 %f945, %f932, %f944;
|
|
add.f32 %f946, %f935, %f944;
|
|
add.f32 %f947, %f938, %f944;
|
|
add.f32 %f948, %f945, %f946;
|
|
mul.f32 %f949, %f947, %f948;
|
|
cvt.rmi.f32.f32 %f950, %f949;
|
|
sub.f32 %f951, %f949, %f950;
|
|
add.f32 %f952, %f945, %f947;
|
|
mul.f32 %f953, %f946, %f952;
|
|
cvt.rmi.f32.f32 %f954, %f953;
|
|
sub.f32 %f955, %f953, %f954;
|
|
add.f32 %f956, %f946, %f947;
|
|
mul.f32 %f957, %f945, %f956;
|
|
cvt.rmi.f32.f32 %f958, %f957;
|
|
sub.f32 %f959, %f957, %f958;
|
|
fma.rn.f32 %f960, %f951, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f961, %f955, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f962, %f959, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f963, %f488, %f960, %f493;
|
|
fma.rn.f32 %f964, %f488, %f961, %f494;
|
|
fma.rn.f32 %f965, %f488, %f962, %f495;
|
|
sub.f32 %f966, %f963, %f7;
|
|
sub.f32 %f967, %f964, %f8;
|
|
sub.f32 %f968, %f965, %f9;
|
|
mul.f32 %f969, %f967, %f967;
|
|
fma.rn.f32 %f970, %f966, %f966, %f969;
|
|
fma.rn.f32 %f971, %f968, %f968, %f970;
|
|
sqrt.rn.f32 %f861, %f971;
|
|
rcp.rn.f32 %f972, %f861;
|
|
mul.f32 %f857, %f972, %f966;
|
|
mul.f32 %f858, %f972, %f967;
|
|
mul.f32 %f859, %f972, %f968;
|
|
ld.global.u32 %r131, [imageEnabled];
|
|
and.b32 %r132, %r131, 32;
|
|
setp.eq.s32 %p60, %r132, 0;
|
|
selp.f32 %f973, 0f3F800000, 0f41200000, %p60;
|
|
mul.f32 %f860, %f973, %f170;
|
|
st.local.u32 [%rd5+8], %r129;
|
|
st.local.u32 [%rd5+4], %r129;
|
|
st.local.u32 [%rd5], %r129;
|
|
ld.global.u32 %r118, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r118, %f10, %f11, %f12, %f857, %f858, %f859, %r125, %f860, %f861, %rd59, %r50);
|
|
// inline asm
|
|
ld.local.f32 %f974, [%rd5];
|
|
add.f32 %f975, %f924, %f974;
|
|
ld.local.f32 %f976, [%rd5+4];
|
|
add.f32 %f977, %f926, %f976;
|
|
ld.local.f32 %f978, [%rd5+8];
|
|
add.f32 %f979, %f928, %f978;
|
|
add.s32 %r133, %r256, 2;
|
|
cvt.rn.f32.s32 %f980, %r133;
|
|
mul.f32 %f981, %f980, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f982, %f981;
|
|
sub.f32 %f983, %f981, %f982;
|
|
mul.f32 %f984, %f980, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f985, %f984;
|
|
sub.f32 %f986, %f984, %f985;
|
|
mul.f32 %f987, %f980, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f988, %f987;
|
|
sub.f32 %f989, %f987, %f988;
|
|
add.f32 %f990, %f986, 0f4199851F;
|
|
add.f32 %f991, %f989, 0f4199851F;
|
|
add.f32 %f992, %f983, 0f4199851F;
|
|
mul.f32 %f993, %f986, %f991;
|
|
fma.rn.f32 %f994, %f983, %f990, %f993;
|
|
fma.rn.f32 %f995, %f992, %f989, %f994;
|
|
add.f32 %f996, %f983, %f995;
|
|
add.f32 %f997, %f986, %f995;
|
|
add.f32 %f998, %f989, %f995;
|
|
add.f32 %f999, %f996, %f997;
|
|
mul.f32 %f1000, %f998, %f999;
|
|
cvt.rmi.f32.f32 %f1001, %f1000;
|
|
sub.f32 %f1002, %f1000, %f1001;
|
|
add.f32 %f1003, %f996, %f998;
|
|
mul.f32 %f1004, %f997, %f1003;
|
|
cvt.rmi.f32.f32 %f1005, %f1004;
|
|
sub.f32 %f1006, %f1004, %f1005;
|
|
add.f32 %f1007, %f997, %f998;
|
|
mul.f32 %f1008, %f996, %f1007;
|
|
cvt.rmi.f32.f32 %f1009, %f1008;
|
|
sub.f32 %f1010, %f1008, %f1009;
|
|
fma.rn.f32 %f1011, %f1002, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1012, %f1006, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1013, %f1010, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1014, %f488, %f1011, %f493;
|
|
fma.rn.f32 %f1015, %f488, %f1012, %f494;
|
|
fma.rn.f32 %f1016, %f488, %f1013, %f495;
|
|
sub.f32 %f1017, %f1014, %f7;
|
|
sub.f32 %f1018, %f1015, %f8;
|
|
sub.f32 %f1019, %f1016, %f9;
|
|
mul.f32 %f1020, %f1018, %f1018;
|
|
fma.rn.f32 %f1021, %f1017, %f1017, %f1020;
|
|
fma.rn.f32 %f1022, %f1019, %f1019, %f1021;
|
|
sqrt.rn.f32 %f869, %f1022;
|
|
rcp.rn.f32 %f1023, %f869;
|
|
mul.f32 %f865, %f1023, %f1017;
|
|
mul.f32 %f866, %f1023, %f1018;
|
|
mul.f32 %f867, %f1023, %f1019;
|
|
ld.global.u32 %r134, [imageEnabled];
|
|
and.b32 %r135, %r134, 32;
|
|
setp.eq.s32 %p61, %r135, 0;
|
|
selp.f32 %f1024, 0f3F800000, 0f41200000, %p61;
|
|
mul.f32 %f868, %f1024, %f170;
|
|
st.local.u32 [%rd5+8], %r129;
|
|
st.local.u32 [%rd5+4], %r129;
|
|
st.local.u32 [%rd5], %r129;
|
|
ld.global.u32 %r121, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r121, %f10, %f11, %f12, %f865, %f866, %f867, %r125, %f868, %f869, %rd59, %r50);
|
|
// inline asm
|
|
ld.local.f32 %f1025, [%rd5];
|
|
add.f32 %f1026, %f975, %f1025;
|
|
ld.local.f32 %f1027, [%rd5+4];
|
|
add.f32 %f1028, %f977, %f1027;
|
|
ld.local.f32 %f1029, [%rd5+8];
|
|
add.f32 %f1030, %f979, %f1029;
|
|
add.s32 %r136, %r256, 3;
|
|
cvt.rn.f32.s32 %f1031, %r136;
|
|
mul.f32 %f1032, %f1031, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f1033, %f1032;
|
|
sub.f32 %f1034, %f1032, %f1033;
|
|
mul.f32 %f1035, %f1031, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f1036, %f1035;
|
|
sub.f32 %f1037, %f1035, %f1036;
|
|
mul.f32 %f1038, %f1031, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f1039, %f1038;
|
|
sub.f32 %f1040, %f1038, %f1039;
|
|
add.f32 %f1041, %f1037, 0f4199851F;
|
|
add.f32 %f1042, %f1040, 0f4199851F;
|
|
add.f32 %f1043, %f1034, 0f4199851F;
|
|
mul.f32 %f1044, %f1037, %f1042;
|
|
fma.rn.f32 %f1045, %f1034, %f1041, %f1044;
|
|
fma.rn.f32 %f1046, %f1043, %f1040, %f1045;
|
|
add.f32 %f1047, %f1034, %f1046;
|
|
add.f32 %f1048, %f1037, %f1046;
|
|
add.f32 %f1049, %f1040, %f1046;
|
|
add.f32 %f1050, %f1047, %f1048;
|
|
mul.f32 %f1051, %f1049, %f1050;
|
|
cvt.rmi.f32.f32 %f1052, %f1051;
|
|
sub.f32 %f1053, %f1051, %f1052;
|
|
add.f32 %f1054, %f1047, %f1049;
|
|
mul.f32 %f1055, %f1048, %f1054;
|
|
cvt.rmi.f32.f32 %f1056, %f1055;
|
|
sub.f32 %f1057, %f1055, %f1056;
|
|
add.f32 %f1058, %f1048, %f1049;
|
|
mul.f32 %f1059, %f1047, %f1058;
|
|
cvt.rmi.f32.f32 %f1060, %f1059;
|
|
sub.f32 %f1061, %f1059, %f1060;
|
|
fma.rn.f32 %f1062, %f1053, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1063, %f1057, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1064, %f1061, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1065, %f488, %f1062, %f493;
|
|
fma.rn.f32 %f1066, %f488, %f1063, %f494;
|
|
fma.rn.f32 %f1067, %f488, %f1064, %f495;
|
|
sub.f32 %f1068, %f1065, %f7;
|
|
sub.f32 %f1069, %f1066, %f8;
|
|
sub.f32 %f1070, %f1067, %f9;
|
|
mul.f32 %f1071, %f1069, %f1069;
|
|
fma.rn.f32 %f1072, %f1068, %f1068, %f1071;
|
|
fma.rn.f32 %f1073, %f1070, %f1070, %f1072;
|
|
sqrt.rn.f32 %f877, %f1073;
|
|
rcp.rn.f32 %f1074, %f877;
|
|
mul.f32 %f873, %f1074, %f1068;
|
|
mul.f32 %f874, %f1074, %f1069;
|
|
mul.f32 %f875, %f1074, %f1070;
|
|
ld.global.u32 %r137, [imageEnabled];
|
|
and.b32 %r138, %r137, 32;
|
|
setp.eq.s32 %p62, %r138, 0;
|
|
selp.f32 %f1075, 0f3F800000, 0f41200000, %p62;
|
|
mul.f32 %f876, %f1075, %f170;
|
|
st.local.u32 [%rd5+8], %r129;
|
|
st.local.u32 [%rd5+4], %r129;
|
|
st.local.u32 [%rd5], %r129;
|
|
ld.global.u32 %r124, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r124, %f10, %f11, %f12, %f873, %f874, %f875, %r125, %f876, %f877, %rd59, %r50);
|
|
// inline asm
|
|
ld.local.f32 %f1076, [%rd5];
|
|
add.f32 %f1547, %f1026, %f1076;
|
|
ld.local.f32 %f1077, [%rd5+4];
|
|
add.f32 %f1546, %f1028, %f1077;
|
|
ld.local.f32 %f1078, [%rd5+8];
|
|
add.f32 %f1545, %f1030, %f1078;
|
|
add.s32 %r256, %r256, 4;
|
|
setp.lt.s32 %p63, %r256, %r14;
|
|
@%p63 bra BB0_47;
|
|
|
|
BB0_48:
|
|
cvt.rn.f32.s32 %f1079, %r14;
|
|
rcp.rn.f32 %f1080, %f1079;
|
|
mul.f32 %f1548, %f1547, %f1080;
|
|
mul.f32 %f1549, %f1546, %f1080;
|
|
mul.f32 %f1550, %f1545, %f1080;
|
|
shr.u32 %r139, %r12, 31;
|
|
cvt.u16.u32 %rs160, %r139;
|
|
|
|
BB0_49:
|
|
fma.rn.f32 %f1509, %f157, %f1548, %f1509;
|
|
fma.rn.f32 %f1508, %f1522, %f1549, %f1508;
|
|
fma.rn.f32 %f1507, %f1523, %f1550, %f1507;
|
|
fma.rn.f32 %f1506, %f1524, %f1548, %f1506;
|
|
fma.rn.f32 %f1505, %f1525, %f1549, %f1505;
|
|
fma.rn.f32 %f1504, %f1526, %f1550, %f1504;
|
|
fma.rn.f32 %f1503, %f1527, %f1548, %f1503;
|
|
fma.rn.f32 %f1502, %f1528, %f1549, %f1502;
|
|
fma.rn.f32 %f1501, %f1529, %f1550, %f1501;
|
|
fma.rn.f32 %f1500, %f1530, %f1548, %f1500;
|
|
fma.rn.f32 %f1499, %f1531, %f1549, %f1499;
|
|
fma.rn.f32 %f1498, %f1532, %f1550, %f1498;
|
|
setp.eq.s16 %p64, %rs160, 0;
|
|
@%p64 bra BB0_51;
|
|
|
|
div.rn.f32 %f1081, %f157, %f484;
|
|
div.rn.f32 %f1082, %f1081, %f123;
|
|
cvt.sat.f32.f32 %f1083, %f1082;
|
|
mul.f32 %f1548, %f1548, %f1083;
|
|
|
|
BB0_51:
|
|
add.f32 %f1497, %f1497, %f1548;
|
|
|
|
BB0_52:
|
|
add.s32 %r252, %r252, 1;
|
|
setp.lt.u32 %p65, %r252, %r10;
|
|
@%p65 bra BB0_11;
|
|
|
|
BB0_53:
|
|
ld.global.u32 %r258, [imageEnabled];
|
|
and.b32 %r140, %r258, 8;
|
|
setp.eq.s32 %p66, %r140, 0;
|
|
@%p66 bra BB0_66;
|
|
|
|
cvt.sat.f32.f32 %f245, %f1497;
|
|
cvt.u64.u32 %rd70, %r3;
|
|
cvt.u64.u32 %rd69, %r2;
|
|
mov.u64 %rd73, image_Mask;
|
|
cvta.global.u64 %rd68, %rd73;
|
|
// inline asm
|
|
call (%rd67), _rt_buffer_get_64, (%rd68, %r34, %r34, %rd69, %rd70, %rd16, %rd16);
|
|
// inline asm
|
|
mov.f32 %f1086, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f1087, %f1086;
|
|
fma.rn.f32 %f1088, %f1087, 0fC0000000, 0f3EE8BA2E;
|
|
abs.f32 %f246, %f1088;
|
|
abs.f32 %f247, %f245;
|
|
setp.lt.f32 %p67, %f247, 0f00800000;
|
|
mul.f32 %f1089, %f247, 0f4B800000;
|
|
selp.f32 %f1090, 0fC3170000, 0fC2FE0000, %p67;
|
|
selp.f32 %f1091, %f1089, %f247, %p67;
|
|
mov.b32 %r143, %f1091;
|
|
and.b32 %r144, %r143, 8388607;
|
|
or.b32 %r145, %r144, 1065353216;
|
|
mov.b32 %f1092, %r145;
|
|
shr.u32 %r146, %r143, 23;
|
|
cvt.rn.f32.u32 %f1093, %r146;
|
|
add.f32 %f1094, %f1090, %f1093;
|
|
setp.gt.f32 %p68, %f1092, 0f3FB504F3;
|
|
mul.f32 %f1095, %f1092, 0f3F000000;
|
|
add.f32 %f1096, %f1094, 0f3F800000;
|
|
selp.f32 %f1097, %f1095, %f1092, %p68;
|
|
selp.f32 %f1098, %f1096, %f1094, %p68;
|
|
add.f32 %f1099, %f1097, 0fBF800000;
|
|
add.f32 %f1085, %f1097, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1084,%f1085;
|
|
// inline asm
|
|
add.f32 %f1100, %f1099, %f1099;
|
|
mul.f32 %f1101, %f1084, %f1100;
|
|
mul.f32 %f1102, %f1101, %f1101;
|
|
mov.f32 %f1103, 0f3C4CAF63;
|
|
mov.f32 %f1104, 0f3B18F0FE;
|
|
fma.rn.f32 %f1105, %f1104, %f1102, %f1103;
|
|
mov.f32 %f1106, 0f3DAAAABD;
|
|
fma.rn.f32 %f1107, %f1105, %f1102, %f1106;
|
|
mul.rn.f32 %f1108, %f1107, %f1102;
|
|
mul.rn.f32 %f1109, %f1108, %f1101;
|
|
sub.f32 %f1110, %f1099, %f1101;
|
|
neg.f32 %f1111, %f1101;
|
|
add.f32 %f1112, %f1110, %f1110;
|
|
fma.rn.f32 %f1113, %f1111, %f1099, %f1112;
|
|
mul.rn.f32 %f1114, %f1084, %f1113;
|
|
add.f32 %f1115, %f1109, %f1101;
|
|
sub.f32 %f1116, %f1101, %f1115;
|
|
add.f32 %f1117, %f1109, %f1116;
|
|
add.f32 %f1118, %f1114, %f1117;
|
|
add.f32 %f1119, %f1115, %f1118;
|
|
sub.f32 %f1120, %f1115, %f1119;
|
|
add.f32 %f1121, %f1118, %f1120;
|
|
mov.f32 %f1122, 0f3F317200;
|
|
mul.rn.f32 %f1123, %f1098, %f1122;
|
|
mov.f32 %f1124, 0f35BFBE8E;
|
|
mul.rn.f32 %f1125, %f1098, %f1124;
|
|
add.f32 %f1126, %f1123, %f1119;
|
|
sub.f32 %f1127, %f1123, %f1126;
|
|
add.f32 %f1128, %f1119, %f1127;
|
|
add.f32 %f1129, %f1121, %f1128;
|
|
add.f32 %f1130, %f1125, %f1129;
|
|
add.f32 %f1131, %f1126, %f1130;
|
|
sub.f32 %f1132, %f1126, %f1131;
|
|
add.f32 %f1133, %f1130, %f1132;
|
|
mov.f32 %f1134, 0f3EE8BA2E;
|
|
mul.rn.f32 %f1135, %f1134, %f1131;
|
|
neg.f32 %f1136, %f1135;
|
|
fma.rn.f32 %f1137, %f1134, %f1131, %f1136;
|
|
fma.rn.f32 %f1138, %f1134, %f1133, %f1137;
|
|
mov.f32 %f1139, 0f00000000;
|
|
fma.rn.f32 %f1140, %f1139, %f1131, %f1138;
|
|
add.rn.f32 %f1141, %f1135, %f1140;
|
|
neg.f32 %f1142, %f1141;
|
|
add.rn.f32 %f1143, %f1135, %f1142;
|
|
add.rn.f32 %f1144, %f1143, %f1140;
|
|
mov.b32 %r147, %f1141;
|
|
setp.eq.s32 %p69, %r147, 1118925336;
|
|
add.s32 %r148, %r147, -1;
|
|
mov.b32 %f1145, %r148;
|
|
add.f32 %f1146, %f1144, 0f37000000;
|
|
selp.f32 %f1147, %f1145, %f1141, %p69;
|
|
selp.f32 %f248, %f1146, %f1144, %p69;
|
|
mul.f32 %f1148, %f1147, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1149, %f1148;
|
|
mov.f32 %f1150, 0fBF317200;
|
|
fma.rn.f32 %f1151, %f1149, %f1150, %f1147;
|
|
mov.f32 %f1152, 0fB5BFBE8E;
|
|
fma.rn.f32 %f1153, %f1149, %f1152, %f1151;
|
|
mul.f32 %f1154, %f1153, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1155, %f1154;
|
|
add.f32 %f1156, %f1149, 0f00000000;
|
|
ex2.approx.f32 %f1157, %f1156;
|
|
mul.f32 %f1158, %f1155, %f1157;
|
|
setp.lt.f32 %p70, %f1147, 0fC2D20000;
|
|
selp.f32 %f1159, 0f00000000, %f1158, %p70;
|
|
setp.gt.f32 %p71, %f1147, 0f42D20000;
|
|
selp.f32 %f1578, 0f7F800000, %f1159, %p71;
|
|
setp.eq.f32 %p72, %f1578, 0f7F800000;
|
|
@%p72 bra BB0_56;
|
|
|
|
fma.rn.f32 %f1578, %f1578, %f248, %f1578;
|
|
|
|
BB0_56:
|
|
setp.lt.f32 %p73, %f245, 0f00000000;
|
|
setp.eq.f32 %p74, %f246, 0f3F800000;
|
|
and.pred %p4, %p73, %p74;
|
|
mov.b32 %r149, %f1578;
|
|
xor.b32 %r150, %r149, -2147483648;
|
|
mov.b32 %f1160, %r150;
|
|
selp.f32 %f1580, %f1160, %f1578, %p4;
|
|
setp.eq.f32 %p75, %f245, 0f00000000;
|
|
@%p75 bra BB0_59;
|
|
bra.uni BB0_57;
|
|
|
|
BB0_59:
|
|
add.f32 %f1163, %f245, %f245;
|
|
selp.f32 %f1580, %f1163, 0f00000000, %p74;
|
|
bra.uni BB0_60;
|
|
|
|
BB0_121:
|
|
mov.u64 %rd194, image_HDR;
|
|
cvta.global.u64 %rd189, %rd194;
|
|
mov.u32 %r229, 8;
|
|
// inline asm
|
|
call (%rd188), _rt_buffer_get_64, (%rd189, %r34, %r229, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
mov.f32 %f1460, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs119, %f1460;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs120, 0;
|
|
st.v4.u16 [%rd188], {%rs119, %rs119, %rs119, %rs120};
|
|
|
|
BB0_122:
|
|
ld.global.u32 %r230, [additive];
|
|
setp.eq.s32 %p141, %r230, 0;
|
|
@%p141 bra BB0_124;
|
|
|
|
mov.u64 %rd207, image_RNM0;
|
|
cvta.global.u64 %rd196, %rd207;
|
|
mov.u32 %r234, 8;
|
|
// inline asm
|
|
call (%rd195), _rt_buffer_get_64, (%rd196, %r34, %r234, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs127, %rs128, %rs129, %rs130}, [%rd195];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1461, %rs127;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1462, %rs128;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1463, %rs129;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd201), _rt_buffer_get_64, (%rd196, %r34, %r234, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1464, %f1461, 0f00000000;
|
|
add.f32 %f1465, %f1462, 0f00000000;
|
|
add.f32 %f1466, %f1463, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs126, %f1466;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs125, %f1465;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs124, %f1464;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs131, 0;
|
|
st.v4.u16 [%rd201], {%rs124, %rs125, %rs126, %rs131};
|
|
bra.uni BB0_125;
|
|
|
|
BB0_124:
|
|
mov.u64 %rd214, image_RNM0;
|
|
cvta.global.u64 %rd209, %rd214;
|
|
mov.u32 %r236, 8;
|
|
// inline asm
|
|
call (%rd208), _rt_buffer_get_64, (%rd209, %r34, %r236, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
mov.f32 %f1467, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs132, %f1467;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs133, 0;
|
|
st.v4.u16 [%rd208], {%rs132, %rs132, %rs132, %rs133};
|
|
|
|
BB0_125:
|
|
ld.global.u32 %r237, [additive];
|
|
setp.eq.s32 %p142, %r237, 0;
|
|
@%p142 bra BB0_127;
|
|
|
|
mov.u64 %rd227, image_RNM1;
|
|
cvta.global.u64 %rd216, %rd227;
|
|
mov.u32 %r241, 8;
|
|
// inline asm
|
|
call (%rd215), _rt_buffer_get_64, (%rd216, %r34, %r241, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs140, %rs141, %rs142, %rs143}, [%rd215];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1468, %rs140;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1469, %rs141;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1470, %rs142;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd221), _rt_buffer_get_64, (%rd216, %r34, %r241, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1471, %f1468, 0f00000000;
|
|
add.f32 %f1472, %f1469, 0f00000000;
|
|
add.f32 %f1473, %f1470, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs139, %f1473;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs138, %f1472;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs137, %f1471;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs144, 0;
|
|
st.v4.u16 [%rd221], {%rs137, %rs138, %rs139, %rs144};
|
|
bra.uni BB0_128;
|
|
|
|
BB0_127:
|
|
mov.u64 %rd234, image_RNM1;
|
|
cvta.global.u64 %rd229, %rd234;
|
|
mov.u32 %r243, 8;
|
|
// inline asm
|
|
call (%rd228), _rt_buffer_get_64, (%rd229, %r34, %r243, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
mov.f32 %f1474, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs145, %f1474;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs146, 0;
|
|
st.v4.u16 [%rd228], {%rs145, %rs145, %rs145, %rs146};
|
|
|
|
BB0_128:
|
|
ld.global.u32 %r244, [additive];
|
|
setp.eq.s32 %p143, %r244, 0;
|
|
@%p143 bra BB0_130;
|
|
|
|
mov.u64 %rd247, image_RNM2;
|
|
cvta.global.u64 %rd236, %rd247;
|
|
mov.u32 %r248, 8;
|
|
// inline asm
|
|
call (%rd235), _rt_buffer_get_64, (%rd236, %r34, %r248, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs153, %rs154, %rs155, %rs156}, [%rd235];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1475, %rs153;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1476, %rs154;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1477, %rs155;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd241), _rt_buffer_get_64, (%rd236, %r34, %r248, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1478, %f1475, 0f00000000;
|
|
add.f32 %f1479, %f1476, 0f00000000;
|
|
add.f32 %f1480, %f1477, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs152, %f1480;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs151, %f1479;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs150, %f1478;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs157, 0;
|
|
st.v4.u16 [%rd241], {%rs150, %rs151, %rs152, %rs157};
|
|
bra.uni BB0_131;
|
|
|
|
BB0_130:
|
|
mov.u64 %rd254, image_RNM2;
|
|
cvta.global.u64 %rd249, %rd254;
|
|
mov.u32 %r250, 8;
|
|
// inline asm
|
|
call (%rd248), _rt_buffer_get_64, (%rd249, %r34, %r250, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
mov.f32 %f1481, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs158, %f1481;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs159, 0;
|
|
st.v4.u16 [%rd248], {%rs158, %rs158, %rs158, %rs159};
|
|
bra.uni BB0_131;
|
|
|
|
BB0_57:
|
|
setp.geu.f32 %p76, %f245, 0f00000000;
|
|
@%p76 bra BB0_60;
|
|
|
|
cvt.rzi.f32.f32 %f1162, %f1134;
|
|
setp.neu.f32 %p77, %f1162, 0f3EE8BA2E;
|
|
selp.f32 %f1580, 0f7FFFFFFF, %f1580, %p77;
|
|
|
|
BB0_60:
|
|
add.f32 %f1164, %f247, 0f3EE8BA2E;
|
|
mov.b32 %r151, %f1164;
|
|
setp.lt.s32 %p79, %r151, 2139095040;
|
|
@%p79 bra BB0_65;
|
|
|
|
setp.gtu.f32 %p80, %f247, 0f7F800000;
|
|
@%p80 bra BB0_64;
|
|
bra.uni BB0_62;
|
|
|
|
BB0_64:
|
|
add.f32 %f1580, %f245, 0f3EE8BA2E;
|
|
bra.uni BB0_65;
|
|
|
|
BB0_62:
|
|
setp.neu.f32 %p81, %f247, 0f7F800000;
|
|
@%p81 bra BB0_65;
|
|
|
|
selp.f32 %f1580, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
BB0_65:
|
|
mul.f32 %f1165, %f1580, 0f437F0000;
|
|
setp.eq.f32 %p82, %f245, 0f3F800000;
|
|
selp.f32 %f1166, 0f437F0000, %f1165, %p82;
|
|
cvt.rzi.u32.f32 %r152, %f1166;
|
|
cvt.u16.u32 %rs43, %r152;
|
|
mov.u16 %rs44, 255;
|
|
st.v2.u8 [%rd67], {%rs43, %rs44};
|
|
ld.global.u32 %r258, [imageEnabled];
|
|
|
|
BB0_66:
|
|
and.b32 %r153, %r258, 1;
|
|
setp.eq.b32 %p83, %r153, 1;
|
|
@!%p83 bra BB0_101;
|
|
bra.uni BB0_67;
|
|
|
|
BB0_67:
|
|
mov.f32 %f1169, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f1170, %f1169;
|
|
fma.rn.f32 %f1171, %f1170, 0fC0000000, 0f3EE66666;
|
|
abs.f32 %f259, %f1171;
|
|
abs.f32 %f260, %f1509;
|
|
setp.lt.f32 %p84, %f260, 0f00800000;
|
|
mul.f32 %f1172, %f260, 0f4B800000;
|
|
selp.f32 %f1173, 0fC3170000, 0fC2FE0000, %p84;
|
|
selp.f32 %f1174, %f1172, %f260, %p84;
|
|
mov.b32 %r154, %f1174;
|
|
and.b32 %r155, %r154, 8388607;
|
|
or.b32 %r156, %r155, 1065353216;
|
|
mov.b32 %f1175, %r156;
|
|
shr.u32 %r157, %r154, 23;
|
|
cvt.rn.f32.u32 %f1176, %r157;
|
|
add.f32 %f1177, %f1173, %f1176;
|
|
setp.gt.f32 %p85, %f1175, 0f3FB504F3;
|
|
mul.f32 %f1178, %f1175, 0f3F000000;
|
|
add.f32 %f1179, %f1177, 0f3F800000;
|
|
selp.f32 %f1180, %f1178, %f1175, %p85;
|
|
selp.f32 %f1181, %f1179, %f1177, %p85;
|
|
add.f32 %f1182, %f1180, 0fBF800000;
|
|
add.f32 %f1168, %f1180, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1167,%f1168;
|
|
// inline asm
|
|
add.f32 %f1183, %f1182, %f1182;
|
|
mul.f32 %f1184, %f1167, %f1183;
|
|
mul.f32 %f1185, %f1184, %f1184;
|
|
mov.f32 %f1186, 0f3C4CAF63;
|
|
mov.f32 %f1187, 0f3B18F0FE;
|
|
fma.rn.f32 %f1188, %f1187, %f1185, %f1186;
|
|
mov.f32 %f1189, 0f3DAAAABD;
|
|
fma.rn.f32 %f1190, %f1188, %f1185, %f1189;
|
|
mul.rn.f32 %f1191, %f1190, %f1185;
|
|
mul.rn.f32 %f1192, %f1191, %f1184;
|
|
sub.f32 %f1193, %f1182, %f1184;
|
|
neg.f32 %f1194, %f1184;
|
|
add.f32 %f1195, %f1193, %f1193;
|
|
fma.rn.f32 %f1196, %f1194, %f1182, %f1195;
|
|
mul.rn.f32 %f1197, %f1167, %f1196;
|
|
add.f32 %f1198, %f1192, %f1184;
|
|
sub.f32 %f1199, %f1184, %f1198;
|
|
add.f32 %f1200, %f1192, %f1199;
|
|
add.f32 %f1201, %f1197, %f1200;
|
|
add.f32 %f1202, %f1198, %f1201;
|
|
sub.f32 %f1203, %f1198, %f1202;
|
|
add.f32 %f1204, %f1201, %f1203;
|
|
mov.f32 %f1205, 0f3F317200;
|
|
mul.rn.f32 %f1206, %f1181, %f1205;
|
|
mov.f32 %f1207, 0f35BFBE8E;
|
|
mul.rn.f32 %f1208, %f1181, %f1207;
|
|
add.f32 %f1209, %f1206, %f1202;
|
|
sub.f32 %f1210, %f1206, %f1209;
|
|
add.f32 %f1211, %f1202, %f1210;
|
|
add.f32 %f1212, %f1204, %f1211;
|
|
add.f32 %f1213, %f1208, %f1212;
|
|
add.f32 %f1214, %f1209, %f1213;
|
|
sub.f32 %f1215, %f1209, %f1214;
|
|
add.f32 %f1216, %f1213, %f1215;
|
|
mov.f32 %f1217, 0f3EE66666;
|
|
mul.rn.f32 %f1218, %f1217, %f1214;
|
|
neg.f32 %f1219, %f1218;
|
|
fma.rn.f32 %f1220, %f1217, %f1214, %f1219;
|
|
fma.rn.f32 %f1221, %f1217, %f1216, %f1220;
|
|
mov.f32 %f1222, 0f00000000;
|
|
fma.rn.f32 %f1223, %f1222, %f1214, %f1221;
|
|
add.rn.f32 %f1224, %f1218, %f1223;
|
|
neg.f32 %f1225, %f1224;
|
|
add.rn.f32 %f1226, %f1218, %f1225;
|
|
add.rn.f32 %f1227, %f1226, %f1223;
|
|
mov.b32 %r158, %f1224;
|
|
setp.eq.s32 %p86, %r158, 1118925336;
|
|
add.s32 %r159, %r158, -1;
|
|
mov.b32 %f1228, %r159;
|
|
add.f32 %f1229, %f1227, 0f37000000;
|
|
selp.f32 %f1230, %f1228, %f1224, %p86;
|
|
selp.f32 %f261, %f1229, %f1227, %p86;
|
|
mul.f32 %f1231, %f1230, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1232, %f1231;
|
|
mov.f32 %f1233, 0fBF317200;
|
|
fma.rn.f32 %f1234, %f1232, %f1233, %f1230;
|
|
mov.f32 %f1235, 0fB5BFBE8E;
|
|
fma.rn.f32 %f1236, %f1232, %f1235, %f1234;
|
|
mul.f32 %f1237, %f1236, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1238, %f1237;
|
|
add.f32 %f1239, %f1232, 0f00000000;
|
|
ex2.approx.f32 %f1240, %f1239;
|
|
mul.f32 %f1241, %f1238, %f1240;
|
|
setp.lt.f32 %p87, %f1230, 0fC2D20000;
|
|
selp.f32 %f1242, 0f00000000, %f1241, %p87;
|
|
setp.gt.f32 %p88, %f1230, 0f42D20000;
|
|
selp.f32 %f1581, 0f7F800000, %f1242, %p88;
|
|
setp.eq.f32 %p89, %f1581, 0f7F800000;
|
|
@%p89 bra BB0_69;
|
|
|
|
fma.rn.f32 %f1581, %f1581, %f261, %f1581;
|
|
|
|
BB0_69:
|
|
setp.lt.f32 %p90, %f1509, 0f00000000;
|
|
setp.eq.f32 %p91, %f259, 0f3F800000;
|
|
and.pred %p5, %p90, %p91;
|
|
mov.b32 %r160, %f1581;
|
|
xor.b32 %r161, %r160, -2147483648;
|
|
mov.b32 %f1243, %r161;
|
|
selp.f32 %f1583, %f1243, %f1581, %p5;
|
|
setp.eq.f32 %p92, %f1509, 0f00000000;
|
|
@%p92 bra BB0_72;
|
|
bra.uni BB0_70;
|
|
|
|
BB0_72:
|
|
add.f32 %f1246, %f1509, %f1509;
|
|
selp.f32 %f1583, %f1246, 0f00000000, %p91;
|
|
bra.uni BB0_73;
|
|
|
|
BB0_70:
|
|
setp.geu.f32 %p93, %f1509, 0f00000000;
|
|
@%p93 bra BB0_73;
|
|
|
|
cvt.rzi.f32.f32 %f1245, %f1217;
|
|
setp.neu.f32 %p94, %f1245, 0f3EE66666;
|
|
selp.f32 %f1583, 0f7FFFFFFF, %f1583, %p94;
|
|
|
|
BB0_73:
|
|
add.f32 %f1247, %f260, 0f3EE66666;
|
|
mov.b32 %r162, %f1247;
|
|
setp.lt.s32 %p96, %r162, 2139095040;
|
|
@%p96 bra BB0_78;
|
|
|
|
setp.gtu.f32 %p97, %f260, 0f7F800000;
|
|
@%p97 bra BB0_77;
|
|
bra.uni BB0_75;
|
|
|
|
BB0_77:
|
|
add.f32 %f1583, %f1509, 0f3EE66666;
|
|
bra.uni BB0_78;
|
|
|
|
BB0_75:
|
|
setp.neu.f32 %p98, %f260, 0f7F800000;
|
|
@%p98 bra BB0_78;
|
|
|
|
selp.f32 %f1583, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
BB0_78:
|
|
setp.eq.f32 %p99, %f1509, 0f3F800000;
|
|
selp.f32 %f272, 0f3F800000, %f1583, %p99;
|
|
abs.f32 %f273, %f1508;
|
|
setp.lt.f32 %p100, %f273, 0f00800000;
|
|
mul.f32 %f1250, %f273, 0f4B800000;
|
|
selp.f32 %f1251, 0fC3170000, 0fC2FE0000, %p100;
|
|
selp.f32 %f1252, %f1250, %f273, %p100;
|
|
mov.b32 %r163, %f1252;
|
|
and.b32 %r164, %r163, 8388607;
|
|
or.b32 %r165, %r164, 1065353216;
|
|
mov.b32 %f1253, %r165;
|
|
shr.u32 %r166, %r163, 23;
|
|
cvt.rn.f32.u32 %f1254, %r166;
|
|
add.f32 %f1255, %f1251, %f1254;
|
|
setp.gt.f32 %p101, %f1253, 0f3FB504F3;
|
|
mul.f32 %f1256, %f1253, 0f3F000000;
|
|
add.f32 %f1257, %f1255, 0f3F800000;
|
|
selp.f32 %f1258, %f1256, %f1253, %p101;
|
|
selp.f32 %f1259, %f1257, %f1255, %p101;
|
|
add.f32 %f1260, %f1258, 0fBF800000;
|
|
add.f32 %f1249, %f1258, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1248,%f1249;
|
|
// inline asm
|
|
add.f32 %f1261, %f1260, %f1260;
|
|
mul.f32 %f1262, %f1248, %f1261;
|
|
mul.f32 %f1263, %f1262, %f1262;
|
|
fma.rn.f32 %f1266, %f1187, %f1263, %f1186;
|
|
fma.rn.f32 %f1268, %f1266, %f1263, %f1189;
|
|
mul.rn.f32 %f1269, %f1268, %f1263;
|
|
mul.rn.f32 %f1270, %f1269, %f1262;
|
|
sub.f32 %f1271, %f1260, %f1262;
|
|
neg.f32 %f1272, %f1262;
|
|
add.f32 %f1273, %f1271, %f1271;
|
|
fma.rn.f32 %f1274, %f1272, %f1260, %f1273;
|
|
mul.rn.f32 %f1275, %f1248, %f1274;
|
|
add.f32 %f1276, %f1270, %f1262;
|
|
sub.f32 %f1277, %f1262, %f1276;
|
|
add.f32 %f1278, %f1270, %f1277;
|
|
add.f32 %f1279, %f1275, %f1278;
|
|
add.f32 %f1280, %f1276, %f1279;
|
|
sub.f32 %f1281, %f1276, %f1280;
|
|
add.f32 %f1282, %f1279, %f1281;
|
|
mul.rn.f32 %f1284, %f1259, %f1205;
|
|
mul.rn.f32 %f1286, %f1259, %f1207;
|
|
add.f32 %f1287, %f1284, %f1280;
|
|
sub.f32 %f1288, %f1284, %f1287;
|
|
add.f32 %f1289, %f1280, %f1288;
|
|
add.f32 %f1290, %f1282, %f1289;
|
|
add.f32 %f1291, %f1286, %f1290;
|
|
add.f32 %f1292, %f1287, %f1291;
|
|
sub.f32 %f1293, %f1287, %f1292;
|
|
add.f32 %f1294, %f1291, %f1293;
|
|
mul.rn.f32 %f1296, %f1217, %f1292;
|
|
neg.f32 %f1297, %f1296;
|
|
fma.rn.f32 %f1298, %f1217, %f1292, %f1297;
|
|
fma.rn.f32 %f1299, %f1217, %f1294, %f1298;
|
|
fma.rn.f32 %f1301, %f1222, %f1292, %f1299;
|
|
add.rn.f32 %f1302, %f1296, %f1301;
|
|
neg.f32 %f1303, %f1302;
|
|
add.rn.f32 %f1304, %f1296, %f1303;
|
|
add.rn.f32 %f1305, %f1304, %f1301;
|
|
mov.b32 %r167, %f1302;
|
|
setp.eq.s32 %p102, %r167, 1118925336;
|
|
add.s32 %r168, %r167, -1;
|
|
mov.b32 %f1306, %r168;
|
|
add.f32 %f1307, %f1305, 0f37000000;
|
|
selp.f32 %f1308, %f1306, %f1302, %p102;
|
|
selp.f32 %f274, %f1307, %f1305, %p102;
|
|
mul.f32 %f1309, %f1308, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1310, %f1309;
|
|
fma.rn.f32 %f1312, %f1310, %f1233, %f1308;
|
|
fma.rn.f32 %f1314, %f1310, %f1235, %f1312;
|
|
mul.f32 %f1315, %f1314, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1316, %f1315;
|
|
add.f32 %f1317, %f1310, 0f00000000;
|
|
ex2.approx.f32 %f1318, %f1317;
|
|
mul.f32 %f1319, %f1316, %f1318;
|
|
setp.lt.f32 %p103, %f1308, 0fC2D20000;
|
|
selp.f32 %f1320, 0f00000000, %f1319, %p103;
|
|
setp.gt.f32 %p104, %f1308, 0f42D20000;
|
|
selp.f32 %f1584, 0f7F800000, %f1320, %p104;
|
|
setp.eq.f32 %p105, %f1584, 0f7F800000;
|
|
@%p105 bra BB0_80;
|
|
|
|
fma.rn.f32 %f1584, %f1584, %f274, %f1584;
|
|
|
|
BB0_80:
|
|
setp.lt.f32 %p106, %f1508, 0f00000000;
|
|
and.pred %p6, %p106, %p91;
|
|
mov.b32 %r169, %f1584;
|
|
xor.b32 %r170, %r169, -2147483648;
|
|
mov.b32 %f1321, %r170;
|
|
selp.f32 %f1586, %f1321, %f1584, %p6;
|
|
setp.eq.f32 %p108, %f1508, 0f00000000;
|
|
@%p108 bra BB0_83;
|
|
bra.uni BB0_81;
|
|
|
|
BB0_83:
|
|
add.f32 %f1324, %f1508, %f1508;
|
|
selp.f32 %f1586, %f1324, 0f00000000, %p91;
|
|
bra.uni BB0_84;
|
|
|
|
BB0_81:
|
|
setp.geu.f32 %p109, %f1508, 0f00000000;
|
|
@%p109 bra BB0_84;
|
|
|
|
cvt.rzi.f32.f32 %f1323, %f1217;
|
|
setp.neu.f32 %p110, %f1323, 0f3EE66666;
|
|
selp.f32 %f1586, 0f7FFFFFFF, %f1586, %p110;
|
|
|
|
BB0_84:
|
|
add.f32 %f1325, %f273, 0f3EE66666;
|
|
mov.b32 %r171, %f1325;
|
|
setp.lt.s32 %p112, %r171, 2139095040;
|
|
@%p112 bra BB0_89;
|
|
|
|
setp.gtu.f32 %p113, %f273, 0f7F800000;
|
|
@%p113 bra BB0_88;
|
|
bra.uni BB0_86;
|
|
|
|
BB0_88:
|
|
add.f32 %f1586, %f1508, 0f3EE66666;
|
|
bra.uni BB0_89;
|
|
|
|
BB0_86:
|
|
setp.neu.f32 %p114, %f273, 0f7F800000;
|
|
@%p114 bra BB0_89;
|
|
|
|
selp.f32 %f1586, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
BB0_89:
|
|
setp.eq.f32 %p115, %f1508, 0f3F800000;
|
|
selp.f32 %f285, 0f3F800000, %f1586, %p115;
|
|
abs.f32 %f286, %f1507;
|
|
setp.lt.f32 %p116, %f286, 0f00800000;
|
|
mul.f32 %f1328, %f286, 0f4B800000;
|
|
selp.f32 %f1329, 0fC3170000, 0fC2FE0000, %p116;
|
|
selp.f32 %f1330, %f1328, %f286, %p116;
|
|
mov.b32 %r172, %f1330;
|
|
and.b32 %r173, %r172, 8388607;
|
|
or.b32 %r174, %r173, 1065353216;
|
|
mov.b32 %f1331, %r174;
|
|
shr.u32 %r175, %r172, 23;
|
|
cvt.rn.f32.u32 %f1332, %r175;
|
|
add.f32 %f1333, %f1329, %f1332;
|
|
setp.gt.f32 %p117, %f1331, 0f3FB504F3;
|
|
mul.f32 %f1334, %f1331, 0f3F000000;
|
|
add.f32 %f1335, %f1333, 0f3F800000;
|
|
selp.f32 %f1336, %f1334, %f1331, %p117;
|
|
selp.f32 %f1337, %f1335, %f1333, %p117;
|
|
add.f32 %f1338, %f1336, 0fBF800000;
|
|
add.f32 %f1327, %f1336, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1326,%f1327;
|
|
// inline asm
|
|
add.f32 %f1339, %f1338, %f1338;
|
|
mul.f32 %f1340, %f1326, %f1339;
|
|
mul.f32 %f1341, %f1340, %f1340;
|
|
fma.rn.f32 %f1344, %f1187, %f1341, %f1186;
|
|
fma.rn.f32 %f1346, %f1344, %f1341, %f1189;
|
|
mul.rn.f32 %f1347, %f1346, %f1341;
|
|
mul.rn.f32 %f1348, %f1347, %f1340;
|
|
sub.f32 %f1349, %f1338, %f1340;
|
|
neg.f32 %f1350, %f1340;
|
|
add.f32 %f1351, %f1349, %f1349;
|
|
fma.rn.f32 %f1352, %f1350, %f1338, %f1351;
|
|
mul.rn.f32 %f1353, %f1326, %f1352;
|
|
add.f32 %f1354, %f1348, %f1340;
|
|
sub.f32 %f1355, %f1340, %f1354;
|
|
add.f32 %f1356, %f1348, %f1355;
|
|
add.f32 %f1357, %f1353, %f1356;
|
|
add.f32 %f1358, %f1354, %f1357;
|
|
sub.f32 %f1359, %f1354, %f1358;
|
|
add.f32 %f1360, %f1357, %f1359;
|
|
mul.rn.f32 %f1362, %f1337, %f1205;
|
|
mul.rn.f32 %f1364, %f1337, %f1207;
|
|
add.f32 %f1365, %f1362, %f1358;
|
|
sub.f32 %f1366, %f1362, %f1365;
|
|
add.f32 %f1367, %f1358, %f1366;
|
|
add.f32 %f1368, %f1360, %f1367;
|
|
add.f32 %f1369, %f1364, %f1368;
|
|
add.f32 %f1370, %f1365, %f1369;
|
|
sub.f32 %f1371, %f1365, %f1370;
|
|
add.f32 %f1372, %f1369, %f1371;
|
|
mul.rn.f32 %f1374, %f1217, %f1370;
|
|
neg.f32 %f1375, %f1374;
|
|
fma.rn.f32 %f1376, %f1217, %f1370, %f1375;
|
|
fma.rn.f32 %f1377, %f1217, %f1372, %f1376;
|
|
fma.rn.f32 %f1379, %f1222, %f1370, %f1377;
|
|
add.rn.f32 %f1380, %f1374, %f1379;
|
|
neg.f32 %f1381, %f1380;
|
|
add.rn.f32 %f1382, %f1374, %f1381;
|
|
add.rn.f32 %f1383, %f1382, %f1379;
|
|
mov.b32 %r176, %f1380;
|
|
setp.eq.s32 %p118, %r176, 1118925336;
|
|
add.s32 %r177, %r176, -1;
|
|
mov.b32 %f1384, %r177;
|
|
add.f32 %f1385, %f1383, 0f37000000;
|
|
selp.f32 %f1386, %f1384, %f1380, %p118;
|
|
selp.f32 %f287, %f1385, %f1383, %p118;
|
|
mul.f32 %f1387, %f1386, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1388, %f1387;
|
|
fma.rn.f32 %f1390, %f1388, %f1233, %f1386;
|
|
fma.rn.f32 %f1392, %f1388, %f1235, %f1390;
|
|
mul.f32 %f1393, %f1392, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1394, %f1393;
|
|
add.f32 %f1395, %f1388, 0f00000000;
|
|
ex2.approx.f32 %f1396, %f1395;
|
|
mul.f32 %f1397, %f1394, %f1396;
|
|
setp.lt.f32 %p119, %f1386, 0fC2D20000;
|
|
selp.f32 %f1398, 0f00000000, %f1397, %p119;
|
|
setp.gt.f32 %p120, %f1386, 0f42D20000;
|
|
selp.f32 %f1587, 0f7F800000, %f1398, %p120;
|
|
setp.eq.f32 %p121, %f1587, 0f7F800000;
|
|
@%p121 bra BB0_91;
|
|
|
|
fma.rn.f32 %f1587, %f1587, %f287, %f1587;
|
|
|
|
BB0_91:
|
|
setp.lt.f32 %p122, %f1507, 0f00000000;
|
|
and.pred %p7, %p122, %p91;
|
|
mov.b32 %r178, %f1587;
|
|
xor.b32 %r179, %r178, -2147483648;
|
|
mov.b32 %f1399, %r179;
|
|
selp.f32 %f1589, %f1399, %f1587, %p7;
|
|
setp.eq.f32 %p124, %f1507, 0f00000000;
|
|
@%p124 bra BB0_94;
|
|
bra.uni BB0_92;
|
|
|
|
BB0_94:
|
|
add.f32 %f1402, %f1507, %f1507;
|
|
selp.f32 %f1589, %f1402, 0f00000000, %p91;
|
|
bra.uni BB0_95;
|
|
|
|
BB0_92:
|
|
setp.geu.f32 %p125, %f1507, 0f00000000;
|
|
@%p125 bra BB0_95;
|
|
|
|
cvt.rzi.f32.f32 %f1401, %f1217;
|
|
setp.neu.f32 %p126, %f1401, 0f3EE66666;
|
|
selp.f32 %f1589, 0f7FFFFFFF, %f1589, %p126;
|
|
|
|
BB0_95:
|
|
add.f32 %f1403, %f286, 0f3EE66666;
|
|
mov.b32 %r180, %f1403;
|
|
setp.lt.s32 %p128, %r180, 2139095040;
|
|
@%p128 bra BB0_100;
|
|
|
|
setp.gtu.f32 %p129, %f286, 0f7F800000;
|
|
@%p129 bra BB0_99;
|
|
bra.uni BB0_97;
|
|
|
|
BB0_99:
|
|
add.f32 %f1589, %f1507, 0f3EE66666;
|
|
bra.uni BB0_100;
|
|
|
|
BB0_97:
|
|
setp.neu.f32 %p130, %f286, 0f7F800000;
|
|
@%p130 bra BB0_100;
|
|
|
|
selp.f32 %f1589, 0fFF800000, 0f7F800000, %p7;
|
|
|
|
BB0_100:
|
|
mov.u32 %r251, 4;
|
|
setp.eq.f32 %p131, %f1507, 0f3F800000;
|
|
selp.f32 %f1404, 0f3F800000, %f1589, %p131;
|
|
cvt.u64.u32 %rd77, %r3;
|
|
cvt.u64.u32 %rd76, %r2;
|
|
mov.u64 %rd80, image;
|
|
cvta.global.u64 %rd75, %rd80;
|
|
// inline asm
|
|
call (%rd74), _rt_buffer_get_64, (%rd75, %r34, %r251, %rd76, %rd77, %rd16, %rd16);
|
|
// inline asm
|
|
cvt.sat.f32.f32 %f1405, %f1404;
|
|
mul.f32 %f1406, %f1405, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r183, %f1406;
|
|
cvt.sat.f32.f32 %f1407, %f285;
|
|
mul.f32 %f1408, %f1407, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r184, %f1408;
|
|
cvt.sat.f32.f32 %f1409, %f272;
|
|
mul.f32 %f1410, %f1409, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r185, %f1410;
|
|
cvt.u16.u32 %rs45, %r183;
|
|
cvt.u16.u32 %rs46, %r185;
|
|
cvt.u16.u32 %rs47, %r184;
|
|
mov.u16 %rs48, 255;
|
|
st.v4.u8 [%rd74], {%rs45, %rs47, %rs46, %rs48};
|
|
ld.global.u32 %r258, [imageEnabled];
|
|
|
|
BB0_101:
|
|
cvt.u64.u32 %rd7, %r2;
|
|
cvt.u64.u32 %rd8, %r3;
|
|
and.b32 %r186, %r258, 4;
|
|
setp.eq.s32 %p132, %r186, 0;
|
|
@%p132 bra BB0_105;
|
|
|
|
ld.global.u32 %r187, [additive];
|
|
setp.eq.s32 %p133, %r187, 0;
|
|
mov.f32 %f1411, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs49, %f1411;}
|
|
|
|
// inline asm
|
|
@%p133 bra BB0_104;
|
|
|
|
mov.u64 %rd93, image_HDR;
|
|
cvta.global.u64 %rd82, %rd93;
|
|
mov.u32 %r191, 8;
|
|
// inline asm
|
|
call (%rd81), _rt_buffer_get_64, (%rd82, %r34, %r191, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs56, %rs57, %rs58, %rs59}, [%rd81];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1412, %rs56;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1413, %rs57;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1414, %rs58;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd87), _rt_buffer_get_64, (%rd82, %r34, %r191, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1415, %f1509, %f1412;
|
|
add.f32 %f1416, %f1508, %f1413;
|
|
add.f32 %f1417, %f1507, %f1414;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs55, %f1417;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs54, %f1416;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs53, %f1415;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd87], {%rs53, %rs54, %rs55, %rs49};
|
|
bra.uni BB0_105;
|
|
|
|
BB0_104:
|
|
mov.u64 %rd100, image_HDR;
|
|
cvta.global.u64 %rd95, %rd100;
|
|
mov.u32 %r193, 8;
|
|
// inline asm
|
|
call (%rd94), _rt_buffer_get_64, (%rd95, %r34, %r193, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs62, %f1507;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs61, %f1508;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs60, %f1509;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd94], {%rs60, %rs61, %rs62, %rs49};
|
|
|
|
BB0_105:
|
|
ld.global.u32 %r194, [additive];
|
|
setp.eq.s32 %p134, %r194, 0;
|
|
mov.f32 %f1421, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs63, %f1421;}
|
|
|
|
// inline asm
|
|
@%p134 bra BB0_107;
|
|
|
|
mov.u64 %rd113, image_RNM0;
|
|
cvta.global.u64 %rd102, %rd113;
|
|
mov.u32 %r198, 8;
|
|
// inline asm
|
|
call (%rd101), _rt_buffer_get_64, (%rd102, %r34, %r198, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs70, %rs71, %rs72, %rs73}, [%rd101];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1422, %rs70;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1423, %rs71;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1424, %rs72;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd107), _rt_buffer_get_64, (%rd102, %r34, %r198, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1425, %f1506, %f1422;
|
|
add.f32 %f1426, %f1505, %f1423;
|
|
add.f32 %f1427, %f1504, %f1424;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs69, %f1427;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs68, %f1426;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs67, %f1425;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd107], {%rs67, %rs68, %rs69, %rs63};
|
|
bra.uni BB0_108;
|
|
|
|
BB0_107:
|
|
mov.u64 %rd120, image_RNM0;
|
|
cvta.global.u64 %rd115, %rd120;
|
|
mov.u32 %r200, 8;
|
|
// inline asm
|
|
call (%rd114), _rt_buffer_get_64, (%rd115, %r34, %r200, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs76, %f1504;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs75, %f1505;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs74, %f1506;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd114], {%rs74, %rs75, %rs76, %rs63};
|
|
|
|
BB0_108:
|
|
ld.global.u32 %r201, [additive];
|
|
setp.eq.s32 %p135, %r201, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs77, %f1421;}
|
|
|
|
// inline asm
|
|
@%p135 bra BB0_110;
|
|
|
|
mov.u64 %rd133, image_RNM1;
|
|
cvta.global.u64 %rd122, %rd133;
|
|
mov.u32 %r205, 8;
|
|
// inline asm
|
|
call (%rd121), _rt_buffer_get_64, (%rd122, %r34, %r205, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs84, %rs85, %rs86, %rs87}, [%rd121];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1432, %rs84;}
|
|
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f1433, %rs85;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f1434, %rs86;}
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// inline asm
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// inline asm
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call (%rd127), _rt_buffer_get_64, (%rd122, %r34, %r205, %rd7, %rd8, %rd16, %rd16);
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// inline asm
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add.f32 %f1435, %f1503, %f1432;
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add.f32 %f1436, %f1502, %f1433;
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add.f32 %f1437, %f1501, %f1434;
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// inline asm
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{ cvt.rn.f16.f32 %rs83, %f1437;}
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// inline asm
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// inline asm
|
|
{ cvt.rn.f16.f32 %rs82, %f1436;}
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|
|
// inline asm
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|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs81, %f1435;}
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|
|
|
// inline asm
|
|
st.v4.u16 [%rd127], {%rs81, %rs82, %rs83, %rs77};
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|
bra.uni BB0_111;
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|
|
|
BB0_110:
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mov.u64 %rd140, image_RNM1;
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cvta.global.u64 %rd135, %rd140;
|
|
mov.u32 %r207, 8;
|
|
// inline asm
|
|
call (%rd134), _rt_buffer_get_64, (%rd135, %r34, %r207, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs90, %f1501;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs89, %f1502;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs88, %f1503;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd134], {%rs88, %rs89, %rs90, %rs77};
|
|
|
|
BB0_111:
|
|
ld.global.u32 %r208, [additive];
|
|
setp.eq.s32 %p136, %r208, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs91, %f1421;}
|
|
|
|
// inline asm
|
|
@%p136 bra BB0_113;
|
|
|
|
mov.u64 %rd153, image_RNM2;
|
|
cvta.global.u64 %rd142, %rd153;
|
|
mov.u32 %r212, 8;
|
|
// inline asm
|
|
call (%rd141), _rt_buffer_get_64, (%rd142, %r34, %r212, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs98, %rs99, %rs100, %rs101}, [%rd141];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1442, %rs98;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1443, %rs99;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1444, %rs100;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd147), _rt_buffer_get_64, (%rd142, %r34, %r212, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1445, %f1500, %f1442;
|
|
add.f32 %f1446, %f1499, %f1443;
|
|
add.f32 %f1447, %f1498, %f1444;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs97, %f1447;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs96, %f1446;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs95, %f1445;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd147], {%rs95, %rs96, %rs97, %rs91};
|
|
bra.uni BB0_131;
|
|
|
|
BB0_113:
|
|
mov.u64 %rd160, image_RNM2;
|
|
cvta.global.u64 %rd155, %rd160;
|
|
mov.u32 %r214, 8;
|
|
// inline asm
|
|
call (%rd154), _rt_buffer_get_64, (%rd155, %r34, %r214, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs104, %f1498;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs103, %f1499;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs102, %f1500;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd154], {%rs102, %rs103, %rs104, %rs91};
|
|
|
|
BB0_131:
|
|
ret;
|
|
}
|
|
|
|
|