2579 lines
76 KiB
Plaintext
2579 lines
76 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-23083092
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// Cuda compilation tools, release 9.1, V9.1.85
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// Based on LLVM 3.4svn
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//
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.version 6.1
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.target sm_30
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.address_size 64
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// .globl _Z6oxMainv
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.global .align 8 .b8 pixelID[8];
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.global .align 8 .b8 resolution[8];
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.global .align 4 .b8 normal[12];
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.global .align 4 .b8 camPos[12];
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.global .align 4 .b8 root[4];
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.global .align 4 .u32 imageEnabled;
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.global .texref lightmap;
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.global .align 16 .b8 tileInfo[16];
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.global .align 4 .u32 additive;
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.global .align 1 .b8 image[1];
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.global .align 1 .b8 image_HDR[1];
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.global .align 1 .b8 image_HDR2[1];
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.global .align 1 .b8 image_Mask[1];
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.global .align 1 .b8 image_RNM0[1];
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.global .align 1 .b8 image_RNM1[1];
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.global .align 1 .b8 image_RNM2[1];
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.global .align 1 .b8 uvtangent[1];
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.global .align 1 .b8 uvpos[1];
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.global .align 1 .b8 uvnormal[1];
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.global .align 4 .u32 ignoreNormal;
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.global .align 1 .b8 localLights[1];
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
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.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
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.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
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.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
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.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
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.visible .entry _Z6oxMainv(
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)
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{
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.local .align 4 .b8 __local_depot0[12];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<145>;
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.reg .b16 %rs<161>;
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.reg .f32 %f<1625>;
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.reg .b32 %r<261>;
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.reg .b64 %rd<256>;
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mov.u64 %rd255, __local_depot0;
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cvta.local.u64 %SP, %rd255;
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ld.global.v2.u32 {%r36, %r37}, [pixelID];
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cvt.u64.u32 %rd13, %r36;
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cvt.u64.u32 %rd14, %r37;
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mov.u64 %rd17, uvnormal;
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cvta.global.u64 %rd12, %rd17;
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mov.u32 %r34, 2;
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mov.u32 %r35, 4;
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mov.u64 %rd16, 0;
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// inline asm
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call (%rd11), _rt_buffer_get_64, (%rd12, %r34, %r35, %rd13, %rd14, %rd16, %rd16);
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// inline asm
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ld.u32 %r1, [%rd11];
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shr.u32 %r40, %r1, 16;
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cvt.u16.u32 %rs1, %r40;
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and.b16 %rs8, %rs1, 255;
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cvt.u16.u32 %rs9, %r1;
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or.b16 %rs10, %rs9, %rs8;
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setp.eq.s16 %p8, %rs10, 0;
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mov.f32 %f1520, 0f00000000;
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mov.f32 %f1521, %f1520;
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mov.f32 %f1522, %f1520;
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@%p8 bra BB0_2;
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ld.u8 %rs11, [%rd11+1];
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and.b16 %rs13, %rs9, 255;
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cvt.rn.f32.u16 %f305, %rs13;
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div.rn.f32 %f306, %f305, 0f437F0000;
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fma.rn.f32 %f307, %f306, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f308, %rs11;
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div.rn.f32 %f309, %f308, 0f437F0000;
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fma.rn.f32 %f310, %f309, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f311, %rs8;
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div.rn.f32 %f312, %f311, 0f437F0000;
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fma.rn.f32 %f313, %f312, 0f40000000, 0fBF800000;
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mul.f32 %f314, %f310, %f310;
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fma.rn.f32 %f315, %f307, %f307, %f314;
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fma.rn.f32 %f316, %f313, %f313, %f315;
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sqrt.rn.f32 %f317, %f316;
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rcp.rn.f32 %f318, %f317;
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mul.f32 %f1520, %f307, %f318;
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mul.f32 %f1521, %f310, %f318;
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mul.f32 %f1522, %f313, %f318;
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BB0_2:
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ld.global.v2.u32 {%r41, %r42}, [pixelID];
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ld.global.v2.u32 {%r44, %r45}, [tileInfo];
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add.s32 %r2, %r41, %r44;
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add.s32 %r3, %r42, %r45;
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setp.eq.f32 %p9, %f1521, 0f00000000;
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setp.eq.f32 %p10, %f1520, 0f00000000;
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and.pred %p11, %p10, %p9;
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setp.eq.f32 %p12, %f1522, 0f00000000;
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and.pred %p13, %p11, %p12;
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@%p13 bra BB0_114;
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bra.uni BB0_3;
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BB0_114:
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ld.global.u32 %r260, [imageEnabled];
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and.b32 %r215, %r260, 1;
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setp.eq.b32 %p137, %r215, 1;
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@!%p137 bra BB0_116;
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bra.uni BB0_115;
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BB0_115:
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cvt.u64.u32 %rd163, %r2;
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cvt.u64.u32 %rd164, %r3;
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mov.u64 %rd167, image;
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cvta.global.u64 %rd162, %rd167;
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// inline asm
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call (%rd161), _rt_buffer_get_64, (%rd162, %r34, %r35, %rd163, %rd164, %rd16, %rd16);
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// inline asm
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mov.u16 %rs105, 0;
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st.v4.u8 [%rd161], {%rs105, %rs105, %rs105, %rs105};
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ld.global.u32 %r260, [imageEnabled];
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BB0_116:
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and.b32 %r218, %r260, 8;
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setp.eq.s32 %p138, %r218, 0;
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@%p138 bra BB0_118;
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cvt.u64.u32 %rd171, %r3;
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cvt.u64.u32 %rd170, %r2;
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mov.u64 %rd174, image_Mask;
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cvta.global.u64 %rd169, %rd174;
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// inline asm
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call (%rd168), _rt_buffer_get_64, (%rd169, %r34, %r34, %rd170, %rd171, %rd16, %rd16);
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// inline asm
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mov.f32 %f1488, 0f00000000;
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cvt.rzi.u32.f32 %r221, %f1488;
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cvt.u16.u32 %rs106, %r221;
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mov.u16 %rs107, 0;
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st.v2.u8 [%rd168], {%rs106, %rs107};
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ld.global.u32 %r260, [imageEnabled];
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BB0_118:
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cvt.u64.u32 %rd9, %r2;
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cvt.u64.u32 %rd10, %r3;
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and.b32 %r222, %r260, 4;
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setp.eq.s32 %p139, %r222, 0;
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@%p139 bra BB0_122;
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ld.global.u32 %r223, [additive];
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setp.eq.s32 %p140, %r223, 0;
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@%p140 bra BB0_121;
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mov.u64 %rd187, image_HDR;
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cvta.global.u64 %rd176, %rd187;
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mov.u32 %r227, 8;
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// inline asm
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call (%rd175), _rt_buffer_get_64, (%rd176, %r34, %r227, %rd9, %rd10, %rd16, %rd16);
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// inline asm
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ld.v4.u16 {%rs114, %rs115, %rs116, %rs117}, [%rd175];
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// inline asm
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{ cvt.f32.f16 %f1489, %rs114;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f1490, %rs115;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f1491, %rs116;}
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// inline asm
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// inline asm
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call (%rd181), _rt_buffer_get_64, (%rd176, %r34, %r227, %rd9, %rd10, %rd16, %rd16);
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// inline asm
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add.f32 %f1492, %f1489, 0f00000000;
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add.f32 %f1493, %f1490, 0f00000000;
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add.f32 %f1494, %f1491, 0f00000000;
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// inline asm
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{ cvt.rn.f16.f32 %rs113, %f1494;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs112, %f1493;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs111, %f1492;}
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// inline asm
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mov.u16 %rs118, 0;
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st.v4.u16 [%rd181], {%rs111, %rs112, %rs113, %rs118};
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bra.uni BB0_122;
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BB0_3:
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ld.global.v2.u32 {%r53, %r54}, [pixelID];
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cvt.u64.u32 %rd20, %r53;
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cvt.u64.u32 %rd21, %r54;
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mov.u64 %rd30, uvpos;
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cvta.global.u64 %rd19, %rd30;
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mov.u32 %r50, 12;
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// inline asm
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call (%rd18), _rt_buffer_get_64, (%rd19, %r34, %r50, %rd20, %rd21, %rd16, %rd16);
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// inline asm
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ld.f32 %f9, [%rd18+8];
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ld.f32 %f8, [%rd18+4];
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ld.f32 %f7, [%rd18];
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mul.f32 %f322, %f7, 0f3456BF95;
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mul.f32 %f323, %f8, 0f3456BF95;
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mul.f32 %f324, %f9, 0f3456BF95;
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abs.f32 %f325, %f1520;
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div.rn.f32 %f326, %f322, %f325;
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abs.f32 %f327, %f1521;
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div.rn.f32 %f328, %f323, %f327;
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abs.f32 %f329, %f1522;
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div.rn.f32 %f330, %f324, %f329;
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abs.f32 %f331, %f326;
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abs.f32 %f332, %f328;
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abs.f32 %f333, %f330;
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mov.f32 %f334, 0f38D1B717;
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max.f32 %f335, %f331, %f334;
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max.f32 %f336, %f332, %f334;
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max.f32 %f337, %f333, %f334;
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fma.rn.f32 %f10, %f1520, %f335, %f7;
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fma.rn.f32 %f11, %f1521, %f336, %f8;
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fma.rn.f32 %f12, %f1522, %f337, %f9;
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ld.global.v2.u32 {%r57, %r58}, [pixelID];
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cvt.rn.f32.u32 %f13, %r57;
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cvt.rn.f32.u32 %f14, %r58;
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cvt.u64.u32 %rd26, %r57;
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cvt.u64.u32 %rd27, %r58;
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mov.u64 %rd31, uvtangent;
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cvta.global.u64 %rd25, %rd31;
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// inline asm
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call (%rd24), _rt_buffer_get_64, (%rd25, %r34, %r35, %rd26, %rd27, %rd16, %rd16);
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// inline asm
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ld.u32 %r4, [%rd24];
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shr.u32 %r5, %r4, 16;
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cvt.u16.u32 %rs15, %r5;
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and.b16 %rs16, %rs15, 255;
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cvt.u16.u32 %rs17, %r4;
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or.b16 %rs18, %rs17, %rs16;
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setp.eq.s16 %p14, %rs18, 0;
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mov.f32 %f1532, 0f00000000;
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mov.f32 %f1523, %f1532;
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mov.f32 %f1524, %f1532;
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mov.f32 %f1525, %f1532;
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@%p14 bra BB0_5;
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ld.u8 %rs19, [%rd24+1];
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and.b16 %rs21, %rs17, 255;
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cvt.rn.f32.u16 %f338, %rs21;
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div.rn.f32 %f339, %f338, 0f437F0000;
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fma.rn.f32 %f340, %f339, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f341, %rs19;
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div.rn.f32 %f342, %f341, 0f437F0000;
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fma.rn.f32 %f343, %f342, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f344, %rs16;
|
|
div.rn.f32 %f345, %f344, 0f437F0000;
|
|
fma.rn.f32 %f346, %f345, 0f40000000, 0fBF800000;
|
|
mul.f32 %f347, %f343, %f343;
|
|
fma.rn.f32 %f348, %f340, %f340, %f347;
|
|
fma.rn.f32 %f349, %f346, %f346, %f348;
|
|
sqrt.rn.f32 %f350, %f349;
|
|
rcp.rn.f32 %f351, %f350;
|
|
mul.f32 %f1523, %f340, %f351;
|
|
mul.f32 %f1524, %f343, %f351;
|
|
mul.f32 %f1525, %f346, %f351;
|
|
|
|
BB0_5:
|
|
mul.f32 %f355, %f1522, %f1524;
|
|
mul.f32 %f356, %f1521, %f1525;
|
|
sub.f32 %f357, %f356, %f355;
|
|
mul.f32 %f358, %f1520, %f1525;
|
|
mul.f32 %f359, %f1522, %f1523;
|
|
sub.f32 %f360, %f359, %f358;
|
|
mul.f32 %f361, %f1521, %f1523;
|
|
mul.f32 %f362, %f1520, %f1524;
|
|
sub.f32 %f363, %f362, %f361;
|
|
setp.lt.u32 %p15, %r4, 16777216;
|
|
selp.f32 %f364, 0fBF800000, 0f3F800000, %p15;
|
|
mul.f32 %f365, %f357, %f364;
|
|
mul.f32 %f366, %f360, %f364;
|
|
mul.f32 %f367, %f363, %f364;
|
|
mul.f32 %f368, %f365, 0f00000000;
|
|
mul.f32 %f369, %f366, 0f00000000;
|
|
mul.f32 %f370, %f367, 0f00000000;
|
|
fma.rn.f32 %f371, %f1523, 0f3F5105EC, %f368;
|
|
fma.rn.f32 %f372, %f1524, 0f3F5105EC, %f369;
|
|
fma.rn.f32 %f373, %f1525, 0f3F5105EC, %f370;
|
|
mul.f32 %f21, %f1520, 0f3F13CD3A;
|
|
add.f32 %f22, %f21, %f371;
|
|
mul.f32 %f23, %f1521, 0f3F13CD3A;
|
|
add.f32 %f24, %f23, %f372;
|
|
mul.f32 %f25, %f1522, 0f3F13CD3A;
|
|
add.f32 %f26, %f25, %f373;
|
|
ld.global.v2.u32 {%r63, %r64}, [pixelID];
|
|
cvt.u64.u32 %rd34, %r63;
|
|
cvt.u64.u32 %rd35, %r64;
|
|
// inline asm
|
|
call (%rd32), _rt_buffer_get_64, (%rd25, %r34, %r35, %rd34, %rd35, %rd16, %rd16);
|
|
// inline asm
|
|
ld.u32 %r6, [%rd32];
|
|
shr.u32 %r7, %r6, 16;
|
|
cvt.u16.u32 %rs24, %r7;
|
|
and.b16 %rs25, %rs24, 255;
|
|
cvt.u16.u32 %rs26, %r6;
|
|
or.b16 %rs27, %rs26, %rs25;
|
|
setp.eq.s16 %p16, %rs27, 0;
|
|
mov.f32 %f1526, %f1532;
|
|
mov.f32 %f1527, %f1532;
|
|
mov.f32 %f1528, %f1532;
|
|
@%p16 bra BB0_7;
|
|
|
|
ld.u8 %rs28, [%rd32+1];
|
|
and.b16 %rs30, %rs26, 255;
|
|
cvt.rn.f32.u16 %f374, %rs30;
|
|
div.rn.f32 %f375, %f374, 0f437F0000;
|
|
fma.rn.f32 %f376, %f375, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f377, %rs28;
|
|
div.rn.f32 %f378, %f377, 0f437F0000;
|
|
fma.rn.f32 %f379, %f378, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f380, %rs25;
|
|
div.rn.f32 %f381, %f380, 0f437F0000;
|
|
fma.rn.f32 %f382, %f381, 0f40000000, 0fBF800000;
|
|
mul.f32 %f383, %f379, %f379;
|
|
fma.rn.f32 %f384, %f376, %f376, %f383;
|
|
fma.rn.f32 %f385, %f382, %f382, %f384;
|
|
sqrt.rn.f32 %f386, %f385;
|
|
rcp.rn.f32 %f387, %f386;
|
|
mul.f32 %f1526, %f376, %f387;
|
|
mul.f32 %f1527, %f379, %f387;
|
|
mul.f32 %f1528, %f382, %f387;
|
|
|
|
BB0_7:
|
|
mul.f32 %f391, %f1522, %f1527;
|
|
mul.f32 %f392, %f1521, %f1528;
|
|
sub.f32 %f393, %f392, %f391;
|
|
mul.f32 %f394, %f1520, %f1528;
|
|
mul.f32 %f395, %f1522, %f1526;
|
|
sub.f32 %f396, %f395, %f394;
|
|
mul.f32 %f397, %f1521, %f1526;
|
|
mul.f32 %f398, %f1520, %f1527;
|
|
sub.f32 %f399, %f398, %f397;
|
|
setp.lt.u32 %p17, %r6, 16777216;
|
|
selp.f32 %f400, 0fBF800000, 0f3F800000, %p17;
|
|
mul.f32 %f401, %f393, %f400;
|
|
mul.f32 %f402, %f396, %f400;
|
|
mul.f32 %f403, %f399, %f400;
|
|
mul.f32 %f404, %f401, 0f3F3504F3;
|
|
mul.f32 %f405, %f402, 0f3F3504F3;
|
|
mul.f32 %f406, %f403, 0f3F3504F3;
|
|
fma.rn.f32 %f407, %f1526, 0fBED105EC, %f404;
|
|
fma.rn.f32 %f408, %f1527, 0fBED105EC, %f405;
|
|
fma.rn.f32 %f409, %f1528, 0fBED105EC, %f406;
|
|
add.f32 %f33, %f21, %f407;
|
|
add.f32 %f34, %f23, %f408;
|
|
add.f32 %f35, %f25, %f409;
|
|
ld.global.v2.u32 {%r69, %r70}, [pixelID];
|
|
cvt.u64.u32 %rd41, %r69;
|
|
cvt.u64.u32 %rd42, %r70;
|
|
// inline asm
|
|
call (%rd39), _rt_buffer_get_64, (%rd25, %r34, %r35, %rd41, %rd42, %rd16, %rd16);
|
|
// inline asm
|
|
ld.u32 %r8, [%rd39];
|
|
shr.u32 %r9, %r8, 16;
|
|
cvt.u16.u32 %rs33, %r9;
|
|
and.b16 %rs34, %rs33, 255;
|
|
cvt.u16.u32 %rs35, %r8;
|
|
or.b16 %rs36, %rs35, %rs34;
|
|
setp.eq.s16 %p18, %rs36, 0;
|
|
mov.f32 %f1529, %f1532;
|
|
mov.f32 %f1530, %f1532;
|
|
mov.f32 %f1531, %f1532;
|
|
@%p18 bra BB0_9;
|
|
|
|
ld.u8 %rs37, [%rd39+1];
|
|
and.b16 %rs39, %rs35, 255;
|
|
cvt.rn.f32.u16 %f410, %rs39;
|
|
div.rn.f32 %f411, %f410, 0f437F0000;
|
|
fma.rn.f32 %f412, %f411, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f413, %rs37;
|
|
div.rn.f32 %f414, %f413, 0f437F0000;
|
|
fma.rn.f32 %f415, %f414, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f416, %rs34;
|
|
div.rn.f32 %f417, %f416, 0f437F0000;
|
|
fma.rn.f32 %f418, %f417, 0f40000000, 0fBF800000;
|
|
mul.f32 %f419, %f415, %f415;
|
|
fma.rn.f32 %f420, %f412, %f412, %f419;
|
|
fma.rn.f32 %f421, %f418, %f418, %f420;
|
|
sqrt.rn.f32 %f422, %f421;
|
|
rcp.rn.f32 %f423, %f422;
|
|
mul.f32 %f1529, %f412, %f423;
|
|
mul.f32 %f1530, %f415, %f423;
|
|
mul.f32 %f1531, %f418, %f423;
|
|
|
|
BB0_9:
|
|
mul.f32 %f437, %f1522, %f1530;
|
|
mul.f32 %f438, %f1521, %f1531;
|
|
sub.f32 %f439, %f438, %f437;
|
|
mul.f32 %f440, %f1520, %f1531;
|
|
mul.f32 %f441, %f1522, %f1529;
|
|
sub.f32 %f442, %f441, %f440;
|
|
mul.f32 %f443, %f1521, %f1529;
|
|
mul.f32 %f444, %f1520, %f1530;
|
|
sub.f32 %f445, %f444, %f443;
|
|
setp.lt.u32 %p19, %r8, 16777216;
|
|
selp.f32 %f446, 0fBF800000, 0f3F800000, %p19;
|
|
mul.f32 %f447, %f439, %f446;
|
|
mul.f32 %f448, %f442, %f446;
|
|
mul.f32 %f449, %f445, %f446;
|
|
mul.f32 %f450, %f447, 0fBF3504F3;
|
|
mul.f32 %f451, %f448, 0fBF3504F3;
|
|
mul.f32 %f452, %f449, 0fBF3504F3;
|
|
fma.rn.f32 %f453, %f1529, 0fBED105EC, %f450;
|
|
fma.rn.f32 %f454, %f1530, 0fBED105EC, %f451;
|
|
fma.rn.f32 %f455, %f1531, 0fBED105EC, %f452;
|
|
add.f32 %f42, %f21, %f453;
|
|
add.f32 %f43, %f23, %f454;
|
|
add.f32 %f44, %f25, %f455;
|
|
mov.u64 %rd51, localLights;
|
|
cvta.global.u64 %rd50, %rd51;
|
|
mov.u32 %r73, 1;
|
|
mov.u32 %r74, 96;
|
|
// inline asm
|
|
call (%rd46, %rd47, %rd48, %rd49), _rt_buffer_get_size_64, (%rd50, %r73, %r74);
|
|
// inline asm
|
|
cvt.u32.u64 %r10, %rd46;
|
|
setp.eq.s32 %p20, %r10, 0;
|
|
mov.f32 %f1533, %f1532;
|
|
mov.f32 %f1534, %f1532;
|
|
mov.f32 %f1535, %f1532;
|
|
mov.f32 %f1536, %f1532;
|
|
mov.f32 %f1537, %f1532;
|
|
mov.f32 %f1538, %f1532;
|
|
mov.f32 %f1539, %f1532;
|
|
mov.f32 %f1540, %f1532;
|
|
mov.f32 %f1541, %f1532;
|
|
mov.f32 %f1542, %f1532;
|
|
mov.f32 %f1543, %f1532;
|
|
mov.f32 %f1544, %f1532;
|
|
@%p20 bra BB0_53;
|
|
|
|
mov.f32 %f469, 0f40000000;
|
|
cvt.rzi.f32.f32 %f470, %f469;
|
|
add.f32 %f471, %f470, %f470;
|
|
mov.f32 %f472, 0f40800000;
|
|
sub.f32 %f473, %f472, %f471;
|
|
abs.f32 %f45, %f473;
|
|
mul.f32 %f46, %f10, 0f3456BF95;
|
|
mul.f32 %f47, %f11, 0f3456BF95;
|
|
mul.f32 %f48, %f12, 0f3456BF95;
|
|
mul.f32 %f49, %f13, 0f3DD32618;
|
|
mul.f32 %f50, %f14, 0f3DD2F1AA;
|
|
mov.f32 %f468, 0f00000000;
|
|
mov.u32 %r252, 0;
|
|
abs.f32 %f704, %f46;
|
|
abs.f32 %f705, %f47;
|
|
max.f32 %f706, %f704, %f705;
|
|
abs.f32 %f707, %f48;
|
|
max.f32 %f708, %f706, %f707;
|
|
mov.f32 %f1532, %f468;
|
|
mov.f32 %f1533, %f468;
|
|
mov.f32 %f1534, %f468;
|
|
mov.f32 %f1535, %f468;
|
|
mov.f32 %f1536, %f468;
|
|
mov.f32 %f1537, %f468;
|
|
mov.f32 %f1538, %f468;
|
|
mov.f32 %f1539, %f468;
|
|
mov.f32 %f1540, %f468;
|
|
mov.f32 %f1541, %f468;
|
|
mov.f32 %f1542, %f468;
|
|
mov.f32 %f1543, %f468;
|
|
mov.f32 %f1544, %f468;
|
|
|
|
BB0_11:
|
|
cvt.u64.u32 %rd54, %r252;
|
|
// inline asm
|
|
call (%rd52), _rt_buffer_get_64, (%rd50, %r73, %r74, %rd54, %rd16, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.f32 {%f476, %f477, %f478, %f479}, [%rd52+80];
|
|
ld.v4.f32 {%f480, %f481, %f482, %f483}, [%rd52+64];
|
|
ld.v4.f32 {%f484, %f485, %f486, %f487}, [%rd52+48];
|
|
ld.v4.f32 {%f488, %f1553, %f1554, %f491}, [%rd52+32];
|
|
ld.v4.f32 {%f492, %f493, %f494, %f495}, [%rd52+16];
|
|
ld.v4.f32 {%f496, %f497, %f498, %f499}, [%rd52];
|
|
mov.b32 %r12, %f479;
|
|
sub.f32 %f88, %f497, %f7;
|
|
sub.f32 %f90, %f498, %f8;
|
|
sub.f32 %f92, %f499, %f9;
|
|
mul.f32 %f501, %f90, %f90;
|
|
fma.rn.f32 %f502, %f88, %f88, %f501;
|
|
fma.rn.f32 %f503, %f92, %f92, %f502;
|
|
sqrt.rn.f32 %f93, %f503;
|
|
rcp.rn.f32 %f504, %f93;
|
|
mul.f32 %f94, %f88, %f504;
|
|
mul.f32 %f95, %f90, %f504;
|
|
mul.f32 %f96, %f92, %f504;
|
|
mul.f32 %f97, %f93, %f495;
|
|
abs.f32 %f98, %f97;
|
|
setp.lt.f32 %p21, %f98, 0f00800000;
|
|
mul.f32 %f505, %f98, 0f4B800000;
|
|
selp.f32 %f506, 0fC3170000, 0fC2FE0000, %p21;
|
|
selp.f32 %f507, %f505, %f98, %p21;
|
|
mov.b32 %r78, %f507;
|
|
and.b32 %r79, %r78, 8388607;
|
|
or.b32 %r80, %r79, 1065353216;
|
|
mov.b32 %f508, %r80;
|
|
shr.u32 %r81, %r78, 23;
|
|
cvt.rn.f32.u32 %f509, %r81;
|
|
add.f32 %f510, %f506, %f509;
|
|
setp.gt.f32 %p22, %f508, 0f3FB504F3;
|
|
mul.f32 %f511, %f508, 0f3F000000;
|
|
add.f32 %f512, %f510, 0f3F800000;
|
|
selp.f32 %f513, %f511, %f508, %p22;
|
|
selp.f32 %f514, %f512, %f510, %p22;
|
|
add.f32 %f515, %f513, 0fBF800000;
|
|
add.f32 %f475, %f513, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f474,%f475;
|
|
// inline asm
|
|
add.f32 %f516, %f515, %f515;
|
|
mul.f32 %f517, %f474, %f516;
|
|
mul.f32 %f518, %f517, %f517;
|
|
mov.f32 %f519, 0f3C4CAF63;
|
|
mov.f32 %f520, 0f3B18F0FE;
|
|
fma.rn.f32 %f521, %f520, %f518, %f519;
|
|
mov.f32 %f522, 0f3DAAAABD;
|
|
fma.rn.f32 %f523, %f521, %f518, %f522;
|
|
mul.rn.f32 %f524, %f523, %f518;
|
|
mul.rn.f32 %f525, %f524, %f517;
|
|
sub.f32 %f526, %f515, %f517;
|
|
neg.f32 %f527, %f517;
|
|
add.f32 %f528, %f526, %f526;
|
|
fma.rn.f32 %f529, %f527, %f515, %f528;
|
|
mul.rn.f32 %f530, %f474, %f529;
|
|
add.f32 %f531, %f525, %f517;
|
|
sub.f32 %f532, %f517, %f531;
|
|
add.f32 %f533, %f525, %f532;
|
|
add.f32 %f534, %f530, %f533;
|
|
add.f32 %f535, %f531, %f534;
|
|
sub.f32 %f536, %f531, %f535;
|
|
add.f32 %f537, %f534, %f536;
|
|
mov.f32 %f538, 0f3F317200;
|
|
mul.rn.f32 %f539, %f514, %f538;
|
|
mov.f32 %f540, 0f35BFBE8E;
|
|
mul.rn.f32 %f541, %f514, %f540;
|
|
add.f32 %f542, %f539, %f535;
|
|
sub.f32 %f543, %f539, %f542;
|
|
add.f32 %f544, %f535, %f543;
|
|
add.f32 %f545, %f537, %f544;
|
|
add.f32 %f546, %f541, %f545;
|
|
add.f32 %f547, %f542, %f546;
|
|
sub.f32 %f548, %f542, %f547;
|
|
add.f32 %f549, %f546, %f548;
|
|
mul.rn.f32 %f99, %f472, %f547;
|
|
neg.f32 %f551, %f99;
|
|
fma.rn.f32 %f552, %f472, %f547, %f551;
|
|
fma.rn.f32 %f553, %f472, %f549, %f552;
|
|
fma.rn.f32 %f100, %f468, %f547, %f553;
|
|
add.rn.f32 %f101, %f99, %f100;
|
|
mov.b32 %r82, %f101;
|
|
setp.eq.s32 %p1, %r82, 1118925336;
|
|
add.s32 %r83, %r82, -1;
|
|
mov.b32 %f555, %r83;
|
|
selp.f32 %f556, %f555, %f101, %p1;
|
|
mul.f32 %f557, %f556, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f558, %f557;
|
|
mov.f32 %f559, 0fBF317200;
|
|
fma.rn.f32 %f560, %f558, %f559, %f556;
|
|
mov.f32 %f561, 0fB5BFBE8E;
|
|
fma.rn.f32 %f562, %f558, %f561, %f560;
|
|
mul.f32 %f563, %f562, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f564, %f563;
|
|
add.f32 %f565, %f558, 0f00000000;
|
|
ex2.approx.f32 %f566, %f565;
|
|
mul.f32 %f567, %f564, %f566;
|
|
setp.lt.f32 %p23, %f556, 0fC2D20000;
|
|
selp.f32 %f568, 0f00000000, %f567, %p23;
|
|
setp.gt.f32 %p24, %f556, 0f42D20000;
|
|
selp.f32 %f1545, 0f7F800000, %f568, %p24;
|
|
setp.eq.f32 %p25, %f1545, 0f7F800000;
|
|
@%p25 bra BB0_13;
|
|
|
|
neg.f32 %f569, %f101;
|
|
add.rn.f32 %f570, %f99, %f569;
|
|
add.rn.f32 %f571, %f570, %f100;
|
|
add.f32 %f572, %f571, 0f37000000;
|
|
selp.f32 %f573, %f572, %f571, %p1;
|
|
fma.rn.f32 %f1545, %f1545, %f573, %f1545;
|
|
|
|
BB0_13:
|
|
setp.lt.f32 %p26, %f97, 0f00000000;
|
|
setp.eq.f32 %p27, %f45, 0f3F800000;
|
|
and.pred %p2, %p26, %p27;
|
|
mov.b32 %r84, %f1545;
|
|
xor.b32 %r85, %r84, -2147483648;
|
|
mov.b32 %f574, %r85;
|
|
selp.f32 %f1547, %f574, %f1545, %p2;
|
|
setp.eq.f32 %p28, %f97, 0f00000000;
|
|
@%p28 bra BB0_16;
|
|
bra.uni BB0_14;
|
|
|
|
BB0_16:
|
|
add.f32 %f577, %f97, %f97;
|
|
selp.f32 %f1547, %f577, 0f00000000, %p27;
|
|
bra.uni BB0_17;
|
|
|
|
BB0_14:
|
|
setp.geu.f32 %p29, %f97, 0f00000000;
|
|
@%p29 bra BB0_17;
|
|
|
|
cvt.rzi.f32.f32 %f576, %f472;
|
|
setp.neu.f32 %p30, %f576, 0f40800000;
|
|
selp.f32 %f1547, 0f7FFFFFFF, %f1547, %p30;
|
|
|
|
BB0_17:
|
|
add.f32 %f578, %f98, 0f40800000;
|
|
mov.b32 %r86, %f578;
|
|
setp.lt.s32 %p32, %r86, 2139095040;
|
|
@%p32 bra BB0_22;
|
|
|
|
setp.gtu.f32 %p33, %f98, 0f7F800000;
|
|
@%p33 bra BB0_21;
|
|
bra.uni BB0_19;
|
|
|
|
BB0_21:
|
|
add.f32 %f1547, %f97, 0f40800000;
|
|
bra.uni BB0_22;
|
|
|
|
BB0_19:
|
|
setp.neu.f32 %p34, %f98, 0f7F800000;
|
|
@%p34 bra BB0_22;
|
|
|
|
selp.f32 %f1547, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
BB0_22:
|
|
mul.f32 %f579, %f93, %f493;
|
|
mov.f32 %f1583, 0f3F800000;
|
|
sub.f32 %f581, %f1583, %f1547;
|
|
setp.eq.f32 %p35, %f97, 0f3F800000;
|
|
selp.f32 %f582, 0f00000000, %f581, %p35;
|
|
cvt.sat.f32.f32 %f583, %f582;
|
|
fma.rn.f32 %f584, %f579, %f579, %f494;
|
|
div.rn.f32 %f127, %f583, %f584;
|
|
mul.f32 %f585, %f1521, %f95;
|
|
fma.rn.f32 %f586, %f1520, %f94, %f585;
|
|
fma.rn.f32 %f587, %f1522, %f96, %f586;
|
|
ld.global.u32 %r87, [ignoreNormal];
|
|
setp.eq.s32 %p36, %r87, 0;
|
|
selp.f32 %f588, %f587, 0f3F800000, %p36;
|
|
cvt.sat.f32.f32 %f128, %f588;
|
|
setp.eq.f32 %p37, %f496, 0f3F800000;
|
|
@%p37 bra BB0_29;
|
|
bra.uni BB0_23;
|
|
|
|
BB0_29:
|
|
setp.leu.f32 %p41, %f491, 0f00000000;
|
|
@%p41 bra BB0_25;
|
|
|
|
setp.geu.f32 %p42, %f487, 0f00000000;
|
|
@%p42 bra BB0_31;
|
|
|
|
sub.f32 %f1519, %f499, %f9;
|
|
sub.f32 %f1518, %f497, %f7;
|
|
sub.f32 %f1517, %f498, %f8;
|
|
mul.f32 %f611, %f477, %f1517;
|
|
fma.rn.f32 %f612, %f476, %f1518, %f611;
|
|
fma.rn.f32 %f613, %f478, %f1519, %f612;
|
|
rcp.rn.f32 %f614, %f613;
|
|
mul.f32 %f1548, %f1518, %f614;
|
|
mul.f32 %f1549, %f1517, %f614;
|
|
mul.f32 %f1550, %f1519, %f614;
|
|
neg.f32 %f487, %f487;
|
|
bra.uni BB0_33;
|
|
|
|
BB0_23:
|
|
setp.eq.f32 %p38, %f496, 0f40000000;
|
|
@%p38 bra BB0_27;
|
|
bra.uni BB0_24;
|
|
|
|
BB0_27:
|
|
setp.leu.f32 %p40, %f491, 0f00000000;
|
|
@%p40 bra BB0_25;
|
|
|
|
mul.f32 %f605, %f485, %f95;
|
|
fma.rn.f32 %f606, %f484, %f94, %f605;
|
|
mul.f32 %f607, %f481, %f95;
|
|
fma.rn.f32 %f608, %f480, %f94, %f607;
|
|
mul.f32 %f609, %f477, %f95;
|
|
fma.rn.f32 %f610, %f476, %f94, %f609;
|
|
fma.rn.f32 %f602, %f486, %f96, %f606;
|
|
fma.rn.f32 %f603, %f482, %f96, %f608;
|
|
fma.rn.f32 %f604, %f478, %f96, %f610;
|
|
cvt.rzi.s32.f32 %r88, %f491;
|
|
mov.u32 %r89, 6;
|
|
mov.u32 %r90, 0;
|
|
// inline asm
|
|
call (%f598, %f599, %f600, %f601), _rt_texture_get_base_id, (%r88, %r89, %f602, %f603, %f604, %r90);
|
|
// inline asm
|
|
mul.f32 %f1552, %f488, %f598;
|
|
mul.f32 %f1553, %f1553, %f599;
|
|
mul.f32 %f1554, %f1554, %f600;
|
|
bra.uni BB0_34;
|
|
|
|
BB0_24:
|
|
setp.neu.f32 %p39, %f496, 0f40800000;
|
|
@%p39 bra BB0_25;
|
|
|
|
mul.f32 %f589, %f476, %f94;
|
|
mul.f32 %f590, %f477, %f95;
|
|
neg.f32 %f591, %f590;
|
|
sub.f32 %f592, %f591, %f589;
|
|
mul.f32 %f593, %f478, %f96;
|
|
sub.f32 %f594, %f592, %f593;
|
|
fma.rn.f32 %f595, %f491, %f594, %f487;
|
|
cvt.sat.f32.f32 %f596, %f595;
|
|
mul.f32 %f597, %f596, %f596;
|
|
mul.f32 %f1555, %f127, %f597;
|
|
mov.f32 %f1552, %f488;
|
|
bra.uni BB0_35;
|
|
|
|
BB0_25:
|
|
mov.f32 %f1552, %f488;
|
|
bra.uni BB0_34;
|
|
|
|
BB0_31:
|
|
mov.f32 %f1548, %f94;
|
|
mov.f32 %f1549, %f95;
|
|
mov.f32 %f1550, %f96;
|
|
|
|
BB0_33:
|
|
mul.f32 %f623, %f478, %f96;
|
|
mul.f32 %f624, %f477, %f95;
|
|
neg.f32 %f625, %f624;
|
|
mul.f32 %f626, %f476, %f94;
|
|
sub.f32 %f627, %f625, %f626;
|
|
sub.f32 %f628, %f627, %f623;
|
|
setp.gt.f32 %p43, %f628, 0f00000000;
|
|
selp.f32 %f629, 0f3F800000, 0f00000000, %p43;
|
|
mul.f32 %f630, %f485, %f1549;
|
|
fma.rn.f32 %f631, %f484, %f1548, %f630;
|
|
mul.f32 %f632, %f481, %f1549;
|
|
fma.rn.f32 %f633, %f480, %f1548, %f632;
|
|
fma.rn.f32 %f634, %f486, %f1550, %f631;
|
|
fma.rn.f32 %f635, %f482, %f1550, %f633;
|
|
fma.rn.f32 %f636, %f487, %f634, 0f3F000000;
|
|
mov.f32 %f637, 0f3F800000;
|
|
sub.f32 %f619, %f637, %f636;
|
|
fma.rn.f32 %f620, %f487, %f635, 0f3F000000;
|
|
cvt.rzi.s32.f32 %r91, %f491;
|
|
mov.f32 %f622, 0f00000000;
|
|
// inline asm
|
|
call (%f615, %f616, %f617, %f618), _rt_texture_get_f_id, (%r91, %r34, %f619, %f620, %f622, %f622);
|
|
// inline asm
|
|
mul.f32 %f638, %f629, %f615;
|
|
mul.f32 %f639, %f629, %f616;
|
|
mul.f32 %f640, %f629, %f617;
|
|
mul.f32 %f1552, %f488, %f638;
|
|
mul.f32 %f1553, %f1553, %f639;
|
|
mul.f32 %f1554, %f1554, %f640;
|
|
|
|
BB0_34:
|
|
mov.f32 %f1555, %f127;
|
|
|
|
BB0_35:
|
|
max.f32 %f653, %f1552, %f1553;
|
|
max.f32 %f654, %f653, %f1554;
|
|
mul.f32 %f148, %f128, %f1555;
|
|
mul.f32 %f655, %f148, %f654;
|
|
setp.lt.f32 %p45, %f655, 0f3727C5AC;
|
|
mov.pred %p144, -1;
|
|
mov.f32 %f161, 0f00000000;
|
|
mov.f32 %f1557, %f161;
|
|
mov.f32 %f1558, %f161;
|
|
mov.f32 %f1559, %f161;
|
|
mov.f32 %f1560, %f161;
|
|
mov.f32 %f1561, %f161;
|
|
mov.f32 %f1562, %f161;
|
|
mov.f32 %f1563, %f161;
|
|
mov.f32 %f1564, %f161;
|
|
mov.f32 %f1565, %f161;
|
|
mov.f32 %f1566, %f161;
|
|
mov.f32 %f1567, %f161;
|
|
@%p45 bra BB0_37;
|
|
|
|
mul.f32 %f161, %f1552, %f148;
|
|
mul.f32 %f656, %f24, %f95;
|
|
fma.rn.f32 %f657, %f22, %f94, %f656;
|
|
fma.rn.f32 %f658, %f26, %f96, %f657;
|
|
cvt.sat.f32.f32 %f659, %f658;
|
|
mul.f32 %f660, %f1552, %f1555;
|
|
mul.f32 %f661, %f660, %f659;
|
|
mul.f32 %f662, %f1553, %f1555;
|
|
mul.f32 %f663, %f662, %f659;
|
|
mul.f32 %f664, %f1554, %f1555;
|
|
mul.f32 %f665, %f664, %f659;
|
|
mul.f32 %f666, %f34, %f95;
|
|
fma.rn.f32 %f667, %f33, %f94, %f666;
|
|
fma.rn.f32 %f668, %f35, %f96, %f667;
|
|
cvt.sat.f32.f32 %f669, %f668;
|
|
mul.f32 %f670, %f660, %f669;
|
|
mul.f32 %f671, %f662, %f669;
|
|
mul.f32 %f672, %f664, %f669;
|
|
mul.f32 %f673, %f43, %f95;
|
|
fma.rn.f32 %f674, %f42, %f94, %f673;
|
|
fma.rn.f32 %f675, %f44, %f96, %f674;
|
|
cvt.sat.f32.f32 %f676, %f675;
|
|
mul.f32 %f677, %f660, %f676;
|
|
mul.f32 %f678, %f662, %f676;
|
|
mul.f32 %f679, %f664, %f676;
|
|
add.f32 %f680, %f661, %f670;
|
|
add.f32 %f681, %f663, %f671;
|
|
add.f32 %f682, %f665, %f672;
|
|
add.f32 %f683, %f680, %f677;
|
|
add.f32 %f684, %f681, %f678;
|
|
add.f32 %f685, %f682, %f679;
|
|
mul.f32 %f686, %f683, 0f3F13CD3A;
|
|
mul.f32 %f687, %f684, 0f3F13CD3A;
|
|
mul.f32 %f688, %f685, 0f3F13CD3A;
|
|
div.rn.f32 %f689, %f161, %f686;
|
|
mul.f32 %f1557, %f1553, %f148;
|
|
div.rn.f32 %f690, %f1557, %f687;
|
|
mul.f32 %f1558, %f1554, %f148;
|
|
div.rn.f32 %f691, %f1558, %f688;
|
|
setp.eq.f32 %p47, %f161, 0f00000000;
|
|
selp.f32 %f692, 0f00000000, %f689, %p47;
|
|
setp.eq.f32 %p48, %f1557, 0f00000000;
|
|
selp.f32 %f693, 0f00000000, %f690, %p48;
|
|
setp.eq.f32 %p49, %f1558, 0f00000000;
|
|
selp.f32 %f694, 0f00000000, %f691, %p49;
|
|
mul.f32 %f1559, %f661, %f692;
|
|
mul.f32 %f1560, %f663, %f693;
|
|
mul.f32 %f1561, %f665, %f694;
|
|
mul.f32 %f1562, %f670, %f692;
|
|
mul.f32 %f1563, %f671, %f693;
|
|
mul.f32 %f1564, %f672, %f694;
|
|
mul.f32 %f1565, %f677, %f692;
|
|
mul.f32 %f1566, %f678, %f693;
|
|
mul.f32 %f1567, %f679, %f694;
|
|
mov.pred %p144, 0;
|
|
|
|
BB0_37:
|
|
@%p144 bra BB0_52;
|
|
|
|
setp.eq.s32 %p50, %r12, 0;
|
|
mov.u16 %rs160, 0;
|
|
mov.f32 %f1584, %f1583;
|
|
mov.f32 %f1585, %f1583;
|
|
@%p50 bra BB0_49;
|
|
|
|
abs.s32 %r14, %r12;
|
|
mov.f32 %f1580, 0f00000000;
|
|
setp.lt.s32 %p51, %r14, 1;
|
|
mov.f32 %f1581, %f1580;
|
|
mov.f32 %f1582, %f1580;
|
|
@%p51 bra BB0_48;
|
|
|
|
max.f32 %f174, %f708, %f334;
|
|
and.b32 %r15, %r14, 3;
|
|
setp.eq.s32 %p52, %r15, 0;
|
|
add.u64 %rd59, %SP, 0;
|
|
cvta.to.local.u64 %rd5, %rd59;
|
|
mov.f32 %f1580, 0f00000000;
|
|
mov.u32 %r256, 0;
|
|
mov.f32 %f1581, %f1580;
|
|
mov.f32 %f1582, %f1580;
|
|
@%p52 bra BB0_46;
|
|
|
|
setp.eq.s32 %p53, %r15, 1;
|
|
mov.f32 %f1571, 0f00000000;
|
|
mov.u32 %r254, 0;
|
|
mov.f32 %f1572, %f1571;
|
|
mov.f32 %f1573, %f1571;
|
|
@%p53 bra BB0_45;
|
|
|
|
setp.eq.s32 %p54, %r15, 2;
|
|
mov.f32 %f1568, 0f00000000;
|
|
mov.u32 %r253, 0;
|
|
mov.f32 %f1569, %f1568;
|
|
mov.f32 %f1570, %f1568;
|
|
@%p54 bra BB0_44;
|
|
|
|
cvt.rmi.f32.f32 %f724, %f49;
|
|
sub.f32 %f725, %f49, %f724;
|
|
cvt.rmi.f32.f32 %f726, %f50;
|
|
sub.f32 %f727, %f50, %f726;
|
|
add.f32 %f728, %f727, 0f420551EC;
|
|
add.f32 %f729, %f725, 0f420551EC;
|
|
mul.f32 %f730, %f725, %f728;
|
|
fma.rn.f32 %f731, %f727, %f729, %f730;
|
|
add.f32 %f732, %f731, 0f00000000;
|
|
add.f32 %f733, %f725, %f732;
|
|
add.f32 %f734, %f727, %f732;
|
|
add.f32 %f735, %f733, %f734;
|
|
mul.f32 %f736, %f732, %f735;
|
|
cvt.rmi.f32.f32 %f737, %f736;
|
|
sub.f32 %f738, %f736, %f737;
|
|
add.f32 %f739, %f733, %f733;
|
|
mul.f32 %f740, %f734, %f739;
|
|
cvt.rmi.f32.f32 %f741, %f740;
|
|
sub.f32 %f742, %f740, %f741;
|
|
mul.f32 %f743, %f733, %f735;
|
|
cvt.rmi.f32.f32 %f744, %f743;
|
|
sub.f32 %f745, %f743, %f744;
|
|
fma.rn.f32 %f746, %f738, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f747, %f742, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f748, %f745, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f749, %f492, %f746, %f497;
|
|
fma.rn.f32 %f750, %f492, %f747, %f498;
|
|
fma.rn.f32 %f751, %f492, %f748, %f499;
|
|
sub.f32 %f752, %f749, %f7;
|
|
sub.f32 %f753, %f750, %f8;
|
|
sub.f32 %f754, %f751, %f9;
|
|
mul.f32 %f755, %f753, %f753;
|
|
fma.rn.f32 %f756, %f752, %f752, %f755;
|
|
fma.rn.f32 %f757, %f754, %f754, %f756;
|
|
sqrt.rn.f32 %f723, %f757;
|
|
rcp.rn.f32 %f758, %f723;
|
|
mul.f32 %f719, %f758, %f752;
|
|
mul.f32 %f720, %f758, %f753;
|
|
mul.f32 %f721, %f758, %f754;
|
|
ld.global.u32 %r100, [imageEnabled];
|
|
and.b32 %r101, %r100, 32;
|
|
setp.eq.s32 %p55, %r101, 0;
|
|
selp.f32 %f759, 0f3F800000, 0f41200000, %p55;
|
|
mul.f32 %f722, %f759, %f174;
|
|
mov.u32 %r102, 1065353216;
|
|
st.local.u32 [%rd5+8], %r102;
|
|
st.local.u32 [%rd5+4], %r102;
|
|
st.local.u32 [%rd5], %r102;
|
|
ld.global.u32 %r96, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r96, %f10, %f11, %f12, %f719, %f720, %f721, %r73, %f722, %f723, %rd59, %r50);
|
|
// inline asm
|
|
ld.local.f32 %f760, [%rd5];
|
|
add.f32 %f1570, %f760, 0f00000000;
|
|
ld.local.f32 %f761, [%rd5+4];
|
|
add.f32 %f1569, %f761, 0f00000000;
|
|
ld.local.f32 %f762, [%rd5+8];
|
|
add.f32 %f1568, %f762, 0f00000000;
|
|
mov.u32 %r253, %r73;
|
|
|
|
BB0_44:
|
|
cvt.rn.f32.s32 %f771, %r253;
|
|
add.f32 %f772, %f13, %f771;
|
|
sub.f32 %f773, %f14, %f771;
|
|
mul.f32 %f774, %f772, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f775, %f774;
|
|
sub.f32 %f776, %f774, %f775;
|
|
mul.f32 %f777, %f773, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f778, %f777;
|
|
sub.f32 %f779, %f777, %f778;
|
|
mul.f32 %f780, %f771, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f781, %f780;
|
|
sub.f32 %f782, %f780, %f781;
|
|
add.f32 %f783, %f779, 0f420551EC;
|
|
add.f32 %f784, %f776, 0f420551EC;
|
|
add.f32 %f785, %f782, 0f420551EC;
|
|
mul.f32 %f786, %f776, %f783;
|
|
fma.rn.f32 %f787, %f779, %f784, %f786;
|
|
fma.rn.f32 %f788, %f782, %f785, %f787;
|
|
add.f32 %f789, %f776, %f788;
|
|
add.f32 %f790, %f779, %f788;
|
|
add.f32 %f791, %f782, %f788;
|
|
add.f32 %f792, %f789, %f790;
|
|
mul.f32 %f793, %f791, %f792;
|
|
cvt.rmi.f32.f32 %f794, %f793;
|
|
sub.f32 %f795, %f793, %f794;
|
|
add.f32 %f796, %f789, %f789;
|
|
mul.f32 %f797, %f790, %f796;
|
|
cvt.rmi.f32.f32 %f798, %f797;
|
|
sub.f32 %f799, %f797, %f798;
|
|
mul.f32 %f800, %f789, %f792;
|
|
cvt.rmi.f32.f32 %f801, %f800;
|
|
sub.f32 %f802, %f800, %f801;
|
|
fma.rn.f32 %f803, %f795, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f804, %f799, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f805, %f802, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f806, %f492, %f803, %f497;
|
|
fma.rn.f32 %f807, %f492, %f804, %f498;
|
|
fma.rn.f32 %f808, %f492, %f805, %f499;
|
|
sub.f32 %f809, %f806, %f7;
|
|
sub.f32 %f810, %f807, %f8;
|
|
sub.f32 %f811, %f808, %f9;
|
|
mul.f32 %f812, %f810, %f810;
|
|
fma.rn.f32 %f813, %f809, %f809, %f812;
|
|
fma.rn.f32 %f814, %f811, %f811, %f813;
|
|
sqrt.rn.f32 %f770, %f814;
|
|
rcp.rn.f32 %f815, %f770;
|
|
mul.f32 %f766, %f815, %f809;
|
|
mul.f32 %f767, %f815, %f810;
|
|
mul.f32 %f768, %f815, %f811;
|
|
ld.global.u32 %r106, [imageEnabled];
|
|
and.b32 %r107, %r106, 32;
|
|
setp.eq.s32 %p56, %r107, 0;
|
|
selp.f32 %f816, 0f3F800000, 0f41200000, %p56;
|
|
mul.f32 %f769, %f816, %f174;
|
|
mov.u32 %r108, 1065353216;
|
|
st.local.u32 [%rd5+8], %r108;
|
|
st.local.u32 [%rd5+4], %r108;
|
|
st.local.u32 [%rd5], %r108;
|
|
ld.global.u32 %r103, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r103, %f10, %f11, %f12, %f766, %f767, %f768, %r73, %f769, %f770, %rd59, %r50);
|
|
// inline asm
|
|
ld.local.f32 %f817, [%rd5];
|
|
add.f32 %f1573, %f1570, %f817;
|
|
ld.local.f32 %f818, [%rd5+4];
|
|
add.f32 %f1572, %f1569, %f818;
|
|
ld.local.f32 %f819, [%rd5+8];
|
|
add.f32 %f1571, %f1568, %f819;
|
|
add.s32 %r254, %r253, 1;
|
|
|
|
BB0_45:
|
|
cvt.rn.f32.s32 %f828, %r254;
|
|
add.f32 %f829, %f13, %f828;
|
|
sub.f32 %f830, %f14, %f828;
|
|
mul.f32 %f831, %f829, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f832, %f831;
|
|
sub.f32 %f833, %f831, %f832;
|
|
mul.f32 %f834, %f830, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f835, %f834;
|
|
sub.f32 %f836, %f834, %f835;
|
|
mul.f32 %f837, %f828, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f838, %f837;
|
|
sub.f32 %f839, %f837, %f838;
|
|
add.f32 %f840, %f836, 0f420551EC;
|
|
add.f32 %f841, %f833, 0f420551EC;
|
|
add.f32 %f842, %f839, 0f420551EC;
|
|
mul.f32 %f843, %f833, %f840;
|
|
fma.rn.f32 %f844, %f836, %f841, %f843;
|
|
fma.rn.f32 %f845, %f839, %f842, %f844;
|
|
add.f32 %f846, %f833, %f845;
|
|
add.f32 %f847, %f836, %f845;
|
|
add.f32 %f848, %f839, %f845;
|
|
add.f32 %f849, %f846, %f847;
|
|
mul.f32 %f850, %f848, %f849;
|
|
cvt.rmi.f32.f32 %f851, %f850;
|
|
sub.f32 %f852, %f850, %f851;
|
|
add.f32 %f853, %f846, %f846;
|
|
mul.f32 %f854, %f847, %f853;
|
|
cvt.rmi.f32.f32 %f855, %f854;
|
|
sub.f32 %f856, %f854, %f855;
|
|
mul.f32 %f857, %f846, %f849;
|
|
cvt.rmi.f32.f32 %f858, %f857;
|
|
sub.f32 %f859, %f857, %f858;
|
|
fma.rn.f32 %f860, %f852, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f861, %f856, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f862, %f859, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f863, %f492, %f860, %f497;
|
|
fma.rn.f32 %f864, %f492, %f861, %f498;
|
|
fma.rn.f32 %f865, %f492, %f862, %f499;
|
|
sub.f32 %f866, %f863, %f7;
|
|
sub.f32 %f867, %f864, %f8;
|
|
sub.f32 %f868, %f865, %f9;
|
|
mul.f32 %f869, %f867, %f867;
|
|
fma.rn.f32 %f870, %f866, %f866, %f869;
|
|
fma.rn.f32 %f871, %f868, %f868, %f870;
|
|
sqrt.rn.f32 %f827, %f871;
|
|
rcp.rn.f32 %f872, %f827;
|
|
mul.f32 %f823, %f872, %f866;
|
|
mul.f32 %f824, %f872, %f867;
|
|
mul.f32 %f825, %f872, %f868;
|
|
ld.global.u32 %r112, [imageEnabled];
|
|
and.b32 %r113, %r112, 32;
|
|
setp.eq.s32 %p57, %r113, 0;
|
|
selp.f32 %f873, 0f3F800000, 0f41200000, %p57;
|
|
mul.f32 %f826, %f873, %f174;
|
|
mov.u32 %r114, 1065353216;
|
|
st.local.u32 [%rd5+8], %r114;
|
|
st.local.u32 [%rd5+4], %r114;
|
|
st.local.u32 [%rd5], %r114;
|
|
ld.global.u32 %r109, [root];
|
|
mov.u32 %r110, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r109, %f10, %f11, %f12, %f823, %f824, %f825, %r110, %f826, %f827, %rd59, %r50);
|
|
// inline asm
|
|
ld.local.f32 %f874, [%rd5];
|
|
add.f32 %f1582, %f1573, %f874;
|
|
ld.local.f32 %f875, [%rd5+4];
|
|
add.f32 %f1581, %f1572, %f875;
|
|
ld.local.f32 %f876, [%rd5+8];
|
|
add.f32 %f1580, %f1571, %f876;
|
|
add.s32 %r256, %r254, 1;
|
|
|
|
BB0_46:
|
|
setp.lt.u32 %p58, %r14, 4;
|
|
@%p58 bra BB0_48;
|
|
|
|
BB0_47:
|
|
cvt.rn.f32.s32 %f909, %r256;
|
|
add.f32 %f910, %f13, %f909;
|
|
sub.f32 %f911, %f14, %f909;
|
|
mul.f32 %f912, %f910, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f913, %f912;
|
|
sub.f32 %f914, %f912, %f913;
|
|
mul.f32 %f915, %f911, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f916, %f915;
|
|
sub.f32 %f917, %f915, %f916;
|
|
mul.f32 %f918, %f909, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f919, %f918;
|
|
sub.f32 %f920, %f918, %f919;
|
|
add.f32 %f921, %f917, 0f420551EC;
|
|
add.f32 %f922, %f914, 0f420551EC;
|
|
add.f32 %f923, %f920, 0f420551EC;
|
|
mul.f32 %f924, %f914, %f921;
|
|
fma.rn.f32 %f925, %f917, %f922, %f924;
|
|
fma.rn.f32 %f926, %f920, %f923, %f925;
|
|
add.f32 %f927, %f914, %f926;
|
|
add.f32 %f928, %f917, %f926;
|
|
add.f32 %f929, %f920, %f926;
|
|
add.f32 %f930, %f927, %f928;
|
|
mul.f32 %f931, %f929, %f930;
|
|
cvt.rmi.f32.f32 %f932, %f931;
|
|
sub.f32 %f933, %f931, %f932;
|
|
add.f32 %f934, %f927, %f927;
|
|
mul.f32 %f935, %f928, %f934;
|
|
cvt.rmi.f32.f32 %f936, %f935;
|
|
sub.f32 %f937, %f935, %f936;
|
|
mul.f32 %f938, %f927, %f930;
|
|
cvt.rmi.f32.f32 %f939, %f938;
|
|
sub.f32 %f940, %f938, %f939;
|
|
fma.rn.f32 %f941, %f933, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f942, %f937, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f943, %f940, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f944, %f492, %f941, %f497;
|
|
fma.rn.f32 %f945, %f492, %f942, %f498;
|
|
fma.rn.f32 %f946, %f492, %f943, %f499;
|
|
sub.f32 %f947, %f944, %f7;
|
|
sub.f32 %f948, %f945, %f8;
|
|
sub.f32 %f949, %f946, %f9;
|
|
mul.f32 %f950, %f948, %f948;
|
|
fma.rn.f32 %f951, %f947, %f947, %f950;
|
|
fma.rn.f32 %f952, %f949, %f949, %f951;
|
|
sqrt.rn.f32 %f884, %f952;
|
|
rcp.rn.f32 %f953, %f884;
|
|
mul.f32 %f880, %f953, %f947;
|
|
mul.f32 %f881, %f953, %f948;
|
|
mul.f32 %f882, %f953, %f949;
|
|
ld.global.u32 %r127, [imageEnabled];
|
|
and.b32 %r128, %r127, 32;
|
|
setp.eq.s32 %p59, %r128, 0;
|
|
selp.f32 %f954, 0f3F800000, 0f41200000, %p59;
|
|
mul.f32 %f883, %f954, %f174;
|
|
mov.u32 %r129, 1065353216;
|
|
st.local.u32 [%rd5+8], %r129;
|
|
st.local.u32 [%rd5+4], %r129;
|
|
st.local.u32 [%rd5], %r129;
|
|
ld.global.u32 %r115, [root];
|
|
mov.u32 %r125, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r115, %f10, %f11, %f12, %f880, %f881, %f882, %r125, %f883, %f884, %rd59, %r50);
|
|
// inline asm
|
|
ld.local.f32 %f955, [%rd5];
|
|
add.f32 %f956, %f1582, %f955;
|
|
ld.local.f32 %f957, [%rd5+4];
|
|
add.f32 %f958, %f1581, %f957;
|
|
ld.local.f32 %f959, [%rd5+8];
|
|
add.f32 %f960, %f1580, %f959;
|
|
add.s32 %r130, %r256, 1;
|
|
cvt.rn.f32.s32 %f961, %r130;
|
|
add.f32 %f962, %f13, %f961;
|
|
sub.f32 %f963, %f14, %f961;
|
|
mul.f32 %f964, %f962, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f965, %f964;
|
|
sub.f32 %f966, %f964, %f965;
|
|
mul.f32 %f967, %f963, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f968, %f967;
|
|
sub.f32 %f969, %f967, %f968;
|
|
mul.f32 %f970, %f961, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f971, %f970;
|
|
sub.f32 %f972, %f970, %f971;
|
|
add.f32 %f973, %f969, 0f420551EC;
|
|
add.f32 %f974, %f966, 0f420551EC;
|
|
add.f32 %f975, %f972, 0f420551EC;
|
|
mul.f32 %f976, %f966, %f973;
|
|
fma.rn.f32 %f977, %f969, %f974, %f976;
|
|
fma.rn.f32 %f978, %f972, %f975, %f977;
|
|
add.f32 %f979, %f966, %f978;
|
|
add.f32 %f980, %f969, %f978;
|
|
add.f32 %f981, %f972, %f978;
|
|
add.f32 %f982, %f979, %f980;
|
|
mul.f32 %f983, %f981, %f982;
|
|
cvt.rmi.f32.f32 %f984, %f983;
|
|
sub.f32 %f985, %f983, %f984;
|
|
add.f32 %f986, %f979, %f979;
|
|
mul.f32 %f987, %f980, %f986;
|
|
cvt.rmi.f32.f32 %f988, %f987;
|
|
sub.f32 %f989, %f987, %f988;
|
|
mul.f32 %f990, %f979, %f982;
|
|
cvt.rmi.f32.f32 %f991, %f990;
|
|
sub.f32 %f992, %f990, %f991;
|
|
fma.rn.f32 %f993, %f985, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f994, %f989, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f995, %f992, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f996, %f492, %f993, %f497;
|
|
fma.rn.f32 %f997, %f492, %f994, %f498;
|
|
fma.rn.f32 %f998, %f492, %f995, %f499;
|
|
sub.f32 %f999, %f996, %f7;
|
|
sub.f32 %f1000, %f997, %f8;
|
|
sub.f32 %f1001, %f998, %f9;
|
|
mul.f32 %f1002, %f1000, %f1000;
|
|
fma.rn.f32 %f1003, %f999, %f999, %f1002;
|
|
fma.rn.f32 %f1004, %f1001, %f1001, %f1003;
|
|
sqrt.rn.f32 %f892, %f1004;
|
|
rcp.rn.f32 %f1005, %f892;
|
|
mul.f32 %f888, %f1005, %f999;
|
|
mul.f32 %f889, %f1005, %f1000;
|
|
mul.f32 %f890, %f1005, %f1001;
|
|
ld.global.u32 %r131, [imageEnabled];
|
|
and.b32 %r132, %r131, 32;
|
|
setp.eq.s32 %p60, %r132, 0;
|
|
selp.f32 %f1006, 0f3F800000, 0f41200000, %p60;
|
|
mul.f32 %f891, %f1006, %f174;
|
|
st.local.u32 [%rd5+8], %r129;
|
|
st.local.u32 [%rd5+4], %r129;
|
|
st.local.u32 [%rd5], %r129;
|
|
ld.global.u32 %r118, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r118, %f10, %f11, %f12, %f888, %f889, %f890, %r125, %f891, %f892, %rd59, %r50);
|
|
// inline asm
|
|
ld.local.f32 %f1007, [%rd5];
|
|
add.f32 %f1008, %f956, %f1007;
|
|
ld.local.f32 %f1009, [%rd5+4];
|
|
add.f32 %f1010, %f958, %f1009;
|
|
ld.local.f32 %f1011, [%rd5+8];
|
|
add.f32 %f1012, %f960, %f1011;
|
|
add.s32 %r133, %r256, 2;
|
|
cvt.rn.f32.s32 %f1013, %r133;
|
|
add.f32 %f1014, %f13, %f1013;
|
|
sub.f32 %f1015, %f14, %f1013;
|
|
mul.f32 %f1016, %f1014, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f1017, %f1016;
|
|
sub.f32 %f1018, %f1016, %f1017;
|
|
mul.f32 %f1019, %f1015, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f1020, %f1019;
|
|
sub.f32 %f1021, %f1019, %f1020;
|
|
mul.f32 %f1022, %f1013, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f1023, %f1022;
|
|
sub.f32 %f1024, %f1022, %f1023;
|
|
add.f32 %f1025, %f1021, 0f420551EC;
|
|
add.f32 %f1026, %f1018, 0f420551EC;
|
|
add.f32 %f1027, %f1024, 0f420551EC;
|
|
mul.f32 %f1028, %f1018, %f1025;
|
|
fma.rn.f32 %f1029, %f1021, %f1026, %f1028;
|
|
fma.rn.f32 %f1030, %f1024, %f1027, %f1029;
|
|
add.f32 %f1031, %f1018, %f1030;
|
|
add.f32 %f1032, %f1021, %f1030;
|
|
add.f32 %f1033, %f1024, %f1030;
|
|
add.f32 %f1034, %f1031, %f1032;
|
|
mul.f32 %f1035, %f1033, %f1034;
|
|
cvt.rmi.f32.f32 %f1036, %f1035;
|
|
sub.f32 %f1037, %f1035, %f1036;
|
|
add.f32 %f1038, %f1031, %f1031;
|
|
mul.f32 %f1039, %f1032, %f1038;
|
|
cvt.rmi.f32.f32 %f1040, %f1039;
|
|
sub.f32 %f1041, %f1039, %f1040;
|
|
mul.f32 %f1042, %f1031, %f1034;
|
|
cvt.rmi.f32.f32 %f1043, %f1042;
|
|
sub.f32 %f1044, %f1042, %f1043;
|
|
fma.rn.f32 %f1045, %f1037, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1046, %f1041, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1047, %f1044, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1048, %f492, %f1045, %f497;
|
|
fma.rn.f32 %f1049, %f492, %f1046, %f498;
|
|
fma.rn.f32 %f1050, %f492, %f1047, %f499;
|
|
sub.f32 %f1051, %f1048, %f7;
|
|
sub.f32 %f1052, %f1049, %f8;
|
|
sub.f32 %f1053, %f1050, %f9;
|
|
mul.f32 %f1054, %f1052, %f1052;
|
|
fma.rn.f32 %f1055, %f1051, %f1051, %f1054;
|
|
fma.rn.f32 %f1056, %f1053, %f1053, %f1055;
|
|
sqrt.rn.f32 %f900, %f1056;
|
|
rcp.rn.f32 %f1057, %f900;
|
|
mul.f32 %f896, %f1057, %f1051;
|
|
mul.f32 %f897, %f1057, %f1052;
|
|
mul.f32 %f898, %f1057, %f1053;
|
|
ld.global.u32 %r134, [imageEnabled];
|
|
and.b32 %r135, %r134, 32;
|
|
setp.eq.s32 %p61, %r135, 0;
|
|
selp.f32 %f1058, 0f3F800000, 0f41200000, %p61;
|
|
mul.f32 %f899, %f1058, %f174;
|
|
st.local.u32 [%rd5+8], %r129;
|
|
st.local.u32 [%rd5+4], %r129;
|
|
st.local.u32 [%rd5], %r129;
|
|
ld.global.u32 %r121, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r121, %f10, %f11, %f12, %f896, %f897, %f898, %r125, %f899, %f900, %rd59, %r50);
|
|
// inline asm
|
|
ld.local.f32 %f1059, [%rd5];
|
|
add.f32 %f1060, %f1008, %f1059;
|
|
ld.local.f32 %f1061, [%rd5+4];
|
|
add.f32 %f1062, %f1010, %f1061;
|
|
ld.local.f32 %f1063, [%rd5+8];
|
|
add.f32 %f1064, %f1012, %f1063;
|
|
add.s32 %r136, %r256, 3;
|
|
cvt.rn.f32.s32 %f1065, %r136;
|
|
add.f32 %f1066, %f13, %f1065;
|
|
sub.f32 %f1067, %f14, %f1065;
|
|
mul.f32 %f1068, %f1066, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f1069, %f1068;
|
|
sub.f32 %f1070, %f1068, %f1069;
|
|
mul.f32 %f1071, %f1067, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f1072, %f1071;
|
|
sub.f32 %f1073, %f1071, %f1072;
|
|
mul.f32 %f1074, %f1065, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f1075, %f1074;
|
|
sub.f32 %f1076, %f1074, %f1075;
|
|
add.f32 %f1077, %f1073, 0f420551EC;
|
|
add.f32 %f1078, %f1070, 0f420551EC;
|
|
add.f32 %f1079, %f1076, 0f420551EC;
|
|
mul.f32 %f1080, %f1070, %f1077;
|
|
fma.rn.f32 %f1081, %f1073, %f1078, %f1080;
|
|
fma.rn.f32 %f1082, %f1076, %f1079, %f1081;
|
|
add.f32 %f1083, %f1070, %f1082;
|
|
add.f32 %f1084, %f1073, %f1082;
|
|
add.f32 %f1085, %f1076, %f1082;
|
|
add.f32 %f1086, %f1083, %f1084;
|
|
mul.f32 %f1087, %f1085, %f1086;
|
|
cvt.rmi.f32.f32 %f1088, %f1087;
|
|
sub.f32 %f1089, %f1087, %f1088;
|
|
add.f32 %f1090, %f1083, %f1083;
|
|
mul.f32 %f1091, %f1084, %f1090;
|
|
cvt.rmi.f32.f32 %f1092, %f1091;
|
|
sub.f32 %f1093, %f1091, %f1092;
|
|
mul.f32 %f1094, %f1083, %f1086;
|
|
cvt.rmi.f32.f32 %f1095, %f1094;
|
|
sub.f32 %f1096, %f1094, %f1095;
|
|
fma.rn.f32 %f1097, %f1089, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1098, %f1093, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1099, %f1096, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f1100, %f492, %f1097, %f497;
|
|
fma.rn.f32 %f1101, %f492, %f1098, %f498;
|
|
fma.rn.f32 %f1102, %f492, %f1099, %f499;
|
|
sub.f32 %f1103, %f1100, %f7;
|
|
sub.f32 %f1104, %f1101, %f8;
|
|
sub.f32 %f1105, %f1102, %f9;
|
|
mul.f32 %f1106, %f1104, %f1104;
|
|
fma.rn.f32 %f1107, %f1103, %f1103, %f1106;
|
|
fma.rn.f32 %f1108, %f1105, %f1105, %f1107;
|
|
sqrt.rn.f32 %f908, %f1108;
|
|
rcp.rn.f32 %f1109, %f908;
|
|
mul.f32 %f904, %f1109, %f1103;
|
|
mul.f32 %f905, %f1109, %f1104;
|
|
mul.f32 %f906, %f1109, %f1105;
|
|
ld.global.u32 %r137, [imageEnabled];
|
|
and.b32 %r138, %r137, 32;
|
|
setp.eq.s32 %p62, %r138, 0;
|
|
selp.f32 %f1110, 0f3F800000, 0f41200000, %p62;
|
|
mul.f32 %f907, %f1110, %f174;
|
|
st.local.u32 [%rd5+8], %r129;
|
|
st.local.u32 [%rd5+4], %r129;
|
|
st.local.u32 [%rd5], %r129;
|
|
ld.global.u32 %r124, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r124, %f10, %f11, %f12, %f904, %f905, %f906, %r125, %f907, %f908, %rd59, %r50);
|
|
// inline asm
|
|
ld.local.f32 %f1111, [%rd5];
|
|
add.f32 %f1582, %f1060, %f1111;
|
|
ld.local.f32 %f1112, [%rd5+4];
|
|
add.f32 %f1581, %f1062, %f1112;
|
|
ld.local.f32 %f1113, [%rd5+8];
|
|
add.f32 %f1580, %f1064, %f1113;
|
|
add.s32 %r256, %r256, 4;
|
|
setp.lt.s32 %p63, %r256, %r14;
|
|
@%p63 bra BB0_47;
|
|
|
|
BB0_48:
|
|
cvt.rn.f32.s32 %f1114, %r14;
|
|
rcp.rn.f32 %f1115, %f1114;
|
|
mul.f32 %f1583, %f1582, %f1115;
|
|
mul.f32 %f1584, %f1581, %f1115;
|
|
mul.f32 %f1585, %f1580, %f1115;
|
|
shr.u32 %r139, %r12, 31;
|
|
cvt.u16.u32 %rs160, %r139;
|
|
|
|
BB0_49:
|
|
fma.rn.f32 %f1544, %f161, %f1583, %f1544;
|
|
fma.rn.f32 %f1543, %f1557, %f1584, %f1543;
|
|
fma.rn.f32 %f1542, %f1558, %f1585, %f1542;
|
|
fma.rn.f32 %f1541, %f1559, %f1583, %f1541;
|
|
fma.rn.f32 %f1540, %f1560, %f1584, %f1540;
|
|
fma.rn.f32 %f1539, %f1561, %f1585, %f1539;
|
|
fma.rn.f32 %f1538, %f1562, %f1583, %f1538;
|
|
fma.rn.f32 %f1537, %f1563, %f1584, %f1537;
|
|
fma.rn.f32 %f1536, %f1564, %f1585, %f1536;
|
|
fma.rn.f32 %f1535, %f1565, %f1583, %f1535;
|
|
fma.rn.f32 %f1534, %f1566, %f1584, %f1534;
|
|
fma.rn.f32 %f1533, %f1567, %f1585, %f1533;
|
|
setp.eq.s16 %p64, %rs160, 0;
|
|
@%p64 bra BB0_51;
|
|
|
|
div.rn.f32 %f1116, %f161, %f488;
|
|
div.rn.f32 %f1117, %f1116, %f127;
|
|
cvt.sat.f32.f32 %f1118, %f1117;
|
|
mul.f32 %f1583, %f1583, %f1118;
|
|
|
|
BB0_51:
|
|
add.f32 %f1532, %f1532, %f1583;
|
|
|
|
BB0_52:
|
|
add.s32 %r252, %r252, 1;
|
|
setp.lt.u32 %p65, %r252, %r10;
|
|
@%p65 bra BB0_11;
|
|
|
|
BB0_53:
|
|
ld.global.u32 %r258, [imageEnabled];
|
|
and.b32 %r140, %r258, 8;
|
|
setp.eq.s32 %p66, %r140, 0;
|
|
@%p66 bra BB0_66;
|
|
|
|
cvt.sat.f32.f32 %f249, %f1532;
|
|
cvt.u64.u32 %rd70, %r3;
|
|
cvt.u64.u32 %rd69, %r2;
|
|
mov.u64 %rd73, image_Mask;
|
|
cvta.global.u64 %rd68, %rd73;
|
|
// inline asm
|
|
call (%rd67), _rt_buffer_get_64, (%rd68, %r34, %r34, %rd69, %rd70, %rd16, %rd16);
|
|
// inline asm
|
|
mov.f32 %f1121, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f1122, %f1121;
|
|
fma.rn.f32 %f1123, %f1122, 0fC0000000, 0f3EE8BA2E;
|
|
abs.f32 %f250, %f1123;
|
|
abs.f32 %f251, %f249;
|
|
setp.lt.f32 %p67, %f251, 0f00800000;
|
|
mul.f32 %f1124, %f251, 0f4B800000;
|
|
selp.f32 %f1125, 0fC3170000, 0fC2FE0000, %p67;
|
|
selp.f32 %f1126, %f1124, %f251, %p67;
|
|
mov.b32 %r143, %f1126;
|
|
and.b32 %r144, %r143, 8388607;
|
|
or.b32 %r145, %r144, 1065353216;
|
|
mov.b32 %f1127, %r145;
|
|
shr.u32 %r146, %r143, 23;
|
|
cvt.rn.f32.u32 %f1128, %r146;
|
|
add.f32 %f1129, %f1125, %f1128;
|
|
setp.gt.f32 %p68, %f1127, 0f3FB504F3;
|
|
mul.f32 %f1130, %f1127, 0f3F000000;
|
|
add.f32 %f1131, %f1129, 0f3F800000;
|
|
selp.f32 %f1132, %f1130, %f1127, %p68;
|
|
selp.f32 %f1133, %f1131, %f1129, %p68;
|
|
add.f32 %f1134, %f1132, 0fBF800000;
|
|
add.f32 %f1120, %f1132, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1119,%f1120;
|
|
// inline asm
|
|
add.f32 %f1135, %f1134, %f1134;
|
|
mul.f32 %f1136, %f1119, %f1135;
|
|
mul.f32 %f1137, %f1136, %f1136;
|
|
mov.f32 %f1138, 0f3C4CAF63;
|
|
mov.f32 %f1139, 0f3B18F0FE;
|
|
fma.rn.f32 %f1140, %f1139, %f1137, %f1138;
|
|
mov.f32 %f1141, 0f3DAAAABD;
|
|
fma.rn.f32 %f1142, %f1140, %f1137, %f1141;
|
|
mul.rn.f32 %f1143, %f1142, %f1137;
|
|
mul.rn.f32 %f1144, %f1143, %f1136;
|
|
sub.f32 %f1145, %f1134, %f1136;
|
|
neg.f32 %f1146, %f1136;
|
|
add.f32 %f1147, %f1145, %f1145;
|
|
fma.rn.f32 %f1148, %f1146, %f1134, %f1147;
|
|
mul.rn.f32 %f1149, %f1119, %f1148;
|
|
add.f32 %f1150, %f1144, %f1136;
|
|
sub.f32 %f1151, %f1136, %f1150;
|
|
add.f32 %f1152, %f1144, %f1151;
|
|
add.f32 %f1153, %f1149, %f1152;
|
|
add.f32 %f1154, %f1150, %f1153;
|
|
sub.f32 %f1155, %f1150, %f1154;
|
|
add.f32 %f1156, %f1153, %f1155;
|
|
mov.f32 %f1157, 0f3F317200;
|
|
mul.rn.f32 %f1158, %f1133, %f1157;
|
|
mov.f32 %f1159, 0f35BFBE8E;
|
|
mul.rn.f32 %f1160, %f1133, %f1159;
|
|
add.f32 %f1161, %f1158, %f1154;
|
|
sub.f32 %f1162, %f1158, %f1161;
|
|
add.f32 %f1163, %f1154, %f1162;
|
|
add.f32 %f1164, %f1156, %f1163;
|
|
add.f32 %f1165, %f1160, %f1164;
|
|
add.f32 %f1166, %f1161, %f1165;
|
|
sub.f32 %f1167, %f1161, %f1166;
|
|
add.f32 %f1168, %f1165, %f1167;
|
|
mov.f32 %f1169, 0f3EE8BA2E;
|
|
mul.rn.f32 %f1170, %f1169, %f1166;
|
|
neg.f32 %f1171, %f1170;
|
|
fma.rn.f32 %f1172, %f1169, %f1166, %f1171;
|
|
fma.rn.f32 %f1173, %f1169, %f1168, %f1172;
|
|
mov.f32 %f1174, 0f00000000;
|
|
fma.rn.f32 %f1175, %f1174, %f1166, %f1173;
|
|
add.rn.f32 %f1176, %f1170, %f1175;
|
|
neg.f32 %f1177, %f1176;
|
|
add.rn.f32 %f1178, %f1170, %f1177;
|
|
add.rn.f32 %f1179, %f1178, %f1175;
|
|
mov.b32 %r147, %f1176;
|
|
setp.eq.s32 %p69, %r147, 1118925336;
|
|
add.s32 %r148, %r147, -1;
|
|
mov.b32 %f1180, %r148;
|
|
add.f32 %f1181, %f1179, 0f37000000;
|
|
selp.f32 %f1182, %f1180, %f1176, %p69;
|
|
selp.f32 %f252, %f1181, %f1179, %p69;
|
|
mul.f32 %f1183, %f1182, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1184, %f1183;
|
|
mov.f32 %f1185, 0fBF317200;
|
|
fma.rn.f32 %f1186, %f1184, %f1185, %f1182;
|
|
mov.f32 %f1187, 0fB5BFBE8E;
|
|
fma.rn.f32 %f1188, %f1184, %f1187, %f1186;
|
|
mul.f32 %f1189, %f1188, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1190, %f1189;
|
|
add.f32 %f1191, %f1184, 0f00000000;
|
|
ex2.approx.f32 %f1192, %f1191;
|
|
mul.f32 %f1193, %f1190, %f1192;
|
|
setp.lt.f32 %p70, %f1182, 0fC2D20000;
|
|
selp.f32 %f1194, 0f00000000, %f1193, %p70;
|
|
setp.gt.f32 %p71, %f1182, 0f42D20000;
|
|
selp.f32 %f1613, 0f7F800000, %f1194, %p71;
|
|
setp.eq.f32 %p72, %f1613, 0f7F800000;
|
|
@%p72 bra BB0_56;
|
|
|
|
fma.rn.f32 %f1613, %f1613, %f252, %f1613;
|
|
|
|
BB0_56:
|
|
setp.lt.f32 %p73, %f249, 0f00000000;
|
|
setp.eq.f32 %p74, %f250, 0f3F800000;
|
|
and.pred %p4, %p73, %p74;
|
|
mov.b32 %r149, %f1613;
|
|
xor.b32 %r150, %r149, -2147483648;
|
|
mov.b32 %f1195, %r150;
|
|
selp.f32 %f1615, %f1195, %f1613, %p4;
|
|
setp.eq.f32 %p75, %f249, 0f00000000;
|
|
@%p75 bra BB0_59;
|
|
bra.uni BB0_57;
|
|
|
|
BB0_59:
|
|
add.f32 %f1198, %f249, %f249;
|
|
selp.f32 %f1615, %f1198, 0f00000000, %p74;
|
|
bra.uni BB0_60;
|
|
|
|
BB0_121:
|
|
mov.u64 %rd194, image_HDR;
|
|
cvta.global.u64 %rd189, %rd194;
|
|
mov.u32 %r229, 8;
|
|
// inline asm
|
|
call (%rd188), _rt_buffer_get_64, (%rd189, %r34, %r229, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
mov.f32 %f1495, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs119, %f1495;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs120, 0;
|
|
st.v4.u16 [%rd188], {%rs119, %rs119, %rs119, %rs120};
|
|
|
|
BB0_122:
|
|
ld.global.u32 %r230, [additive];
|
|
setp.eq.s32 %p141, %r230, 0;
|
|
@%p141 bra BB0_124;
|
|
|
|
mov.u64 %rd207, image_RNM0;
|
|
cvta.global.u64 %rd196, %rd207;
|
|
mov.u32 %r234, 8;
|
|
// inline asm
|
|
call (%rd195), _rt_buffer_get_64, (%rd196, %r34, %r234, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs127, %rs128, %rs129, %rs130}, [%rd195];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1496, %rs127;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1497, %rs128;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1498, %rs129;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd201), _rt_buffer_get_64, (%rd196, %r34, %r234, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1499, %f1496, 0f00000000;
|
|
add.f32 %f1500, %f1497, 0f00000000;
|
|
add.f32 %f1501, %f1498, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs126, %f1501;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs125, %f1500;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs124, %f1499;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs131, 0;
|
|
st.v4.u16 [%rd201], {%rs124, %rs125, %rs126, %rs131};
|
|
bra.uni BB0_125;
|
|
|
|
BB0_124:
|
|
mov.u64 %rd214, image_RNM0;
|
|
cvta.global.u64 %rd209, %rd214;
|
|
mov.u32 %r236, 8;
|
|
// inline asm
|
|
call (%rd208), _rt_buffer_get_64, (%rd209, %r34, %r236, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
mov.f32 %f1502, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs132, %f1502;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs133, 0;
|
|
st.v4.u16 [%rd208], {%rs132, %rs132, %rs132, %rs133};
|
|
|
|
BB0_125:
|
|
ld.global.u32 %r237, [additive];
|
|
setp.eq.s32 %p142, %r237, 0;
|
|
@%p142 bra BB0_127;
|
|
|
|
mov.u64 %rd227, image_RNM1;
|
|
cvta.global.u64 %rd216, %rd227;
|
|
mov.u32 %r241, 8;
|
|
// inline asm
|
|
call (%rd215), _rt_buffer_get_64, (%rd216, %r34, %r241, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs140, %rs141, %rs142, %rs143}, [%rd215];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1503, %rs140;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1504, %rs141;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1505, %rs142;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd221), _rt_buffer_get_64, (%rd216, %r34, %r241, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1506, %f1503, 0f00000000;
|
|
add.f32 %f1507, %f1504, 0f00000000;
|
|
add.f32 %f1508, %f1505, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs139, %f1508;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs138, %f1507;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs137, %f1506;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs144, 0;
|
|
st.v4.u16 [%rd221], {%rs137, %rs138, %rs139, %rs144};
|
|
bra.uni BB0_128;
|
|
|
|
BB0_127:
|
|
mov.u64 %rd234, image_RNM1;
|
|
cvta.global.u64 %rd229, %rd234;
|
|
mov.u32 %r243, 8;
|
|
// inline asm
|
|
call (%rd228), _rt_buffer_get_64, (%rd229, %r34, %r243, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
mov.f32 %f1509, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs145, %f1509;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs146, 0;
|
|
st.v4.u16 [%rd228], {%rs145, %rs145, %rs145, %rs146};
|
|
|
|
BB0_128:
|
|
ld.global.u32 %r244, [additive];
|
|
setp.eq.s32 %p143, %r244, 0;
|
|
@%p143 bra BB0_130;
|
|
|
|
mov.u64 %rd247, image_RNM2;
|
|
cvta.global.u64 %rd236, %rd247;
|
|
mov.u32 %r248, 8;
|
|
// inline asm
|
|
call (%rd235), _rt_buffer_get_64, (%rd236, %r34, %r248, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs153, %rs154, %rs155, %rs156}, [%rd235];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1510, %rs153;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1511, %rs154;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1512, %rs155;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd241), _rt_buffer_get_64, (%rd236, %r34, %r248, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1513, %f1510, 0f00000000;
|
|
add.f32 %f1514, %f1511, 0f00000000;
|
|
add.f32 %f1515, %f1512, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs152, %f1515;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs151, %f1514;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs150, %f1513;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs157, 0;
|
|
st.v4.u16 [%rd241], {%rs150, %rs151, %rs152, %rs157};
|
|
bra.uni BB0_131;
|
|
|
|
BB0_130:
|
|
mov.u64 %rd254, image_RNM2;
|
|
cvta.global.u64 %rd249, %rd254;
|
|
mov.u32 %r250, 8;
|
|
// inline asm
|
|
call (%rd248), _rt_buffer_get_64, (%rd249, %r34, %r250, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
mov.f32 %f1516, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs158, %f1516;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs159, 0;
|
|
st.v4.u16 [%rd248], {%rs158, %rs158, %rs158, %rs159};
|
|
bra.uni BB0_131;
|
|
|
|
BB0_57:
|
|
setp.geu.f32 %p76, %f249, 0f00000000;
|
|
@%p76 bra BB0_60;
|
|
|
|
cvt.rzi.f32.f32 %f1197, %f1169;
|
|
setp.neu.f32 %p77, %f1197, 0f3EE8BA2E;
|
|
selp.f32 %f1615, 0f7FFFFFFF, %f1615, %p77;
|
|
|
|
BB0_60:
|
|
add.f32 %f1199, %f251, 0f3EE8BA2E;
|
|
mov.b32 %r151, %f1199;
|
|
setp.lt.s32 %p79, %r151, 2139095040;
|
|
@%p79 bra BB0_65;
|
|
|
|
setp.gtu.f32 %p80, %f251, 0f7F800000;
|
|
@%p80 bra BB0_64;
|
|
bra.uni BB0_62;
|
|
|
|
BB0_64:
|
|
add.f32 %f1615, %f249, 0f3EE8BA2E;
|
|
bra.uni BB0_65;
|
|
|
|
BB0_62:
|
|
setp.neu.f32 %p81, %f251, 0f7F800000;
|
|
@%p81 bra BB0_65;
|
|
|
|
selp.f32 %f1615, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
BB0_65:
|
|
mul.f32 %f1200, %f1615, 0f437F0000;
|
|
setp.eq.f32 %p82, %f249, 0f3F800000;
|
|
selp.f32 %f1201, 0f437F0000, %f1200, %p82;
|
|
cvt.rzi.u32.f32 %r152, %f1201;
|
|
cvt.u16.u32 %rs43, %r152;
|
|
mov.u16 %rs44, 255;
|
|
st.v2.u8 [%rd67], {%rs43, %rs44};
|
|
ld.global.u32 %r258, [imageEnabled];
|
|
|
|
BB0_66:
|
|
and.b32 %r153, %r258, 1;
|
|
setp.eq.b32 %p83, %r153, 1;
|
|
@!%p83 bra BB0_101;
|
|
bra.uni BB0_67;
|
|
|
|
BB0_67:
|
|
mov.f32 %f1204, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f1205, %f1204;
|
|
fma.rn.f32 %f1206, %f1205, 0fC0000000, 0f3EE66666;
|
|
abs.f32 %f263, %f1206;
|
|
abs.f32 %f264, %f1544;
|
|
setp.lt.f32 %p84, %f264, 0f00800000;
|
|
mul.f32 %f1207, %f264, 0f4B800000;
|
|
selp.f32 %f1208, 0fC3170000, 0fC2FE0000, %p84;
|
|
selp.f32 %f1209, %f1207, %f264, %p84;
|
|
mov.b32 %r154, %f1209;
|
|
and.b32 %r155, %r154, 8388607;
|
|
or.b32 %r156, %r155, 1065353216;
|
|
mov.b32 %f1210, %r156;
|
|
shr.u32 %r157, %r154, 23;
|
|
cvt.rn.f32.u32 %f1211, %r157;
|
|
add.f32 %f1212, %f1208, %f1211;
|
|
setp.gt.f32 %p85, %f1210, 0f3FB504F3;
|
|
mul.f32 %f1213, %f1210, 0f3F000000;
|
|
add.f32 %f1214, %f1212, 0f3F800000;
|
|
selp.f32 %f1215, %f1213, %f1210, %p85;
|
|
selp.f32 %f1216, %f1214, %f1212, %p85;
|
|
add.f32 %f1217, %f1215, 0fBF800000;
|
|
add.f32 %f1203, %f1215, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1202,%f1203;
|
|
// inline asm
|
|
add.f32 %f1218, %f1217, %f1217;
|
|
mul.f32 %f1219, %f1202, %f1218;
|
|
mul.f32 %f1220, %f1219, %f1219;
|
|
mov.f32 %f1221, 0f3C4CAF63;
|
|
mov.f32 %f1222, 0f3B18F0FE;
|
|
fma.rn.f32 %f1223, %f1222, %f1220, %f1221;
|
|
mov.f32 %f1224, 0f3DAAAABD;
|
|
fma.rn.f32 %f1225, %f1223, %f1220, %f1224;
|
|
mul.rn.f32 %f1226, %f1225, %f1220;
|
|
mul.rn.f32 %f1227, %f1226, %f1219;
|
|
sub.f32 %f1228, %f1217, %f1219;
|
|
neg.f32 %f1229, %f1219;
|
|
add.f32 %f1230, %f1228, %f1228;
|
|
fma.rn.f32 %f1231, %f1229, %f1217, %f1230;
|
|
mul.rn.f32 %f1232, %f1202, %f1231;
|
|
add.f32 %f1233, %f1227, %f1219;
|
|
sub.f32 %f1234, %f1219, %f1233;
|
|
add.f32 %f1235, %f1227, %f1234;
|
|
add.f32 %f1236, %f1232, %f1235;
|
|
add.f32 %f1237, %f1233, %f1236;
|
|
sub.f32 %f1238, %f1233, %f1237;
|
|
add.f32 %f1239, %f1236, %f1238;
|
|
mov.f32 %f1240, 0f3F317200;
|
|
mul.rn.f32 %f1241, %f1216, %f1240;
|
|
mov.f32 %f1242, 0f35BFBE8E;
|
|
mul.rn.f32 %f1243, %f1216, %f1242;
|
|
add.f32 %f1244, %f1241, %f1237;
|
|
sub.f32 %f1245, %f1241, %f1244;
|
|
add.f32 %f1246, %f1237, %f1245;
|
|
add.f32 %f1247, %f1239, %f1246;
|
|
add.f32 %f1248, %f1243, %f1247;
|
|
add.f32 %f1249, %f1244, %f1248;
|
|
sub.f32 %f1250, %f1244, %f1249;
|
|
add.f32 %f1251, %f1248, %f1250;
|
|
mov.f32 %f1252, 0f3EE66666;
|
|
mul.rn.f32 %f1253, %f1252, %f1249;
|
|
neg.f32 %f1254, %f1253;
|
|
fma.rn.f32 %f1255, %f1252, %f1249, %f1254;
|
|
fma.rn.f32 %f1256, %f1252, %f1251, %f1255;
|
|
mov.f32 %f1257, 0f00000000;
|
|
fma.rn.f32 %f1258, %f1257, %f1249, %f1256;
|
|
add.rn.f32 %f1259, %f1253, %f1258;
|
|
neg.f32 %f1260, %f1259;
|
|
add.rn.f32 %f1261, %f1253, %f1260;
|
|
add.rn.f32 %f1262, %f1261, %f1258;
|
|
mov.b32 %r158, %f1259;
|
|
setp.eq.s32 %p86, %r158, 1118925336;
|
|
add.s32 %r159, %r158, -1;
|
|
mov.b32 %f1263, %r159;
|
|
add.f32 %f1264, %f1262, 0f37000000;
|
|
selp.f32 %f1265, %f1263, %f1259, %p86;
|
|
selp.f32 %f265, %f1264, %f1262, %p86;
|
|
mul.f32 %f1266, %f1265, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1267, %f1266;
|
|
mov.f32 %f1268, 0fBF317200;
|
|
fma.rn.f32 %f1269, %f1267, %f1268, %f1265;
|
|
mov.f32 %f1270, 0fB5BFBE8E;
|
|
fma.rn.f32 %f1271, %f1267, %f1270, %f1269;
|
|
mul.f32 %f1272, %f1271, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1273, %f1272;
|
|
add.f32 %f1274, %f1267, 0f00000000;
|
|
ex2.approx.f32 %f1275, %f1274;
|
|
mul.f32 %f1276, %f1273, %f1275;
|
|
setp.lt.f32 %p87, %f1265, 0fC2D20000;
|
|
selp.f32 %f1277, 0f00000000, %f1276, %p87;
|
|
setp.gt.f32 %p88, %f1265, 0f42D20000;
|
|
selp.f32 %f1616, 0f7F800000, %f1277, %p88;
|
|
setp.eq.f32 %p89, %f1616, 0f7F800000;
|
|
@%p89 bra BB0_69;
|
|
|
|
fma.rn.f32 %f1616, %f1616, %f265, %f1616;
|
|
|
|
BB0_69:
|
|
setp.lt.f32 %p90, %f1544, 0f00000000;
|
|
setp.eq.f32 %p91, %f263, 0f3F800000;
|
|
and.pred %p5, %p90, %p91;
|
|
mov.b32 %r160, %f1616;
|
|
xor.b32 %r161, %r160, -2147483648;
|
|
mov.b32 %f1278, %r161;
|
|
selp.f32 %f1618, %f1278, %f1616, %p5;
|
|
setp.eq.f32 %p92, %f1544, 0f00000000;
|
|
@%p92 bra BB0_72;
|
|
bra.uni BB0_70;
|
|
|
|
BB0_72:
|
|
add.f32 %f1281, %f1544, %f1544;
|
|
selp.f32 %f1618, %f1281, 0f00000000, %p91;
|
|
bra.uni BB0_73;
|
|
|
|
BB0_70:
|
|
setp.geu.f32 %p93, %f1544, 0f00000000;
|
|
@%p93 bra BB0_73;
|
|
|
|
cvt.rzi.f32.f32 %f1280, %f1252;
|
|
setp.neu.f32 %p94, %f1280, 0f3EE66666;
|
|
selp.f32 %f1618, 0f7FFFFFFF, %f1618, %p94;
|
|
|
|
BB0_73:
|
|
add.f32 %f1282, %f264, 0f3EE66666;
|
|
mov.b32 %r162, %f1282;
|
|
setp.lt.s32 %p96, %r162, 2139095040;
|
|
@%p96 bra BB0_78;
|
|
|
|
setp.gtu.f32 %p97, %f264, 0f7F800000;
|
|
@%p97 bra BB0_77;
|
|
bra.uni BB0_75;
|
|
|
|
BB0_77:
|
|
add.f32 %f1618, %f1544, 0f3EE66666;
|
|
bra.uni BB0_78;
|
|
|
|
BB0_75:
|
|
setp.neu.f32 %p98, %f264, 0f7F800000;
|
|
@%p98 bra BB0_78;
|
|
|
|
selp.f32 %f1618, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
BB0_78:
|
|
setp.eq.f32 %p99, %f1544, 0f3F800000;
|
|
selp.f32 %f276, 0f3F800000, %f1618, %p99;
|
|
abs.f32 %f277, %f1543;
|
|
setp.lt.f32 %p100, %f277, 0f00800000;
|
|
mul.f32 %f1285, %f277, 0f4B800000;
|
|
selp.f32 %f1286, 0fC3170000, 0fC2FE0000, %p100;
|
|
selp.f32 %f1287, %f1285, %f277, %p100;
|
|
mov.b32 %r163, %f1287;
|
|
and.b32 %r164, %r163, 8388607;
|
|
or.b32 %r165, %r164, 1065353216;
|
|
mov.b32 %f1288, %r165;
|
|
shr.u32 %r166, %r163, 23;
|
|
cvt.rn.f32.u32 %f1289, %r166;
|
|
add.f32 %f1290, %f1286, %f1289;
|
|
setp.gt.f32 %p101, %f1288, 0f3FB504F3;
|
|
mul.f32 %f1291, %f1288, 0f3F000000;
|
|
add.f32 %f1292, %f1290, 0f3F800000;
|
|
selp.f32 %f1293, %f1291, %f1288, %p101;
|
|
selp.f32 %f1294, %f1292, %f1290, %p101;
|
|
add.f32 %f1295, %f1293, 0fBF800000;
|
|
add.f32 %f1284, %f1293, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1283,%f1284;
|
|
// inline asm
|
|
add.f32 %f1296, %f1295, %f1295;
|
|
mul.f32 %f1297, %f1283, %f1296;
|
|
mul.f32 %f1298, %f1297, %f1297;
|
|
fma.rn.f32 %f1301, %f1222, %f1298, %f1221;
|
|
fma.rn.f32 %f1303, %f1301, %f1298, %f1224;
|
|
mul.rn.f32 %f1304, %f1303, %f1298;
|
|
mul.rn.f32 %f1305, %f1304, %f1297;
|
|
sub.f32 %f1306, %f1295, %f1297;
|
|
neg.f32 %f1307, %f1297;
|
|
add.f32 %f1308, %f1306, %f1306;
|
|
fma.rn.f32 %f1309, %f1307, %f1295, %f1308;
|
|
mul.rn.f32 %f1310, %f1283, %f1309;
|
|
add.f32 %f1311, %f1305, %f1297;
|
|
sub.f32 %f1312, %f1297, %f1311;
|
|
add.f32 %f1313, %f1305, %f1312;
|
|
add.f32 %f1314, %f1310, %f1313;
|
|
add.f32 %f1315, %f1311, %f1314;
|
|
sub.f32 %f1316, %f1311, %f1315;
|
|
add.f32 %f1317, %f1314, %f1316;
|
|
mul.rn.f32 %f1319, %f1294, %f1240;
|
|
mul.rn.f32 %f1321, %f1294, %f1242;
|
|
add.f32 %f1322, %f1319, %f1315;
|
|
sub.f32 %f1323, %f1319, %f1322;
|
|
add.f32 %f1324, %f1315, %f1323;
|
|
add.f32 %f1325, %f1317, %f1324;
|
|
add.f32 %f1326, %f1321, %f1325;
|
|
add.f32 %f1327, %f1322, %f1326;
|
|
sub.f32 %f1328, %f1322, %f1327;
|
|
add.f32 %f1329, %f1326, %f1328;
|
|
mul.rn.f32 %f1331, %f1252, %f1327;
|
|
neg.f32 %f1332, %f1331;
|
|
fma.rn.f32 %f1333, %f1252, %f1327, %f1332;
|
|
fma.rn.f32 %f1334, %f1252, %f1329, %f1333;
|
|
fma.rn.f32 %f1336, %f1257, %f1327, %f1334;
|
|
add.rn.f32 %f1337, %f1331, %f1336;
|
|
neg.f32 %f1338, %f1337;
|
|
add.rn.f32 %f1339, %f1331, %f1338;
|
|
add.rn.f32 %f1340, %f1339, %f1336;
|
|
mov.b32 %r167, %f1337;
|
|
setp.eq.s32 %p102, %r167, 1118925336;
|
|
add.s32 %r168, %r167, -1;
|
|
mov.b32 %f1341, %r168;
|
|
add.f32 %f1342, %f1340, 0f37000000;
|
|
selp.f32 %f1343, %f1341, %f1337, %p102;
|
|
selp.f32 %f278, %f1342, %f1340, %p102;
|
|
mul.f32 %f1344, %f1343, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1345, %f1344;
|
|
fma.rn.f32 %f1347, %f1345, %f1268, %f1343;
|
|
fma.rn.f32 %f1349, %f1345, %f1270, %f1347;
|
|
mul.f32 %f1350, %f1349, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1351, %f1350;
|
|
add.f32 %f1352, %f1345, 0f00000000;
|
|
ex2.approx.f32 %f1353, %f1352;
|
|
mul.f32 %f1354, %f1351, %f1353;
|
|
setp.lt.f32 %p103, %f1343, 0fC2D20000;
|
|
selp.f32 %f1355, 0f00000000, %f1354, %p103;
|
|
setp.gt.f32 %p104, %f1343, 0f42D20000;
|
|
selp.f32 %f1619, 0f7F800000, %f1355, %p104;
|
|
setp.eq.f32 %p105, %f1619, 0f7F800000;
|
|
@%p105 bra BB0_80;
|
|
|
|
fma.rn.f32 %f1619, %f1619, %f278, %f1619;
|
|
|
|
BB0_80:
|
|
setp.lt.f32 %p106, %f1543, 0f00000000;
|
|
and.pred %p6, %p106, %p91;
|
|
mov.b32 %r169, %f1619;
|
|
xor.b32 %r170, %r169, -2147483648;
|
|
mov.b32 %f1356, %r170;
|
|
selp.f32 %f1621, %f1356, %f1619, %p6;
|
|
setp.eq.f32 %p108, %f1543, 0f00000000;
|
|
@%p108 bra BB0_83;
|
|
bra.uni BB0_81;
|
|
|
|
BB0_83:
|
|
add.f32 %f1359, %f1543, %f1543;
|
|
selp.f32 %f1621, %f1359, 0f00000000, %p91;
|
|
bra.uni BB0_84;
|
|
|
|
BB0_81:
|
|
setp.geu.f32 %p109, %f1543, 0f00000000;
|
|
@%p109 bra BB0_84;
|
|
|
|
cvt.rzi.f32.f32 %f1358, %f1252;
|
|
setp.neu.f32 %p110, %f1358, 0f3EE66666;
|
|
selp.f32 %f1621, 0f7FFFFFFF, %f1621, %p110;
|
|
|
|
BB0_84:
|
|
add.f32 %f1360, %f277, 0f3EE66666;
|
|
mov.b32 %r171, %f1360;
|
|
setp.lt.s32 %p112, %r171, 2139095040;
|
|
@%p112 bra BB0_89;
|
|
|
|
setp.gtu.f32 %p113, %f277, 0f7F800000;
|
|
@%p113 bra BB0_88;
|
|
bra.uni BB0_86;
|
|
|
|
BB0_88:
|
|
add.f32 %f1621, %f1543, 0f3EE66666;
|
|
bra.uni BB0_89;
|
|
|
|
BB0_86:
|
|
setp.neu.f32 %p114, %f277, 0f7F800000;
|
|
@%p114 bra BB0_89;
|
|
|
|
selp.f32 %f1621, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
BB0_89:
|
|
setp.eq.f32 %p115, %f1543, 0f3F800000;
|
|
selp.f32 %f289, 0f3F800000, %f1621, %p115;
|
|
abs.f32 %f290, %f1542;
|
|
setp.lt.f32 %p116, %f290, 0f00800000;
|
|
mul.f32 %f1363, %f290, 0f4B800000;
|
|
selp.f32 %f1364, 0fC3170000, 0fC2FE0000, %p116;
|
|
selp.f32 %f1365, %f1363, %f290, %p116;
|
|
mov.b32 %r172, %f1365;
|
|
and.b32 %r173, %r172, 8388607;
|
|
or.b32 %r174, %r173, 1065353216;
|
|
mov.b32 %f1366, %r174;
|
|
shr.u32 %r175, %r172, 23;
|
|
cvt.rn.f32.u32 %f1367, %r175;
|
|
add.f32 %f1368, %f1364, %f1367;
|
|
setp.gt.f32 %p117, %f1366, 0f3FB504F3;
|
|
mul.f32 %f1369, %f1366, 0f3F000000;
|
|
add.f32 %f1370, %f1368, 0f3F800000;
|
|
selp.f32 %f1371, %f1369, %f1366, %p117;
|
|
selp.f32 %f1372, %f1370, %f1368, %p117;
|
|
add.f32 %f1373, %f1371, 0fBF800000;
|
|
add.f32 %f1362, %f1371, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1361,%f1362;
|
|
// inline asm
|
|
add.f32 %f1374, %f1373, %f1373;
|
|
mul.f32 %f1375, %f1361, %f1374;
|
|
mul.f32 %f1376, %f1375, %f1375;
|
|
fma.rn.f32 %f1379, %f1222, %f1376, %f1221;
|
|
fma.rn.f32 %f1381, %f1379, %f1376, %f1224;
|
|
mul.rn.f32 %f1382, %f1381, %f1376;
|
|
mul.rn.f32 %f1383, %f1382, %f1375;
|
|
sub.f32 %f1384, %f1373, %f1375;
|
|
neg.f32 %f1385, %f1375;
|
|
add.f32 %f1386, %f1384, %f1384;
|
|
fma.rn.f32 %f1387, %f1385, %f1373, %f1386;
|
|
mul.rn.f32 %f1388, %f1361, %f1387;
|
|
add.f32 %f1389, %f1383, %f1375;
|
|
sub.f32 %f1390, %f1375, %f1389;
|
|
add.f32 %f1391, %f1383, %f1390;
|
|
add.f32 %f1392, %f1388, %f1391;
|
|
add.f32 %f1393, %f1389, %f1392;
|
|
sub.f32 %f1394, %f1389, %f1393;
|
|
add.f32 %f1395, %f1392, %f1394;
|
|
mul.rn.f32 %f1397, %f1372, %f1240;
|
|
mul.rn.f32 %f1399, %f1372, %f1242;
|
|
add.f32 %f1400, %f1397, %f1393;
|
|
sub.f32 %f1401, %f1397, %f1400;
|
|
add.f32 %f1402, %f1393, %f1401;
|
|
add.f32 %f1403, %f1395, %f1402;
|
|
add.f32 %f1404, %f1399, %f1403;
|
|
add.f32 %f1405, %f1400, %f1404;
|
|
sub.f32 %f1406, %f1400, %f1405;
|
|
add.f32 %f1407, %f1404, %f1406;
|
|
mul.rn.f32 %f1409, %f1252, %f1405;
|
|
neg.f32 %f1410, %f1409;
|
|
fma.rn.f32 %f1411, %f1252, %f1405, %f1410;
|
|
fma.rn.f32 %f1412, %f1252, %f1407, %f1411;
|
|
fma.rn.f32 %f1414, %f1257, %f1405, %f1412;
|
|
add.rn.f32 %f1415, %f1409, %f1414;
|
|
neg.f32 %f1416, %f1415;
|
|
add.rn.f32 %f1417, %f1409, %f1416;
|
|
add.rn.f32 %f1418, %f1417, %f1414;
|
|
mov.b32 %r176, %f1415;
|
|
setp.eq.s32 %p118, %r176, 1118925336;
|
|
add.s32 %r177, %r176, -1;
|
|
mov.b32 %f1419, %r177;
|
|
add.f32 %f1420, %f1418, 0f37000000;
|
|
selp.f32 %f1421, %f1419, %f1415, %p118;
|
|
selp.f32 %f291, %f1420, %f1418, %p118;
|
|
mul.f32 %f1422, %f1421, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1423, %f1422;
|
|
fma.rn.f32 %f1425, %f1423, %f1268, %f1421;
|
|
fma.rn.f32 %f1427, %f1423, %f1270, %f1425;
|
|
mul.f32 %f1428, %f1427, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1429, %f1428;
|
|
add.f32 %f1430, %f1423, 0f00000000;
|
|
ex2.approx.f32 %f1431, %f1430;
|
|
mul.f32 %f1432, %f1429, %f1431;
|
|
setp.lt.f32 %p119, %f1421, 0fC2D20000;
|
|
selp.f32 %f1433, 0f00000000, %f1432, %p119;
|
|
setp.gt.f32 %p120, %f1421, 0f42D20000;
|
|
selp.f32 %f1622, 0f7F800000, %f1433, %p120;
|
|
setp.eq.f32 %p121, %f1622, 0f7F800000;
|
|
@%p121 bra BB0_91;
|
|
|
|
fma.rn.f32 %f1622, %f1622, %f291, %f1622;
|
|
|
|
BB0_91:
|
|
setp.lt.f32 %p122, %f1542, 0f00000000;
|
|
and.pred %p7, %p122, %p91;
|
|
mov.b32 %r178, %f1622;
|
|
xor.b32 %r179, %r178, -2147483648;
|
|
mov.b32 %f1434, %r179;
|
|
selp.f32 %f1624, %f1434, %f1622, %p7;
|
|
setp.eq.f32 %p124, %f1542, 0f00000000;
|
|
@%p124 bra BB0_94;
|
|
bra.uni BB0_92;
|
|
|
|
BB0_94:
|
|
add.f32 %f1437, %f1542, %f1542;
|
|
selp.f32 %f1624, %f1437, 0f00000000, %p91;
|
|
bra.uni BB0_95;
|
|
|
|
BB0_92:
|
|
setp.geu.f32 %p125, %f1542, 0f00000000;
|
|
@%p125 bra BB0_95;
|
|
|
|
cvt.rzi.f32.f32 %f1436, %f1252;
|
|
setp.neu.f32 %p126, %f1436, 0f3EE66666;
|
|
selp.f32 %f1624, 0f7FFFFFFF, %f1624, %p126;
|
|
|
|
BB0_95:
|
|
add.f32 %f1438, %f290, 0f3EE66666;
|
|
mov.b32 %r180, %f1438;
|
|
setp.lt.s32 %p128, %r180, 2139095040;
|
|
@%p128 bra BB0_100;
|
|
|
|
setp.gtu.f32 %p129, %f290, 0f7F800000;
|
|
@%p129 bra BB0_99;
|
|
bra.uni BB0_97;
|
|
|
|
BB0_99:
|
|
add.f32 %f1624, %f1542, 0f3EE66666;
|
|
bra.uni BB0_100;
|
|
|
|
BB0_97:
|
|
setp.neu.f32 %p130, %f290, 0f7F800000;
|
|
@%p130 bra BB0_100;
|
|
|
|
selp.f32 %f1624, 0fFF800000, 0f7F800000, %p7;
|
|
|
|
BB0_100:
|
|
mov.u32 %r251, 4;
|
|
setp.eq.f32 %p131, %f1542, 0f3F800000;
|
|
selp.f32 %f1439, 0f3F800000, %f1624, %p131;
|
|
cvt.u64.u32 %rd77, %r3;
|
|
cvt.u64.u32 %rd76, %r2;
|
|
mov.u64 %rd80, image;
|
|
cvta.global.u64 %rd75, %rd80;
|
|
// inline asm
|
|
call (%rd74), _rt_buffer_get_64, (%rd75, %r34, %r251, %rd76, %rd77, %rd16, %rd16);
|
|
// inline asm
|
|
cvt.sat.f32.f32 %f1440, %f1439;
|
|
mul.f32 %f1441, %f1440, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r183, %f1441;
|
|
cvt.sat.f32.f32 %f1442, %f289;
|
|
mul.f32 %f1443, %f1442, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r184, %f1443;
|
|
cvt.sat.f32.f32 %f1444, %f276;
|
|
mul.f32 %f1445, %f1444, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r185, %f1445;
|
|
cvt.u16.u32 %rs45, %r183;
|
|
cvt.u16.u32 %rs46, %r185;
|
|
cvt.u16.u32 %rs47, %r184;
|
|
mov.u16 %rs48, 255;
|
|
st.v4.u8 [%rd74], {%rs45, %rs47, %rs46, %rs48};
|
|
ld.global.u32 %r258, [imageEnabled];
|
|
|
|
BB0_101:
|
|
cvt.u64.u32 %rd7, %r2;
|
|
cvt.u64.u32 %rd8, %r3;
|
|
and.b32 %r186, %r258, 4;
|
|
setp.eq.s32 %p132, %r186, 0;
|
|
@%p132 bra BB0_105;
|
|
|
|
ld.global.u32 %r187, [additive];
|
|
setp.eq.s32 %p133, %r187, 0;
|
|
mov.f32 %f1446, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs49, %f1446;}
|
|
|
|
// inline asm
|
|
@%p133 bra BB0_104;
|
|
|
|
mov.u64 %rd93, image_HDR;
|
|
cvta.global.u64 %rd82, %rd93;
|
|
mov.u32 %r191, 8;
|
|
// inline asm
|
|
call (%rd81), _rt_buffer_get_64, (%rd82, %r34, %r191, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs56, %rs57, %rs58, %rs59}, [%rd81];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1447, %rs56;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1448, %rs57;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1449, %rs58;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd87), _rt_buffer_get_64, (%rd82, %r34, %r191, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1450, %f1544, %f1447;
|
|
add.f32 %f1451, %f1543, %f1448;
|
|
add.f32 %f1452, %f1542, %f1449;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs55, %f1452;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs54, %f1451;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs53, %f1450;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd87], {%rs53, %rs54, %rs55, %rs49};
|
|
bra.uni BB0_105;
|
|
|
|
BB0_104:
|
|
mov.u64 %rd100, image_HDR;
|
|
cvta.global.u64 %rd95, %rd100;
|
|
mov.u32 %r193, 8;
|
|
// inline asm
|
|
call (%rd94), _rt_buffer_get_64, (%rd95, %r34, %r193, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs62, %f1542;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs61, %f1543;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs60, %f1544;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd94], {%rs60, %rs61, %rs62, %rs49};
|
|
|
|
BB0_105:
|
|
ld.global.u32 %r194, [additive];
|
|
setp.eq.s32 %p134, %r194, 0;
|
|
mov.f32 %f1456, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs63, %f1456;}
|
|
|
|
// inline asm
|
|
@%p134 bra BB0_107;
|
|
|
|
mov.u64 %rd113, image_RNM0;
|
|
cvta.global.u64 %rd102, %rd113;
|
|
mov.u32 %r198, 8;
|
|
// inline asm
|
|
call (%rd101), _rt_buffer_get_64, (%rd102, %r34, %r198, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs70, %rs71, %rs72, %rs73}, [%rd101];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1457, %rs70;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1458, %rs71;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1459, %rs72;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd107), _rt_buffer_get_64, (%rd102, %r34, %r198, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1460, %f1541, %f1457;
|
|
add.f32 %f1461, %f1540, %f1458;
|
|
add.f32 %f1462, %f1539, %f1459;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs69, %f1462;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs68, %f1461;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs67, %f1460;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd107], {%rs67, %rs68, %rs69, %rs63};
|
|
bra.uni BB0_108;
|
|
|
|
BB0_107:
|
|
mov.u64 %rd120, image_RNM0;
|
|
cvta.global.u64 %rd115, %rd120;
|
|
mov.u32 %r200, 8;
|
|
// inline asm
|
|
call (%rd114), _rt_buffer_get_64, (%rd115, %r34, %r200, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs76, %f1539;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs75, %f1540;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs74, %f1541;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd114], {%rs74, %rs75, %rs76, %rs63};
|
|
|
|
BB0_108:
|
|
ld.global.u32 %r201, [additive];
|
|
setp.eq.s32 %p135, %r201, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs77, %f1456;}
|
|
|
|
// inline asm
|
|
@%p135 bra BB0_110;
|
|
|
|
mov.u64 %rd133, image_RNM1;
|
|
cvta.global.u64 %rd122, %rd133;
|
|
mov.u32 %r205, 8;
|
|
// inline asm
|
|
call (%rd121), _rt_buffer_get_64, (%rd122, %r34, %r205, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs84, %rs85, %rs86, %rs87}, [%rd121];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1467, %rs84;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1468, %rs85;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1469, %rs86;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd127), _rt_buffer_get_64, (%rd122, %r34, %r205, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1470, %f1538, %f1467;
|
|
add.f32 %f1471, %f1537, %f1468;
|
|
add.f32 %f1472, %f1536, %f1469;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs83, %f1472;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs82, %f1471;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs81, %f1470;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd127], {%rs81, %rs82, %rs83, %rs77};
|
|
bra.uni BB0_111;
|
|
|
|
BB0_110:
|
|
mov.u64 %rd140, image_RNM1;
|
|
cvta.global.u64 %rd135, %rd140;
|
|
mov.u32 %r207, 8;
|
|
// inline asm
|
|
call (%rd134), _rt_buffer_get_64, (%rd135, %r34, %r207, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs90, %f1536;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs89, %f1537;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs88, %f1538;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd134], {%rs88, %rs89, %rs90, %rs77};
|
|
|
|
BB0_111:
|
|
ld.global.u32 %r208, [additive];
|
|
setp.eq.s32 %p136, %r208, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs91, %f1456;}
|
|
|
|
// inline asm
|
|
@%p136 bra BB0_113;
|
|
|
|
mov.u64 %rd153, image_RNM2;
|
|
cvta.global.u64 %rd142, %rd153;
|
|
mov.u32 %r212, 8;
|
|
// inline asm
|
|
call (%rd141), _rt_buffer_get_64, (%rd142, %r34, %r212, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs98, %rs99, %rs100, %rs101}, [%rd141];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1477, %rs98;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1478, %rs99;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1479, %rs100;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd147), _rt_buffer_get_64, (%rd142, %r34, %r212, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1480, %f1535, %f1477;
|
|
add.f32 %f1481, %f1534, %f1478;
|
|
add.f32 %f1482, %f1533, %f1479;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs97, %f1482;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs96, %f1481;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs95, %f1480;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd147], {%rs95, %rs96, %rs97, %rs91};
|
|
bra.uni BB0_131;
|
|
|
|
BB0_113:
|
|
mov.u64 %rd160, image_RNM2;
|
|
cvta.global.u64 %rd155, %rd160;
|
|
mov.u32 %r214, 8;
|
|
// inline asm
|
|
call (%rd154), _rt_buffer_get_64, (%rd155, %r34, %r214, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs104, %f1533;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs103, %f1534;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs102, %f1535;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd154], {%rs102, %rs103, %rs104, %rs91};
|
|
|
|
BB0_131:
|
|
ret;
|
|
}
|
|
|
|
|