AsanoRema/FORT-BO
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FORT-BO/Assets/Editor/x64/Bakery/optix9/lmTexAreaLightRNMTranslucent.ptx
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AsanoRema d9d7ee49d2 Added many other
2026-08-06 18:56:32 +03:00

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//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-31968024
// Cuda compilation tools, release 12.0, V12.0.76
// Based on NVVM 7.0.1
//
.version 8.0
.target sm_52
.address_size 64
// .globl __raygen__oxMain
.const .align 16 .b8 params[1184];
.global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
.visible .entry __raygen__oxMain()
{
.local .align 4 .b8 __local_depot0[28];
.reg .b64 %SP;
.reg .b64 %SPL;
.reg .pred %p<206>;
.reg .b16 %rs<180>;
.reg .f32 %f<1709>;
.reg .b32 %r<467>;
.reg .f64 %fd<5>;
.reg .b64 %rd<121>;
mov.u64 %SPL, __local_depot0;
add.u64 %rd1, %SPL, 0;
// begin inline asm
call (%r62), _optix_get_launch_index_x, ();
// end inline asm
// begin inline asm
call (%r63), _optix_get_launch_index_y, ();
// end inline asm
ld.const.u32 %r3, [params+616];
abs.s32 %r4, %r3;
ld.const.u32 %r5, [params+540];
ld.const.u64 %rd33, [params+400];
cvta.to.global.u64 %rd34, %rd33;
ld.const.u32 %r68, [params+392];
mad.lo.s32 %r69, %r68, %r63, %r62;
mul.wide.u32 %rd35, %r69, 4;
add.s64 %rd2, %rd34, %rd35;
ld.global.v2.u8 {%rs16, %rs175}, [%rd2];
or.b16 %rs18, %rs16, %rs175;
and.b16 %rs19, %rs18, 255;
setp.eq.s16 %p10, %rs19, 0;
@%p10 bra $L__BB0_2;
ld.global.u8 %rs174, [%rd2+2];
bra.uni $L__BB0_3;
$L__BB0_2:
ld.global.u8 %rs174, [%rd2+2];
setp.eq.s16 %p11, %rs174, 0;
mov.f32 %f1566, 0f00000000;
mov.u16 %rs175, 0;
mov.f32 %f1567, %f1566;
mov.f32 %f1568, %f1566;
@%p11 bra $L__BB0_4;
$L__BB0_3:
cvt.rn.f32.u16 %f367, %rs16;
div.rn.f32 %f368, %f367, 0f437F0000;
fma.rn.f32 %f369, %f368, 0f40000000, 0fBF800000;
and.b16 %rs22, %rs175, 255;
cvt.rn.f32.u16 %f370, %rs22;
div.rn.f32 %f371, %f370, 0f437F0000;
fma.rn.f32 %f372, %f371, 0f40000000, 0fBF800000;
cvt.rn.f32.u16 %f373, %rs174;
div.rn.f32 %f374, %f373, 0f437F0000;
fma.rn.f32 %f375, %f374, 0f40000000, 0fBF800000;
mul.f32 %f376, %f372, %f372;
fma.rn.f32 %f377, %f369, %f369, %f376;
fma.rn.f32 %f378, %f375, %f375, %f377;
sqrt.rn.f32 %f379, %f378;
rcp.rn.f32 %f380, %f379;
mul.f32 %f1568, %f380, %f375;
mul.f32 %f1567, %f380, %f372;
mul.f32 %f1566, %f369, %f380;
$L__BB0_4:
ld.const.v2.u32 {%r70, %r71}, [params];
add.s32 %r6, %r70, %r62;
add.s32 %r7, %r71, %r63;
setp.eq.f32 %p12, %f1566, 0f00000000;
setp.eq.f32 %p13, %f1567, 0f00000000;
and.pred %p14, %p12, %p13;
setp.eq.f32 %p15, %f1568, 0f00000000;
and.pred %p16, %p15, %p14;
@%p16 bra $L__BB0_165;
bra.uni $L__BB0_5;
$L__BB0_165:
ld.const.u32 %r59, [params+104];
and.b32 %r432, %r59, 1;
setp.eq.b32 %p195, %r432, 1;
mov.pred %p196, 0;
xor.pred %p197, %p195, %p196;
not.pred %p198, %p197;
@%p198 bra $L__BB0_167;
ld.const.u64 %rd96, [params+144];
cvta.to.global.u64 %rd97, %rd96;
ld.const.u32 %r433, [params+136];
mad.lo.s32 %r434, %r433, %r7, %r6;
mul.wide.u32 %rd98, %r434, 4;
add.s64 %rd99, %rd97, %rd98;
mov.u16 %rs111, 0;
st.global.v4.u8 [%rd99], {%rs111, %rs111, %rs111, %rs111};
$L__BB0_167:
and.b32 %r435, %r59, 8;
setp.eq.s32 %p199, %r435, 0;
@%p199 bra $L__BB0_169;
ld.const.u64 %rd100, [params+192];
cvta.to.global.u64 %rd101, %rd100;
ld.const.u32 %r436, [params+184];
mad.lo.s32 %r437, %r436, %r7, %r6;
mov.f32 %f1521, 0f00000000;
cvt.rzi.u32.f32 %r438, %f1521;
mul.wide.u32 %rd102, %r437, 2;
add.s64 %rd103, %rd101, %rd102;
mov.u16 %rs112, 0;
cvt.u16.u32 %rs113, %r438;
st.global.v2.u8 [%rd103], {%rs113, %rs112};
$L__BB0_169:
and.b32 %r439, %r59, 4;
setp.eq.s32 %p200, %r439, 0;
ld.const.u32 %r466, [params+108];
@%p200 bra $L__BB0_173;
setp.eq.s32 %p201, %r466, 0;
ld.const.u64 %rd104, [params+224];
cvta.to.global.u64 %rd105, %rd104;
ld.const.u32 %r440, [params+216];
mad.lo.s32 %r441, %r440, %r7, %r6;
mul.wide.u32 %rd106, %r441, 8;
add.s64 %rd28, %rd105, %rd106;
@%p201 bra $L__BB0_172;
ld.global.v4.u16 {%rs120, %rs121, %rs122, %rs123}, [%rd28];
// begin inline asm
{ cvt.f32.f16 %f1522, %rs120;}
// end inline asm
// begin inline asm
{ cvt.f32.f16 %f1523, %rs121;}
// end inline asm
// begin inline asm
{ cvt.f32.f16 %f1524, %rs122;}
// end inline asm
add.f32 %f1525, %f1522, 0f00000000;
add.f32 %f1526, %f1523, 0f00000000;
add.f32 %f1527, %f1524, 0f00000000;
// begin inline asm
{ cvt.rn.f16.f32 %rs119, %f1527;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs118, %f1526;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs117, %f1525;}
// end inline asm
mov.u16 %rs124, 0;
st.global.v4.u16 [%rd28], {%rs117, %rs118, %rs119, %rs124};
bra.uni $L__BB0_173;
$L__BB0_5:
ld.const.u64 %rd36, [params+432];
cvta.to.global.u64 %rd37, %rd36;
ld.const.u32 %r74, [params+424];
mad.lo.s32 %r75, %r74, %r63, %r62;
mul.wide.u32 %rd38, %r75, 12;
add.s64 %rd39, %rd37, %rd38;
ld.global.f32 %f10, [%rd39];
mul.f32 %f381, %f10, 0f3456BF95;
ld.global.f32 %f11, [%rd39+4];
mul.f32 %f382, %f11, 0f3456BF95;
ld.global.f32 %f12, [%rd39+8];
mul.f32 %f383, %f12, 0f3456BF95;
abs.f32 %f13, %f1566;
div.rn.f32 %f384, %f381, %f13;
abs.f32 %f385, %f1567;
div.rn.f32 %f386, %f382, %f385;
abs.f32 %f14, %f1568;
div.rn.f32 %f387, %f383, %f14;
abs.f32 %f388, %f384;
abs.f32 %f389, %f386;
abs.f32 %f390, %f387;
mov.f32 %f391, 0f38D1B717;
max.f32 %f392, %f388, %f391;
max.f32 %f393, %f389, %f391;
max.f32 %f394, %f390, %f391;
fma.rn.f32 %f15, %f1566, %f392, %f10;
fma.rn.f32 %f16, %f1567, %f393, %f11;
fma.rn.f32 %f17, %f1568, %f394, %f12;
ld.const.u64 %rd40, [params+464];
cvta.to.global.u64 %rd41, %rd40;
ld.const.u32 %r76, [params+456];
mad.lo.s32 %r77, %r76, %r63, %r62;
mul.wide.u32 %rd42, %r77, 4;
add.s64 %rd3, %rd41, %rd42;
ld.global.v2.u8 {%rs24, %rs178}, [%rd3];
or.b16 %rs26, %rs24, %rs178;
and.b16 %rs27, %rs26, 255;
setp.eq.s16 %p17, %rs27, 0;
@%p17 bra $L__BB0_7;
ld.global.u8 %rs176, [%rd3+2];
bra.uni $L__BB0_8;
$L__BB0_7:
ld.global.u8 %rs176, [%rd3+2];
setp.eq.s16 %p18, %rs176, 0;
mov.f32 %f1569, 0f00000000;
mov.u16 %rs178, 0;
mov.u16 %rs179, %rs178;
mov.f32 %f1570, %f1569;
mov.f32 %f1571, %f1569;
@%p18 bra $L__BB0_9;
$L__BB0_8:
mov.u16 %rs179, %rs178;
cvt.rn.f32.u16 %f398, %rs24;
div.rn.f32 %f399, %f398, 0f437F0000;
fma.rn.f32 %f400, %f399, 0f40000000, 0fBF800000;
and.b16 %rs32, %rs179, 255;
cvt.rn.f32.u16 %f401, %rs32;
div.rn.f32 %f402, %f401, 0f437F0000;
fma.rn.f32 %f403, %f402, 0f40000000, 0fBF800000;
cvt.rn.f32.u16 %f404, %rs176;
div.rn.f32 %f405, %f404, 0f437F0000;
fma.rn.f32 %f406, %f405, 0f40000000, 0fBF800000;
mul.f32 %f407, %f403, %f403;
fma.rn.f32 %f408, %f400, %f400, %f407;
fma.rn.f32 %f409, %f406, %f406, %f408;
sqrt.rn.f32 %f410, %f409;
rcp.rn.f32 %f411, %f410;
mul.f32 %f1571, %f411, %f406;
mul.f32 %f1570, %f411, %f403;
mul.f32 %f1569, %f400, %f411;
mov.u16 %rs178, %rs176;
$L__BB0_9:
mul.f32 %f415, %f1567, %f1571;
mul.f32 %f416, %f1568, %f1570;
sub.f32 %f417, %f415, %f416;
mul.f32 %f418, %f1568, %f1569;
mul.f32 %f419, %f1566, %f1571;
sub.f32 %f420, %f418, %f419;
mul.f32 %f421, %f1566, %f1570;
mul.f32 %f422, %f1567, %f1569;
sub.f32 %f423, %f421, %f422;
ld.global.u8 %rs34, [%rd3+3];
setp.eq.s16 %p19, %rs34, 0;
selp.f32 %f24, 0fBF800000, 0f3F800000, %p19;
mul.f32 %f424, %f417, %f24;
mul.f32 %f425, %f420, %f24;
mul.f32 %f426, %f423, %f24;
mul.f32 %f427, %f424, 0f00000000;
mul.f32 %f428, %f425, 0f00000000;
mul.f32 %f429, %f426, 0f00000000;
fma.rn.f32 %f430, %f1569, 0f3F5105EC, %f427;
fma.rn.f32 %f431, %f1570, 0f3F5105EC, %f428;
fma.rn.f32 %f432, %f1571, 0f3F5105EC, %f429;
mul.f32 %f25, %f1566, 0f3F13CD3A;
add.f32 %f26, %f25, %f430;
mul.f32 %f27, %f1567, 0f3F13CD3A;
add.f32 %f28, %f27, %f431;
mul.f32 %f29, %f1568, 0f3F13CD3A;
add.f32 %f30, %f29, %f432;
or.b16 %rs35, %rs24, %rs179;
or.b16 %rs15, %rs35, %rs178;
and.b16 %rs36, %rs15, 255;
setp.eq.s16 %p20, %rs36, 0;
mov.f32 %f1575, 0f00000000;
mov.f32 %f1572, %f1575;
mov.f32 %f1573, %f1575;
mov.f32 %f1574, %f1575;
@%p20 bra $L__BB0_11;
cvt.rn.f32.u16 %f433, %rs24;
div.rn.f32 %f434, %f433, 0f437F0000;
fma.rn.f32 %f435, %f434, 0f40000000, 0fBF800000;
and.b16 %rs38, %rs179, 255;
cvt.rn.f32.u16 %f436, %rs38;
div.rn.f32 %f437, %f436, 0f437F0000;
fma.rn.f32 %f438, %f437, 0f40000000, 0fBF800000;
and.b16 %rs39, %rs178, 255;
cvt.rn.f32.u16 %f439, %rs39;
div.rn.f32 %f440, %f439, 0f437F0000;
fma.rn.f32 %f441, %f440, 0f40000000, 0fBF800000;
mul.f32 %f442, %f438, %f438;
fma.rn.f32 %f443, %f435, %f435, %f442;
fma.rn.f32 %f444, %f441, %f441, %f443;
sqrt.rn.f32 %f445, %f444;
rcp.rn.f32 %f446, %f445;
mul.f32 %f1574, %f446, %f441;
mul.f32 %f1573, %f446, %f438;
mul.f32 %f1572, %f435, %f446;
$L__BB0_11:
mul.f32 %f450, %f1567, %f1574;
mul.f32 %f451, %f1568, %f1573;
sub.f32 %f452, %f450, %f451;
mul.f32 %f453, %f1568, %f1572;
mul.f32 %f454, %f1566, %f1574;
sub.f32 %f455, %f453, %f454;
mul.f32 %f456, %f1566, %f1573;
mul.f32 %f457, %f1567, %f1572;
sub.f32 %f458, %f456, %f457;
mul.f32 %f459, %f452, %f24;
mul.f32 %f460, %f455, %f24;
mul.f32 %f461, %f458, %f24;
mul.f32 %f462, %f1572, 0f3ED105EC;
mul.f32 %f463, %f1573, 0f3ED105EC;
mul.f32 %f464, %f1574, 0f3ED105EC;
mul.f32 %f465, %f459, 0f3F3504F3;
mul.f32 %f466, %f460, 0f3F3504F3;
mul.f32 %f467, %f461, 0f3F3504F3;
sub.f32 %f468, %f465, %f462;
sub.f32 %f469, %f466, %f463;
sub.f32 %f470, %f467, %f464;
add.f32 %f37, %f25, %f468;
add.f32 %f38, %f27, %f469;
add.f32 %f39, %f29, %f470;
mov.f32 %f1576, %f1575;
mov.f32 %f1577, %f1575;
@%p20 bra $L__BB0_13;
cvt.rn.f32.u16 %f471, %rs24;
div.rn.f32 %f472, %f471, 0f437F0000;
fma.rn.f32 %f473, %f472, 0f40000000, 0fBF800000;
and.b16 %rs42, %rs179, 255;
cvt.rn.f32.u16 %f474, %rs42;
div.rn.f32 %f475, %f474, 0f437F0000;
fma.rn.f32 %f476, %f475, 0f40000000, 0fBF800000;
and.b16 %rs43, %rs178, 255;
cvt.rn.f32.u16 %f477, %rs43;
div.rn.f32 %f478, %f477, 0f437F0000;
fma.rn.f32 %f479, %f478, 0f40000000, 0fBF800000;
mul.f32 %f480, %f476, %f476;
fma.rn.f32 %f481, %f473, %f473, %f480;
fma.rn.f32 %f482, %f479, %f479, %f481;
sqrt.rn.f32 %f483, %f482;
rcp.rn.f32 %f484, %f483;
mul.f32 %f1577, %f484, %f479;
mul.f32 %f1576, %f484, %f476;
mul.f32 %f1575, %f473, %f484;
$L__BB0_13:
mul.f32 %f498, %f1567, %f1577;
mul.f32 %f499, %f1568, %f1576;
sub.f32 %f500, %f498, %f499;
mul.f32 %f501, %f1568, %f1575;
mul.f32 %f502, %f1566, %f1577;
sub.f32 %f503, %f501, %f502;
mul.f32 %f504, %f1566, %f1576;
mul.f32 %f505, %f1567, %f1575;
sub.f32 %f506, %f504, %f505;
mul.f32 %f507, %f500, %f24;
mul.f32 %f508, %f503, %f24;
mul.f32 %f509, %f506, %f24;
mul.f32 %f510, %f1575, 0f3ED105EC;
mul.f32 %f511, %f1576, 0f3ED105EC;
mul.f32 %f512, %f1577, 0f3ED105EC;
mul.f32 %f513, %f507, 0fBF3504F3;
mul.f32 %f514, %f508, 0fBF3504F3;
mul.f32 %f515, %f509, 0fBF3504F3;
sub.f32 %f516, %f513, %f510;
sub.f32 %f517, %f514, %f511;
sub.f32 %f518, %f515, %f512;
add.f32 %f46, %f25, %f516;
add.f32 %f47, %f27, %f517;
add.f32 %f48, %f29, %f518;
ld.const.u64 %rd43, [params+128];
cvta.to.global.u64 %rd44, %rd43;
ld.const.u32 %r79, [params+120];
mad.lo.s32 %r80, %r79, %r63, %r62;
mul.wide.u32 %rd45, %r80, 4;
add.s64 %rd46, %rd44, %rd45;
ld.global.u32 %r457, [%rd46];
setp.lt.s32 %p23, %r4, 1;
mov.pred %p22, 0;
mov.u32 %r453, 0;
mov.f32 %f1594, 0f00000000;
mov.f32 %f1595, %f1594;
mov.f32 %f1596, %f1594;
mov.f32 %f1597, %f1594;
mov.f32 %f1598, %f1594;
mov.f32 %f1599, %f1594;
mov.f32 %f1600, %f1594;
mov.f32 %f1601, %f1594;
mov.f32 %f1602, %f1594;
mov.f32 %f1603, %f1594;
mov.f32 %f1604, %f1594;
mov.f32 %f1605, %f1594;
mov.f32 %f1606, %f1594;
mov.pred %p205, %p22;
@%p23 bra $L__BB0_33;
ld.const.f32 %f49, [params+620];
ld.const.u64 %rd47, [params+624];
cvta.to.global.u64 %rd4, %rd47;
ld.const.u64 %rd48, [params+640];
cvta.to.global.u64 %rd49, %rd48;
ld.const.u32 %r83, [params+632];
and.b32 %r84, %r63, 255;
and.b32 %r85, %r62, 255;
mad.lo.s32 %r86, %r83, %r84, %r85;
mul.wide.u32 %rd50, %r86, 3;
add.s64 %rd5, %rd49, %rd50;
ld.const.f32 %f50, [params+660];
mul.f32 %f51, %f15, 0f3456BF95;
mul.f32 %f52, %f16, 0f3456BF95;
mul.f32 %f53, %f17, 0f3456BF95;
ld.const.u64 %rd6, [params+96];
abs.f32 %f659, %f52;
abs.f32 %f660, %f51;
max.f32 %f661, %f660, %f659;
abs.f32 %f662, %f53;
max.f32 %f663, %f661, %f662;
mov.u32 %r450, %r453;
$L__BB0_15:
mul.lo.s32 %r87, %r450, 3;
mul.wide.s32 %rd51, %r87, 12;
add.s64 %rd7, %rd4, %rd51;
ld.global.f32 %f532, [%rd7];
sub.f32 %f533, %f532, %f10;
ld.global.f32 %f534, [%rd7+4];
sub.f32 %f535, %f534, %f11;
ld.global.f32 %f536, [%rd7+8];
sub.f32 %f537, %f536, %f12;
mul.f32 %f538, %f535, %f535;
fma.rn.f32 %f539, %f533, %f533, %f538;
fma.rn.f32 %f540, %f537, %f537, %f539;
sqrt.rn.f32 %f67, %f540;
rcp.rn.f32 %f541, %f67;
mul.f32 %f68, %f533, %f541;
mul.f32 %f69, %f535, %f541;
mul.f32 %f70, %f537, %f541;
mul.f32 %f542, %f1567, %f69;
fma.rn.f32 %f543, %f1566, %f68, %f542;
fma.rn.f32 %f71, %f1568, %f70, %f543;
setp.leu.f32 %p24, %f71, 0f00000000;
@%p24 bra $L__BB0_32;
setp.ne.s32 %p26, %r5, 0;
mul.f32 %f544, %f67, %f67;
div.rn.f32 %f72, %f49, %f544;
ld.global.u8 %rs44, [%rd5];
cvt.rn.f32.u16 %f545, %rs44;
div.rn.f32 %f546, %f545, 0fC37F0000;
fma.rn.f32 %f547, %f546, 0f3F333333, 0f3F800000;
setp.gt.f32 %p27, %f72, %f547;
and.pred %p28, %p26, %p27;
mov.pred %p205, -1;
@%p28 bra $L__BB0_33;
mul.f32 %f73, %f67, %f50;
mov.f32 %f552, 0f40800000;
abs.f32 %f75, %f73;
setp.lt.f32 %p29, %f75, 0f00800000;
mul.f32 %f554, %f75, 0f4B800000;
selp.f32 %f555, %f554, %f75, %p29;
selp.f32 %f556, 0fC3170000, 0fC2FE0000, %p29;
mov.b32 %r88, %f555;
and.b32 %r89, %r88, 8388607;
or.b32 %r90, %r89, 1065353216;
mov.b32 %f557, %r90;
shr.u32 %r91, %r88, 23;
cvt.rn.f32.u32 %f558, %r91;
add.f32 %f559, %f556, %f558;
setp.gt.f32 %p30, %f557, 0f3FB504F3;
mul.f32 %f560, %f557, 0f3F000000;
add.f32 %f561, %f559, 0f3F800000;
selp.f32 %f562, %f561, %f559, %p30;
selp.f32 %f563, %f560, %f557, %p30;
add.f32 %f564, %f563, 0fBF800000;
add.f32 %f565, %f563, 0f3F800000;
rcp.approx.ftz.f32 %f566, %f565;
add.f32 %f567, %f564, %f564;
mul.f32 %f568, %f567, %f566;
mul.f32 %f569, %f568, %f568;
mov.f32 %f570, 0f3C4CAF63;
mov.f32 %f571, 0f3B18F0FE;
fma.rn.f32 %f572, %f571, %f569, %f570;
mov.f32 %f573, 0f3DAAAABD;
fma.rn.f32 %f574, %f572, %f569, %f573;
mul.rn.f32 %f575, %f574, %f569;
mul.rn.f32 %f576, %f575, %f568;
sub.f32 %f577, %f564, %f568;
add.f32 %f578, %f577, %f577;
neg.f32 %f579, %f568;
fma.rn.f32 %f580, %f579, %f564, %f578;
mul.rn.f32 %f581, %f566, %f580;
add.f32 %f582, %f576, %f568;
sub.f32 %f583, %f568, %f582;
add.f32 %f584, %f576, %f583;
add.f32 %f585, %f581, %f584;
add.f32 %f586, %f582, %f585;
sub.f32 %f587, %f582, %f586;
add.f32 %f588, %f585, %f587;
mov.f32 %f589, 0f3F317200;
mul.rn.f32 %f590, %f562, %f589;
mov.f32 %f591, 0f35BFBE8E;
mul.rn.f32 %f592, %f562, %f591;
add.f32 %f593, %f590, %f586;
sub.f32 %f594, %f590, %f593;
add.f32 %f595, %f586, %f594;
add.f32 %f596, %f588, %f595;
add.f32 %f597, %f592, %f596;
add.f32 %f598, %f593, %f597;
sub.f32 %f599, %f593, %f598;
add.f32 %f600, %f597, %f599;
mul.rn.f32 %f601, %f552, %f598;
neg.f32 %f602, %f601;
fma.rn.f32 %f603, %f552, %f598, %f602;
fma.rn.f32 %f604, %f552, %f600, %f603;
mov.f32 %f605, 0f00000000;
fma.rn.f32 %f606, %f605, %f598, %f604;
add.rn.f32 %f607, %f601, %f606;
neg.f32 %f608, %f607;
add.rn.f32 %f609, %f601, %f608;
add.rn.f32 %f610, %f609, %f606;
mov.b32 %r92, %f607;
setp.eq.s32 %p31, %r92, 1118925336;
add.s32 %r93, %r92, -1;
mov.b32 %f611, %r93;
add.f32 %f612, %f610, 0f37000000;
selp.f32 %f76, %f612, %f610, %p31;
selp.f32 %f613, %f611, %f607, %p31;
mov.f32 %f614, 0f3FB8AA3B;
mul.rn.f32 %f615, %f613, %f614;
cvt.rzi.f32.f32 %f616, %f615;
abs.f32 %f617, %f616;
setp.gt.f32 %p32, %f617, 0f42FC0000;
mov.b32 %r94, %f616;
and.b32 %r95, %r94, -2147483648;
or.b32 %r96, %r95, 1123811328;
mov.b32 %f618, %r96;
selp.f32 %f619, %f618, %f616, %p32;
mov.f32 %f620, 0fBF317218;
fma.rn.f32 %f621, %f619, %f620, %f613;
mov.f32 %f622, 0f3102E308;
fma.rn.f32 %f623, %f619, %f622, %f621;
mul.f32 %f624, %f623, 0f3FB8AA3B;
add.f32 %f625, %f619, 0f4B40007F;
mov.b32 %r97, %f625;
shl.b32 %r98, %r97, 23;
mov.b32 %f626, %r98;
ex2.approx.ftz.f32 %f627, %f624;
mul.f32 %f77, %f627, %f626;
setp.eq.f32 %p33, %f77, 0f7F800000;
mov.f32 %f1591, 0f7F800000;
@%p33 bra $L__BB0_19;
fma.rn.f32 %f1591, %f77, %f76, %f77;
$L__BB0_19:
mov.f32 %f1563, 0f40000000;
cvt.rzi.f32.f32 %f1562, %f1563;
add.f32 %f1561, %f1562, %f1562;
mov.f32 %f1560, 0f40800000;
sub.f32 %f1559, %f1560, %f1561;
abs.f32 %f1558, %f1559;
setp.lt.f32 %p34, %f73, 0f00000000;
setp.eq.f32 %p35, %f1558, 0f3F800000;
and.pred %p1, %p34, %p35;
setp.eq.f32 %p36, %f73, 0f00000000;
@%p36 bra $L__BB0_23;
bra.uni $L__BB0_20;
$L__BB0_23:
add.f32 %f632, %f73, %f73;
selp.f32 %f1593, %f632, 0f00000000, %p35;
bra.uni $L__BB0_24;
$L__BB0_20:
mov.b32 %r99, %f1591;
xor.b32 %r100, %r99, -2147483648;
mov.b32 %f628, %r100;
selp.f32 %f1593, %f628, %f1591, %p1;
setp.geu.f32 %p37, %f73, 0f00000000;
@%p37 bra $L__BB0_24;
mov.f32 %f629, 0f40800000;
cvt.rzi.f32.f32 %f630, %f629;
setp.eq.f32 %p38, %f630, 0f40800000;
@%p38 bra $L__BB0_24;
mov.f32 %f1593, 0f7FFFFFFF;
$L__BB0_24:
add.f32 %f633, %f75, 0f40800000;
mov.b32 %r101, %f633;
setp.lt.s32 %p40, %r101, 2139095040;
@%p40 bra $L__BB0_29;
setp.gtu.f32 %p41, %f75, 0f7F800000;
@%p41 bra $L__BB0_28;
bra.uni $L__BB0_26;
$L__BB0_28:
add.f32 %f1593, %f73, 0f40800000;
bra.uni $L__BB0_29;
$L__BB0_26:
setp.neu.f32 %p42, %f75, 0f7F800000;
@%p42 bra $L__BB0_29;
selp.f32 %f1593, 0fFF800000, 0f7F800000, %p1;
$L__BB0_29:
mov.f32 %f634, 0f3F800000;
sub.f32 %f635, %f634, %f1593;
setp.eq.f32 %p43, %f73, 0f3F800000;
selp.f32 %f636, 0f00000000, %f635, %p43;
cvt.sat.f32.f32 %f637, %f636;
mul.f32 %f638, %f72, %f637;
ld.global.f32 %f639, [%rd7+12];
mul.f32 %f640, %f68, %f639;
ld.global.f32 %f641, [%rd7+16];
mul.f32 %f642, %f69, %f641;
neg.f32 %f643, %f642;
sub.f32 %f644, %f643, %f640;
ld.global.f32 %f645, [%rd7+20];
mul.f32 %f646, %f70, %f645;
sub.f32 %f647, %f644, %f646;
cvt.sat.f32.f32 %f648, %f647;
mul.f32 %f86, %f638, %f648;
setp.leu.f32 %p44, %f86, 0f3727C5AC;
@%p44 bra $L__BB0_31;
cvt.sat.f32.f32 %f658, %f71;
mov.f32 %f664, 0f38D1B717;
max.f32 %f655, %f663, %f664;
sub.f32 %f656, %f67, %f655;
mov.f32 %f657, 0f00000000;
mov.u32 %r138, 2;
mov.u32 %r139, 1;
mov.u32 %r140, 3;
mov.u32 %r143, 1065353216;
mov.u32 %r172, 0;
// begin inline asm
call(%r102,%r103,%r104,%r105,%r106,%r107,%r108,%r109,%r110,%r111,%r112,%r113,%r114,%r115,%r116,%r117,%r118,%r119,%r120,%r121,%r122,%r123,%r124,%r125,%r126,%r127,%r128,%r129,%r130,%r131,%r132,%r133),_optix_trace_typed_32,(%r172,%rd6,%f15,%f16,%f17,%f68,%f69,%f70,%f655,%f656,%f657,%r139,%r172,%r139,%r138,%r139,%r140,%r143,%r143,%r143,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172,%r172);
// end inline asm
mov.b32 %f665, %r102;
mov.b32 %f666, %r103;
mov.b32 %f667, %r104;
ld.global.f32 %f668, [%rd7+24];
mul.f32 %f669, %f668, %f665;
ld.global.f32 %f670, [%rd7+28];
mul.f32 %f671, %f670, %f666;
ld.global.f32 %f672, [%rd7+32];
mul.f32 %f673, %f672, %f667;
mul.f32 %f674, %f86, 0f3EA2F983;
mul.f32 %f675, %f674, %f669;
mul.f32 %f676, %f674, %f671;
mul.f32 %f677, %f674, %f673;
fma.rn.f32 %f1603, %f658, %f675, %f1603;
fma.rn.f32 %f1604, %f658, %f676, %f1604;
fma.rn.f32 %f1605, %f658, %f677, %f1605;
mul.f32 %f678, %f28, %f69;
fma.rn.f32 %f679, %f26, %f68, %f678;
fma.rn.f32 %f680, %f30, %f70, %f679;
cvt.sat.f32.f32 %f681, %f680;
fma.rn.f32 %f1600, %f675, %f681, %f1600;
fma.rn.f32 %f1601, %f676, %f681, %f1601;
fma.rn.f32 %f1602, %f681, %f677, %f1602;
mul.f32 %f682, %f38, %f69;
fma.rn.f32 %f683, %f37, %f68, %f682;
fma.rn.f32 %f684, %f39, %f70, %f683;
cvt.sat.f32.f32 %f685, %f684;
fma.rn.f32 %f1597, %f675, %f685, %f1597;
fma.rn.f32 %f1598, %f676, %f685, %f1598;
fma.rn.f32 %f1599, %f677, %f685, %f1599;
mul.f32 %f686, %f47, %f69;
fma.rn.f32 %f687, %f46, %f68, %f686;
fma.rn.f32 %f688, %f48, %f70, %f687;
cvt.sat.f32.f32 %f689, %f688;
fma.rn.f32 %f1594, %f675, %f689, %f1594;
fma.rn.f32 %f1595, %f676, %f689, %f1595;
fma.rn.f32 %f1596, %f677, %f689, %f1596;
add.f32 %f1606, %f1606, %f665;
$L__BB0_31:
add.s32 %r453, %r453, 1;
$L__BB0_32:
add.s32 %r450, %r450, 1;
setp.lt.s32 %p46, %r450, %r4;
mov.pred %p205, %p22;
@%p46 bra $L__BB0_15;
$L__BB0_33:
cvt.rn.f32.s32 %f690, %r453;
mov.f32 %f691, 0f3F800000;
max.f32 %f692, %f690, %f691;
rcp.rn.f32 %f693, %f692;
mul.f32 %f1684, %f1603, %f693;
mul.f32 %f1685, %f1604, %f693;
mul.f32 %f1686, %f1605, %f693;
div.rn.f32 %f1687, %f1606, %f692;
mul.f32 %f1681, %f1600, %f693;
mul.f32 %f1682, %f1601, %f693;
mul.f32 %f1683, %f1602, %f693;
mul.f32 %f1678, %f1597, %f693;
mul.f32 %f1679, %f1598, %f693;
mul.f32 %f1680, %f1599, %f693;
mul.f32 %f1675, %f1594, %f693;
mul.f32 %f1676, %f1595, %f693;
mul.f32 %f1677, %f1596, %f693;
not.pred %p47, %p205;
@%p47 bra $L__BB0_64;
abs.f32 %f1565, %f1568;
abs.f32 %f1564, %f1566;
setp.gt.f32 %p48, %f1564, %f1565;
selp.f32 %f706, 0f00000000, %f1567, %p48;
mov.f32 %f705, 0f00000000;
neg.f32 %f707, %f1568;
selp.f32 %f708, %f1566, %f707, %p48;
neg.f32 %f709, %f1567;
selp.f32 %f710, %f709, 0f00000000, %p48;
mul.f32 %f711, %f708, %f708;
fma.rn.f32 %f712, %f710, %f710, %f711;
fma.rn.f32 %f713, %f706, %f706, %f712;
sqrt.rn.f32 %f714, %f713;
rcp.rn.f32 %f715, %f714;
mul.f32 %f152, %f710, %f715;
mul.f32 %f153, %f708, %f715;
mul.f32 %f154, %f706, %f715;
setp.lt.s32 %p49, %r5, 1;
mov.f32 %f1656, %f705;
mov.f32 %f1655, %f705;
mov.f32 %f1654, %f705;
mov.f32 %f1653, %f705;
mov.f32 %f1652, %f705;
mov.f32 %f1651, %f705;
mov.f32 %f1650, %f705;
mov.f32 %f1649, %f705;
mov.f32 %f1648, %f705;
mov.f32 %f1647, %f705;
mov.f32 %f1646, %f705;
mov.f32 %f1645, %f705;
@%p49 bra $L__BB0_63;
cvt.rn.f32.s32 %f728, %r5;
rcp.rn.f32 %f155, %f728;
mul.f32 %f156, %f15, 0f3456BF95;
mul.f32 %f157, %f16, 0f3456BF95;
mul.f32 %f158, %f17, 0f3456BF95;
ld.const.u64 %rd8, [params+96];
mul.f32 %f729, %f1566, %f153;
mul.f32 %f730, %f1567, %f152;
sub.f32 %f159, %f730, %f729;
mul.f32 %f731, %f1568, %f152;
mul.f32 %f732, %f1566, %f154;
sub.f32 %f160, %f732, %f731;
mul.f32 %f733, %f1567, %f154;
mul.f32 %f734, %f1568, %f153;
sub.f32 %f161, %f734, %f733;
mov.u32 %r173, 0;
add.s64 %rd9, %rd1, 24;
mov.u64 %rd53, __cudart_i2opi_f;
abs.f32 %f797, %f157;
abs.f32 %f798, %f156;
max.f32 %f799, %f798, %f797;
abs.f32 %f800, %f158;
max.f32 %f801, %f799, %f800;
mov.u32 %r454, %r173;
$L__BB0_36:
cvt.rn.f32.s32 %f174, %r454;
mov.u32 %r456, %r173;
$L__BB0_37:
mad.lo.s32 %r175, %r457, 1664525, 1013904223;
and.b32 %r176, %r175, 16777215;
cvt.rn.f32.u32 %f735, %r176;
fma.rn.f32 %f736, %f735, 0f33800000, %f174;
mul.f32 %f187, %f155, %f736;
mad.lo.s32 %r457, %r175, 1664525, 1013904223;
and.b32 %r177, %r457, 16777215;
cvt.rn.f32.u32 %f737, %r177;
cvt.rn.f32.s32 %f738, %r456;
fma.rn.f32 %f739, %f737, 0f33800000, %f738;
mul.f32 %f740, %f155, %f739;
mul.f32 %f741, %f187, %f187;
mov.f32 %f742, 0f3F800000;
sub.f32 %f743, %f742, %f741;
mov.f32 %f744, 0f00000000;
max.f32 %f745, %f744, %f743;
sqrt.rn.f32 %f188, %f745;
mul.f32 %f189, %f740, 0f40C90FDB;
mul.f32 %f746, %f189, 0f3F22F983;
cvt.rni.s32.f32 %r464, %f746;
cvt.rn.f32.s32 %f747, %r464;
mov.f32 %f748, 0fBFC90FDA;
fma.rn.f32 %f749, %f747, %f748, %f189;
mov.f32 %f750, 0fB3A22168;
fma.rn.f32 %f751, %f747, %f750, %f749;
mov.f32 %f752, 0fA7C234C5;
fma.rn.f32 %f1660, %f747, %f752, %f751;
abs.f32 %f191, %f189;
setp.ltu.f32 %p50, %f191, 0f47CE4780;
mov.u32 %r461, %r464;
mov.f32 %f1657, %f1660;
@%p50 bra $L__BB0_45;
setp.eq.f32 %p51, %f191, 0f7F800000;
@%p51 bra $L__BB0_44;
bra.uni $L__BB0_39;
$L__BB0_44:
mov.f32 %f755, 0f00000000;
mul.rn.f32 %f1657, %f189, %f755;
mov.u32 %r461, 0;
bra.uni $L__BB0_45;
$L__BB0_39:
mov.b32 %r21, %f189;
bfe.u32 %r179, %r21, 23, 8;
add.s32 %r22, %r179, -128;
shl.b32 %r180, %r21, 8;
or.b32 %r23, %r180, -2147483648;
shr.u32 %r24, %r22, 5;
mov.u64 %rd118, 0;
mov.u32 %r458, 0;
mov.u64 %rd116, %rd1;
mov.u64 %rd117, %rd53;
$L__BB0_40:
.pragma "nounroll";
ld.global.nc.u32 %r181, [%rd117];
mad.wide.u32 %rd55, %r181, %r23, %rd118;
shr.u64 %rd118, %rd55, 32;
st.local.u32 [%rd116], %rd55;
add.s64 %rd117, %rd117, 4;
add.s64 %rd116, %rd116, 4;
add.s32 %r458, %r458, 1;
setp.ne.s32 %p52, %r458, 6;
@%p52 bra $L__BB0_40;
st.local.u32 [%rd9], %rd118;
mov.u32 %r182, 4;
sub.s32 %r27, %r182, %r24;
mov.u32 %r183, 6;
sub.s32 %r184, %r183, %r24;
mul.wide.s32 %rd56, %r184, 4;
add.s64 %rd57, %rd1, %rd56;
ld.local.u32 %r459, [%rd57];
ld.local.u32 %r460, [%rd57+-4];
and.b32 %r30, %r22, 31;
setp.eq.s32 %p53, %r30, 0;
@%p53 bra $L__BB0_43;
mov.u32 %r185, 32;
sub.s32 %r186, %r185, %r30;
shr.u32 %r187, %r460, %r186;
shl.b32 %r188, %r459, %r30;
add.s32 %r459, %r187, %r188;
mul.wide.s32 %rd58, %r27, 4;
add.s64 %rd59, %rd1, %rd58;
ld.local.u32 %r189, [%rd59];
shr.u32 %r190, %r189, %r186;
shl.b32 %r191, %r460, %r30;
add.s32 %r460, %r190, %r191;
$L__BB0_43:
and.b32 %r192, %r21, -2147483648;
shr.u32 %r193, %r460, 30;
shl.b32 %r194, %r459, 2;
or.b32 %r195, %r193, %r194;
shr.u32 %r196, %r195, 31;
shr.u32 %r197, %r459, 30;
add.s32 %r198, %r196, %r197;
neg.s32 %r199, %r198;
setp.eq.s32 %p54, %r192, 0;
selp.b32 %r461, %r198, %r199, %p54;
setp.ne.s32 %p55, %r196, 0;
xor.b32 %r200, %r192, -2147483648;
selp.b32 %r201, %r200, %r192, %p55;
selp.b32 %r202, -1, 0, %p55;
xor.b32 %r203, %r195, %r202;
shl.b32 %r204, %r460, 2;
xor.b32 %r205, %r204, %r202;
cvt.u64.u32 %rd60, %r203;
cvt.u64.u32 %rd61, %r205;
bfi.b64 %rd62, %rd60, %rd61, 32, 32;
cvt.rn.f64.s64 %fd1, %rd62;
mul.f64 %fd2, %fd1, 0d3BF921FB54442D19;
cvt.rn.f32.f64 %f753, %fd2;
setp.eq.s32 %p56, %r201, 0;
neg.f32 %f754, %f753;
selp.f32 %f1657, %f753, %f754, %p56;
$L__BB0_45:
add.s32 %r37, %r461, 1;
and.b32 %r38, %r37, 1;
setp.eq.s32 %p57, %r38, 0;
selp.f32 %f195, %f1657, 0f3F800000, %p57;
mul.rn.f32 %f196, %f1657, %f1657;
mov.f32 %f1658, 0fB94D4153;
@%p57 bra $L__BB0_47;
mov.f32 %f757, 0fBAB607ED;
mov.f32 %f758, 0f37CBAC00;
fma.rn.f32 %f1658, %f758, %f196, %f757;
$L__BB0_47:
selp.f32 %f759, 0f3C0885E4, 0f3D2AAABB, %p57;
fma.rn.f32 %f760, %f1658, %f196, %f759;
selp.f32 %f761, 0fBE2AAAA8, 0fBEFFFFFF, %p57;
fma.rn.f32 %f762, %f760, %f196, %f761;
mov.f32 %f763, 0f00000000;
fma.rn.f32 %f764, %f196, %f195, %f763;
fma.rn.f32 %f1659, %f762, %f764, %f195;
and.b32 %r207, %r37, 2;
setp.eq.s32 %p59, %r207, 0;
@%p59 bra $L__BB0_49;
mov.f32 %f766, 0fBF800000;
fma.rn.f32 %f1659, %f1659, %f766, %f763;
$L__BB0_49:
@%p50 bra $L__BB0_57;
setp.eq.f32 %p61, %f191, 0f7F800000;
@%p61 bra $L__BB0_56;
bra.uni $L__BB0_51;
$L__BB0_56:
mov.f32 %f769, 0f00000000;
mul.rn.f32 %f1660, %f189, %f769;
mov.u32 %r464, 0;
bra.uni $L__BB0_57;
$L__BB0_51:
mov.b32 %r39, %f189;
bfe.u32 %r208, %r39, 23, 8;
add.s32 %r40, %r208, -128;
shl.b32 %r209, %r39, 8;
or.b32 %r41, %r209, -2147483648;
shr.u32 %r42, %r40, 5;
mov.u64 %rd119, 0;
mov.u64 %rd120, %rd119;
$L__BB0_52:
.pragma "nounroll";
shl.b64 %rd65, %rd119, 2;
mov.u64 %rd66, __cudart_i2opi_f;
add.s64 %rd67, %rd66, %rd65;
ld.global.nc.u32 %r210, [%rd67];
mad.wide.u32 %rd68, %r210, %r41, %rd120;
shr.u64 %rd120, %rd68, 32;
add.s64 %rd69, %rd1, %rd65;
st.local.u32 [%rd69], %rd68;
cvt.u32.u64 %r211, %rd119;
add.s32 %r212, %r211, 1;
cvt.s64.s32 %rd119, %r212;
setp.ne.s32 %p62, %r212, 6;
@%p62 bra $L__BB0_52;
st.local.u32 [%rd9], %rd120;
mov.u32 %r213, 4;
sub.s32 %r43, %r213, %r42;
mov.u32 %r214, 6;
sub.s32 %r215, %r214, %r42;
mul.wide.s32 %rd70, %r215, 4;
add.s64 %rd71, %rd1, %rd70;
ld.local.u32 %r462, [%rd71];
ld.local.u32 %r463, [%rd71+-4];
and.b32 %r46, %r40, 31;
setp.eq.s32 %p63, %r46, 0;
@%p63 bra $L__BB0_55;
mov.u32 %r216, 32;
sub.s32 %r217, %r216, %r46;
shr.u32 %r218, %r463, %r217;
shl.b32 %r219, %r462, %r46;
add.s32 %r462, %r218, %r219;
mul.wide.s32 %rd72, %r43, 4;
add.s64 %rd73, %rd1, %rd72;
ld.local.u32 %r220, [%rd73];
shr.u32 %r221, %r220, %r217;
shl.b32 %r222, %r463, %r46;
add.s32 %r463, %r221, %r222;
$L__BB0_55:
and.b32 %r223, %r39, -2147483648;
shr.u32 %r224, %r463, 30;
shl.b32 %r225, %r462, 2;
or.b32 %r226, %r224, %r225;
shr.u32 %r227, %r226, 31;
shr.u32 %r228, %r462, 30;
add.s32 %r229, %r227, %r228;
neg.s32 %r230, %r229;
setp.eq.s32 %p64, %r223, 0;
selp.b32 %r464, %r229, %r230, %p64;
setp.ne.s32 %p65, %r227, 0;
xor.b32 %r231, %r223, -2147483648;
selp.b32 %r232, %r231, %r223, %p65;
selp.b32 %r233, -1, 0, %p65;
xor.b32 %r234, %r226, %r233;
shl.b32 %r235, %r463, 2;
xor.b32 %r236, %r235, %r233;
cvt.u64.u32 %rd74, %r234;
cvt.u64.u32 %rd75, %r236;
bfi.b64 %rd76, %rd74, %rd75, 32, 32;
cvt.rn.f64.s64 %fd3, %rd76;
mul.f64 %fd4, %fd3, 0d3BF921FB54442D19;
cvt.rn.f32.f64 %f767, %fd4;
setp.eq.s32 %p66, %r232, 0;
neg.f32 %f768, %f767;
selp.f32 %f1660, %f767, %f768, %p66;
$L__BB0_57:
mul.f32 %f205, %f188, %f1659;
and.b32 %r53, %r464, 1;
setp.eq.s32 %p67, %r53, 0;
selp.f32 %f206, %f1660, 0f3F800000, %p67;
mul.rn.f32 %f207, %f1660, %f1660;
mov.f32 %f1661, 0fB94D4153;
@%p67 bra $L__BB0_59;
mov.f32 %f771, 0fBAB607ED;
mov.f32 %f772, 0f37CBAC00;
fma.rn.f32 %f1661, %f772, %f207, %f771;
$L__BB0_59:
selp.f32 %f773, 0f3C0885E4, 0f3D2AAABB, %p67;
fma.rn.f32 %f774, %f1661, %f207, %f773;
selp.f32 %f775, 0fBE2AAAA8, 0fBEFFFFFF, %p67;
fma.rn.f32 %f776, %f774, %f207, %f775;
mov.f32 %f777, 0f00000000;
fma.rn.f32 %f778, %f207, %f206, %f777;
fma.rn.f32 %f1662, %f776, %f778, %f206;
and.b32 %r238, %r464, 2;
setp.eq.s32 %p69, %r238, 0;
@%p69 bra $L__BB0_61;
mov.f32 %f780, 0fBF800000;
fma.rn.f32 %f1662, %f1662, %f780, %f777;
$L__BB0_61:
mul.f32 %f790, %f188, %f1662;
mul.f32 %f791, %f152, %f790;
mul.f32 %f792, %f153, %f790;
mul.f32 %f793, %f154, %f790;
fma.rn.f32 %f794, %f161, %f205, %f791;
fma.rn.f32 %f795, %f160, %f205, %f792;
fma.rn.f32 %f796, %f159, %f205, %f793;
fma.rn.f32 %f784, %f1566, %f187, %f794;
fma.rn.f32 %f785, %f1567, %f187, %f795;
fma.rn.f32 %f786, %f1568, %f187, %f796;
mov.f32 %f802, 0f38D1B717;
max.f32 %f787, %f801, %f802;
mov.f32 %f788, 0f6C4ECB8F;
mov.u32 %r272, 1;
mov.u32 %r275, 2;
mov.u32 %r277, 4;
mov.u32 %r280, 1065353216;
mov.u32 %r281, 2139095039;
mov.u32 %r309, 0;
// begin inline asm
call(%r239,%r240,%r241,%r242,%r243,%r244,%r245,%r246,%r247,%r248,%r249,%r250,%r251,%r252,%r253,%r254,%r255,%r256,%r257,%r258,%r259,%r260,%r261,%r262,%r263,%r264,%r265,%r266,%r267,%r268,%r269,%r270),_optix_trace_typed_32,(%r309,%rd8,%f15,%f16,%f17,%f784,%f785,%f786,%f787,%f788,%f777,%r272,%r309,%r309,%r275,%r309,%r277,%r280,%r280,%r280,%r281,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309,%r309);
// end inline asm
mov.b32 %f803, %r239;
mov.b32 %f804, %r240;
mov.b32 %f805, %r241;
mov.b32 %f806, %r242;
max.f32 %f807, %f803, %f777;
max.f32 %f808, %f804, %f777;
max.f32 %f809, %f805, %f777;
setp.ltu.f32 %p70, %f806, 0f00000000;
selp.f32 %f810, %f809, 0f00000000, %p70;
selp.f32 %f811, %f808, 0f00000000, %p70;
selp.f32 %f812, %f807, 0f00000000, %p70;
mul.f32 %f813, %f28, %f785;
fma.rn.f32 %f814, %f26, %f784, %f813;
fma.rn.f32 %f815, %f30, %f786, %f814;
cvt.sat.f32.f32 %f816, %f815;
fma.rn.f32 %f1650, %f812, %f816, %f1650;
fma.rn.f32 %f1649, %f811, %f816, %f1649;
fma.rn.f32 %f1648, %f810, %f816, %f1648;
mul.f32 %f817, %f38, %f785;
fma.rn.f32 %f818, %f37, %f784, %f817;
fma.rn.f32 %f819, %f39, %f786, %f818;
cvt.sat.f32.f32 %f820, %f819;
fma.rn.f32 %f1653, %f812, %f820, %f1653;
fma.rn.f32 %f1652, %f811, %f820, %f1652;
fma.rn.f32 %f1651, %f810, %f820, %f1651;
mul.f32 %f821, %f47, %f785;
fma.rn.f32 %f822, %f46, %f784, %f821;
fma.rn.f32 %f823, %f48, %f786, %f822;
cvt.sat.f32.f32 %f824, %f823;
fma.rn.f32 %f1656, %f812, %f824, %f1656;
fma.rn.f32 %f1655, %f811, %f824, %f1655;
fma.rn.f32 %f1654, %f810, %f824, %f1654;
mul.f32 %f825, %f1567, %f785;
fma.rn.f32 %f826, %f1566, %f784, %f825;
fma.rn.f32 %f827, %f1568, %f786, %f826;
cvt.sat.f32.f32 %f828, %f827;
fma.rn.f32 %f1647, %f812, %f828, %f1647;
fma.rn.f32 %f1646, %f811, %f828, %f1646;
fma.rn.f32 %f1645, %f810, %f828, %f1645;
add.s32 %r456, %r456, 1;
setp.lt.s32 %p71, %r456, %r5;
@%p71 bra $L__BB0_37;
add.s32 %r454, %r454, 1;
setp.lt.s32 %p72, %r454, %r5;
@%p72 bra $L__BB0_36;
$L__BB0_63:
mul.lo.s32 %r310, %r5, %r5;
cvt.rn.f32.s32 %f829, %r310;
rcp.rn.f32 %f830, %f829;
mul.f32 %f831, %f830, %f1647;
mul.f32 %f832, %f830, %f1646;
mul.f32 %f833, %f830, %f1645;
div.rn.f32 %f1687, %f705, %f829;
mul.f32 %f1681, %f830, %f1650;
mul.f32 %f1682, %f830, %f1649;
mul.f32 %f1683, %f830, %f1648;
mul.f32 %f1678, %f830, %f1653;
mul.f32 %f1679, %f830, %f1652;
mul.f32 %f1680, %f830, %f1651;
mul.f32 %f1675, %f830, %f1656;
mul.f32 %f1676, %f830, %f1655;
mul.f32 %f1677, %f830, %f1654;
fma.rn.f32 %f1684, %f830, %f1647, %f831;
fma.rn.f32 %f1685, %f830, %f1646, %f832;
fma.rn.f32 %f1686, %f830, %f1645, %f833;
$L__BB0_64:
ld.const.u32 %r449, [params+616];
setp.lt.s32 %p73, %r449, 0;
selp.f32 %f263, %f1684, %f1687, %p73;
ld.const.u32 %r56, [params+104];
and.b32 %r311, %r56, 8;
setp.eq.s32 %p74, %r311, 0;
@%p74 bra $L__BB0_78;
ld.const.u64 %rd78, [params+192];
cvta.to.global.u64 %rd20, %rd78;
ld.const.u32 %r312, [params+184];
mad.lo.s32 %r313, %r312, %r7, %r6;
cvt.u64.u32 %rd21, %r313;
mov.f32 %f836, 0f3E68BA2E;
cvt.rzi.f32.f32 %f837, %f836;
add.f32 %f838, %f837, %f837;
mov.f32 %f839, 0f3EE8BA2E;
sub.f32 %f840, %f839, %f838;
abs.f32 %f264, %f840;
abs.f32 %f265, %f263;
setp.lt.f32 %p75, %f265, 0f00800000;
mul.f32 %f841, %f265, 0f4B800000;
selp.f32 %f842, %f841, %f265, %p75;
selp.f32 %f843, 0fC3170000, 0fC2FE0000, %p75;
mov.b32 %r314, %f842;
and.b32 %r315, %r314, 8388607;
or.b32 %r316, %r315, 1065353216;
mov.b32 %f844, %r316;
shr.u32 %r317, %r314, 23;
cvt.rn.f32.u32 %f845, %r317;
add.f32 %f846, %f843, %f845;
setp.gt.f32 %p76, %f844, 0f3FB504F3;
mul.f32 %f847, %f844, 0f3F000000;
add.f32 %f848, %f846, 0f3F800000;
selp.f32 %f849, %f848, %f846, %p76;
selp.f32 %f850, %f847, %f844, %p76;
add.f32 %f851, %f850, 0fBF800000;
add.f32 %f852, %f850, 0f3F800000;
rcp.approx.ftz.f32 %f853, %f852;
add.f32 %f854, %f851, %f851;
mul.f32 %f855, %f854, %f853;
mul.f32 %f856, %f855, %f855;
mov.f32 %f857, 0f3C4CAF63;
mov.f32 %f858, 0f3B18F0FE;
fma.rn.f32 %f859, %f858, %f856, %f857;
mov.f32 %f860, 0f3DAAAABD;
fma.rn.f32 %f861, %f859, %f856, %f860;
mul.rn.f32 %f862, %f861, %f856;
mul.rn.f32 %f863, %f862, %f855;
sub.f32 %f864, %f851, %f855;
add.f32 %f865, %f864, %f864;
neg.f32 %f866, %f855;
fma.rn.f32 %f867, %f866, %f851, %f865;
mul.rn.f32 %f868, %f853, %f867;
add.f32 %f869, %f863, %f855;
sub.f32 %f870, %f855, %f869;
add.f32 %f871, %f863, %f870;
add.f32 %f872, %f868, %f871;
add.f32 %f873, %f869, %f872;
sub.f32 %f874, %f869, %f873;
add.f32 %f875, %f872, %f874;
mov.f32 %f876, 0f3F317200;
mul.rn.f32 %f877, %f849, %f876;
mov.f32 %f878, 0f35BFBE8E;
mul.rn.f32 %f879, %f849, %f878;
add.f32 %f880, %f877, %f873;
sub.f32 %f881, %f877, %f880;
add.f32 %f882, %f873, %f881;
add.f32 %f883, %f875, %f882;
add.f32 %f884, %f879, %f883;
add.f32 %f885, %f880, %f884;
sub.f32 %f886, %f880, %f885;
add.f32 %f887, %f884, %f886;
mul.rn.f32 %f888, %f839, %f885;
neg.f32 %f889, %f888;
fma.rn.f32 %f890, %f839, %f885, %f889;
fma.rn.f32 %f891, %f839, %f887, %f890;
mov.f32 %f892, 0f00000000;
fma.rn.f32 %f893, %f892, %f885, %f891;
add.rn.f32 %f894, %f888, %f893;
neg.f32 %f895, %f894;
add.rn.f32 %f896, %f888, %f895;
add.rn.f32 %f897, %f896, %f893;
mov.b32 %r318, %f894;
setp.eq.s32 %p77, %r318, 1118925336;
add.s32 %r319, %r318, -1;
mov.b32 %f898, %r319;
add.f32 %f899, %f897, 0f37000000;
selp.f32 %f266, %f899, %f897, %p77;
selp.f32 %f900, %f898, %f894, %p77;
mov.f32 %f901, 0f3FB8AA3B;
mul.rn.f32 %f902, %f900, %f901;
cvt.rzi.f32.f32 %f903, %f902;
abs.f32 %f904, %f903;
setp.gt.f32 %p78, %f904, 0f42FC0000;
mov.b32 %r320, %f903;
and.b32 %r321, %r320, -2147483648;
or.b32 %r322, %r321, 1123811328;
mov.b32 %f905, %r322;
selp.f32 %f906, %f905, %f903, %p78;
mov.f32 %f907, 0fBF317218;
fma.rn.f32 %f908, %f906, %f907, %f900;
mov.f32 %f909, 0f3102E308;
fma.rn.f32 %f910, %f906, %f909, %f908;
mul.f32 %f911, %f910, 0f3FB8AA3B;
add.f32 %f912, %f906, 0f4B40007F;
mov.b32 %r323, %f912;
shl.b32 %r324, %r323, 23;
mov.b32 %f913, %r324;
ex2.approx.ftz.f32 %f914, %f911;
mul.f32 %f267, %f914, %f913;
setp.eq.f32 %p79, %f267, 0f7F800000;
mov.f32 %f1688, 0f7F800000;
@%p79 bra $L__BB0_67;
fma.rn.f32 %f1688, %f267, %f266, %f267;
$L__BB0_67:
setp.lt.f32 %p80, %f263, 0f00000000;
setp.eq.f32 %p81, %f264, 0f3F800000;
and.pred %p3, %p80, %p81;
setp.eq.f32 %p82, %f263, 0f00000000;
@%p82 bra $L__BB0_71;
bra.uni $L__BB0_68;
$L__BB0_71:
add.f32 %f919, %f263, %f263;
selp.f32 %f1690, %f919, 0f00000000, %p81;
bra.uni $L__BB0_72;
$L__BB0_172:
mov.f32 %f1530, 0f00000000;
mov.u32 %r466, 0;
// begin inline asm
{ cvt.rn.f16.f32 %rs127, %f1530;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs126, %f1530;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs125, %f1530;}
// end inline asm
mov.u16 %rs128, 0;
st.global.v4.u16 [%rd28], {%rs125, %rs126, %rs127, %rs128};
$L__BB0_173:
ld.const.u64 %rd107, [params+256];
cvta.to.global.u64 %rd108, %rd107;
ld.const.u32 %r443, [params+248];
mad.lo.s32 %r444, %r443, %r7, %r6;
mul.wide.u32 %rd109, %r444, 8;
add.s64 %rd29, %rd108, %rd109;
setp.eq.s32 %p202, %r466, 0;
@%p202 bra $L__BB0_175;
ld.global.v4.u16 {%rs135, %rs136, %rs137, %rs138}, [%rd29];
// begin inline asm
{ cvt.f32.f16 %f1531, %rs135;}
// end inline asm
// begin inline asm
{ cvt.f32.f16 %f1532, %rs136;}
// end inline asm
// begin inline asm
{ cvt.f32.f16 %f1533, %rs137;}
// end inline asm
add.f32 %f1534, %f1531, 0f00000000;
add.f32 %f1535, %f1532, 0f00000000;
add.f32 %f1536, %f1533, 0f00000000;
// begin inline asm
{ cvt.rn.f16.f32 %rs134, %f1536;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs133, %f1535;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs132, %f1534;}
// end inline asm
mov.u16 %rs139, 0;
st.global.v4.u16 [%rd29], {%rs132, %rs133, %rs134, %rs139};
bra.uni $L__BB0_176;
$L__BB0_175:
mov.f32 %f1539, 0f00000000;
// begin inline asm
{ cvt.rn.f16.f32 %rs142, %f1539;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs141, %f1539;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs140, %f1539;}
// end inline asm
mov.u16 %rs143, 0;
st.global.v4.u16 [%rd29], {%rs140, %rs141, %rs142, %rs143};
$L__BB0_176:
ld.const.u64 %rd110, [params+272];
cvta.to.global.u64 %rd111, %rd110;
ld.const.u32 %r445, [params+264];
mad.lo.s32 %r446, %r445, %r7, %r6;
mul.wide.u32 %rd112, %r446, 8;
add.s64 %rd30, %rd111, %rd112;
@%p202 bra $L__BB0_178;
ld.global.v4.u16 {%rs150, %rs151, %rs152, %rs153}, [%rd30];
// begin inline asm
{ cvt.f32.f16 %f1540, %rs150;}
// end inline asm
// begin inline asm
{ cvt.f32.f16 %f1541, %rs151;}
// end inline asm
// begin inline asm
{ cvt.f32.f16 %f1542, %rs152;}
// end inline asm
add.f32 %f1543, %f1540, 0f00000000;
add.f32 %f1544, %f1541, 0f00000000;
add.f32 %f1545, %f1542, 0f00000000;
// begin inline asm
{ cvt.rn.f16.f32 %rs149, %f1545;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs148, %f1544;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs147, %f1543;}
// end inline asm
mov.u16 %rs154, 0;
st.global.v4.u16 [%rd30], {%rs147, %rs148, %rs149, %rs154};
bra.uni $L__BB0_179;
$L__BB0_178:
mov.f32 %f1548, 0f00000000;
// begin inline asm
{ cvt.rn.f16.f32 %rs157, %f1548;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs156, %f1548;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs155, %f1548;}
// end inline asm
mov.u16 %rs158, 0;
st.global.v4.u16 [%rd30], {%rs155, %rs156, %rs157, %rs158};
$L__BB0_179:
ld.const.u64 %rd113, [params+288];
cvta.to.global.u64 %rd114, %rd113;
ld.const.u32 %r447, [params+280];
mad.lo.s32 %r448, %r447, %r7, %r6;
mul.wide.u32 %rd115, %r448, 8;
add.s64 %rd31, %rd114, %rd115;
@%p202 bra $L__BB0_181;
ld.global.v4.u16 {%rs165, %rs166, %rs167, %rs168}, [%rd31];
// begin inline asm
{ cvt.f32.f16 %f1549, %rs165;}
// end inline asm
// begin inline asm
{ cvt.f32.f16 %f1550, %rs166;}
// end inline asm
// begin inline asm
{ cvt.f32.f16 %f1551, %rs167;}
// end inline asm
add.f32 %f1552, %f1549, 0f00000000;
add.f32 %f1553, %f1550, 0f00000000;
add.f32 %f1554, %f1551, 0f00000000;
// begin inline asm
{ cvt.rn.f16.f32 %rs164, %f1554;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs163, %f1553;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs162, %f1552;}
// end inline asm
mov.u16 %rs169, 0;
st.global.v4.u16 [%rd31], {%rs162, %rs163, %rs164, %rs169};
bra.uni $L__BB0_182;
$L__BB0_181:
mov.f32 %f1557, 0f00000000;
// begin inline asm
{ cvt.rn.f16.f32 %rs172, %f1557;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs171, %f1557;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs170, %f1557;}
// end inline asm
mov.u16 %rs173, 0;
st.global.v4.u16 [%rd31], {%rs170, %rs171, %rs172, %rs173};
bra.uni $L__BB0_182;
$L__BB0_68:
mov.b32 %r325, %f1688;
xor.b32 %r326, %r325, -2147483648;
mov.b32 %f915, %r326;
selp.f32 %f1690, %f915, %f1688, %p3;
setp.geu.f32 %p83, %f263, 0f00000000;
@%p83 bra $L__BB0_72;
mov.f32 %f916, 0f3EE8BA2E;
cvt.rzi.f32.f32 %f917, %f916;
setp.eq.f32 %p84, %f917, 0f3EE8BA2E;
@%p84 bra $L__BB0_72;
mov.f32 %f1690, 0f7FFFFFFF;
$L__BB0_72:
add.f32 %f920, %f265, 0f3EE8BA2E;
mov.b32 %r327, %f920;
setp.lt.s32 %p86, %r327, 2139095040;
@%p86 bra $L__BB0_77;
setp.gtu.f32 %p87, %f265, 0f7F800000;
@%p87 bra $L__BB0_76;
bra.uni $L__BB0_74;
$L__BB0_76:
add.f32 %f1690, %f263, 0f3EE8BA2E;
bra.uni $L__BB0_77;
$L__BB0_74:
setp.neu.f32 %p88, %f265, 0f7F800000;
@%p88 bra $L__BB0_77;
selp.f32 %f1690, 0fFF800000, 0f7F800000, %p3;
$L__BB0_77:
mul.f32 %f921, %f1690, 0f437F0000;
setp.eq.f32 %p89, %f263, 0f3F800000;
selp.f32 %f922, 0f437F0000, %f921, %p89;
cvt.rzi.u32.f32 %r328, %f922;
shl.b64 %rd79, %rd21, 1;
add.s64 %rd80, %rd20, %rd79;
cvt.u16.u32 %rs45, %r328;
mov.u16 %rs46, 255;
st.global.v2.u8 [%rd80], {%rs45, %rs46};
$L__BB0_78:
ld.const.v2.f32 {%f923, %f924}, [params+648];
mul.f32 %f278, %f1684, %f923;
mul.f32 %f279, %f1685, %f924;
ld.const.f32 %f280, [params+656];
mul.f32 %f281, %f1686, %f280;
and.b32 %r329, %r56, 1;
setp.eq.b32 %p90, %r329, 1;
mov.pred %p91, 0;
xor.pred %p92, %p90, %p91;
not.pred %p93, %p92;
@%p93 bra $L__BB0_152;
mov.f32 %f926, 0f3E666666;
cvt.rzi.f32.f32 %f927, %f926;
add.f32 %f928, %f927, %f927;
mov.f32 %f929, 0f3EE66666;
sub.f32 %f930, %f929, %f928;
abs.f32 %f282, %f930;
abs.f32 %f283, %f278;
setp.lt.f32 %p94, %f283, 0f00800000;
mul.f32 %f931, %f283, 0f4B800000;
selp.f32 %f932, %f931, %f283, %p94;
selp.f32 %f933, 0fC3170000, 0fC2FE0000, %p94;
mov.b32 %r330, %f932;
and.b32 %r331, %r330, 8388607;
or.b32 %r332, %r331, 1065353216;
mov.b32 %f934, %r332;
shr.u32 %r333, %r330, 23;
cvt.rn.f32.u32 %f935, %r333;
add.f32 %f936, %f933, %f935;
setp.gt.f32 %p95, %f934, 0f3FB504F3;
mul.f32 %f937, %f934, 0f3F000000;
add.f32 %f938, %f936, 0f3F800000;
selp.f32 %f939, %f938, %f936, %p95;
selp.f32 %f940, %f937, %f934, %p95;
add.f32 %f941, %f940, 0fBF800000;
add.f32 %f942, %f940, 0f3F800000;
rcp.approx.ftz.f32 %f943, %f942;
add.f32 %f944, %f941, %f941;
mul.f32 %f945, %f944, %f943;
mul.f32 %f946, %f945, %f945;
mov.f32 %f947, 0f3C4CAF63;
mov.f32 %f948, 0f3B18F0FE;
fma.rn.f32 %f949, %f948, %f946, %f947;
mov.f32 %f950, 0f3DAAAABD;
fma.rn.f32 %f951, %f949, %f946, %f950;
mul.rn.f32 %f952, %f951, %f946;
mul.rn.f32 %f953, %f952, %f945;
sub.f32 %f954, %f941, %f945;
add.f32 %f955, %f954, %f954;
neg.f32 %f956, %f945;
fma.rn.f32 %f957, %f956, %f941, %f955;
mul.rn.f32 %f958, %f943, %f957;
add.f32 %f959, %f953, %f945;
sub.f32 %f960, %f945, %f959;
add.f32 %f961, %f953, %f960;
add.f32 %f962, %f958, %f961;
add.f32 %f963, %f959, %f962;
sub.f32 %f964, %f959, %f963;
add.f32 %f965, %f962, %f964;
mov.f32 %f966, 0f3F317200;
mul.rn.f32 %f967, %f939, %f966;
mov.f32 %f968, 0f35BFBE8E;
mul.rn.f32 %f969, %f939, %f968;
add.f32 %f970, %f967, %f963;
sub.f32 %f971, %f967, %f970;
add.f32 %f972, %f963, %f971;
add.f32 %f973, %f965, %f972;
add.f32 %f974, %f969, %f973;
add.f32 %f975, %f970, %f974;
sub.f32 %f976, %f970, %f975;
add.f32 %f977, %f974, %f976;
mul.rn.f32 %f978, %f929, %f975;
neg.f32 %f979, %f978;
fma.rn.f32 %f980, %f929, %f975, %f979;
fma.rn.f32 %f981, %f929, %f977, %f980;
mov.f32 %f982, 0f00000000;
fma.rn.f32 %f983, %f982, %f975, %f981;
add.rn.f32 %f984, %f978, %f983;
neg.f32 %f985, %f984;
add.rn.f32 %f986, %f978, %f985;
add.rn.f32 %f987, %f986, %f983;
mov.b32 %r334, %f984;
setp.eq.s32 %p96, %r334, 1118925336;
add.s32 %r335, %r334, -1;
mov.b32 %f988, %r335;
add.f32 %f989, %f987, 0f37000000;
selp.f32 %f284, %f989, %f987, %p96;
selp.f32 %f990, %f988, %f984, %p96;
mov.f32 %f991, 0f3FB8AA3B;
mul.rn.f32 %f992, %f990, %f991;
cvt.rzi.f32.f32 %f993, %f992;
abs.f32 %f994, %f993;
setp.gt.f32 %p97, %f994, 0f42FC0000;
mov.b32 %r336, %f993;
and.b32 %r337, %r336, -2147483648;
or.b32 %r338, %r337, 1123811328;
mov.b32 %f995, %r338;
selp.f32 %f996, %f995, %f993, %p97;
mov.f32 %f997, 0fBF317218;
fma.rn.f32 %f998, %f996, %f997, %f990;
mov.f32 %f999, 0f3102E308;
fma.rn.f32 %f1000, %f996, %f999, %f998;
mul.f32 %f1001, %f1000, 0f3FB8AA3B;
add.f32 %f1002, %f996, 0f4B40007F;
mov.b32 %r339, %f1002;
shl.b32 %r340, %r339, 23;
mov.b32 %f1003, %r340;
ex2.approx.ftz.f32 %f1004, %f1001;
mul.f32 %f285, %f1004, %f1003;
setp.eq.f32 %p98, %f285, 0f7F800000;
mov.f32 %f1691, 0f7F800000;
@%p98 bra $L__BB0_81;
fma.rn.f32 %f1691, %f285, %f284, %f285;
$L__BB0_81:
setp.lt.f32 %p99, %f278, 0f00000000;
setp.eq.f32 %p100, %f282, 0f3F800000;
and.pred %p4, %p99, %p100;
setp.eq.f32 %p101, %f278, 0f00000000;
@%p101 bra $L__BB0_85;
bra.uni $L__BB0_82;
$L__BB0_85:
add.f32 %f1009, %f278, %f278;
selp.f32 %f1693, %f1009, 0f00000000, %p100;
bra.uni $L__BB0_86;
$L__BB0_82:
mov.b32 %r341, %f1691;
xor.b32 %r342, %r341, -2147483648;
mov.b32 %f1005, %r342;
selp.f32 %f1693, %f1005, %f1691, %p4;
setp.geu.f32 %p102, %f278, 0f00000000;
@%p102 bra $L__BB0_86;
mov.f32 %f1006, 0f3EE66666;
cvt.rzi.f32.f32 %f1007, %f1006;
setp.eq.f32 %p103, %f1007, 0f3EE66666;
@%p103 bra $L__BB0_86;
mov.f32 %f1693, 0f7FFFFFFF;
$L__BB0_86:
add.f32 %f1010, %f283, 0f3EE66666;
mov.b32 %r343, %f1010;
setp.lt.s32 %p105, %r343, 2139095040;
@%p105 bra $L__BB0_91;
setp.gtu.f32 %p106, %f283, 0f7F800000;
@%p106 bra $L__BB0_90;
bra.uni $L__BB0_88;
$L__BB0_90:
add.f32 %f1693, %f278, 0f3EE66666;
bra.uni $L__BB0_91;
$L__BB0_88:
setp.neu.f32 %p107, %f283, 0f7F800000;
@%p107 bra $L__BB0_91;
selp.f32 %f1693, 0fFF800000, 0f7F800000, %p4;
$L__BB0_91:
setp.eq.f32 %p108, %f278, 0f3F800000;
selp.f32 %f294, 0f3F800000, %f1693, %p108;
abs.f32 %f295, %f279;
setp.lt.f32 %p109, %f295, 0f00800000;
mul.f32 %f1012, %f295, 0f4B800000;
selp.f32 %f1013, %f1012, %f295, %p109;
selp.f32 %f1014, 0fC3170000, 0fC2FE0000, %p109;
mov.b32 %r344, %f1013;
and.b32 %r345, %r344, 8388607;
or.b32 %r346, %r345, 1065353216;
mov.b32 %f1015, %r346;
shr.u32 %r347, %r344, 23;
cvt.rn.f32.u32 %f1016, %r347;
add.f32 %f1017, %f1014, %f1016;
setp.gt.f32 %p110, %f1015, 0f3FB504F3;
mul.f32 %f1018, %f1015, 0f3F000000;
add.f32 %f1019, %f1017, 0f3F800000;
selp.f32 %f1020, %f1019, %f1017, %p110;
selp.f32 %f1021, %f1018, %f1015, %p110;
add.f32 %f1022, %f1021, 0fBF800000;
add.f32 %f1023, %f1021, 0f3F800000;
rcp.approx.ftz.f32 %f1024, %f1023;
add.f32 %f1025, %f1022, %f1022;
mul.f32 %f1026, %f1025, %f1024;
mul.f32 %f1027, %f1026, %f1026;
mov.f32 %f1028, 0f3C4CAF63;
mov.f32 %f1029, 0f3B18F0FE;
fma.rn.f32 %f1030, %f1029, %f1027, %f1028;
mov.f32 %f1031, 0f3DAAAABD;
fma.rn.f32 %f1032, %f1030, %f1027, %f1031;
mul.rn.f32 %f1033, %f1032, %f1027;
mul.rn.f32 %f1034, %f1033, %f1026;
sub.f32 %f1035, %f1022, %f1026;
add.f32 %f1036, %f1035, %f1035;
neg.f32 %f1037, %f1026;
fma.rn.f32 %f1038, %f1037, %f1022, %f1036;
mul.rn.f32 %f1039, %f1024, %f1038;
add.f32 %f1040, %f1034, %f1026;
sub.f32 %f1041, %f1026, %f1040;
add.f32 %f1042, %f1034, %f1041;
add.f32 %f1043, %f1039, %f1042;
add.f32 %f1044, %f1040, %f1043;
sub.f32 %f1045, %f1040, %f1044;
add.f32 %f1046, %f1043, %f1045;
mov.f32 %f1047, 0f3F317200;
mul.rn.f32 %f1048, %f1020, %f1047;
mov.f32 %f1049, 0f35BFBE8E;
mul.rn.f32 %f1050, %f1020, %f1049;
add.f32 %f1051, %f1048, %f1044;
sub.f32 %f1052, %f1048, %f1051;
add.f32 %f1053, %f1044, %f1052;
add.f32 %f1054, %f1046, %f1053;
add.f32 %f1055, %f1050, %f1054;
add.f32 %f1056, %f1051, %f1055;
sub.f32 %f1057, %f1051, %f1056;
add.f32 %f1058, %f1055, %f1057;
mov.f32 %f1059, 0f3EE66666;
mul.rn.f32 %f1060, %f1059, %f1056;
neg.f32 %f1061, %f1060;
fma.rn.f32 %f1062, %f1059, %f1056, %f1061;
fma.rn.f32 %f1063, %f1059, %f1058, %f1062;
mov.f32 %f1064, 0f00000000;
fma.rn.f32 %f1065, %f1064, %f1056, %f1063;
add.rn.f32 %f1066, %f1060, %f1065;
neg.f32 %f1067, %f1066;
add.rn.f32 %f1068, %f1060, %f1067;
add.rn.f32 %f1069, %f1068, %f1065;
mov.b32 %r348, %f1066;
setp.eq.s32 %p111, %r348, 1118925336;
add.s32 %r349, %r348, -1;
mov.b32 %f1070, %r349;
add.f32 %f1071, %f1069, 0f37000000;
selp.f32 %f296, %f1071, %f1069, %p111;
selp.f32 %f1072, %f1070, %f1066, %p111;
mov.f32 %f1073, 0f3FB8AA3B;
mul.rn.f32 %f1074, %f1072, %f1073;
cvt.rzi.f32.f32 %f1075, %f1074;
abs.f32 %f1076, %f1075;
setp.gt.f32 %p112, %f1076, 0f42FC0000;
mov.b32 %r350, %f1075;
and.b32 %r351, %r350, -2147483648;
or.b32 %r352, %r351, 1123811328;
mov.b32 %f1077, %r352;
selp.f32 %f1078, %f1077, %f1075, %p112;
mov.f32 %f1079, 0fBF317218;
fma.rn.f32 %f1080, %f1078, %f1079, %f1072;
mov.f32 %f1081, 0f3102E308;
fma.rn.f32 %f1082, %f1078, %f1081, %f1080;
mul.f32 %f1083, %f1082, 0f3FB8AA3B;
add.f32 %f1084, %f1078, 0f4B40007F;
mov.b32 %r353, %f1084;
shl.b32 %r354, %r353, 23;
mov.b32 %f1085, %r354;
ex2.approx.ftz.f32 %f1086, %f1083;
mul.f32 %f297, %f1086, %f1085;
setp.eq.f32 %p113, %f297, 0f7F800000;
mov.f32 %f1694, 0f7F800000;
@%p113 bra $L__BB0_93;
fma.rn.f32 %f1694, %f297, %f296, %f297;
$L__BB0_93:
setp.lt.f32 %p114, %f279, 0f00000000;
and.pred %p5, %p114, %p100;
setp.eq.f32 %p116, %f279, 0f00000000;
@%p116 bra $L__BB0_97;
bra.uni $L__BB0_94;
$L__BB0_97:
add.f32 %f1091, %f279, %f279;
selp.f32 %f1696, %f1091, 0f00000000, %p100;
bra.uni $L__BB0_98;
$L__BB0_94:
mov.b32 %r355, %f1694;
xor.b32 %r356, %r355, -2147483648;
mov.b32 %f1087, %r356;
selp.f32 %f1696, %f1087, %f1694, %p5;
setp.geu.f32 %p117, %f279, 0f00000000;
@%p117 bra $L__BB0_98;
mov.f32 %f1088, 0f3EE66666;
cvt.rzi.f32.f32 %f1089, %f1088;
setp.eq.f32 %p118, %f1089, 0f3EE66666;
@%p118 bra $L__BB0_98;
mov.f32 %f1696, 0f7FFFFFFF;
$L__BB0_98:
add.f32 %f1092, %f295, 0f3EE66666;
mov.b32 %r357, %f1092;
setp.lt.s32 %p120, %r357, 2139095040;
@%p120 bra $L__BB0_103;
setp.gtu.f32 %p121, %f295, 0f7F800000;
@%p121 bra $L__BB0_102;
bra.uni $L__BB0_100;
$L__BB0_102:
add.f32 %f1696, %f279, 0f3EE66666;
bra.uni $L__BB0_103;
$L__BB0_100:
setp.neu.f32 %p122, %f295, 0f7F800000;
@%p122 bra $L__BB0_103;
selp.f32 %f1696, 0fFF800000, 0f7F800000, %p5;
$L__BB0_103:
setp.eq.f32 %p123, %f279, 0f3F800000;
selp.f32 %f306, 0f3F800000, %f1696, %p123;
abs.f32 %f307, %f281;
setp.lt.f32 %p124, %f307, 0f00800000;
mul.f32 %f1094, %f307, 0f4B800000;
selp.f32 %f1095, %f1094, %f307, %p124;
selp.f32 %f1096, 0fC3170000, 0fC2FE0000, %p124;
mov.b32 %r358, %f1095;
and.b32 %r359, %r358, 8388607;
or.b32 %r360, %r359, 1065353216;
mov.b32 %f1097, %r360;
shr.u32 %r361, %r358, 23;
cvt.rn.f32.u32 %f1098, %r361;
add.f32 %f1099, %f1096, %f1098;
setp.gt.f32 %p125, %f1097, 0f3FB504F3;
mul.f32 %f1100, %f1097, 0f3F000000;
add.f32 %f1101, %f1099, 0f3F800000;
selp.f32 %f1102, %f1101, %f1099, %p125;
selp.f32 %f1103, %f1100, %f1097, %p125;
add.f32 %f1104, %f1103, 0fBF800000;
add.f32 %f1105, %f1103, 0f3F800000;
rcp.approx.ftz.f32 %f1106, %f1105;
add.f32 %f1107, %f1104, %f1104;
mul.f32 %f1108, %f1107, %f1106;
mul.f32 %f1109, %f1108, %f1108;
mov.f32 %f1110, 0f3C4CAF63;
mov.f32 %f1111, 0f3B18F0FE;
fma.rn.f32 %f1112, %f1111, %f1109, %f1110;
mov.f32 %f1113, 0f3DAAAABD;
fma.rn.f32 %f1114, %f1112, %f1109, %f1113;
mul.rn.f32 %f1115, %f1114, %f1109;
mul.rn.f32 %f1116, %f1115, %f1108;
sub.f32 %f1117, %f1104, %f1108;
add.f32 %f1118, %f1117, %f1117;
neg.f32 %f1119, %f1108;
fma.rn.f32 %f1120, %f1119, %f1104, %f1118;
mul.rn.f32 %f1121, %f1106, %f1120;
add.f32 %f1122, %f1116, %f1108;
sub.f32 %f1123, %f1108, %f1122;
add.f32 %f1124, %f1116, %f1123;
add.f32 %f1125, %f1121, %f1124;
add.f32 %f1126, %f1122, %f1125;
sub.f32 %f1127, %f1122, %f1126;
add.f32 %f1128, %f1125, %f1127;
mov.f32 %f1129, 0f3F317200;
mul.rn.f32 %f1130, %f1102, %f1129;
mov.f32 %f1131, 0f35BFBE8E;
mul.rn.f32 %f1132, %f1102, %f1131;
add.f32 %f1133, %f1130, %f1126;
sub.f32 %f1134, %f1130, %f1133;
add.f32 %f1135, %f1126, %f1134;
add.f32 %f1136, %f1128, %f1135;
add.f32 %f1137, %f1132, %f1136;
add.f32 %f1138, %f1133, %f1137;
sub.f32 %f1139, %f1133, %f1138;
add.f32 %f1140, %f1137, %f1139;
mov.f32 %f1141, 0f3EE66666;
mul.rn.f32 %f1142, %f1141, %f1138;
neg.f32 %f1143, %f1142;
fma.rn.f32 %f1144, %f1141, %f1138, %f1143;
fma.rn.f32 %f1145, %f1141, %f1140, %f1144;
mov.f32 %f1146, 0f00000000;
fma.rn.f32 %f1147, %f1146, %f1138, %f1145;
add.rn.f32 %f1148, %f1142, %f1147;
neg.f32 %f1149, %f1148;
add.rn.f32 %f1150, %f1142, %f1149;
add.rn.f32 %f1151, %f1150, %f1147;
mov.b32 %r362, %f1148;
setp.eq.s32 %p126, %r362, 1118925336;
add.s32 %r363, %r362, -1;
mov.b32 %f1152, %r363;
add.f32 %f1153, %f1151, 0f37000000;
selp.f32 %f308, %f1153, %f1151, %p126;
selp.f32 %f1154, %f1152, %f1148, %p126;
mov.f32 %f1155, 0f3FB8AA3B;
mul.rn.f32 %f1156, %f1154, %f1155;
cvt.rzi.f32.f32 %f1157, %f1156;
abs.f32 %f1158, %f1157;
setp.gt.f32 %p127, %f1158, 0f42FC0000;
mov.b32 %r364, %f1157;
and.b32 %r365, %r364, -2147483648;
or.b32 %r366, %r365, 1123811328;
mov.b32 %f1159, %r366;
selp.f32 %f1160, %f1159, %f1157, %p127;
mov.f32 %f1161, 0fBF317218;
fma.rn.f32 %f1162, %f1160, %f1161, %f1154;
mov.f32 %f1163, 0f3102E308;
fma.rn.f32 %f1164, %f1160, %f1163, %f1162;
mul.f32 %f1165, %f1164, 0f3FB8AA3B;
add.f32 %f1166, %f1160, 0f4B40007F;
mov.b32 %r367, %f1166;
shl.b32 %r368, %r367, 23;
mov.b32 %f1167, %r368;
ex2.approx.ftz.f32 %f1168, %f1165;
mul.f32 %f309, %f1168, %f1167;
setp.eq.f32 %p128, %f309, 0f7F800000;
mov.f32 %f1697, 0f7F800000;
@%p128 bra $L__BB0_105;
fma.rn.f32 %f1697, %f309, %f308, %f309;
$L__BB0_105:
setp.lt.f32 %p129, %f281, 0f00000000;
and.pred %p6, %p129, %p100;
setp.eq.f32 %p131, %f281, 0f00000000;
@%p131 bra $L__BB0_109;
bra.uni $L__BB0_106;
$L__BB0_109:
add.f32 %f1173, %f281, %f281;
selp.f32 %f1699, %f1173, 0f00000000, %p100;
bra.uni $L__BB0_110;
$L__BB0_106:
mov.b32 %r369, %f1697;
xor.b32 %r370, %r369, -2147483648;
mov.b32 %f1169, %r370;
selp.f32 %f1699, %f1169, %f1697, %p6;
setp.geu.f32 %p132, %f281, 0f00000000;
@%p132 bra $L__BB0_110;
mov.f32 %f1170, 0f3EE66666;
cvt.rzi.f32.f32 %f1171, %f1170;
setp.eq.f32 %p133, %f1171, 0f3EE66666;
@%p133 bra $L__BB0_110;
mov.f32 %f1699, 0f7FFFFFFF;
$L__BB0_110:
add.f32 %f1174, %f307, 0f3EE66666;
mov.b32 %r371, %f1174;
setp.lt.s32 %p135, %r371, 2139095040;
@%p135 bra $L__BB0_115;
setp.gtu.f32 %p136, %f307, 0f7F800000;
@%p136 bra $L__BB0_114;
bra.uni $L__BB0_112;
$L__BB0_114:
add.f32 %f1699, %f281, 0f3EE66666;
bra.uni $L__BB0_115;
$L__BB0_112:
setp.neu.f32 %p137, %f307, 0f7F800000;
@%p137 bra $L__BB0_115;
selp.f32 %f1699, 0fFF800000, 0f7F800000, %p6;
$L__BB0_115:
setp.eq.f32 %p138, %f281, 0f3F800000;
mov.f32 %f1176, 0f3F800000;
selp.f32 %f1177, 0f3F800000, %f1699, %p138;
ld.const.u64 %rd81, [params+144];
cvta.to.global.u64 %rd22, %rd81;
ld.const.u32 %r372, [params+136];
mad.lo.s32 %r373, %r372, %r7, %r6;
cvt.u64.u32 %rd23, %r373;
min.f32 %f1178, %f294, %f1176;
mov.f32 %f1179, 0f00000000;
max.f32 %f318, %f1179, %f1178;
min.f32 %f1180, %f306, %f1176;
max.f32 %f319, %f1179, %f1180;
min.f32 %f1181, %f1177, %f1176;
max.f32 %f320, %f1179, %f1181;
mov.f32 %f1182, 0f3E555555;
cvt.rzi.f32.f32 %f1183, %f1182;
add.f32 %f1184, %f1183, %f1183;
mov.f32 %f1185, 0f3ED55555;
sub.f32 %f1186, %f1185, %f1184;
abs.f32 %f321, %f1186;
abs.f32 %f322, %f318;
setp.lt.f32 %p139, %f322, 0f00800000;
mul.f32 %f1187, %f322, 0f4B800000;
selp.f32 %f1188, %f1187, %f322, %p139;
selp.f32 %f1189, 0fC3170000, 0fC2FE0000, %p139;
mov.b32 %r374, %f1188;
and.b32 %r375, %r374, 8388607;
or.b32 %r376, %r375, 1065353216;
mov.b32 %f1190, %r376;
shr.u32 %r377, %r374, 23;
cvt.rn.f32.u32 %f1191, %r377;
add.f32 %f1192, %f1189, %f1191;
setp.gt.f32 %p140, %f1190, 0f3FB504F3;
mul.f32 %f1193, %f1190, 0f3F000000;
add.f32 %f1194, %f1192, 0f3F800000;
selp.f32 %f1195, %f1194, %f1192, %p140;
selp.f32 %f1196, %f1193, %f1190, %p140;
add.f32 %f1197, %f1196, 0fBF800000;
add.f32 %f1198, %f1196, 0f3F800000;
rcp.approx.ftz.f32 %f1199, %f1198;
add.f32 %f1200, %f1197, %f1197;
mul.f32 %f1201, %f1200, %f1199;
mul.f32 %f1202, %f1201, %f1201;
mov.f32 %f1203, 0f3C4CAF63;
mov.f32 %f1204, 0f3B18F0FE;
fma.rn.f32 %f1205, %f1204, %f1202, %f1203;
mov.f32 %f1206, 0f3DAAAABD;
fma.rn.f32 %f1207, %f1205, %f1202, %f1206;
mul.rn.f32 %f1208, %f1207, %f1202;
mul.rn.f32 %f1209, %f1208, %f1201;
sub.f32 %f1210, %f1197, %f1201;
add.f32 %f1211, %f1210, %f1210;
neg.f32 %f1212, %f1201;
fma.rn.f32 %f1213, %f1212, %f1197, %f1211;
mul.rn.f32 %f1214, %f1199, %f1213;
add.f32 %f1215, %f1209, %f1201;
sub.f32 %f1216, %f1201, %f1215;
add.f32 %f1217, %f1209, %f1216;
add.f32 %f1218, %f1214, %f1217;
add.f32 %f1219, %f1215, %f1218;
sub.f32 %f1220, %f1215, %f1219;
add.f32 %f1221, %f1218, %f1220;
mov.f32 %f1222, 0f3F317200;
mul.rn.f32 %f1223, %f1195, %f1222;
mov.f32 %f1224, 0f35BFBE8E;
mul.rn.f32 %f1225, %f1195, %f1224;
add.f32 %f1226, %f1223, %f1219;
sub.f32 %f1227, %f1223, %f1226;
add.f32 %f1228, %f1219, %f1227;
add.f32 %f1229, %f1221, %f1228;
add.f32 %f1230, %f1225, %f1229;
add.f32 %f1231, %f1226, %f1230;
sub.f32 %f1232, %f1226, %f1231;
add.f32 %f1233, %f1230, %f1232;
mul.rn.f32 %f1234, %f1185, %f1231;
neg.f32 %f1235, %f1234;
fma.rn.f32 %f1236, %f1185, %f1231, %f1235;
fma.rn.f32 %f1237, %f1185, %f1233, %f1236;
fma.rn.f32 %f1238, %f1179, %f1231, %f1237;
add.rn.f32 %f1239, %f1234, %f1238;
neg.f32 %f1240, %f1239;
add.rn.f32 %f1241, %f1234, %f1240;
add.rn.f32 %f1242, %f1241, %f1238;
mov.b32 %r378, %f1239;
setp.eq.s32 %p141, %r378, 1118925336;
add.s32 %r379, %r378, -1;
mov.b32 %f1243, %r379;
add.f32 %f1244, %f1242, 0f37000000;
selp.f32 %f323, %f1244, %f1242, %p141;
selp.f32 %f1245, %f1243, %f1239, %p141;
mov.f32 %f1246, 0f3FB8AA3B;
mul.rn.f32 %f1247, %f1245, %f1246;
cvt.rzi.f32.f32 %f1248, %f1247;
abs.f32 %f1249, %f1248;
setp.gt.f32 %p142, %f1249, 0f42FC0000;
mov.b32 %r380, %f1248;
and.b32 %r381, %r380, -2147483648;
or.b32 %r382, %r381, 1123811328;
mov.b32 %f1250, %r382;
selp.f32 %f1251, %f1250, %f1248, %p142;
mov.f32 %f1252, 0fBF317218;
fma.rn.f32 %f1253, %f1251, %f1252, %f1245;
mov.f32 %f1254, 0f3102E308;
fma.rn.f32 %f1255, %f1251, %f1254, %f1253;
mul.f32 %f1256, %f1255, 0f3FB8AA3B;
add.f32 %f1257, %f1251, 0f4B40007F;
mov.b32 %r383, %f1257;
shl.b32 %r384, %r383, 23;
mov.b32 %f1258, %r384;
ex2.approx.ftz.f32 %f1259, %f1256;
mul.f32 %f324, %f1259, %f1258;
setp.eq.f32 %p143, %f324, 0f7F800000;
mov.f32 %f1700, 0f7F800000;
@%p143 bra $L__BB0_117;
fma.rn.f32 %f1700, %f324, %f323, %f324;
$L__BB0_117:
setp.lt.f32 %p144, %f318, 0f00000000;
setp.eq.f32 %p145, %f321, 0f3F800000;
and.pred %p7, %p144, %p145;
setp.eq.f32 %p146, %f318, 0f00000000;
@%p146 bra $L__BB0_121;
bra.uni $L__BB0_118;
$L__BB0_121:
add.f32 %f1264, %f318, %f318;
selp.f32 %f1702, %f1264, 0f00000000, %p145;
bra.uni $L__BB0_122;
$L__BB0_118:
mov.b32 %r385, %f1700;
xor.b32 %r386, %r385, -2147483648;
mov.b32 %f1260, %r386;
selp.f32 %f1702, %f1260, %f1700, %p7;
setp.geu.f32 %p147, %f318, 0f00000000;
@%p147 bra $L__BB0_122;
mov.f32 %f1261, 0f3ED55555;
cvt.rzi.f32.f32 %f1262, %f1261;
setp.eq.f32 %p148, %f1262, 0f3ED55555;
@%p148 bra $L__BB0_122;
mov.f32 %f1702, 0f7FFFFFFF;
$L__BB0_122:
add.f32 %f1265, %f322, 0f3ED55555;
mov.b32 %r387, %f1265;
setp.lt.s32 %p150, %r387, 2139095040;
@%p150 bra $L__BB0_127;
setp.gtu.f32 %p151, %f322, 0f7F800000;
@%p151 bra $L__BB0_126;
bra.uni $L__BB0_124;
$L__BB0_126:
add.f32 %f1702, %f318, 0f3ED55555;
bra.uni $L__BB0_127;
$L__BB0_124:
setp.neu.f32 %p152, %f322, 0f7F800000;
@%p152 bra $L__BB0_127;
selp.f32 %f1702, 0fFF800000, 0f7F800000, %p7;
$L__BB0_127:
abs.f32 %f333, %f319;
setp.lt.f32 %p153, %f333, 0f00800000;
mul.f32 %f1267, %f333, 0f4B800000;
selp.f32 %f1268, %f1267, %f333, %p153;
selp.f32 %f1269, 0fC3170000, 0fC2FE0000, %p153;
mov.b32 %r388, %f1268;
and.b32 %r389, %r388, 8388607;
or.b32 %r390, %r389, 1065353216;
mov.b32 %f1270, %r390;
shr.u32 %r391, %r388, 23;
cvt.rn.f32.u32 %f1271, %r391;
add.f32 %f1272, %f1269, %f1271;
setp.gt.f32 %p154, %f1270, 0f3FB504F3;
mul.f32 %f1273, %f1270, 0f3F000000;
add.f32 %f1274, %f1272, 0f3F800000;
selp.f32 %f1275, %f1274, %f1272, %p154;
selp.f32 %f1276, %f1273, %f1270, %p154;
add.f32 %f1277, %f1276, 0fBF800000;
add.f32 %f1278, %f1276, 0f3F800000;
rcp.approx.ftz.f32 %f1279, %f1278;
add.f32 %f1280, %f1277, %f1277;
mul.f32 %f1281, %f1280, %f1279;
mul.f32 %f1282, %f1281, %f1281;
mov.f32 %f1283, 0f3C4CAF63;
mov.f32 %f1284, 0f3B18F0FE;
fma.rn.f32 %f1285, %f1284, %f1282, %f1283;
mov.f32 %f1286, 0f3DAAAABD;
fma.rn.f32 %f1287, %f1285, %f1282, %f1286;
mul.rn.f32 %f1288, %f1287, %f1282;
mul.rn.f32 %f1289, %f1288, %f1281;
sub.f32 %f1290, %f1277, %f1281;
add.f32 %f1291, %f1290, %f1290;
neg.f32 %f1292, %f1281;
fma.rn.f32 %f1293, %f1292, %f1277, %f1291;
mul.rn.f32 %f1294, %f1279, %f1293;
add.f32 %f1295, %f1289, %f1281;
sub.f32 %f1296, %f1281, %f1295;
add.f32 %f1297, %f1289, %f1296;
add.f32 %f1298, %f1294, %f1297;
add.f32 %f1299, %f1295, %f1298;
sub.f32 %f1300, %f1295, %f1299;
add.f32 %f1301, %f1298, %f1300;
mov.f32 %f1302, 0f3F317200;
mul.rn.f32 %f1303, %f1275, %f1302;
mov.f32 %f1304, 0f35BFBE8E;
mul.rn.f32 %f1305, %f1275, %f1304;
add.f32 %f1306, %f1303, %f1299;
sub.f32 %f1307, %f1303, %f1306;
add.f32 %f1308, %f1299, %f1307;
add.f32 %f1309, %f1301, %f1308;
add.f32 %f1310, %f1305, %f1309;
add.f32 %f1311, %f1306, %f1310;
sub.f32 %f1312, %f1306, %f1311;
add.f32 %f1313, %f1310, %f1312;
mov.f32 %f1314, 0f3ED55555;
mul.rn.f32 %f1315, %f1314, %f1311;
neg.f32 %f1316, %f1315;
fma.rn.f32 %f1317, %f1314, %f1311, %f1316;
fma.rn.f32 %f1318, %f1314, %f1313, %f1317;
mov.f32 %f1319, 0f00000000;
fma.rn.f32 %f1320, %f1319, %f1311, %f1318;
add.rn.f32 %f1321, %f1315, %f1320;
neg.f32 %f1322, %f1321;
add.rn.f32 %f1323, %f1315, %f1322;
add.rn.f32 %f1324, %f1323, %f1320;
mov.b32 %r392, %f1321;
setp.eq.s32 %p155, %r392, 1118925336;
add.s32 %r393, %r392, -1;
mov.b32 %f1325, %r393;
add.f32 %f1326, %f1324, 0f37000000;
selp.f32 %f334, %f1326, %f1324, %p155;
selp.f32 %f1327, %f1325, %f1321, %p155;
mov.f32 %f1328, 0f3FB8AA3B;
mul.rn.f32 %f1329, %f1327, %f1328;
cvt.rzi.f32.f32 %f1330, %f1329;
abs.f32 %f1331, %f1330;
setp.gt.f32 %p156, %f1331, 0f42FC0000;
mov.b32 %r394, %f1330;
and.b32 %r395, %r394, -2147483648;
or.b32 %r396, %r395, 1123811328;
mov.b32 %f1332, %r396;
selp.f32 %f1333, %f1332, %f1330, %p156;
mov.f32 %f1334, 0fBF317218;
fma.rn.f32 %f1335, %f1333, %f1334, %f1327;
mov.f32 %f1336, 0f3102E308;
fma.rn.f32 %f1337, %f1333, %f1336, %f1335;
mul.f32 %f1338, %f1337, 0f3FB8AA3B;
add.f32 %f1339, %f1333, 0f4B40007F;
mov.b32 %r397, %f1339;
shl.b32 %r398, %r397, 23;
mov.b32 %f1340, %r398;
ex2.approx.ftz.f32 %f1341, %f1338;
mul.f32 %f335, %f1341, %f1340;
setp.eq.f32 %p157, %f335, 0f7F800000;
mov.f32 %f1703, 0f7F800000;
@%p157 bra $L__BB0_129;
fma.rn.f32 %f1703, %f335, %f334, %f335;
$L__BB0_129:
setp.lt.f32 %p158, %f319, 0f00000000;
and.pred %p8, %p158, %p145;
setp.eq.f32 %p160, %f319, 0f00000000;
@%p160 bra $L__BB0_133;
bra.uni $L__BB0_130;
$L__BB0_133:
add.f32 %f1346, %f319, %f319;
selp.f32 %f1705, %f1346, 0f00000000, %p145;
bra.uni $L__BB0_134;
$L__BB0_130:
mov.b32 %r399, %f1703;
xor.b32 %r400, %r399, -2147483648;
mov.b32 %f1342, %r400;
selp.f32 %f1705, %f1342, %f1703, %p8;
setp.geu.f32 %p161, %f319, 0f00000000;
@%p161 bra $L__BB0_134;
mov.f32 %f1343, 0f3ED55555;
cvt.rzi.f32.f32 %f1344, %f1343;
setp.eq.f32 %p162, %f1344, 0f3ED55555;
@%p162 bra $L__BB0_134;
mov.f32 %f1705, 0f7FFFFFFF;
$L__BB0_134:
add.f32 %f1347, %f333, 0f3ED55555;
mov.b32 %r401, %f1347;
setp.lt.s32 %p164, %r401, 2139095040;
@%p164 bra $L__BB0_139;
setp.gtu.f32 %p165, %f333, 0f7F800000;
@%p165 bra $L__BB0_138;
bra.uni $L__BB0_136;
$L__BB0_138:
add.f32 %f1705, %f319, 0f3ED55555;
bra.uni $L__BB0_139;
$L__BB0_136:
setp.neu.f32 %p166, %f333, 0f7F800000;
@%p166 bra $L__BB0_139;
selp.f32 %f1705, 0fFF800000, 0f7F800000, %p8;
$L__BB0_139:
abs.f32 %f344, %f320;
setp.lt.f32 %p167, %f344, 0f00800000;
mul.f32 %f1349, %f344, 0f4B800000;
selp.f32 %f1350, %f1349, %f344, %p167;
selp.f32 %f1351, 0fC3170000, 0fC2FE0000, %p167;
mov.b32 %r402, %f1350;
and.b32 %r403, %r402, 8388607;
or.b32 %r404, %r403, 1065353216;
mov.b32 %f1352, %r404;
shr.u32 %r405, %r402, 23;
cvt.rn.f32.u32 %f1353, %r405;
add.f32 %f1354, %f1351, %f1353;
setp.gt.f32 %p168, %f1352, 0f3FB504F3;
mul.f32 %f1355, %f1352, 0f3F000000;
add.f32 %f1356, %f1354, 0f3F800000;
selp.f32 %f1357, %f1356, %f1354, %p168;
selp.f32 %f1358, %f1355, %f1352, %p168;
add.f32 %f1359, %f1358, 0fBF800000;
add.f32 %f1360, %f1358, 0f3F800000;
rcp.approx.ftz.f32 %f1361, %f1360;
add.f32 %f1362, %f1359, %f1359;
mul.f32 %f1363, %f1362, %f1361;
mul.f32 %f1364, %f1363, %f1363;
mov.f32 %f1365, 0f3C4CAF63;
mov.f32 %f1366, 0f3B18F0FE;
fma.rn.f32 %f1367, %f1366, %f1364, %f1365;
mov.f32 %f1368, 0f3DAAAABD;
fma.rn.f32 %f1369, %f1367, %f1364, %f1368;
mul.rn.f32 %f1370, %f1369, %f1364;
mul.rn.f32 %f1371, %f1370, %f1363;
sub.f32 %f1372, %f1359, %f1363;
add.f32 %f1373, %f1372, %f1372;
neg.f32 %f1374, %f1363;
fma.rn.f32 %f1375, %f1374, %f1359, %f1373;
mul.rn.f32 %f1376, %f1361, %f1375;
add.f32 %f1377, %f1371, %f1363;
sub.f32 %f1378, %f1363, %f1377;
add.f32 %f1379, %f1371, %f1378;
add.f32 %f1380, %f1376, %f1379;
add.f32 %f1381, %f1377, %f1380;
sub.f32 %f1382, %f1377, %f1381;
add.f32 %f1383, %f1380, %f1382;
mov.f32 %f1384, 0f3F317200;
mul.rn.f32 %f1385, %f1357, %f1384;
mov.f32 %f1386, 0f35BFBE8E;
mul.rn.f32 %f1387, %f1357, %f1386;
add.f32 %f1388, %f1385, %f1381;
sub.f32 %f1389, %f1385, %f1388;
add.f32 %f1390, %f1381, %f1389;
add.f32 %f1391, %f1383, %f1390;
add.f32 %f1392, %f1387, %f1391;
add.f32 %f1393, %f1388, %f1392;
sub.f32 %f1394, %f1388, %f1393;
add.f32 %f1395, %f1392, %f1394;
mov.f32 %f1396, 0f3ED55555;
mul.rn.f32 %f1397, %f1396, %f1393;
neg.f32 %f1398, %f1397;
fma.rn.f32 %f1399, %f1396, %f1393, %f1398;
fma.rn.f32 %f1400, %f1396, %f1395, %f1399;
mov.f32 %f1401, 0f00000000;
fma.rn.f32 %f1402, %f1401, %f1393, %f1400;
add.rn.f32 %f1403, %f1397, %f1402;
neg.f32 %f1404, %f1403;
add.rn.f32 %f1405, %f1397, %f1404;
add.rn.f32 %f1406, %f1405, %f1402;
mov.b32 %r406, %f1403;
setp.eq.s32 %p169, %r406, 1118925336;
add.s32 %r407, %r406, -1;
mov.b32 %f1407, %r407;
add.f32 %f1408, %f1406, 0f37000000;
selp.f32 %f345, %f1408, %f1406, %p169;
selp.f32 %f1409, %f1407, %f1403, %p169;
mov.f32 %f1410, 0f3FB8AA3B;
mul.rn.f32 %f1411, %f1409, %f1410;
cvt.rzi.f32.f32 %f1412, %f1411;
abs.f32 %f1413, %f1412;
setp.gt.f32 %p170, %f1413, 0f42FC0000;
mov.b32 %r408, %f1412;
and.b32 %r409, %r408, -2147483648;
or.b32 %r410, %r409, 1123811328;
mov.b32 %f1414, %r410;
selp.f32 %f1415, %f1414, %f1412, %p170;
mov.f32 %f1416, 0fBF317218;
fma.rn.f32 %f1417, %f1415, %f1416, %f1409;
mov.f32 %f1418, 0f3102E308;
fma.rn.f32 %f1419, %f1415, %f1418, %f1417;
mul.f32 %f1420, %f1419, 0f3FB8AA3B;
add.f32 %f1421, %f1415, 0f4B40007F;
mov.b32 %r411, %f1421;
shl.b32 %r412, %r411, 23;
mov.b32 %f1422, %r412;
ex2.approx.ftz.f32 %f1423, %f1420;
mul.f32 %f346, %f1423, %f1422;
setp.eq.f32 %p171, %f346, 0f7F800000;
mov.f32 %f1706, 0f7F800000;
@%p171 bra $L__BB0_141;
fma.rn.f32 %f1706, %f346, %f345, %f346;
$L__BB0_141:
setp.lt.f32 %p172, %f320, 0f00000000;
and.pred %p9, %p172, %p145;
setp.eq.f32 %p174, %f320, 0f00000000;
@%p174 bra $L__BB0_145;
bra.uni $L__BB0_142;
$L__BB0_145:
add.f32 %f1428, %f320, %f320;
selp.f32 %f1708, %f1428, 0f00000000, %p145;
bra.uni $L__BB0_146;
$L__BB0_142:
mov.b32 %r413, %f1706;
xor.b32 %r414, %r413, -2147483648;
mov.b32 %f1424, %r414;
selp.f32 %f1708, %f1424, %f1706, %p9;
setp.geu.f32 %p175, %f320, 0f00000000;
@%p175 bra $L__BB0_146;
mov.f32 %f1425, 0f3ED55555;
cvt.rzi.f32.f32 %f1426, %f1425;
setp.eq.f32 %p176, %f1426, 0f3ED55555;
@%p176 bra $L__BB0_146;
mov.f32 %f1708, 0f7FFFFFFF;
$L__BB0_146:
add.f32 %f1429, %f344, 0f3ED55555;
mov.b32 %r415, %f1429;
setp.lt.s32 %p178, %r415, 2139095040;
@%p178 bra $L__BB0_151;
setp.gtu.f32 %p179, %f344, 0f7F800000;
@%p179 bra $L__BB0_150;
bra.uni $L__BB0_148;
$L__BB0_150:
add.f32 %f1708, %f320, 0f3ED55555;
bra.uni $L__BB0_151;
$L__BB0_148:
setp.neu.f32 %p180, %f344, 0f7F800000;
@%p180 bra $L__BB0_151;
selp.f32 %f1708, 0fFF800000, 0f7F800000, %p9;
$L__BB0_151:
fma.rn.f32 %f1430, %f1702, 0f3F870A3D, 0fBD6147AE;
setp.eq.f32 %p181, %f318, 0f3F800000;
mov.f32 %f1431, 0f3F800000;
selp.f32 %f1432, 0f3F7FFFFF, %f1430, %p181;
mul.f32 %f1433, %f318, 0f414EB852;
setp.lt.f32 %p182, %f318, 0f3B4D2E1C;
selp.f32 %f1434, %f1433, %f1432, %p182;
fma.rn.f32 %f1435, %f1705, 0f3F870A3D, 0fBD6147AE;
setp.eq.f32 %p183, %f319, 0f3F800000;
selp.f32 %f1436, 0f3F7FFFFF, %f1435, %p183;
mul.f32 %f1437, %f319, 0f414EB852;
setp.lt.f32 %p184, %f319, 0f3B4D2E1C;
selp.f32 %f1438, %f1437, %f1436, %p184;
fma.rn.f32 %f1439, %f1708, 0f3F870A3D, 0fBD6147AE;
setp.eq.f32 %p185, %f320, 0f3F800000;
selp.f32 %f1440, 0f3F7FFFFF, %f1439, %p185;
mul.f32 %f1441, %f320, 0f414EB852;
setp.lt.f32 %p186, %f320, 0f3B4D2E1C;
selp.f32 %f1442, %f1441, %f1440, %p186;
min.f32 %f1443, %f1434, %f1431;
mov.f32 %f1444, 0f00000000;
max.f32 %f1445, %f1444, %f1443;
mul.f32 %f1446, %f1445, 0f43800000;
cvt.rzi.u32.f32 %r416, %f1446;
min.u32 %r417, %r416, 255;
min.f32 %f1447, %f1438, %f1431;
max.f32 %f1448, %f1444, %f1447;
mul.f32 %f1449, %f1448, 0f43800000;
cvt.rzi.u32.f32 %r418, %f1449;
min.u32 %r419, %r418, 255;
min.f32 %f1450, %f1442, %f1431;
max.f32 %f1451, %f1444, %f1450;
mul.f32 %f1452, %f1451, 0f43800000;
cvt.rzi.u32.f32 %r420, %f1452;
min.u32 %r421, %r420, 255;
shl.b64 %rd82, %rd23, 2;
add.s64 %rd83, %rd22, %rd82;
cvt.u16.u32 %rs47, %r421;
cvt.u16.u32 %rs48, %r419;
cvt.u16.u32 %rs49, %r417;
mov.u16 %rs50, 255;
st.global.v4.u8 [%rd83], {%rs49, %rs48, %rs47, %rs50};
$L__BB0_152:
and.b32 %r422, %r56, 4;
setp.eq.s32 %p187, %r422, 0;
ld.const.u32 %r465, [params+108];
@%p187 bra $L__BB0_156;
setp.eq.s32 %p188, %r465, 0;
ld.const.u64 %rd84, [params+224];
cvta.to.global.u64 %rd85, %rd84;
ld.const.u32 %r423, [params+216];
mad.lo.s32 %r424, %r423, %r7, %r6;
mul.wide.u32 %rd86, %r424, 8;
add.s64 %rd24, %rd85, %rd86;
@%p188 bra $L__BB0_155;
ld.global.v4.u16 {%rs58, %rs59, %rs60, %rs61}, [%rd24];
// begin inline asm
{ cvt.f32.f16 %f1453, %rs58;}
// end inline asm
// begin inline asm
{ cvt.f32.f16 %f1454, %rs59;}
// end inline asm
// begin inline asm
{ cvt.f32.f16 %f1455, %rs60;}
// end inline asm
add.f32 %f1456, %f278, %f1453;
add.f32 %f1457, %f279, %f1454;
add.f32 %f1458, %f281, %f1455;
mov.f32 %f1459, 0f3F800000;
// begin inline asm
{ cvt.rn.f16.f32 %rs56, %f1458;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs55, %f1457;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs54, %f1456;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs57, %f1459;}
// end inline asm
st.global.v4.u16 [%rd24], {%rs54, %rs55, %rs56, %rs57};
bra.uni $L__BB0_156;
$L__BB0_155:
mov.f32 %f1463, 0f3F800000;
mov.u32 %r465, 0;
// begin inline asm
{ cvt.rn.f16.f32 %rs65, %f1463;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs64, %f281;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs63, %f279;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs62, %f278;}
// end inline asm
st.global.v4.u16 [%rd24], {%rs62, %rs63, %rs64, %rs65};
$L__BB0_156:
mul.f32 %f1464, %f1678, %f923;
mul.f32 %f1465, %f1681, %f923;
add.f32 %f1466, %f1465, %f1464;
mul.f32 %f1467, %f1679, %f924;
mul.f32 %f1468, %f1682, %f924;
add.f32 %f1469, %f1468, %f1467;
mul.f32 %f1470, %f1680, %f280;
mul.f32 %f1471, %f1683, %f280;
add.f32 %f1472, %f1471, %f1470;
mul.f32 %f1473, %f1675, %f923;
add.f32 %f1474, %f1466, %f1473;
mul.f32 %f1475, %f1676, %f924;
add.f32 %f1476, %f1469, %f1475;
mul.f32 %f1477, %f1677, %f280;
add.f32 %f1478, %f1472, %f1477;
mul.f32 %f1479, %f1474, 0f3F13CD3A;
mul.f32 %f1480, %f1476, 0f3F13CD3A;
mul.f32 %f1481, %f1478, 0f3F13CD3A;
div.rn.f32 %f1482, %f278, %f1479;
div.rn.f32 %f1483, %f279, %f1480;
div.rn.f32 %f1484, %f281, %f1481;
setp.eq.f32 %p189, %f278, 0f00000000;
selp.f32 %f1485, 0f00000000, %f1482, %p189;
setp.eq.f32 %p190, %f279, 0f00000000;
selp.f32 %f1486, 0f00000000, %f1483, %p190;
setp.eq.f32 %p191, %f281, 0f00000000;
selp.f32 %f1487, 0f00000000, %f1484, %p191;
mul.f32 %f355, %f1465, %f1485;
mul.f32 %f356, %f1468, %f1486;
mul.f32 %f357, %f1471, %f1487;
mul.f32 %f358, %f1464, %f1485;
mul.f32 %f359, %f1467, %f1486;
mul.f32 %f360, %f1470, %f1487;
mul.f32 %f361, %f1473, %f1485;
mul.f32 %f362, %f1475, %f1486;
mul.f32 %f363, %f1477, %f1487;
ld.const.u64 %rd87, [params+256];
cvta.to.global.u64 %rd88, %rd87;
ld.const.u32 %r426, [params+248];
mad.lo.s32 %r427, %r426, %r7, %r6;
mul.wide.u32 %rd89, %r427, 8;
add.s64 %rd25, %rd88, %rd89;
setp.eq.s32 %p192, %r465, 0;
@%p192 bra $L__BB0_158;
ld.global.v4.u16 {%rs73, %rs74, %rs75, %rs76}, [%rd25];
// begin inline asm
{ cvt.f32.f16 %f1488, %rs73;}
// end inline asm
// begin inline asm
{ cvt.f32.f16 %f1489, %rs74;}
// end inline asm
// begin inline asm
{ cvt.f32.f16 %f1490, %rs75;}
// end inline asm
add.f32 %f1491, %f355, %f1488;
add.f32 %f1492, %f356, %f1489;
add.f32 %f1493, %f357, %f1490;
mov.f32 %f1494, 0f3F800000;
// begin inline asm
{ cvt.rn.f16.f32 %rs71, %f1493;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs70, %f1492;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs69, %f1491;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs72, %f1494;}
// end inline asm
st.global.v4.u16 [%rd25], {%rs69, %rs70, %rs71, %rs72};
bra.uni $L__BB0_159;
$L__BB0_158:
mov.f32 %f1498, 0f3F800000;
// begin inline asm
{ cvt.rn.f16.f32 %rs80, %f1498;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs79, %f357;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs78, %f356;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs77, %f355;}
// end inline asm
st.global.v4.u16 [%rd25], {%rs77, %rs78, %rs79, %rs80};
$L__BB0_159:
ld.const.u64 %rd90, [params+272];
cvta.to.global.u64 %rd91, %rd90;
ld.const.u32 %r428, [params+264];
mad.lo.s32 %r429, %r428, %r7, %r6;
mul.wide.u32 %rd92, %r429, 8;
add.s64 %rd26, %rd91, %rd92;
@%p192 bra $L__BB0_161;
ld.global.v4.u16 {%rs88, %rs89, %rs90, %rs91}, [%rd26];
// begin inline asm
{ cvt.f32.f16 %f1499, %rs88;}
// end inline asm
// begin inline asm
{ cvt.f32.f16 %f1500, %rs89;}
// end inline asm
// begin inline asm
{ cvt.f32.f16 %f1501, %rs90;}
// end inline asm
add.f32 %f1502, %f358, %f1499;
add.f32 %f1503, %f359, %f1500;
add.f32 %f1504, %f360, %f1501;
mov.f32 %f1505, 0f3F800000;
// begin inline asm
{ cvt.rn.f16.f32 %rs86, %f1504;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs85, %f1503;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs84, %f1502;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs87, %f1505;}
// end inline asm
st.global.v4.u16 [%rd26], {%rs84, %rs85, %rs86, %rs87};
bra.uni $L__BB0_162;
$L__BB0_161:
mov.f32 %f1509, 0f3F800000;
// begin inline asm
{ cvt.rn.f16.f32 %rs95, %f1509;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs94, %f360;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs93, %f359;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs92, %f358;}
// end inline asm
st.global.v4.u16 [%rd26], {%rs92, %rs93, %rs94, %rs95};
$L__BB0_162:
ld.const.u64 %rd93, [params+288];
cvta.to.global.u64 %rd94, %rd93;
ld.const.u32 %r430, [params+280];
mad.lo.s32 %r431, %r430, %r7, %r6;
mul.wide.u32 %rd95, %r431, 8;
add.s64 %rd27, %rd94, %rd95;
@%p192 bra $L__BB0_164;
ld.global.v4.u16 {%rs103, %rs104, %rs105, %rs106}, [%rd27];
// begin inline asm
{ cvt.f32.f16 %f1510, %rs103;}
// end inline asm
// begin inline asm
{ cvt.f32.f16 %f1511, %rs104;}
// end inline asm
// begin inline asm
{ cvt.f32.f16 %f1512, %rs105;}
// end inline asm
add.f32 %f1513, %f361, %f1510;
add.f32 %f1514, %f362, %f1511;
add.f32 %f1515, %f363, %f1512;
mov.f32 %f1516, 0f3F800000;
// begin inline asm
{ cvt.rn.f16.f32 %rs101, %f1515;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs100, %f1514;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs99, %f1513;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs102, %f1516;}
// end inline asm
st.global.v4.u16 [%rd27], {%rs99, %rs100, %rs101, %rs102};
bra.uni $L__BB0_182;
$L__BB0_164:
mov.f32 %f1520, 0f3F800000;
// begin inline asm
{ cvt.rn.f16.f32 %rs110, %f1520;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs109, %f363;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs108, %f362;}
// end inline asm
// begin inline asm
{ cvt.rn.f16.f32 %rs107, %f361;}
// end inline asm
st.global.v4.u16 [%rd27], {%rs107, %rs108, %rs109, %rs110};
$L__BB0_182:
ret;
}
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