2799 lines
79 KiB
Plaintext
2799 lines
79 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-31968024
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// Cuda compilation tools, release 12.0, V12.0.76
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// Based on NVVM 7.0.1
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//
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.version 8.0
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.target sm_52
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.address_size 64
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// .globl __raygen__oxMain
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.const .align 16 .b8 params[1184];
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.global .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};
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.visible .entry __raygen__oxMain()
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{
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.local .align 4 .b8 __local_depot0[28];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<207>;
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.reg .b16 %rs<180>;
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.reg .f32 %f<1718>;
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.reg .b32 %r<500>;
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.reg .f64 %fd<5>;
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.reg .b64 %rd<123>;
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mov.u64 %SPL, __local_depot0;
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add.u64 %rd1, %SPL, 0;
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// begin inline asm
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call (%r94), _optix_get_launch_index_x, ();
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// end inline asm
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// begin inline asm
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call (%r95), _optix_get_launch_index_y, ();
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// end inline asm
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ld.const.u32 %r3, [params+616];
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abs.s32 %r4, %r3;
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ld.const.u32 %r5, [params+540];
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ld.const.u64 %rd33, [params+400];
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cvta.to.global.u64 %rd34, %rd33;
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ld.const.u32 %r100, [params+392];
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mad.lo.s32 %r101, %r100, %r95, %r94;
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mul.wide.u32 %rd35, %r101, 4;
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add.s64 %rd2, %rd34, %rd35;
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ld.global.v2.u8 {%rs16, %rs175}, [%rd2];
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or.b16 %rs18, %rs16, %rs175;
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and.b16 %rs19, %rs18, 255;
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setp.eq.s16 %p10, %rs19, 0;
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@%p10 bra $L__BB0_2;
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ld.global.u8 %rs174, [%rd2+2];
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bra.uni $L__BB0_3;
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$L__BB0_2:
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ld.global.u8 %rs174, [%rd2+2];
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setp.eq.s16 %p11, %rs174, 0;
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mov.f32 %f1569, 0f00000000;
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mov.u16 %rs175, 0;
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mov.f32 %f1570, %f1569;
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mov.f32 %f1571, %f1569;
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@%p11 bra $L__BB0_4;
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$L__BB0_3:
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cvt.rn.f32.u16 %f381, %rs16;
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div.rn.f32 %f382, %f381, 0f437F0000;
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fma.rn.f32 %f383, %f382, 0f40000000, 0fBF800000;
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and.b16 %rs22, %rs175, 255;
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cvt.rn.f32.u16 %f384, %rs22;
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div.rn.f32 %f385, %f384, 0f437F0000;
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fma.rn.f32 %f386, %f385, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f387, %rs174;
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div.rn.f32 %f388, %f387, 0f437F0000;
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fma.rn.f32 %f389, %f388, 0f40000000, 0fBF800000;
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mul.f32 %f390, %f386, %f386;
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fma.rn.f32 %f391, %f383, %f383, %f390;
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fma.rn.f32 %f392, %f389, %f389, %f391;
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sqrt.rn.f32 %f393, %f392;
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rcp.rn.f32 %f394, %f393;
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mul.f32 %f1571, %f394, %f389;
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mul.f32 %f1570, %f394, %f386;
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mul.f32 %f1569, %f383, %f394;
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$L__BB0_4:
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ld.const.v2.u32 {%r102, %r103}, [params];
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add.s32 %r6, %r102, %r94;
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add.s32 %r7, %r103, %r95;
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setp.eq.f32 %p12, %f1569, 0f00000000;
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setp.eq.f32 %p13, %f1570, 0f00000000;
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and.pred %p14, %p12, %p13;
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setp.eq.f32 %p15, %f1571, 0f00000000;
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and.pred %p16, %p15, %p14;
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@%p16 bra $L__BB0_167;
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bra.uni $L__BB0_5;
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$L__BB0_167:
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ld.const.u32 %r91, [params+104];
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and.b32 %r464, %r91, 1;
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setp.eq.b32 %p196, %r464, 1;
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mov.pred %p197, 0;
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xor.pred %p198, %p196, %p197;
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not.pred %p199, %p198;
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@%p199 bra $L__BB0_169;
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ld.const.u64 %rd96, [params+144];
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cvta.to.global.u64 %rd97, %rd96;
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ld.const.u32 %r465, [params+136];
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mad.lo.s32 %r466, %r465, %r7, %r6;
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mul.wide.u32 %rd98, %r466, 4;
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add.s64 %rd99, %rd97, %rd98;
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mov.u16 %rs111, 0;
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st.global.v4.u8 [%rd99], {%rs111, %rs111, %rs111, %rs111};
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$L__BB0_169:
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and.b32 %r467, %r91, 8;
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setp.eq.s32 %p200, %r467, 0;
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@%p200 bra $L__BB0_171;
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ld.const.u64 %rd100, [params+192];
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cvta.to.global.u64 %rd101, %rd100;
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ld.const.u32 %r468, [params+184];
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mad.lo.s32 %r469, %r468, %r7, %r6;
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mov.f32 %f1524, 0f00000000;
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cvt.rzi.u32.f32 %r470, %f1524;
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mul.wide.u32 %rd102, %r469, 2;
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add.s64 %rd103, %rd101, %rd102;
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mov.u16 %rs112, 0;
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cvt.u16.u32 %rs113, %r470;
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st.global.v2.u8 [%rd103], {%rs113, %rs112};
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$L__BB0_171:
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and.b32 %r471, %r91, 4;
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setp.eq.s32 %p201, %r471, 0;
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ld.const.u32 %r499, [params+108];
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@%p201 bra $L__BB0_175;
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setp.eq.s32 %p202, %r499, 0;
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ld.const.u64 %rd104, [params+224];
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cvta.to.global.u64 %rd105, %rd104;
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ld.const.u32 %r472, [params+216];
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mad.lo.s32 %r473, %r472, %r7, %r6;
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mul.wide.u32 %rd106, %r473, 8;
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add.s64 %rd28, %rd105, %rd106;
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@%p202 bra $L__BB0_174;
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ld.global.v4.u16 {%rs120, %rs121, %rs122, %rs123}, [%rd28];
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// begin inline asm
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{ cvt.f32.f16 %f1525, %rs120;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f1526, %rs121;}
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// end inline asm
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// begin inline asm
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{ cvt.f32.f16 %f1527, %rs122;}
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// end inline asm
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add.f32 %f1528, %f1525, 0f00000000;
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add.f32 %f1529, %f1526, 0f00000000;
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add.f32 %f1530, %f1527, 0f00000000;
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// begin inline asm
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{ cvt.rn.f16.f32 %rs119, %f1530;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs118, %f1529;}
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// end inline asm
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// begin inline asm
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{ cvt.rn.f16.f32 %rs117, %f1528;}
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// end inline asm
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mov.u16 %rs124, 0;
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st.global.v4.u16 [%rd28], {%rs117, %rs118, %rs119, %rs124};
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bra.uni $L__BB0_175;
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$L__BB0_5:
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ld.const.u64 %rd36, [params+432];
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cvta.to.global.u64 %rd37, %rd36;
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ld.const.u32 %r106, [params+424];
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mad.lo.s32 %r107, %r106, %r95, %r94;
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mul.wide.u32 %rd38, %r107, 12;
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add.s64 %rd39, %rd37, %rd38;
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ld.global.f32 %f10, [%rd39];
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mul.f32 %f395, %f10, 0f3456BF95;
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ld.global.f32 %f11, [%rd39+4];
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mul.f32 %f396, %f11, 0f3456BF95;
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ld.global.f32 %f12, [%rd39+8];
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mul.f32 %f397, %f12, 0f3456BF95;
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abs.f32 %f13, %f1569;
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div.rn.f32 %f398, %f395, %f13;
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abs.f32 %f399, %f1570;
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div.rn.f32 %f400, %f396, %f399;
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abs.f32 %f14, %f1571;
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div.rn.f32 %f401, %f397, %f14;
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abs.f32 %f402, %f398;
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abs.f32 %f403, %f400;
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abs.f32 %f404, %f401;
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mov.f32 %f405, 0f38D1B717;
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max.f32 %f406, %f402, %f405;
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max.f32 %f407, %f403, %f405;
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max.f32 %f408, %f404, %f405;
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fma.rn.f32 %f15, %f1569, %f406, %f10;
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fma.rn.f32 %f16, %f1570, %f407, %f11;
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fma.rn.f32 %f17, %f1571, %f408, %f12;
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ld.const.u64 %rd40, [params+464];
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cvta.to.global.u64 %rd41, %rd40;
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ld.const.u32 %r108, [params+456];
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mad.lo.s32 %r109, %r108, %r95, %r94;
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mul.wide.u32 %rd42, %r109, 4;
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add.s64 %rd3, %rd41, %rd42;
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ld.global.v2.u8 {%rs24, %rs178}, [%rd3];
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or.b16 %rs26, %rs24, %rs178;
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and.b16 %rs27, %rs26, 255;
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setp.eq.s16 %p17, %rs27, 0;
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@%p17 bra $L__BB0_7;
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ld.global.u8 %rs176, [%rd3+2];
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bra.uni $L__BB0_8;
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$L__BB0_7:
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ld.global.u8 %rs176, [%rd3+2];
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setp.eq.s16 %p18, %rs176, 0;
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mov.f32 %f1572, 0f00000000;
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mov.u16 %rs178, 0;
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mov.u16 %rs179, %rs178;
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mov.f32 %f1573, %f1572;
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mov.f32 %f1574, %f1572;
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@%p18 bra $L__BB0_9;
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$L__BB0_8:
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mov.u16 %rs179, %rs178;
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cvt.rn.f32.u16 %f412, %rs24;
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div.rn.f32 %f413, %f412, 0f437F0000;
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fma.rn.f32 %f414, %f413, 0f40000000, 0fBF800000;
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and.b16 %rs32, %rs179, 255;
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cvt.rn.f32.u16 %f415, %rs32;
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div.rn.f32 %f416, %f415, 0f437F0000;
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fma.rn.f32 %f417, %f416, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f418, %rs176;
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div.rn.f32 %f419, %f418, 0f437F0000;
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fma.rn.f32 %f420, %f419, 0f40000000, 0fBF800000;
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mul.f32 %f421, %f417, %f417;
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fma.rn.f32 %f422, %f414, %f414, %f421;
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fma.rn.f32 %f423, %f420, %f420, %f422;
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sqrt.rn.f32 %f424, %f423;
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rcp.rn.f32 %f425, %f424;
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mul.f32 %f1574, %f425, %f420;
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mul.f32 %f1573, %f425, %f417;
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mul.f32 %f1572, %f414, %f425;
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mov.u16 %rs178, %rs176;
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$L__BB0_9:
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mul.f32 %f429, %f1570, %f1574;
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mul.f32 %f430, %f1571, %f1573;
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sub.f32 %f431, %f429, %f430;
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mul.f32 %f432, %f1571, %f1572;
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mul.f32 %f433, %f1569, %f1574;
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sub.f32 %f434, %f432, %f433;
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mul.f32 %f435, %f1569, %f1573;
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mul.f32 %f436, %f1570, %f1572;
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sub.f32 %f437, %f435, %f436;
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ld.global.u8 %rs34, [%rd3+3];
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setp.eq.s16 %p19, %rs34, 0;
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selp.f32 %f24, 0fBF800000, 0f3F800000, %p19;
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mul.f32 %f438, %f431, %f24;
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mul.f32 %f439, %f434, %f24;
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mul.f32 %f440, %f437, %f24;
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mul.f32 %f441, %f438, 0f00000000;
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mul.f32 %f442, %f439, 0f00000000;
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mul.f32 %f443, %f440, 0f00000000;
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fma.rn.f32 %f444, %f1572, 0f3F5105EC, %f441;
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fma.rn.f32 %f445, %f1573, 0f3F5105EC, %f442;
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fma.rn.f32 %f446, %f1574, 0f3F5105EC, %f443;
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mul.f32 %f25, %f1569, 0f3F13CD3A;
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add.f32 %f26, %f25, %f444;
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mul.f32 %f27, %f1570, 0f3F13CD3A;
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add.f32 %f28, %f27, %f445;
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mul.f32 %f29, %f1571, 0f3F13CD3A;
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add.f32 %f30, %f29, %f446;
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or.b16 %rs35, %rs24, %rs179;
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or.b16 %rs15, %rs35, %rs178;
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and.b16 %rs36, %rs15, 255;
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setp.eq.s16 %p20, %rs36, 0;
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mov.f32 %f1578, 0f00000000;
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mov.f32 %f1575, %f1578;
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mov.f32 %f1576, %f1578;
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mov.f32 %f1577, %f1578;
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@%p20 bra $L__BB0_11;
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cvt.rn.f32.u16 %f447, %rs24;
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div.rn.f32 %f448, %f447, 0f437F0000;
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fma.rn.f32 %f449, %f448, 0f40000000, 0fBF800000;
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and.b16 %rs38, %rs179, 255;
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cvt.rn.f32.u16 %f450, %rs38;
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div.rn.f32 %f451, %f450, 0f437F0000;
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fma.rn.f32 %f452, %f451, 0f40000000, 0fBF800000;
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and.b16 %rs39, %rs178, 255;
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cvt.rn.f32.u16 %f453, %rs39;
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div.rn.f32 %f454, %f453, 0f437F0000;
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fma.rn.f32 %f455, %f454, 0f40000000, 0fBF800000;
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mul.f32 %f456, %f452, %f452;
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fma.rn.f32 %f457, %f449, %f449, %f456;
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fma.rn.f32 %f458, %f455, %f455, %f457;
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sqrt.rn.f32 %f459, %f458;
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rcp.rn.f32 %f460, %f459;
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mul.f32 %f1577, %f460, %f455;
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mul.f32 %f1576, %f460, %f452;
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mul.f32 %f1575, %f449, %f460;
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$L__BB0_11:
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mul.f32 %f464, %f1570, %f1577;
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mul.f32 %f465, %f1571, %f1576;
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sub.f32 %f466, %f464, %f465;
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mul.f32 %f467, %f1571, %f1575;
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mul.f32 %f468, %f1569, %f1577;
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sub.f32 %f469, %f467, %f468;
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mul.f32 %f470, %f1569, %f1576;
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mul.f32 %f471, %f1570, %f1575;
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sub.f32 %f472, %f470, %f471;
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mul.f32 %f473, %f466, %f24;
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mul.f32 %f474, %f469, %f24;
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mul.f32 %f475, %f472, %f24;
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mul.f32 %f476, %f1575, 0f3ED105EC;
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mul.f32 %f477, %f1576, 0f3ED105EC;
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mul.f32 %f478, %f1577, 0f3ED105EC;
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mul.f32 %f479, %f473, 0f3F3504F3;
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mul.f32 %f480, %f474, 0f3F3504F3;
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mul.f32 %f481, %f475, 0f3F3504F3;
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sub.f32 %f482, %f479, %f476;
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sub.f32 %f483, %f480, %f477;
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sub.f32 %f484, %f481, %f478;
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add.f32 %f37, %f25, %f482;
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add.f32 %f38, %f27, %f483;
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add.f32 %f39, %f29, %f484;
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mov.f32 %f1579, %f1578;
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mov.f32 %f1580, %f1578;
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@%p20 bra $L__BB0_13;
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cvt.rn.f32.u16 %f485, %rs24;
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div.rn.f32 %f486, %f485, 0f437F0000;
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fma.rn.f32 %f487, %f486, 0f40000000, 0fBF800000;
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and.b16 %rs42, %rs179, 255;
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cvt.rn.f32.u16 %f488, %rs42;
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div.rn.f32 %f489, %f488, 0f437F0000;
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fma.rn.f32 %f490, %f489, 0f40000000, 0fBF800000;
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and.b16 %rs43, %rs178, 255;
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cvt.rn.f32.u16 %f491, %rs43;
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div.rn.f32 %f492, %f491, 0f437F0000;
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fma.rn.f32 %f493, %f492, 0f40000000, 0fBF800000;
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mul.f32 %f494, %f490, %f490;
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fma.rn.f32 %f495, %f487, %f487, %f494;
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fma.rn.f32 %f496, %f493, %f493, %f495;
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sqrt.rn.f32 %f497, %f496;
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rcp.rn.f32 %f498, %f497;
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mul.f32 %f1580, %f498, %f493;
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mul.f32 %f1579, %f498, %f490;
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mul.f32 %f1578, %f487, %f498;
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$L__BB0_13:
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mul.f32 %f512, %f1570, %f1580;
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mul.f32 %f513, %f1571, %f1579;
|
|
sub.f32 %f514, %f512, %f513;
|
|
mul.f32 %f515, %f1571, %f1578;
|
|
mul.f32 %f516, %f1569, %f1580;
|
|
sub.f32 %f517, %f515, %f516;
|
|
mul.f32 %f518, %f1569, %f1579;
|
|
mul.f32 %f519, %f1570, %f1578;
|
|
sub.f32 %f520, %f518, %f519;
|
|
mul.f32 %f521, %f514, %f24;
|
|
mul.f32 %f522, %f517, %f24;
|
|
mul.f32 %f523, %f520, %f24;
|
|
mul.f32 %f524, %f1578, 0f3ED105EC;
|
|
mul.f32 %f525, %f1579, 0f3ED105EC;
|
|
mul.f32 %f526, %f1580, 0f3ED105EC;
|
|
mul.f32 %f527, %f521, 0fBF3504F3;
|
|
mul.f32 %f528, %f522, 0fBF3504F3;
|
|
mul.f32 %f529, %f523, 0fBF3504F3;
|
|
sub.f32 %f530, %f527, %f524;
|
|
sub.f32 %f531, %f528, %f525;
|
|
sub.f32 %f532, %f529, %f526;
|
|
add.f32 %f46, %f25, %f530;
|
|
add.f32 %f47, %f27, %f531;
|
|
add.f32 %f48, %f29, %f532;
|
|
ld.const.u64 %rd43, [params+128];
|
|
cvta.to.global.u64 %rd44, %rd43;
|
|
ld.const.u32 %r111, [params+120];
|
|
mad.lo.s32 %r112, %r111, %r95, %r94;
|
|
mul.wide.u32 %rd45, %r112, 4;
|
|
add.s64 %rd46, %rd44, %rd45;
|
|
ld.global.u32 %r490, [%rd46];
|
|
setp.lt.s32 %p23, %r4, 1;
|
|
mov.pred %p22, 0;
|
|
mov.u32 %r486, 0;
|
|
mov.f32 %f1597, 0f00000000;
|
|
mov.f32 %f1598, %f1597;
|
|
mov.f32 %f1599, %f1597;
|
|
mov.f32 %f1600, %f1597;
|
|
mov.f32 %f1601, %f1597;
|
|
mov.f32 %f1602, %f1597;
|
|
mov.f32 %f1603, %f1597;
|
|
mov.f32 %f1604, %f1597;
|
|
mov.f32 %f1605, %f1597;
|
|
mov.f32 %f1606, %f1597;
|
|
mov.f32 %f1607, %f1597;
|
|
mov.f32 %f1608, %f1597;
|
|
mov.f32 %f1609, %f1597;
|
|
mov.pred %p206, %p22;
|
|
@%p23 bra $L__BB0_33;
|
|
|
|
ld.const.f32 %f49, [params+620];
|
|
ld.const.u64 %rd47, [params+624];
|
|
cvta.to.global.u64 %rd4, %rd47;
|
|
ld.const.u64 %rd48, [params+640];
|
|
cvta.to.global.u64 %rd49, %rd48;
|
|
ld.const.u32 %r115, [params+632];
|
|
and.b32 %r116, %r95, 255;
|
|
and.b32 %r117, %r94, 255;
|
|
mad.lo.s32 %r118, %r115, %r116, %r117;
|
|
mul.wide.u32 %rd50, %r118, 3;
|
|
add.s64 %rd5, %rd49, %rd50;
|
|
ld.const.f32 %f50, [params+660];
|
|
mul.f32 %f51, %f15, 0f3456BF95;
|
|
mul.f32 %f52, %f16, 0f3456BF95;
|
|
mul.f32 %f53, %f17, 0f3456BF95;
|
|
ld.const.u64 %rd6, [params+96];
|
|
abs.f32 %f673, %f52;
|
|
abs.f32 %f674, %f51;
|
|
max.f32 %f675, %f674, %f673;
|
|
abs.f32 %f676, %f53;
|
|
max.f32 %f677, %f675, %f676;
|
|
mov.u32 %r483, %r486;
|
|
|
|
$L__BB0_15:
|
|
shl.b32 %r119, %r483, 1;
|
|
mul.wide.s32 %rd51, %r119, 12;
|
|
add.s64 %rd7, %rd4, %rd51;
|
|
ld.global.f32 %f546, [%rd7];
|
|
sub.f32 %f547, %f546, %f10;
|
|
ld.global.f32 %f548, [%rd7+4];
|
|
sub.f32 %f549, %f548, %f11;
|
|
ld.global.f32 %f550, [%rd7+8];
|
|
sub.f32 %f551, %f550, %f12;
|
|
mul.f32 %f552, %f549, %f549;
|
|
fma.rn.f32 %f553, %f547, %f547, %f552;
|
|
fma.rn.f32 %f554, %f551, %f551, %f553;
|
|
sqrt.rn.f32 %f67, %f554;
|
|
rcp.rn.f32 %f555, %f67;
|
|
mul.f32 %f68, %f547, %f555;
|
|
mul.f32 %f69, %f549, %f555;
|
|
mul.f32 %f70, %f551, %f555;
|
|
mul.f32 %f556, %f1570, %f69;
|
|
fma.rn.f32 %f557, %f1569, %f68, %f556;
|
|
fma.rn.f32 %f71, %f1571, %f70, %f557;
|
|
setp.leu.f32 %p24, %f71, 0f00000000;
|
|
@%p24 bra $L__BB0_32;
|
|
|
|
setp.ne.s32 %p26, %r5, 0;
|
|
mul.f32 %f558, %f67, %f67;
|
|
div.rn.f32 %f72, %f49, %f558;
|
|
ld.global.u8 %rs44, [%rd5];
|
|
cvt.rn.f32.u16 %f559, %rs44;
|
|
div.rn.f32 %f560, %f559, 0fC37F0000;
|
|
fma.rn.f32 %f561, %f560, 0f3F333333, 0f3F800000;
|
|
setp.gt.f32 %p27, %f72, %f561;
|
|
and.pred %p28, %p26, %p27;
|
|
mov.pred %p206, -1;
|
|
@%p28 bra $L__BB0_33;
|
|
|
|
mul.f32 %f73, %f67, %f50;
|
|
mov.f32 %f566, 0f40800000;
|
|
abs.f32 %f75, %f73;
|
|
setp.lt.f32 %p29, %f75, 0f00800000;
|
|
mul.f32 %f568, %f75, 0f4B800000;
|
|
selp.f32 %f569, %f568, %f75, %p29;
|
|
selp.f32 %f570, 0fC3170000, 0fC2FE0000, %p29;
|
|
mov.b32 %r120, %f569;
|
|
and.b32 %r121, %r120, 8388607;
|
|
or.b32 %r122, %r121, 1065353216;
|
|
mov.b32 %f571, %r122;
|
|
shr.u32 %r123, %r120, 23;
|
|
cvt.rn.f32.u32 %f572, %r123;
|
|
add.f32 %f573, %f570, %f572;
|
|
setp.gt.f32 %p30, %f571, 0f3FB504F3;
|
|
mul.f32 %f574, %f571, 0f3F000000;
|
|
add.f32 %f575, %f573, 0f3F800000;
|
|
selp.f32 %f576, %f575, %f573, %p30;
|
|
selp.f32 %f577, %f574, %f571, %p30;
|
|
add.f32 %f578, %f577, 0fBF800000;
|
|
add.f32 %f579, %f577, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f580, %f579;
|
|
add.f32 %f581, %f578, %f578;
|
|
mul.f32 %f582, %f581, %f580;
|
|
mul.f32 %f583, %f582, %f582;
|
|
mov.f32 %f584, 0f3C4CAF63;
|
|
mov.f32 %f585, 0f3B18F0FE;
|
|
fma.rn.f32 %f586, %f585, %f583, %f584;
|
|
mov.f32 %f587, 0f3DAAAABD;
|
|
fma.rn.f32 %f588, %f586, %f583, %f587;
|
|
mul.rn.f32 %f589, %f588, %f583;
|
|
mul.rn.f32 %f590, %f589, %f582;
|
|
sub.f32 %f591, %f578, %f582;
|
|
add.f32 %f592, %f591, %f591;
|
|
neg.f32 %f593, %f582;
|
|
fma.rn.f32 %f594, %f593, %f578, %f592;
|
|
mul.rn.f32 %f595, %f580, %f594;
|
|
add.f32 %f596, %f590, %f582;
|
|
sub.f32 %f597, %f582, %f596;
|
|
add.f32 %f598, %f590, %f597;
|
|
add.f32 %f599, %f595, %f598;
|
|
add.f32 %f600, %f596, %f599;
|
|
sub.f32 %f601, %f596, %f600;
|
|
add.f32 %f602, %f599, %f601;
|
|
mov.f32 %f603, 0f3F317200;
|
|
mul.rn.f32 %f604, %f576, %f603;
|
|
mov.f32 %f605, 0f35BFBE8E;
|
|
mul.rn.f32 %f606, %f576, %f605;
|
|
add.f32 %f607, %f604, %f600;
|
|
sub.f32 %f608, %f604, %f607;
|
|
add.f32 %f609, %f600, %f608;
|
|
add.f32 %f610, %f602, %f609;
|
|
add.f32 %f611, %f606, %f610;
|
|
add.f32 %f612, %f607, %f611;
|
|
sub.f32 %f613, %f607, %f612;
|
|
add.f32 %f614, %f611, %f613;
|
|
mul.rn.f32 %f615, %f566, %f612;
|
|
neg.f32 %f616, %f615;
|
|
fma.rn.f32 %f617, %f566, %f612, %f616;
|
|
fma.rn.f32 %f618, %f566, %f614, %f617;
|
|
mov.f32 %f619, 0f00000000;
|
|
fma.rn.f32 %f620, %f619, %f612, %f618;
|
|
add.rn.f32 %f621, %f615, %f620;
|
|
neg.f32 %f622, %f621;
|
|
add.rn.f32 %f623, %f615, %f622;
|
|
add.rn.f32 %f624, %f623, %f620;
|
|
mov.b32 %r124, %f621;
|
|
setp.eq.s32 %p31, %r124, 1118925336;
|
|
add.s32 %r125, %r124, -1;
|
|
mov.b32 %f625, %r125;
|
|
add.f32 %f626, %f624, 0f37000000;
|
|
selp.f32 %f76, %f626, %f624, %p31;
|
|
selp.f32 %f627, %f625, %f621, %p31;
|
|
mov.f32 %f628, 0f3FB8AA3B;
|
|
mul.rn.f32 %f629, %f627, %f628;
|
|
cvt.rzi.f32.f32 %f630, %f629;
|
|
abs.f32 %f631, %f630;
|
|
setp.gt.f32 %p32, %f631, 0f42FC0000;
|
|
mov.b32 %r126, %f630;
|
|
and.b32 %r127, %r126, -2147483648;
|
|
or.b32 %r128, %r127, 1123811328;
|
|
mov.b32 %f632, %r128;
|
|
selp.f32 %f633, %f632, %f630, %p32;
|
|
mov.f32 %f634, 0fBF317218;
|
|
fma.rn.f32 %f635, %f633, %f634, %f627;
|
|
mov.f32 %f636, 0f3102E308;
|
|
fma.rn.f32 %f637, %f633, %f636, %f635;
|
|
mul.f32 %f638, %f637, 0f3FB8AA3B;
|
|
add.f32 %f639, %f633, 0f4B40007F;
|
|
mov.b32 %r129, %f639;
|
|
shl.b32 %r130, %r129, 23;
|
|
mov.b32 %f640, %r130;
|
|
ex2.approx.ftz.f32 %f641, %f638;
|
|
mul.f32 %f77, %f641, %f640;
|
|
setp.eq.f32 %p33, %f77, 0f7F800000;
|
|
mov.f32 %f1594, 0f7F800000;
|
|
@%p33 bra $L__BB0_19;
|
|
|
|
fma.rn.f32 %f1594, %f77, %f76, %f77;
|
|
|
|
$L__BB0_19:
|
|
mov.f32 %f1566, 0f40000000;
|
|
cvt.rzi.f32.f32 %f1565, %f1566;
|
|
add.f32 %f1564, %f1565, %f1565;
|
|
mov.f32 %f1563, 0f40800000;
|
|
sub.f32 %f1562, %f1563, %f1564;
|
|
abs.f32 %f1561, %f1562;
|
|
setp.lt.f32 %p34, %f73, 0f00000000;
|
|
setp.eq.f32 %p35, %f1561, 0f3F800000;
|
|
and.pred %p1, %p34, %p35;
|
|
setp.eq.f32 %p36, %f73, 0f00000000;
|
|
@%p36 bra $L__BB0_23;
|
|
bra.uni $L__BB0_20;
|
|
|
|
$L__BB0_23:
|
|
add.f32 %f646, %f73, %f73;
|
|
selp.f32 %f1596, %f646, 0f00000000, %p35;
|
|
bra.uni $L__BB0_24;
|
|
|
|
$L__BB0_20:
|
|
mov.b32 %r131, %f1594;
|
|
xor.b32 %r132, %r131, -2147483648;
|
|
mov.b32 %f642, %r132;
|
|
selp.f32 %f1596, %f642, %f1594, %p1;
|
|
setp.geu.f32 %p37, %f73, 0f00000000;
|
|
@%p37 bra $L__BB0_24;
|
|
|
|
mov.f32 %f643, 0f40800000;
|
|
cvt.rzi.f32.f32 %f644, %f643;
|
|
setp.eq.f32 %p38, %f644, 0f40800000;
|
|
@%p38 bra $L__BB0_24;
|
|
|
|
mov.f32 %f1596, 0f7FFFFFFF;
|
|
|
|
$L__BB0_24:
|
|
add.f32 %f647, %f75, 0f40800000;
|
|
mov.b32 %r133, %f647;
|
|
setp.lt.s32 %p40, %r133, 2139095040;
|
|
@%p40 bra $L__BB0_29;
|
|
|
|
setp.gtu.f32 %p41, %f75, 0f7F800000;
|
|
@%p41 bra $L__BB0_28;
|
|
bra.uni $L__BB0_26;
|
|
|
|
$L__BB0_28:
|
|
add.f32 %f1596, %f73, 0f40800000;
|
|
bra.uni $L__BB0_29;
|
|
|
|
$L__BB0_26:
|
|
setp.neu.f32 %p42, %f75, 0f7F800000;
|
|
@%p42 bra $L__BB0_29;
|
|
|
|
selp.f32 %f1596, 0fFF800000, 0f7F800000, %p1;
|
|
|
|
$L__BB0_29:
|
|
shl.b32 %r481, %r483, 1;
|
|
mul.wide.s32 %rd117, %r481, 12;
|
|
add.s64 %rd116, %rd4, %rd117;
|
|
mov.f32 %f648, 0f3F800000;
|
|
sub.f32 %f649, %f648, %f1596;
|
|
setp.eq.f32 %p43, %f73, 0f3F800000;
|
|
selp.f32 %f650, 0f00000000, %f649, %p43;
|
|
cvt.sat.f32.f32 %f651, %f650;
|
|
mul.f32 %f652, %f72, %f651;
|
|
ld.global.f32 %f653, [%rd116+12];
|
|
mul.f32 %f654, %f68, %f653;
|
|
ld.global.f32 %f655, [%rd116+16];
|
|
mul.f32 %f656, %f69, %f655;
|
|
neg.f32 %f657, %f656;
|
|
sub.f32 %f658, %f657, %f654;
|
|
ld.global.f32 %f659, [%rd116+20];
|
|
mul.f32 %f660, %f70, %f659;
|
|
sub.f32 %f661, %f658, %f660;
|
|
cvt.sat.f32.f32 %f662, %f661;
|
|
mul.f32 %f86, %f652, %f662;
|
|
setp.leu.f32 %p44, %f86, 0f3727C5AC;
|
|
@%p44 bra $L__BB0_31;
|
|
|
|
cvt.sat.f32.f32 %f672, %f71;
|
|
mov.f32 %f678, 0f38D1B717;
|
|
max.f32 %f669, %f677, %f678;
|
|
sub.f32 %f670, %f67, %f669;
|
|
mov.f32 %f671, 0f00000000;
|
|
mov.u32 %r170, 2;
|
|
mov.u32 %r171, 1;
|
|
mov.u32 %r172, 3;
|
|
mov.u32 %r175, 1065353216;
|
|
mov.u32 %r204, 0;
|
|
// begin inline asm
|
|
call(%r134,%r135,%r136,%r137,%r138,%r139,%r140,%r141,%r142,%r143,%r144,%r145,%r146,%r147,%r148,%r149,%r150,%r151,%r152,%r153,%r154,%r155,%r156,%r157,%r158,%r159,%r160,%r161,%r162,%r163,%r164,%r165),_optix_trace_typed_32,(%r204,%rd6,%f15,%f16,%f17,%f68,%f69,%f70,%f669,%f670,%f671,%r171,%r204,%r171,%r170,%r171,%r172,%r175,%r175,%r175,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204,%r204);
|
|
// end inline asm
|
|
mov.b32 %f679, %r134;
|
|
mov.b32 %f680, %r135;
|
|
mov.b32 %f681, %r136;
|
|
mul.f32 %f682, %f86, 0f3EA2F983;
|
|
mul.f32 %f683, %f682, %f679;
|
|
mul.f32 %f684, %f682, %f680;
|
|
mul.f32 %f685, %f682, %f681;
|
|
fma.rn.f32 %f1606, %f672, %f683, %f1606;
|
|
fma.rn.f32 %f1607, %f672, %f684, %f1607;
|
|
fma.rn.f32 %f1608, %f672, %f685, %f1608;
|
|
mul.f32 %f686, %f28, %f69;
|
|
fma.rn.f32 %f687, %f26, %f68, %f686;
|
|
fma.rn.f32 %f688, %f30, %f70, %f687;
|
|
cvt.sat.f32.f32 %f689, %f688;
|
|
fma.rn.f32 %f1603, %f689, %f683, %f1603;
|
|
fma.rn.f32 %f1604, %f689, %f684, %f1604;
|
|
fma.rn.f32 %f1605, %f689, %f685, %f1605;
|
|
mul.f32 %f690, %f38, %f69;
|
|
fma.rn.f32 %f691, %f37, %f68, %f690;
|
|
fma.rn.f32 %f692, %f39, %f70, %f691;
|
|
cvt.sat.f32.f32 %f693, %f692;
|
|
fma.rn.f32 %f1600, %f693, %f683, %f1600;
|
|
fma.rn.f32 %f1601, %f693, %f684, %f1601;
|
|
fma.rn.f32 %f1602, %f693, %f685, %f1602;
|
|
mul.f32 %f694, %f47, %f69;
|
|
fma.rn.f32 %f695, %f46, %f68, %f694;
|
|
fma.rn.f32 %f696, %f48, %f70, %f695;
|
|
cvt.sat.f32.f32 %f697, %f696;
|
|
fma.rn.f32 %f1597, %f683, %f697, %f1597;
|
|
fma.rn.f32 %f1598, %f684, %f697, %f1598;
|
|
fma.rn.f32 %f1599, %f685, %f697, %f1599;
|
|
add.f32 %f1609, %f1609, %f679;
|
|
|
|
$L__BB0_31:
|
|
add.s32 %r486, %r486, 1;
|
|
|
|
$L__BB0_32:
|
|
add.s32 %r483, %r483, 1;
|
|
setp.lt.s32 %p46, %r483, %r4;
|
|
mov.pred %p206, %p22;
|
|
@%p46 bra $L__BB0_15;
|
|
|
|
$L__BB0_33:
|
|
cvt.rn.f32.s32 %f698, %r486;
|
|
mov.f32 %f699, 0f3F800000;
|
|
max.f32 %f700, %f698, %f699;
|
|
rcp.rn.f32 %f701, %f700;
|
|
mul.f32 %f1693, %f1606, %f701;
|
|
mul.f32 %f1694, %f1607, %f701;
|
|
mul.f32 %f1695, %f1608, %f701;
|
|
div.rn.f32 %f1696, %f1609, %f700;
|
|
mul.f32 %f1690, %f1603, %f701;
|
|
mul.f32 %f1691, %f1604, %f701;
|
|
mul.f32 %f1692, %f1605, %f701;
|
|
mul.f32 %f1687, %f1600, %f701;
|
|
mul.f32 %f1688, %f1601, %f701;
|
|
mul.f32 %f1689, %f1602, %f701;
|
|
mul.f32 %f1684, %f1597, %f701;
|
|
mul.f32 %f1685, %f1598, %f701;
|
|
mul.f32 %f1686, %f1599, %f701;
|
|
not.pred %p47, %p206;
|
|
@%p47 bra $L__BB0_66;
|
|
|
|
abs.f32 %f1568, %f1571;
|
|
abs.f32 %f1567, %f1569;
|
|
setp.gt.f32 %p48, %f1567, %f1568;
|
|
selp.f32 %f715, 0f00000000, %f1570, %p48;
|
|
mov.f32 %f1661, 0f00000000;
|
|
neg.f32 %f716, %f1571;
|
|
selp.f32 %f717, %f1569, %f716, %p48;
|
|
neg.f32 %f718, %f1570;
|
|
selp.f32 %f719, %f718, 0f00000000, %p48;
|
|
mul.f32 %f720, %f717, %f717;
|
|
fma.rn.f32 %f721, %f719, %f719, %f720;
|
|
fma.rn.f32 %f722, %f715, %f715, %f721;
|
|
sqrt.rn.f32 %f723, %f722;
|
|
rcp.rn.f32 %f724, %f723;
|
|
mul.f32 %f152, %f719, %f724;
|
|
mul.f32 %f153, %f717, %f724;
|
|
mul.f32 %f154, %f715, %f724;
|
|
setp.lt.s32 %p49, %r5, 1;
|
|
mov.f32 %f1660, %f1661;
|
|
mov.f32 %f1659, %f1661;
|
|
mov.f32 %f1658, %f1661;
|
|
mov.f32 %f1657, %f1661;
|
|
mov.f32 %f1656, %f1661;
|
|
mov.f32 %f1655, %f1661;
|
|
mov.f32 %f1654, %f1661;
|
|
mov.f32 %f1653, %f1661;
|
|
mov.f32 %f1652, %f1661;
|
|
mov.f32 %f1651, %f1661;
|
|
mov.f32 %f1650, %f1661;
|
|
mov.f32 %f1649, %f1661;
|
|
@%p49 bra $L__BB0_65;
|
|
|
|
cvt.rn.f32.s32 %f738, %r5;
|
|
rcp.rn.f32 %f155, %f738;
|
|
mul.f32 %f156, %f15, 0f3456BF95;
|
|
mul.f32 %f157, %f16, 0f3456BF95;
|
|
mul.f32 %f158, %f17, 0f3456BF95;
|
|
ld.const.u64 %rd8, [params+96];
|
|
mul.f32 %f739, %f1569, %f153;
|
|
mul.f32 %f740, %f1570, %f152;
|
|
sub.f32 %f159, %f740, %f739;
|
|
mul.f32 %f741, %f1571, %f152;
|
|
mul.f32 %f742, %f1569, %f154;
|
|
sub.f32 %f160, %f742, %f741;
|
|
mul.f32 %f743, %f1570, %f154;
|
|
mul.f32 %f744, %f1571, %f153;
|
|
sub.f32 %f161, %f744, %f743;
|
|
mov.u32 %r205, 0;
|
|
add.s64 %rd9, %rd1, 24;
|
|
mov.u64 %rd53, __cudart_i2opi_f;
|
|
abs.f32 %f810, %f157;
|
|
abs.f32 %f811, %f156;
|
|
max.f32 %f812, %f811, %f810;
|
|
abs.f32 %f813, %f158;
|
|
max.f32 %f814, %f812, %f813;
|
|
mov.u32 %r487, %r205;
|
|
|
|
$L__BB0_36:
|
|
cvt.rn.f32.s32 %f175, %r487;
|
|
mov.u32 %r489, %r205;
|
|
|
|
$L__BB0_37:
|
|
mad.lo.s32 %r207, %r490, 1664525, 1013904223;
|
|
and.b32 %r208, %r207, 16777215;
|
|
cvt.rn.f32.u32 %f745, %r208;
|
|
fma.rn.f32 %f746, %f745, 0f33800000, %f175;
|
|
mul.f32 %f189, %f155, %f746;
|
|
mad.lo.s32 %r490, %r207, 1664525, 1013904223;
|
|
and.b32 %r209, %r490, 16777215;
|
|
cvt.rn.f32.u32 %f747, %r209;
|
|
cvt.rn.f32.s32 %f748, %r489;
|
|
fma.rn.f32 %f749, %f747, 0f33800000, %f748;
|
|
mul.f32 %f750, %f155, %f749;
|
|
mul.f32 %f751, %f189, %f189;
|
|
mov.f32 %f752, 0f3F800000;
|
|
sub.f32 %f753, %f752, %f751;
|
|
mov.f32 %f754, 0f00000000;
|
|
max.f32 %f755, %f754, %f753;
|
|
sqrt.rn.f32 %f190, %f755;
|
|
mul.f32 %f191, %f750, 0f40C90FDB;
|
|
mul.f32 %f756, %f191, 0f3F22F983;
|
|
cvt.rni.s32.f32 %r497, %f756;
|
|
cvt.rn.f32.s32 %f757, %r497;
|
|
mov.f32 %f758, 0fBFC90FDA;
|
|
fma.rn.f32 %f759, %f757, %f758, %f191;
|
|
mov.f32 %f760, 0fB3A22168;
|
|
fma.rn.f32 %f761, %f757, %f760, %f759;
|
|
mov.f32 %f762, 0fA7C234C5;
|
|
fma.rn.f32 %f1665, %f757, %f762, %f761;
|
|
abs.f32 %f193, %f191;
|
|
setp.ltu.f32 %p50, %f193, 0f47CE4780;
|
|
mov.u32 %r494, %r497;
|
|
mov.f32 %f1662, %f1665;
|
|
@%p50 bra $L__BB0_45;
|
|
|
|
setp.eq.f32 %p51, %f193, 0f7F800000;
|
|
@%p51 bra $L__BB0_44;
|
|
bra.uni $L__BB0_39;
|
|
|
|
$L__BB0_44:
|
|
mov.f32 %f765, 0f00000000;
|
|
mul.rn.f32 %f1662, %f191, %f765;
|
|
mov.u32 %r494, 0;
|
|
bra.uni $L__BB0_45;
|
|
|
|
$L__BB0_39:
|
|
mov.b32 %r21, %f191;
|
|
bfe.u32 %r211, %r21, 23, 8;
|
|
add.s32 %r22, %r211, -128;
|
|
shl.b32 %r212, %r21, 8;
|
|
or.b32 %r23, %r212, -2147483648;
|
|
shr.u32 %r24, %r22, 5;
|
|
mov.u64 %rd120, 0;
|
|
mov.u32 %r491, 0;
|
|
mov.u64 %rd118, %rd1;
|
|
mov.u64 %rd119, %rd53;
|
|
|
|
$L__BB0_40:
|
|
.pragma "nounroll";
|
|
ld.global.nc.u32 %r213, [%rd119];
|
|
mad.wide.u32 %rd55, %r213, %r23, %rd120;
|
|
shr.u64 %rd120, %rd55, 32;
|
|
st.local.u32 [%rd118], %rd55;
|
|
add.s64 %rd119, %rd119, 4;
|
|
add.s64 %rd118, %rd118, 4;
|
|
add.s32 %r491, %r491, 1;
|
|
setp.ne.s32 %p52, %r491, 6;
|
|
@%p52 bra $L__BB0_40;
|
|
|
|
st.local.u32 [%rd9], %rd120;
|
|
mov.u32 %r214, 4;
|
|
sub.s32 %r27, %r214, %r24;
|
|
mov.u32 %r215, 6;
|
|
sub.s32 %r216, %r215, %r24;
|
|
mul.wide.s32 %rd56, %r216, 4;
|
|
add.s64 %rd57, %rd1, %rd56;
|
|
ld.local.u32 %r492, [%rd57];
|
|
ld.local.u32 %r493, [%rd57+-4];
|
|
and.b32 %r30, %r22, 31;
|
|
setp.eq.s32 %p53, %r30, 0;
|
|
@%p53 bra $L__BB0_43;
|
|
|
|
mov.u32 %r217, 32;
|
|
sub.s32 %r218, %r217, %r30;
|
|
shr.u32 %r219, %r493, %r218;
|
|
shl.b32 %r220, %r492, %r30;
|
|
add.s32 %r492, %r219, %r220;
|
|
mul.wide.s32 %rd58, %r27, 4;
|
|
add.s64 %rd59, %rd1, %rd58;
|
|
ld.local.u32 %r221, [%rd59];
|
|
shr.u32 %r222, %r221, %r218;
|
|
shl.b32 %r223, %r493, %r30;
|
|
add.s32 %r493, %r222, %r223;
|
|
|
|
$L__BB0_43:
|
|
and.b32 %r224, %r21, -2147483648;
|
|
shr.u32 %r225, %r493, 30;
|
|
shl.b32 %r226, %r492, 2;
|
|
or.b32 %r227, %r225, %r226;
|
|
shr.u32 %r228, %r227, 31;
|
|
shr.u32 %r229, %r492, 30;
|
|
add.s32 %r230, %r228, %r229;
|
|
neg.s32 %r231, %r230;
|
|
setp.eq.s32 %p54, %r224, 0;
|
|
selp.b32 %r494, %r230, %r231, %p54;
|
|
setp.ne.s32 %p55, %r228, 0;
|
|
xor.b32 %r232, %r224, -2147483648;
|
|
selp.b32 %r233, %r232, %r224, %p55;
|
|
selp.b32 %r234, -1, 0, %p55;
|
|
xor.b32 %r235, %r227, %r234;
|
|
shl.b32 %r236, %r493, 2;
|
|
xor.b32 %r237, %r236, %r234;
|
|
cvt.u64.u32 %rd60, %r235;
|
|
cvt.u64.u32 %rd61, %r237;
|
|
bfi.b64 %rd62, %rd60, %rd61, 32, 32;
|
|
cvt.rn.f64.s64 %fd1, %rd62;
|
|
mul.f64 %fd2, %fd1, 0d3BF921FB54442D19;
|
|
cvt.rn.f32.f64 %f763, %fd2;
|
|
setp.eq.s32 %p56, %r233, 0;
|
|
neg.f32 %f764, %f763;
|
|
selp.f32 %f1662, %f763, %f764, %p56;
|
|
|
|
$L__BB0_45:
|
|
add.s32 %r37, %r494, 1;
|
|
and.b32 %r38, %r37, 1;
|
|
setp.eq.s32 %p57, %r38, 0;
|
|
selp.f32 %f197, %f1662, 0f3F800000, %p57;
|
|
mul.rn.f32 %f198, %f1662, %f1662;
|
|
mov.f32 %f1663, 0fB94D4153;
|
|
@%p57 bra $L__BB0_47;
|
|
|
|
mov.f32 %f767, 0fBAB607ED;
|
|
mov.f32 %f768, 0f37CBAC00;
|
|
fma.rn.f32 %f1663, %f768, %f198, %f767;
|
|
|
|
$L__BB0_47:
|
|
selp.f32 %f769, 0f3C0885E4, 0f3D2AAABB, %p57;
|
|
fma.rn.f32 %f770, %f1663, %f198, %f769;
|
|
selp.f32 %f771, 0fBE2AAAA8, 0fBEFFFFFF, %p57;
|
|
fma.rn.f32 %f772, %f770, %f198, %f771;
|
|
mov.f32 %f773, 0f00000000;
|
|
fma.rn.f32 %f774, %f198, %f197, %f773;
|
|
fma.rn.f32 %f1664, %f772, %f774, %f197;
|
|
and.b32 %r239, %r37, 2;
|
|
setp.eq.s32 %p59, %r239, 0;
|
|
@%p59 bra $L__BB0_49;
|
|
|
|
mov.f32 %f776, 0fBF800000;
|
|
fma.rn.f32 %f1664, %f1664, %f776, %f773;
|
|
|
|
$L__BB0_49:
|
|
@%p50 bra $L__BB0_57;
|
|
|
|
setp.eq.f32 %p61, %f193, 0f7F800000;
|
|
@%p61 bra $L__BB0_56;
|
|
bra.uni $L__BB0_51;
|
|
|
|
$L__BB0_56:
|
|
mov.f32 %f779, 0f00000000;
|
|
mul.rn.f32 %f1665, %f191, %f779;
|
|
mov.u32 %r497, 0;
|
|
bra.uni $L__BB0_57;
|
|
|
|
$L__BB0_51:
|
|
mov.b32 %r39, %f191;
|
|
bfe.u32 %r240, %r39, 23, 8;
|
|
add.s32 %r40, %r240, -128;
|
|
shl.b32 %r241, %r39, 8;
|
|
or.b32 %r41, %r241, -2147483648;
|
|
shr.u32 %r42, %r40, 5;
|
|
mov.u64 %rd121, 0;
|
|
mov.u64 %rd122, %rd121;
|
|
|
|
$L__BB0_52:
|
|
.pragma "nounroll";
|
|
shl.b64 %rd65, %rd121, 2;
|
|
mov.u64 %rd66, __cudart_i2opi_f;
|
|
add.s64 %rd67, %rd66, %rd65;
|
|
ld.global.nc.u32 %r242, [%rd67];
|
|
mad.wide.u32 %rd68, %r242, %r41, %rd122;
|
|
shr.u64 %rd122, %rd68, 32;
|
|
add.s64 %rd69, %rd1, %rd65;
|
|
st.local.u32 [%rd69], %rd68;
|
|
cvt.u32.u64 %r243, %rd121;
|
|
add.s32 %r244, %r243, 1;
|
|
cvt.s64.s32 %rd121, %r244;
|
|
setp.ne.s32 %p62, %r244, 6;
|
|
@%p62 bra $L__BB0_52;
|
|
|
|
st.local.u32 [%rd9], %rd122;
|
|
mov.u32 %r245, 4;
|
|
sub.s32 %r43, %r245, %r42;
|
|
mov.u32 %r246, 6;
|
|
sub.s32 %r247, %r246, %r42;
|
|
mul.wide.s32 %rd70, %r247, 4;
|
|
add.s64 %rd71, %rd1, %rd70;
|
|
ld.local.u32 %r495, [%rd71];
|
|
ld.local.u32 %r496, [%rd71+-4];
|
|
and.b32 %r46, %r40, 31;
|
|
setp.eq.s32 %p63, %r46, 0;
|
|
@%p63 bra $L__BB0_55;
|
|
|
|
mov.u32 %r248, 32;
|
|
sub.s32 %r249, %r248, %r46;
|
|
shr.u32 %r250, %r496, %r249;
|
|
shl.b32 %r251, %r495, %r46;
|
|
add.s32 %r495, %r250, %r251;
|
|
mul.wide.s32 %rd72, %r43, 4;
|
|
add.s64 %rd73, %rd1, %rd72;
|
|
ld.local.u32 %r252, [%rd73];
|
|
shr.u32 %r253, %r252, %r249;
|
|
shl.b32 %r254, %r496, %r46;
|
|
add.s32 %r496, %r253, %r254;
|
|
|
|
$L__BB0_55:
|
|
and.b32 %r255, %r39, -2147483648;
|
|
shr.u32 %r256, %r496, 30;
|
|
shl.b32 %r257, %r495, 2;
|
|
or.b32 %r258, %r256, %r257;
|
|
shr.u32 %r259, %r258, 31;
|
|
shr.u32 %r260, %r495, 30;
|
|
add.s32 %r261, %r259, %r260;
|
|
neg.s32 %r262, %r261;
|
|
setp.eq.s32 %p64, %r255, 0;
|
|
selp.b32 %r497, %r261, %r262, %p64;
|
|
setp.ne.s32 %p65, %r259, 0;
|
|
xor.b32 %r263, %r255, -2147483648;
|
|
selp.b32 %r264, %r263, %r255, %p65;
|
|
selp.b32 %r265, -1, 0, %p65;
|
|
xor.b32 %r266, %r258, %r265;
|
|
shl.b32 %r267, %r496, 2;
|
|
xor.b32 %r268, %r267, %r265;
|
|
cvt.u64.u32 %rd74, %r266;
|
|
cvt.u64.u32 %rd75, %r268;
|
|
bfi.b64 %rd76, %rd74, %rd75, 32, 32;
|
|
cvt.rn.f64.s64 %fd3, %rd76;
|
|
mul.f64 %fd4, %fd3, 0d3BF921FB54442D19;
|
|
cvt.rn.f32.f64 %f777, %fd4;
|
|
setp.eq.s32 %p66, %r264, 0;
|
|
neg.f32 %f778, %f777;
|
|
selp.f32 %f1665, %f777, %f778, %p66;
|
|
|
|
$L__BB0_57:
|
|
mul.f32 %f207, %f190, %f1664;
|
|
and.b32 %r53, %r497, 1;
|
|
setp.eq.s32 %p67, %r53, 0;
|
|
selp.f32 %f208, %f1665, 0f3F800000, %p67;
|
|
mul.rn.f32 %f209, %f1665, %f1665;
|
|
mov.f32 %f1666, 0fB94D4153;
|
|
@%p67 bra $L__BB0_59;
|
|
|
|
mov.f32 %f781, 0fBAB607ED;
|
|
mov.f32 %f782, 0f37CBAC00;
|
|
fma.rn.f32 %f1666, %f782, %f209, %f781;
|
|
|
|
$L__BB0_59:
|
|
selp.f32 %f783, 0f3C0885E4, 0f3D2AAABB, %p67;
|
|
fma.rn.f32 %f784, %f1666, %f209, %f783;
|
|
selp.f32 %f785, 0fBE2AAAA8, 0fBEFFFFFF, %p67;
|
|
fma.rn.f32 %f786, %f784, %f209, %f785;
|
|
mov.f32 %f1668, 0f00000000;
|
|
fma.rn.f32 %f788, %f209, %f208, %f1668;
|
|
fma.rn.f32 %f1667, %f786, %f788, %f208;
|
|
and.b32 %r270, %r497, 2;
|
|
setp.eq.s32 %p69, %r270, 0;
|
|
@%p69 bra $L__BB0_61;
|
|
|
|
mov.f32 %f789, 0f00000000;
|
|
mov.f32 %f790, 0fBF800000;
|
|
fma.rn.f32 %f1667, %f1667, %f790, %f789;
|
|
|
|
$L__BB0_61:
|
|
mul.f32 %f803, %f190, %f1667;
|
|
mul.f32 %f804, %f152, %f803;
|
|
mul.f32 %f805, %f153, %f803;
|
|
mul.f32 %f806, %f154, %f803;
|
|
fma.rn.f32 %f807, %f161, %f207, %f804;
|
|
fma.rn.f32 %f808, %f160, %f207, %f805;
|
|
fma.rn.f32 %f809, %f159, %f207, %f806;
|
|
fma.rn.f32 %f215, %f1569, %f189, %f807;
|
|
fma.rn.f32 %f216, %f1570, %f189, %f808;
|
|
fma.rn.f32 %f217, %f1571, %f189, %f809;
|
|
mov.f32 %f815, 0f38D1B717;
|
|
max.f32 %f797, %f814, %f815;
|
|
mov.f32 %f798, 0f6C4ECB8F;
|
|
mov.u32 %r304, 1;
|
|
mov.u32 %r307, 2;
|
|
mov.u32 %r309, 4;
|
|
mov.u32 %r312, 1065353216;
|
|
mov.u32 %r313, 2139095039;
|
|
mov.u32 %r341, 0;
|
|
// begin inline asm
|
|
call(%r271,%r272,%r273,%r274,%r275,%r276,%r277,%r278,%r279,%r280,%r281,%r282,%r283,%r284,%r285,%r286,%r287,%r288,%r289,%r290,%r291,%r292,%r293,%r294,%r295,%r296,%r297,%r298,%r299,%r300,%r301,%r302),_optix_trace_typed_32,(%r341,%rd8,%f15,%f16,%f17,%f215,%f216,%f217,%f797,%f798,%f1668,%r304,%r341,%r341,%r307,%r341,%r309,%r312,%r312,%r312,%r313,%r341,%r341,%r341,%r341,%r341,%r341,%r341,%r341,%r341,%r341,%r341,%r341,%r341,%r341,%r341,%r341,%r341,%r341,%r341,%r341,%r341,%r341,%r341,%r341,%r341,%r341,%r341,%r341);
|
|
// end inline asm
|
|
mov.b32 %f218, %r274;
|
|
setp.ge.f32 %p70, %f218, 0f00000000;
|
|
mov.f32 %f1669, %f1668;
|
|
mov.f32 %f1670, %f1668;
|
|
@%p70 bra $L__BB0_63;
|
|
|
|
mov.b32 %f1670, %r271;
|
|
mov.b32 %f1669, %r272;
|
|
mov.b32 %f1668, %r273;
|
|
|
|
$L__BB0_63:
|
|
setp.ltu.f32 %p71, %f218, 0f00000000;
|
|
selp.f32 %f816, 0f3F800000, 0f00000000, %p71;
|
|
add.f32 %f1649, %f1649, %f816;
|
|
mul.f32 %f817, %f28, %f216;
|
|
fma.rn.f32 %f818, %f26, %f215, %f817;
|
|
fma.rn.f32 %f819, %f30, %f217, %f818;
|
|
cvt.sat.f32.f32 %f820, %f819;
|
|
fma.rn.f32 %f1655, %f1670, %f820, %f1655;
|
|
fma.rn.f32 %f1654, %f1669, %f820, %f1654;
|
|
fma.rn.f32 %f1653, %f1668, %f820, %f1653;
|
|
mul.f32 %f821, %f38, %f216;
|
|
fma.rn.f32 %f822, %f37, %f215, %f821;
|
|
fma.rn.f32 %f823, %f39, %f217, %f822;
|
|
cvt.sat.f32.f32 %f824, %f823;
|
|
fma.rn.f32 %f1658, %f1670, %f824, %f1658;
|
|
fma.rn.f32 %f1657, %f1669, %f824, %f1657;
|
|
fma.rn.f32 %f1656, %f1668, %f824, %f1656;
|
|
mul.f32 %f825, %f47, %f216;
|
|
fma.rn.f32 %f826, %f46, %f215, %f825;
|
|
fma.rn.f32 %f827, %f48, %f217, %f826;
|
|
cvt.sat.f32.f32 %f828, %f827;
|
|
fma.rn.f32 %f1661, %f1670, %f828, %f1661;
|
|
fma.rn.f32 %f1660, %f1669, %f828, %f1660;
|
|
fma.rn.f32 %f1659, %f1668, %f828, %f1659;
|
|
mul.f32 %f829, %f1570, %f216;
|
|
fma.rn.f32 %f830, %f1569, %f215, %f829;
|
|
fma.rn.f32 %f831, %f1571, %f217, %f830;
|
|
cvt.sat.f32.f32 %f832, %f831;
|
|
fma.rn.f32 %f1652, %f1670, %f832, %f1652;
|
|
fma.rn.f32 %f1651, %f1669, %f832, %f1651;
|
|
fma.rn.f32 %f1650, %f1668, %f832, %f1650;
|
|
add.s32 %r489, %r489, 1;
|
|
setp.lt.s32 %p72, %r489, %r5;
|
|
@%p72 bra $L__BB0_37;
|
|
|
|
add.s32 %r487, %r487, 1;
|
|
setp.lt.s32 %p73, %r487, %r5;
|
|
@%p73 bra $L__BB0_36;
|
|
|
|
$L__BB0_65:
|
|
mul.lo.s32 %r342, %r5, %r5;
|
|
cvt.rn.f32.s32 %f833, %r342;
|
|
rcp.rn.f32 %f834, %f833;
|
|
mul.f32 %f835, %f834, %f1652;
|
|
mul.f32 %f836, %f834, %f1651;
|
|
mul.f32 %f837, %f834, %f1650;
|
|
div.rn.f32 %f1696, %f1649, %f833;
|
|
mul.f32 %f1690, %f834, %f1655;
|
|
mul.f32 %f1691, %f834, %f1654;
|
|
mul.f32 %f1692, %f834, %f1653;
|
|
mul.f32 %f1687, %f834, %f1658;
|
|
mul.f32 %f1688, %f834, %f1657;
|
|
mul.f32 %f1689, %f834, %f1656;
|
|
mul.f32 %f1684, %f834, %f1661;
|
|
mul.f32 %f1685, %f834, %f1660;
|
|
mul.f32 %f1686, %f834, %f1659;
|
|
fma.rn.f32 %f1693, %f834, %f1652, %f835;
|
|
fma.rn.f32 %f1694, %f834, %f1651, %f836;
|
|
fma.rn.f32 %f1695, %f834, %f1650, %f837;
|
|
|
|
$L__BB0_66:
|
|
ld.const.u32 %r482, [params+616];
|
|
setp.lt.s32 %p74, %r482, 0;
|
|
selp.f32 %f277, %f1693, %f1696, %p74;
|
|
ld.const.u32 %r88, [params+104];
|
|
and.b32 %r343, %r88, 8;
|
|
setp.eq.s32 %p75, %r343, 0;
|
|
@%p75 bra $L__BB0_80;
|
|
|
|
ld.const.u64 %rd78, [params+192];
|
|
cvta.to.global.u64 %rd20, %rd78;
|
|
ld.const.u32 %r344, [params+184];
|
|
mad.lo.s32 %r345, %r344, %r7, %r6;
|
|
cvt.u64.u32 %rd21, %r345;
|
|
mov.f32 %f839, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f840, %f839;
|
|
add.f32 %f841, %f840, %f840;
|
|
mov.f32 %f842, 0f3EE8BA2E;
|
|
sub.f32 %f843, %f842, %f841;
|
|
abs.f32 %f278, %f843;
|
|
abs.f32 %f279, %f277;
|
|
setp.lt.f32 %p76, %f279, 0f00800000;
|
|
mul.f32 %f844, %f279, 0f4B800000;
|
|
selp.f32 %f845, %f844, %f279, %p76;
|
|
selp.f32 %f846, 0fC3170000, 0fC2FE0000, %p76;
|
|
mov.b32 %r346, %f845;
|
|
and.b32 %r347, %r346, 8388607;
|
|
or.b32 %r348, %r347, 1065353216;
|
|
mov.b32 %f847, %r348;
|
|
shr.u32 %r349, %r346, 23;
|
|
cvt.rn.f32.u32 %f848, %r349;
|
|
add.f32 %f849, %f846, %f848;
|
|
setp.gt.f32 %p77, %f847, 0f3FB504F3;
|
|
mul.f32 %f850, %f847, 0f3F000000;
|
|
add.f32 %f851, %f849, 0f3F800000;
|
|
selp.f32 %f852, %f851, %f849, %p77;
|
|
selp.f32 %f853, %f850, %f847, %p77;
|
|
add.f32 %f854, %f853, 0fBF800000;
|
|
add.f32 %f855, %f853, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f856, %f855;
|
|
add.f32 %f857, %f854, %f854;
|
|
mul.f32 %f858, %f857, %f856;
|
|
mul.f32 %f859, %f858, %f858;
|
|
mov.f32 %f860, 0f3C4CAF63;
|
|
mov.f32 %f861, 0f3B18F0FE;
|
|
fma.rn.f32 %f862, %f861, %f859, %f860;
|
|
mov.f32 %f863, 0f3DAAAABD;
|
|
fma.rn.f32 %f864, %f862, %f859, %f863;
|
|
mul.rn.f32 %f865, %f864, %f859;
|
|
mul.rn.f32 %f866, %f865, %f858;
|
|
sub.f32 %f867, %f854, %f858;
|
|
add.f32 %f868, %f867, %f867;
|
|
neg.f32 %f869, %f858;
|
|
fma.rn.f32 %f870, %f869, %f854, %f868;
|
|
mul.rn.f32 %f871, %f856, %f870;
|
|
add.f32 %f872, %f866, %f858;
|
|
sub.f32 %f873, %f858, %f872;
|
|
add.f32 %f874, %f866, %f873;
|
|
add.f32 %f875, %f871, %f874;
|
|
add.f32 %f876, %f872, %f875;
|
|
sub.f32 %f877, %f872, %f876;
|
|
add.f32 %f878, %f875, %f877;
|
|
mov.f32 %f879, 0f3F317200;
|
|
mul.rn.f32 %f880, %f852, %f879;
|
|
mov.f32 %f881, 0f35BFBE8E;
|
|
mul.rn.f32 %f882, %f852, %f881;
|
|
add.f32 %f883, %f880, %f876;
|
|
sub.f32 %f884, %f880, %f883;
|
|
add.f32 %f885, %f876, %f884;
|
|
add.f32 %f886, %f878, %f885;
|
|
add.f32 %f887, %f882, %f886;
|
|
add.f32 %f888, %f883, %f887;
|
|
sub.f32 %f889, %f883, %f888;
|
|
add.f32 %f890, %f887, %f889;
|
|
mul.rn.f32 %f891, %f842, %f888;
|
|
neg.f32 %f892, %f891;
|
|
fma.rn.f32 %f893, %f842, %f888, %f892;
|
|
fma.rn.f32 %f894, %f842, %f890, %f893;
|
|
mov.f32 %f895, 0f00000000;
|
|
fma.rn.f32 %f896, %f895, %f888, %f894;
|
|
add.rn.f32 %f897, %f891, %f896;
|
|
neg.f32 %f898, %f897;
|
|
add.rn.f32 %f899, %f891, %f898;
|
|
add.rn.f32 %f900, %f899, %f896;
|
|
mov.b32 %r350, %f897;
|
|
setp.eq.s32 %p78, %r350, 1118925336;
|
|
add.s32 %r351, %r350, -1;
|
|
mov.b32 %f901, %r351;
|
|
add.f32 %f902, %f900, 0f37000000;
|
|
selp.f32 %f280, %f902, %f900, %p78;
|
|
selp.f32 %f903, %f901, %f897, %p78;
|
|
mov.f32 %f904, 0f3FB8AA3B;
|
|
mul.rn.f32 %f905, %f903, %f904;
|
|
cvt.rzi.f32.f32 %f906, %f905;
|
|
abs.f32 %f907, %f906;
|
|
setp.gt.f32 %p79, %f907, 0f42FC0000;
|
|
mov.b32 %r352, %f906;
|
|
and.b32 %r353, %r352, -2147483648;
|
|
or.b32 %r354, %r353, 1123811328;
|
|
mov.b32 %f908, %r354;
|
|
selp.f32 %f909, %f908, %f906, %p79;
|
|
mov.f32 %f910, 0fBF317218;
|
|
fma.rn.f32 %f911, %f909, %f910, %f903;
|
|
mov.f32 %f912, 0f3102E308;
|
|
fma.rn.f32 %f913, %f909, %f912, %f911;
|
|
mul.f32 %f914, %f913, 0f3FB8AA3B;
|
|
add.f32 %f915, %f909, 0f4B40007F;
|
|
mov.b32 %r355, %f915;
|
|
shl.b32 %r356, %r355, 23;
|
|
mov.b32 %f916, %r356;
|
|
ex2.approx.ftz.f32 %f917, %f914;
|
|
mul.f32 %f281, %f917, %f916;
|
|
setp.eq.f32 %p80, %f281, 0f7F800000;
|
|
mov.f32 %f1697, 0f7F800000;
|
|
@%p80 bra $L__BB0_69;
|
|
|
|
fma.rn.f32 %f1697, %f281, %f280, %f281;
|
|
|
|
$L__BB0_69:
|
|
setp.lt.f32 %p81, %f277, 0f00000000;
|
|
setp.eq.f32 %p82, %f278, 0f3F800000;
|
|
and.pred %p3, %p81, %p82;
|
|
setp.eq.f32 %p83, %f277, 0f00000000;
|
|
@%p83 bra $L__BB0_73;
|
|
bra.uni $L__BB0_70;
|
|
|
|
$L__BB0_73:
|
|
add.f32 %f922, %f277, %f277;
|
|
selp.f32 %f1699, %f922, 0f00000000, %p82;
|
|
bra.uni $L__BB0_74;
|
|
|
|
$L__BB0_174:
|
|
mov.f32 %f1533, 0f00000000;
|
|
mov.u32 %r499, 0;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs127, %f1533;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs126, %f1533;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs125, %f1533;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs128, 0;
|
|
st.global.v4.u16 [%rd28], {%rs125, %rs126, %rs127, %rs128};
|
|
|
|
$L__BB0_175:
|
|
ld.const.u64 %rd107, [params+256];
|
|
cvta.to.global.u64 %rd108, %rd107;
|
|
ld.const.u32 %r475, [params+248];
|
|
mad.lo.s32 %r476, %r475, %r7, %r6;
|
|
mul.wide.u32 %rd109, %r476, 8;
|
|
add.s64 %rd29, %rd108, %rd109;
|
|
setp.eq.s32 %p203, %r499, 0;
|
|
@%p203 bra $L__BB0_177;
|
|
|
|
ld.global.v4.u16 {%rs135, %rs136, %rs137, %rs138}, [%rd29];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1534, %rs135;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1535, %rs136;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1536, %rs137;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1537, %f1534, 0f00000000;
|
|
add.f32 %f1538, %f1535, 0f00000000;
|
|
add.f32 %f1539, %f1536, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs134, %f1539;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs133, %f1538;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs132, %f1537;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs139, 0;
|
|
st.global.v4.u16 [%rd29], {%rs132, %rs133, %rs134, %rs139};
|
|
bra.uni $L__BB0_178;
|
|
|
|
$L__BB0_177:
|
|
mov.f32 %f1542, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs142, %f1542;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs141, %f1542;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs140, %f1542;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs143, 0;
|
|
st.global.v4.u16 [%rd29], {%rs140, %rs141, %rs142, %rs143};
|
|
|
|
$L__BB0_178:
|
|
ld.const.u64 %rd110, [params+272];
|
|
cvta.to.global.u64 %rd111, %rd110;
|
|
ld.const.u32 %r477, [params+264];
|
|
mad.lo.s32 %r478, %r477, %r7, %r6;
|
|
mul.wide.u32 %rd112, %r478, 8;
|
|
add.s64 %rd30, %rd111, %rd112;
|
|
@%p203 bra $L__BB0_180;
|
|
|
|
ld.global.v4.u16 {%rs150, %rs151, %rs152, %rs153}, [%rd30];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1543, %rs150;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1544, %rs151;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1545, %rs152;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1546, %f1543, 0f00000000;
|
|
add.f32 %f1547, %f1544, 0f00000000;
|
|
add.f32 %f1548, %f1545, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs149, %f1548;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs148, %f1547;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs147, %f1546;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs154, 0;
|
|
st.global.v4.u16 [%rd30], {%rs147, %rs148, %rs149, %rs154};
|
|
bra.uni $L__BB0_181;
|
|
|
|
$L__BB0_180:
|
|
mov.f32 %f1551, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs157, %f1551;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs156, %f1551;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs155, %f1551;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs158, 0;
|
|
st.global.v4.u16 [%rd30], {%rs155, %rs156, %rs157, %rs158};
|
|
|
|
$L__BB0_181:
|
|
ld.const.u64 %rd113, [params+288];
|
|
cvta.to.global.u64 %rd114, %rd113;
|
|
ld.const.u32 %r479, [params+280];
|
|
mad.lo.s32 %r480, %r479, %r7, %r6;
|
|
mul.wide.u32 %rd115, %r480, 8;
|
|
add.s64 %rd31, %rd114, %rd115;
|
|
@%p203 bra $L__BB0_183;
|
|
|
|
ld.global.v4.u16 {%rs165, %rs166, %rs167, %rs168}, [%rd31];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1552, %rs165;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1553, %rs166;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1554, %rs167;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1555, %f1552, 0f00000000;
|
|
add.f32 %f1556, %f1553, 0f00000000;
|
|
add.f32 %f1557, %f1554, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs164, %f1557;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs163, %f1556;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs162, %f1555;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs169, 0;
|
|
st.global.v4.u16 [%rd31], {%rs162, %rs163, %rs164, %rs169};
|
|
bra.uni $L__BB0_184;
|
|
|
|
$L__BB0_183:
|
|
mov.f32 %f1560, 0f00000000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs172, %f1560;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs171, %f1560;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs170, %f1560;}
|
|
|
|
// end inline asm
|
|
mov.u16 %rs173, 0;
|
|
st.global.v4.u16 [%rd31], {%rs170, %rs171, %rs172, %rs173};
|
|
bra.uni $L__BB0_184;
|
|
|
|
$L__BB0_70:
|
|
mov.b32 %r357, %f1697;
|
|
xor.b32 %r358, %r357, -2147483648;
|
|
mov.b32 %f918, %r358;
|
|
selp.f32 %f1699, %f918, %f1697, %p3;
|
|
setp.geu.f32 %p84, %f277, 0f00000000;
|
|
@%p84 bra $L__BB0_74;
|
|
|
|
mov.f32 %f919, 0f3EE8BA2E;
|
|
cvt.rzi.f32.f32 %f920, %f919;
|
|
setp.eq.f32 %p85, %f920, 0f3EE8BA2E;
|
|
@%p85 bra $L__BB0_74;
|
|
|
|
mov.f32 %f1699, 0f7FFFFFFF;
|
|
|
|
$L__BB0_74:
|
|
add.f32 %f923, %f279, 0f3EE8BA2E;
|
|
mov.b32 %r359, %f923;
|
|
setp.lt.s32 %p87, %r359, 2139095040;
|
|
@%p87 bra $L__BB0_79;
|
|
|
|
setp.gtu.f32 %p88, %f279, 0f7F800000;
|
|
@%p88 bra $L__BB0_78;
|
|
bra.uni $L__BB0_76;
|
|
|
|
$L__BB0_78:
|
|
add.f32 %f1699, %f277, 0f3EE8BA2E;
|
|
bra.uni $L__BB0_79;
|
|
|
|
$L__BB0_76:
|
|
setp.neu.f32 %p89, %f279, 0f7F800000;
|
|
@%p89 bra $L__BB0_79;
|
|
|
|
selp.f32 %f1699, 0fFF800000, 0f7F800000, %p3;
|
|
|
|
$L__BB0_79:
|
|
mul.f32 %f924, %f1699, 0f437F0000;
|
|
setp.eq.f32 %p90, %f277, 0f3F800000;
|
|
selp.f32 %f925, 0f437F0000, %f924, %p90;
|
|
cvt.rzi.u32.f32 %r360, %f925;
|
|
shl.b64 %rd79, %rd21, 1;
|
|
add.s64 %rd80, %rd20, %rd79;
|
|
cvt.u16.u32 %rs45, %r360;
|
|
mov.u16 %rs46, 255;
|
|
st.global.v2.u8 [%rd80], {%rs45, %rs46};
|
|
|
|
$L__BB0_80:
|
|
ld.const.v2.f32 {%f926, %f927}, [params+648];
|
|
mul.f32 %f292, %f1693, %f926;
|
|
mul.f32 %f293, %f1694, %f927;
|
|
ld.const.f32 %f294, [params+656];
|
|
mul.f32 %f295, %f1695, %f294;
|
|
and.b32 %r361, %r88, 1;
|
|
setp.eq.b32 %p91, %r361, 1;
|
|
mov.pred %p92, 0;
|
|
xor.pred %p93, %p91, %p92;
|
|
not.pred %p94, %p93;
|
|
@%p94 bra $L__BB0_154;
|
|
|
|
mov.f32 %f929, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f930, %f929;
|
|
add.f32 %f931, %f930, %f930;
|
|
mov.f32 %f932, 0f3EE66666;
|
|
sub.f32 %f933, %f932, %f931;
|
|
abs.f32 %f296, %f933;
|
|
abs.f32 %f297, %f292;
|
|
setp.lt.f32 %p95, %f297, 0f00800000;
|
|
mul.f32 %f934, %f297, 0f4B800000;
|
|
selp.f32 %f935, %f934, %f297, %p95;
|
|
selp.f32 %f936, 0fC3170000, 0fC2FE0000, %p95;
|
|
mov.b32 %r362, %f935;
|
|
and.b32 %r363, %r362, 8388607;
|
|
or.b32 %r364, %r363, 1065353216;
|
|
mov.b32 %f937, %r364;
|
|
shr.u32 %r365, %r362, 23;
|
|
cvt.rn.f32.u32 %f938, %r365;
|
|
add.f32 %f939, %f936, %f938;
|
|
setp.gt.f32 %p96, %f937, 0f3FB504F3;
|
|
mul.f32 %f940, %f937, 0f3F000000;
|
|
add.f32 %f941, %f939, 0f3F800000;
|
|
selp.f32 %f942, %f941, %f939, %p96;
|
|
selp.f32 %f943, %f940, %f937, %p96;
|
|
add.f32 %f944, %f943, 0fBF800000;
|
|
add.f32 %f945, %f943, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f946, %f945;
|
|
add.f32 %f947, %f944, %f944;
|
|
mul.f32 %f948, %f947, %f946;
|
|
mul.f32 %f949, %f948, %f948;
|
|
mov.f32 %f950, 0f3C4CAF63;
|
|
mov.f32 %f951, 0f3B18F0FE;
|
|
fma.rn.f32 %f952, %f951, %f949, %f950;
|
|
mov.f32 %f953, 0f3DAAAABD;
|
|
fma.rn.f32 %f954, %f952, %f949, %f953;
|
|
mul.rn.f32 %f955, %f954, %f949;
|
|
mul.rn.f32 %f956, %f955, %f948;
|
|
sub.f32 %f957, %f944, %f948;
|
|
add.f32 %f958, %f957, %f957;
|
|
neg.f32 %f959, %f948;
|
|
fma.rn.f32 %f960, %f959, %f944, %f958;
|
|
mul.rn.f32 %f961, %f946, %f960;
|
|
add.f32 %f962, %f956, %f948;
|
|
sub.f32 %f963, %f948, %f962;
|
|
add.f32 %f964, %f956, %f963;
|
|
add.f32 %f965, %f961, %f964;
|
|
add.f32 %f966, %f962, %f965;
|
|
sub.f32 %f967, %f962, %f966;
|
|
add.f32 %f968, %f965, %f967;
|
|
mov.f32 %f969, 0f3F317200;
|
|
mul.rn.f32 %f970, %f942, %f969;
|
|
mov.f32 %f971, 0f35BFBE8E;
|
|
mul.rn.f32 %f972, %f942, %f971;
|
|
add.f32 %f973, %f970, %f966;
|
|
sub.f32 %f974, %f970, %f973;
|
|
add.f32 %f975, %f966, %f974;
|
|
add.f32 %f976, %f968, %f975;
|
|
add.f32 %f977, %f972, %f976;
|
|
add.f32 %f978, %f973, %f977;
|
|
sub.f32 %f979, %f973, %f978;
|
|
add.f32 %f980, %f977, %f979;
|
|
mul.rn.f32 %f981, %f932, %f978;
|
|
neg.f32 %f982, %f981;
|
|
fma.rn.f32 %f983, %f932, %f978, %f982;
|
|
fma.rn.f32 %f984, %f932, %f980, %f983;
|
|
mov.f32 %f985, 0f00000000;
|
|
fma.rn.f32 %f986, %f985, %f978, %f984;
|
|
add.rn.f32 %f987, %f981, %f986;
|
|
neg.f32 %f988, %f987;
|
|
add.rn.f32 %f989, %f981, %f988;
|
|
add.rn.f32 %f990, %f989, %f986;
|
|
mov.b32 %r366, %f987;
|
|
setp.eq.s32 %p97, %r366, 1118925336;
|
|
add.s32 %r367, %r366, -1;
|
|
mov.b32 %f991, %r367;
|
|
add.f32 %f992, %f990, 0f37000000;
|
|
selp.f32 %f298, %f992, %f990, %p97;
|
|
selp.f32 %f993, %f991, %f987, %p97;
|
|
mov.f32 %f994, 0f3FB8AA3B;
|
|
mul.rn.f32 %f995, %f993, %f994;
|
|
cvt.rzi.f32.f32 %f996, %f995;
|
|
abs.f32 %f997, %f996;
|
|
setp.gt.f32 %p98, %f997, 0f42FC0000;
|
|
mov.b32 %r368, %f996;
|
|
and.b32 %r369, %r368, -2147483648;
|
|
or.b32 %r370, %r369, 1123811328;
|
|
mov.b32 %f998, %r370;
|
|
selp.f32 %f999, %f998, %f996, %p98;
|
|
mov.f32 %f1000, 0fBF317218;
|
|
fma.rn.f32 %f1001, %f999, %f1000, %f993;
|
|
mov.f32 %f1002, 0f3102E308;
|
|
fma.rn.f32 %f1003, %f999, %f1002, %f1001;
|
|
mul.f32 %f1004, %f1003, 0f3FB8AA3B;
|
|
add.f32 %f1005, %f999, 0f4B40007F;
|
|
mov.b32 %r371, %f1005;
|
|
shl.b32 %r372, %r371, 23;
|
|
mov.b32 %f1006, %r372;
|
|
ex2.approx.ftz.f32 %f1007, %f1004;
|
|
mul.f32 %f299, %f1007, %f1006;
|
|
setp.eq.f32 %p99, %f299, 0f7F800000;
|
|
mov.f32 %f1700, 0f7F800000;
|
|
@%p99 bra $L__BB0_83;
|
|
|
|
fma.rn.f32 %f1700, %f299, %f298, %f299;
|
|
|
|
$L__BB0_83:
|
|
setp.lt.f32 %p100, %f292, 0f00000000;
|
|
setp.eq.f32 %p101, %f296, 0f3F800000;
|
|
and.pred %p4, %p100, %p101;
|
|
setp.eq.f32 %p102, %f292, 0f00000000;
|
|
@%p102 bra $L__BB0_87;
|
|
bra.uni $L__BB0_84;
|
|
|
|
$L__BB0_87:
|
|
add.f32 %f1012, %f292, %f292;
|
|
selp.f32 %f1702, %f1012, 0f00000000, %p101;
|
|
bra.uni $L__BB0_88;
|
|
|
|
$L__BB0_84:
|
|
mov.b32 %r373, %f1700;
|
|
xor.b32 %r374, %r373, -2147483648;
|
|
mov.b32 %f1008, %r374;
|
|
selp.f32 %f1702, %f1008, %f1700, %p4;
|
|
setp.geu.f32 %p103, %f292, 0f00000000;
|
|
@%p103 bra $L__BB0_88;
|
|
|
|
mov.f32 %f1009, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f1010, %f1009;
|
|
setp.eq.f32 %p104, %f1010, 0f3EE66666;
|
|
@%p104 bra $L__BB0_88;
|
|
|
|
mov.f32 %f1702, 0f7FFFFFFF;
|
|
|
|
$L__BB0_88:
|
|
add.f32 %f1013, %f297, 0f3EE66666;
|
|
mov.b32 %r375, %f1013;
|
|
setp.lt.s32 %p106, %r375, 2139095040;
|
|
@%p106 bra $L__BB0_93;
|
|
|
|
setp.gtu.f32 %p107, %f297, 0f7F800000;
|
|
@%p107 bra $L__BB0_92;
|
|
bra.uni $L__BB0_90;
|
|
|
|
$L__BB0_92:
|
|
add.f32 %f1702, %f292, 0f3EE66666;
|
|
bra.uni $L__BB0_93;
|
|
|
|
$L__BB0_90:
|
|
setp.neu.f32 %p108, %f297, 0f7F800000;
|
|
@%p108 bra $L__BB0_93;
|
|
|
|
selp.f32 %f1702, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
$L__BB0_93:
|
|
setp.eq.f32 %p109, %f292, 0f3F800000;
|
|
selp.f32 %f308, 0f3F800000, %f1702, %p109;
|
|
abs.f32 %f309, %f293;
|
|
setp.lt.f32 %p110, %f309, 0f00800000;
|
|
mul.f32 %f1015, %f309, 0f4B800000;
|
|
selp.f32 %f1016, %f1015, %f309, %p110;
|
|
selp.f32 %f1017, 0fC3170000, 0fC2FE0000, %p110;
|
|
mov.b32 %r376, %f1016;
|
|
and.b32 %r377, %r376, 8388607;
|
|
or.b32 %r378, %r377, 1065353216;
|
|
mov.b32 %f1018, %r378;
|
|
shr.u32 %r379, %r376, 23;
|
|
cvt.rn.f32.u32 %f1019, %r379;
|
|
add.f32 %f1020, %f1017, %f1019;
|
|
setp.gt.f32 %p111, %f1018, 0f3FB504F3;
|
|
mul.f32 %f1021, %f1018, 0f3F000000;
|
|
add.f32 %f1022, %f1020, 0f3F800000;
|
|
selp.f32 %f1023, %f1022, %f1020, %p111;
|
|
selp.f32 %f1024, %f1021, %f1018, %p111;
|
|
add.f32 %f1025, %f1024, 0fBF800000;
|
|
add.f32 %f1026, %f1024, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1027, %f1026;
|
|
add.f32 %f1028, %f1025, %f1025;
|
|
mul.f32 %f1029, %f1028, %f1027;
|
|
mul.f32 %f1030, %f1029, %f1029;
|
|
mov.f32 %f1031, 0f3C4CAF63;
|
|
mov.f32 %f1032, 0f3B18F0FE;
|
|
fma.rn.f32 %f1033, %f1032, %f1030, %f1031;
|
|
mov.f32 %f1034, 0f3DAAAABD;
|
|
fma.rn.f32 %f1035, %f1033, %f1030, %f1034;
|
|
mul.rn.f32 %f1036, %f1035, %f1030;
|
|
mul.rn.f32 %f1037, %f1036, %f1029;
|
|
sub.f32 %f1038, %f1025, %f1029;
|
|
add.f32 %f1039, %f1038, %f1038;
|
|
neg.f32 %f1040, %f1029;
|
|
fma.rn.f32 %f1041, %f1040, %f1025, %f1039;
|
|
mul.rn.f32 %f1042, %f1027, %f1041;
|
|
add.f32 %f1043, %f1037, %f1029;
|
|
sub.f32 %f1044, %f1029, %f1043;
|
|
add.f32 %f1045, %f1037, %f1044;
|
|
add.f32 %f1046, %f1042, %f1045;
|
|
add.f32 %f1047, %f1043, %f1046;
|
|
sub.f32 %f1048, %f1043, %f1047;
|
|
add.f32 %f1049, %f1046, %f1048;
|
|
mov.f32 %f1050, 0f3F317200;
|
|
mul.rn.f32 %f1051, %f1023, %f1050;
|
|
mov.f32 %f1052, 0f35BFBE8E;
|
|
mul.rn.f32 %f1053, %f1023, %f1052;
|
|
add.f32 %f1054, %f1051, %f1047;
|
|
sub.f32 %f1055, %f1051, %f1054;
|
|
add.f32 %f1056, %f1047, %f1055;
|
|
add.f32 %f1057, %f1049, %f1056;
|
|
add.f32 %f1058, %f1053, %f1057;
|
|
add.f32 %f1059, %f1054, %f1058;
|
|
sub.f32 %f1060, %f1054, %f1059;
|
|
add.f32 %f1061, %f1058, %f1060;
|
|
mov.f32 %f1062, 0f3EE66666;
|
|
mul.rn.f32 %f1063, %f1062, %f1059;
|
|
neg.f32 %f1064, %f1063;
|
|
fma.rn.f32 %f1065, %f1062, %f1059, %f1064;
|
|
fma.rn.f32 %f1066, %f1062, %f1061, %f1065;
|
|
mov.f32 %f1067, 0f00000000;
|
|
fma.rn.f32 %f1068, %f1067, %f1059, %f1066;
|
|
add.rn.f32 %f1069, %f1063, %f1068;
|
|
neg.f32 %f1070, %f1069;
|
|
add.rn.f32 %f1071, %f1063, %f1070;
|
|
add.rn.f32 %f1072, %f1071, %f1068;
|
|
mov.b32 %r380, %f1069;
|
|
setp.eq.s32 %p112, %r380, 1118925336;
|
|
add.s32 %r381, %r380, -1;
|
|
mov.b32 %f1073, %r381;
|
|
add.f32 %f1074, %f1072, 0f37000000;
|
|
selp.f32 %f310, %f1074, %f1072, %p112;
|
|
selp.f32 %f1075, %f1073, %f1069, %p112;
|
|
mov.f32 %f1076, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1077, %f1075, %f1076;
|
|
cvt.rzi.f32.f32 %f1078, %f1077;
|
|
abs.f32 %f1079, %f1078;
|
|
setp.gt.f32 %p113, %f1079, 0f42FC0000;
|
|
mov.b32 %r382, %f1078;
|
|
and.b32 %r383, %r382, -2147483648;
|
|
or.b32 %r384, %r383, 1123811328;
|
|
mov.b32 %f1080, %r384;
|
|
selp.f32 %f1081, %f1080, %f1078, %p113;
|
|
mov.f32 %f1082, 0fBF317218;
|
|
fma.rn.f32 %f1083, %f1081, %f1082, %f1075;
|
|
mov.f32 %f1084, 0f3102E308;
|
|
fma.rn.f32 %f1085, %f1081, %f1084, %f1083;
|
|
mul.f32 %f1086, %f1085, 0f3FB8AA3B;
|
|
add.f32 %f1087, %f1081, 0f4B40007F;
|
|
mov.b32 %r385, %f1087;
|
|
shl.b32 %r386, %r385, 23;
|
|
mov.b32 %f1088, %r386;
|
|
ex2.approx.ftz.f32 %f1089, %f1086;
|
|
mul.f32 %f311, %f1089, %f1088;
|
|
setp.eq.f32 %p114, %f311, 0f7F800000;
|
|
mov.f32 %f1703, 0f7F800000;
|
|
@%p114 bra $L__BB0_95;
|
|
|
|
fma.rn.f32 %f1703, %f311, %f310, %f311;
|
|
|
|
$L__BB0_95:
|
|
setp.lt.f32 %p115, %f293, 0f00000000;
|
|
and.pred %p5, %p115, %p101;
|
|
setp.eq.f32 %p117, %f293, 0f00000000;
|
|
@%p117 bra $L__BB0_99;
|
|
bra.uni $L__BB0_96;
|
|
|
|
$L__BB0_99:
|
|
add.f32 %f1094, %f293, %f293;
|
|
selp.f32 %f1705, %f1094, 0f00000000, %p101;
|
|
bra.uni $L__BB0_100;
|
|
|
|
$L__BB0_96:
|
|
mov.b32 %r387, %f1703;
|
|
xor.b32 %r388, %r387, -2147483648;
|
|
mov.b32 %f1090, %r388;
|
|
selp.f32 %f1705, %f1090, %f1703, %p5;
|
|
setp.geu.f32 %p118, %f293, 0f00000000;
|
|
@%p118 bra $L__BB0_100;
|
|
|
|
mov.f32 %f1091, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f1092, %f1091;
|
|
setp.eq.f32 %p119, %f1092, 0f3EE66666;
|
|
@%p119 bra $L__BB0_100;
|
|
|
|
mov.f32 %f1705, 0f7FFFFFFF;
|
|
|
|
$L__BB0_100:
|
|
add.f32 %f1095, %f309, 0f3EE66666;
|
|
mov.b32 %r389, %f1095;
|
|
setp.lt.s32 %p121, %r389, 2139095040;
|
|
@%p121 bra $L__BB0_105;
|
|
|
|
setp.gtu.f32 %p122, %f309, 0f7F800000;
|
|
@%p122 bra $L__BB0_104;
|
|
bra.uni $L__BB0_102;
|
|
|
|
$L__BB0_104:
|
|
add.f32 %f1705, %f293, 0f3EE66666;
|
|
bra.uni $L__BB0_105;
|
|
|
|
$L__BB0_102:
|
|
setp.neu.f32 %p123, %f309, 0f7F800000;
|
|
@%p123 bra $L__BB0_105;
|
|
|
|
selp.f32 %f1705, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
$L__BB0_105:
|
|
setp.eq.f32 %p124, %f293, 0f3F800000;
|
|
selp.f32 %f320, 0f3F800000, %f1705, %p124;
|
|
abs.f32 %f321, %f295;
|
|
setp.lt.f32 %p125, %f321, 0f00800000;
|
|
mul.f32 %f1097, %f321, 0f4B800000;
|
|
selp.f32 %f1098, %f1097, %f321, %p125;
|
|
selp.f32 %f1099, 0fC3170000, 0fC2FE0000, %p125;
|
|
mov.b32 %r390, %f1098;
|
|
and.b32 %r391, %r390, 8388607;
|
|
or.b32 %r392, %r391, 1065353216;
|
|
mov.b32 %f1100, %r392;
|
|
shr.u32 %r393, %r390, 23;
|
|
cvt.rn.f32.u32 %f1101, %r393;
|
|
add.f32 %f1102, %f1099, %f1101;
|
|
setp.gt.f32 %p126, %f1100, 0f3FB504F3;
|
|
mul.f32 %f1103, %f1100, 0f3F000000;
|
|
add.f32 %f1104, %f1102, 0f3F800000;
|
|
selp.f32 %f1105, %f1104, %f1102, %p126;
|
|
selp.f32 %f1106, %f1103, %f1100, %p126;
|
|
add.f32 %f1107, %f1106, 0fBF800000;
|
|
add.f32 %f1108, %f1106, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1109, %f1108;
|
|
add.f32 %f1110, %f1107, %f1107;
|
|
mul.f32 %f1111, %f1110, %f1109;
|
|
mul.f32 %f1112, %f1111, %f1111;
|
|
mov.f32 %f1113, 0f3C4CAF63;
|
|
mov.f32 %f1114, 0f3B18F0FE;
|
|
fma.rn.f32 %f1115, %f1114, %f1112, %f1113;
|
|
mov.f32 %f1116, 0f3DAAAABD;
|
|
fma.rn.f32 %f1117, %f1115, %f1112, %f1116;
|
|
mul.rn.f32 %f1118, %f1117, %f1112;
|
|
mul.rn.f32 %f1119, %f1118, %f1111;
|
|
sub.f32 %f1120, %f1107, %f1111;
|
|
add.f32 %f1121, %f1120, %f1120;
|
|
neg.f32 %f1122, %f1111;
|
|
fma.rn.f32 %f1123, %f1122, %f1107, %f1121;
|
|
mul.rn.f32 %f1124, %f1109, %f1123;
|
|
add.f32 %f1125, %f1119, %f1111;
|
|
sub.f32 %f1126, %f1111, %f1125;
|
|
add.f32 %f1127, %f1119, %f1126;
|
|
add.f32 %f1128, %f1124, %f1127;
|
|
add.f32 %f1129, %f1125, %f1128;
|
|
sub.f32 %f1130, %f1125, %f1129;
|
|
add.f32 %f1131, %f1128, %f1130;
|
|
mov.f32 %f1132, 0f3F317200;
|
|
mul.rn.f32 %f1133, %f1105, %f1132;
|
|
mov.f32 %f1134, 0f35BFBE8E;
|
|
mul.rn.f32 %f1135, %f1105, %f1134;
|
|
add.f32 %f1136, %f1133, %f1129;
|
|
sub.f32 %f1137, %f1133, %f1136;
|
|
add.f32 %f1138, %f1129, %f1137;
|
|
add.f32 %f1139, %f1131, %f1138;
|
|
add.f32 %f1140, %f1135, %f1139;
|
|
add.f32 %f1141, %f1136, %f1140;
|
|
sub.f32 %f1142, %f1136, %f1141;
|
|
add.f32 %f1143, %f1140, %f1142;
|
|
mov.f32 %f1144, 0f3EE66666;
|
|
mul.rn.f32 %f1145, %f1144, %f1141;
|
|
neg.f32 %f1146, %f1145;
|
|
fma.rn.f32 %f1147, %f1144, %f1141, %f1146;
|
|
fma.rn.f32 %f1148, %f1144, %f1143, %f1147;
|
|
mov.f32 %f1149, 0f00000000;
|
|
fma.rn.f32 %f1150, %f1149, %f1141, %f1148;
|
|
add.rn.f32 %f1151, %f1145, %f1150;
|
|
neg.f32 %f1152, %f1151;
|
|
add.rn.f32 %f1153, %f1145, %f1152;
|
|
add.rn.f32 %f1154, %f1153, %f1150;
|
|
mov.b32 %r394, %f1151;
|
|
setp.eq.s32 %p127, %r394, 1118925336;
|
|
add.s32 %r395, %r394, -1;
|
|
mov.b32 %f1155, %r395;
|
|
add.f32 %f1156, %f1154, 0f37000000;
|
|
selp.f32 %f322, %f1156, %f1154, %p127;
|
|
selp.f32 %f1157, %f1155, %f1151, %p127;
|
|
mov.f32 %f1158, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1159, %f1157, %f1158;
|
|
cvt.rzi.f32.f32 %f1160, %f1159;
|
|
abs.f32 %f1161, %f1160;
|
|
setp.gt.f32 %p128, %f1161, 0f42FC0000;
|
|
mov.b32 %r396, %f1160;
|
|
and.b32 %r397, %r396, -2147483648;
|
|
or.b32 %r398, %r397, 1123811328;
|
|
mov.b32 %f1162, %r398;
|
|
selp.f32 %f1163, %f1162, %f1160, %p128;
|
|
mov.f32 %f1164, 0fBF317218;
|
|
fma.rn.f32 %f1165, %f1163, %f1164, %f1157;
|
|
mov.f32 %f1166, 0f3102E308;
|
|
fma.rn.f32 %f1167, %f1163, %f1166, %f1165;
|
|
mul.f32 %f1168, %f1167, 0f3FB8AA3B;
|
|
add.f32 %f1169, %f1163, 0f4B40007F;
|
|
mov.b32 %r399, %f1169;
|
|
shl.b32 %r400, %r399, 23;
|
|
mov.b32 %f1170, %r400;
|
|
ex2.approx.ftz.f32 %f1171, %f1168;
|
|
mul.f32 %f323, %f1171, %f1170;
|
|
setp.eq.f32 %p129, %f323, 0f7F800000;
|
|
mov.f32 %f1706, 0f7F800000;
|
|
@%p129 bra $L__BB0_107;
|
|
|
|
fma.rn.f32 %f1706, %f323, %f322, %f323;
|
|
|
|
$L__BB0_107:
|
|
setp.lt.f32 %p130, %f295, 0f00000000;
|
|
and.pred %p6, %p130, %p101;
|
|
setp.eq.f32 %p132, %f295, 0f00000000;
|
|
@%p132 bra $L__BB0_111;
|
|
bra.uni $L__BB0_108;
|
|
|
|
$L__BB0_111:
|
|
add.f32 %f1176, %f295, %f295;
|
|
selp.f32 %f1708, %f1176, 0f00000000, %p101;
|
|
bra.uni $L__BB0_112;
|
|
|
|
$L__BB0_108:
|
|
mov.b32 %r401, %f1706;
|
|
xor.b32 %r402, %r401, -2147483648;
|
|
mov.b32 %f1172, %r402;
|
|
selp.f32 %f1708, %f1172, %f1706, %p6;
|
|
setp.geu.f32 %p133, %f295, 0f00000000;
|
|
@%p133 bra $L__BB0_112;
|
|
|
|
mov.f32 %f1173, 0f3EE66666;
|
|
cvt.rzi.f32.f32 %f1174, %f1173;
|
|
setp.eq.f32 %p134, %f1174, 0f3EE66666;
|
|
@%p134 bra $L__BB0_112;
|
|
|
|
mov.f32 %f1708, 0f7FFFFFFF;
|
|
|
|
$L__BB0_112:
|
|
add.f32 %f1177, %f321, 0f3EE66666;
|
|
mov.b32 %r403, %f1177;
|
|
setp.lt.s32 %p136, %r403, 2139095040;
|
|
@%p136 bra $L__BB0_117;
|
|
|
|
setp.gtu.f32 %p137, %f321, 0f7F800000;
|
|
@%p137 bra $L__BB0_116;
|
|
bra.uni $L__BB0_114;
|
|
|
|
$L__BB0_116:
|
|
add.f32 %f1708, %f295, 0f3EE66666;
|
|
bra.uni $L__BB0_117;
|
|
|
|
$L__BB0_114:
|
|
setp.neu.f32 %p138, %f321, 0f7F800000;
|
|
@%p138 bra $L__BB0_117;
|
|
|
|
selp.f32 %f1708, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
$L__BB0_117:
|
|
setp.eq.f32 %p139, %f295, 0f3F800000;
|
|
mov.f32 %f1179, 0f3F800000;
|
|
selp.f32 %f1180, 0f3F800000, %f1708, %p139;
|
|
ld.const.u64 %rd81, [params+144];
|
|
cvta.to.global.u64 %rd22, %rd81;
|
|
ld.const.u32 %r404, [params+136];
|
|
mad.lo.s32 %r405, %r404, %r7, %r6;
|
|
cvt.u64.u32 %rd23, %r405;
|
|
min.f32 %f1181, %f308, %f1179;
|
|
mov.f32 %f1182, 0f00000000;
|
|
max.f32 %f332, %f1182, %f1181;
|
|
min.f32 %f1183, %f320, %f1179;
|
|
max.f32 %f333, %f1182, %f1183;
|
|
min.f32 %f1184, %f1180, %f1179;
|
|
max.f32 %f334, %f1182, %f1184;
|
|
mov.f32 %f1185, 0f3E555555;
|
|
cvt.rzi.f32.f32 %f1186, %f1185;
|
|
add.f32 %f1187, %f1186, %f1186;
|
|
mov.f32 %f1188, 0f3ED55555;
|
|
sub.f32 %f1189, %f1188, %f1187;
|
|
abs.f32 %f335, %f1189;
|
|
abs.f32 %f336, %f332;
|
|
setp.lt.f32 %p140, %f336, 0f00800000;
|
|
mul.f32 %f1190, %f336, 0f4B800000;
|
|
selp.f32 %f1191, %f1190, %f336, %p140;
|
|
selp.f32 %f1192, 0fC3170000, 0fC2FE0000, %p140;
|
|
mov.b32 %r406, %f1191;
|
|
and.b32 %r407, %r406, 8388607;
|
|
or.b32 %r408, %r407, 1065353216;
|
|
mov.b32 %f1193, %r408;
|
|
shr.u32 %r409, %r406, 23;
|
|
cvt.rn.f32.u32 %f1194, %r409;
|
|
add.f32 %f1195, %f1192, %f1194;
|
|
setp.gt.f32 %p141, %f1193, 0f3FB504F3;
|
|
mul.f32 %f1196, %f1193, 0f3F000000;
|
|
add.f32 %f1197, %f1195, 0f3F800000;
|
|
selp.f32 %f1198, %f1197, %f1195, %p141;
|
|
selp.f32 %f1199, %f1196, %f1193, %p141;
|
|
add.f32 %f1200, %f1199, 0fBF800000;
|
|
add.f32 %f1201, %f1199, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1202, %f1201;
|
|
add.f32 %f1203, %f1200, %f1200;
|
|
mul.f32 %f1204, %f1203, %f1202;
|
|
mul.f32 %f1205, %f1204, %f1204;
|
|
mov.f32 %f1206, 0f3C4CAF63;
|
|
mov.f32 %f1207, 0f3B18F0FE;
|
|
fma.rn.f32 %f1208, %f1207, %f1205, %f1206;
|
|
mov.f32 %f1209, 0f3DAAAABD;
|
|
fma.rn.f32 %f1210, %f1208, %f1205, %f1209;
|
|
mul.rn.f32 %f1211, %f1210, %f1205;
|
|
mul.rn.f32 %f1212, %f1211, %f1204;
|
|
sub.f32 %f1213, %f1200, %f1204;
|
|
add.f32 %f1214, %f1213, %f1213;
|
|
neg.f32 %f1215, %f1204;
|
|
fma.rn.f32 %f1216, %f1215, %f1200, %f1214;
|
|
mul.rn.f32 %f1217, %f1202, %f1216;
|
|
add.f32 %f1218, %f1212, %f1204;
|
|
sub.f32 %f1219, %f1204, %f1218;
|
|
add.f32 %f1220, %f1212, %f1219;
|
|
add.f32 %f1221, %f1217, %f1220;
|
|
add.f32 %f1222, %f1218, %f1221;
|
|
sub.f32 %f1223, %f1218, %f1222;
|
|
add.f32 %f1224, %f1221, %f1223;
|
|
mov.f32 %f1225, 0f3F317200;
|
|
mul.rn.f32 %f1226, %f1198, %f1225;
|
|
mov.f32 %f1227, 0f35BFBE8E;
|
|
mul.rn.f32 %f1228, %f1198, %f1227;
|
|
add.f32 %f1229, %f1226, %f1222;
|
|
sub.f32 %f1230, %f1226, %f1229;
|
|
add.f32 %f1231, %f1222, %f1230;
|
|
add.f32 %f1232, %f1224, %f1231;
|
|
add.f32 %f1233, %f1228, %f1232;
|
|
add.f32 %f1234, %f1229, %f1233;
|
|
sub.f32 %f1235, %f1229, %f1234;
|
|
add.f32 %f1236, %f1233, %f1235;
|
|
mul.rn.f32 %f1237, %f1188, %f1234;
|
|
neg.f32 %f1238, %f1237;
|
|
fma.rn.f32 %f1239, %f1188, %f1234, %f1238;
|
|
fma.rn.f32 %f1240, %f1188, %f1236, %f1239;
|
|
fma.rn.f32 %f1241, %f1182, %f1234, %f1240;
|
|
add.rn.f32 %f1242, %f1237, %f1241;
|
|
neg.f32 %f1243, %f1242;
|
|
add.rn.f32 %f1244, %f1237, %f1243;
|
|
add.rn.f32 %f1245, %f1244, %f1241;
|
|
mov.b32 %r410, %f1242;
|
|
setp.eq.s32 %p142, %r410, 1118925336;
|
|
add.s32 %r411, %r410, -1;
|
|
mov.b32 %f1246, %r411;
|
|
add.f32 %f1247, %f1245, 0f37000000;
|
|
selp.f32 %f337, %f1247, %f1245, %p142;
|
|
selp.f32 %f1248, %f1246, %f1242, %p142;
|
|
mov.f32 %f1249, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1250, %f1248, %f1249;
|
|
cvt.rzi.f32.f32 %f1251, %f1250;
|
|
abs.f32 %f1252, %f1251;
|
|
setp.gt.f32 %p143, %f1252, 0f42FC0000;
|
|
mov.b32 %r412, %f1251;
|
|
and.b32 %r413, %r412, -2147483648;
|
|
or.b32 %r414, %r413, 1123811328;
|
|
mov.b32 %f1253, %r414;
|
|
selp.f32 %f1254, %f1253, %f1251, %p143;
|
|
mov.f32 %f1255, 0fBF317218;
|
|
fma.rn.f32 %f1256, %f1254, %f1255, %f1248;
|
|
mov.f32 %f1257, 0f3102E308;
|
|
fma.rn.f32 %f1258, %f1254, %f1257, %f1256;
|
|
mul.f32 %f1259, %f1258, 0f3FB8AA3B;
|
|
add.f32 %f1260, %f1254, 0f4B40007F;
|
|
mov.b32 %r415, %f1260;
|
|
shl.b32 %r416, %r415, 23;
|
|
mov.b32 %f1261, %r416;
|
|
ex2.approx.ftz.f32 %f1262, %f1259;
|
|
mul.f32 %f338, %f1262, %f1261;
|
|
setp.eq.f32 %p144, %f338, 0f7F800000;
|
|
mov.f32 %f1709, 0f7F800000;
|
|
@%p144 bra $L__BB0_119;
|
|
|
|
fma.rn.f32 %f1709, %f338, %f337, %f338;
|
|
|
|
$L__BB0_119:
|
|
setp.lt.f32 %p145, %f332, 0f00000000;
|
|
setp.eq.f32 %p146, %f335, 0f3F800000;
|
|
and.pred %p7, %p145, %p146;
|
|
setp.eq.f32 %p147, %f332, 0f00000000;
|
|
@%p147 bra $L__BB0_123;
|
|
bra.uni $L__BB0_120;
|
|
|
|
$L__BB0_123:
|
|
add.f32 %f1267, %f332, %f332;
|
|
selp.f32 %f1711, %f1267, 0f00000000, %p146;
|
|
bra.uni $L__BB0_124;
|
|
|
|
$L__BB0_120:
|
|
mov.b32 %r417, %f1709;
|
|
xor.b32 %r418, %r417, -2147483648;
|
|
mov.b32 %f1263, %r418;
|
|
selp.f32 %f1711, %f1263, %f1709, %p7;
|
|
setp.geu.f32 %p148, %f332, 0f00000000;
|
|
@%p148 bra $L__BB0_124;
|
|
|
|
mov.f32 %f1264, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1265, %f1264;
|
|
setp.eq.f32 %p149, %f1265, 0f3ED55555;
|
|
@%p149 bra $L__BB0_124;
|
|
|
|
mov.f32 %f1711, 0f7FFFFFFF;
|
|
|
|
$L__BB0_124:
|
|
add.f32 %f1268, %f336, 0f3ED55555;
|
|
mov.b32 %r419, %f1268;
|
|
setp.lt.s32 %p151, %r419, 2139095040;
|
|
@%p151 bra $L__BB0_129;
|
|
|
|
setp.gtu.f32 %p152, %f336, 0f7F800000;
|
|
@%p152 bra $L__BB0_128;
|
|
bra.uni $L__BB0_126;
|
|
|
|
$L__BB0_128:
|
|
add.f32 %f1711, %f332, 0f3ED55555;
|
|
bra.uni $L__BB0_129;
|
|
|
|
$L__BB0_126:
|
|
setp.neu.f32 %p153, %f336, 0f7F800000;
|
|
@%p153 bra $L__BB0_129;
|
|
|
|
selp.f32 %f1711, 0fFF800000, 0f7F800000, %p7;
|
|
|
|
$L__BB0_129:
|
|
abs.f32 %f347, %f333;
|
|
setp.lt.f32 %p154, %f347, 0f00800000;
|
|
mul.f32 %f1270, %f347, 0f4B800000;
|
|
selp.f32 %f1271, %f1270, %f347, %p154;
|
|
selp.f32 %f1272, 0fC3170000, 0fC2FE0000, %p154;
|
|
mov.b32 %r420, %f1271;
|
|
and.b32 %r421, %r420, 8388607;
|
|
or.b32 %r422, %r421, 1065353216;
|
|
mov.b32 %f1273, %r422;
|
|
shr.u32 %r423, %r420, 23;
|
|
cvt.rn.f32.u32 %f1274, %r423;
|
|
add.f32 %f1275, %f1272, %f1274;
|
|
setp.gt.f32 %p155, %f1273, 0f3FB504F3;
|
|
mul.f32 %f1276, %f1273, 0f3F000000;
|
|
add.f32 %f1277, %f1275, 0f3F800000;
|
|
selp.f32 %f1278, %f1277, %f1275, %p155;
|
|
selp.f32 %f1279, %f1276, %f1273, %p155;
|
|
add.f32 %f1280, %f1279, 0fBF800000;
|
|
add.f32 %f1281, %f1279, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1282, %f1281;
|
|
add.f32 %f1283, %f1280, %f1280;
|
|
mul.f32 %f1284, %f1283, %f1282;
|
|
mul.f32 %f1285, %f1284, %f1284;
|
|
mov.f32 %f1286, 0f3C4CAF63;
|
|
mov.f32 %f1287, 0f3B18F0FE;
|
|
fma.rn.f32 %f1288, %f1287, %f1285, %f1286;
|
|
mov.f32 %f1289, 0f3DAAAABD;
|
|
fma.rn.f32 %f1290, %f1288, %f1285, %f1289;
|
|
mul.rn.f32 %f1291, %f1290, %f1285;
|
|
mul.rn.f32 %f1292, %f1291, %f1284;
|
|
sub.f32 %f1293, %f1280, %f1284;
|
|
add.f32 %f1294, %f1293, %f1293;
|
|
neg.f32 %f1295, %f1284;
|
|
fma.rn.f32 %f1296, %f1295, %f1280, %f1294;
|
|
mul.rn.f32 %f1297, %f1282, %f1296;
|
|
add.f32 %f1298, %f1292, %f1284;
|
|
sub.f32 %f1299, %f1284, %f1298;
|
|
add.f32 %f1300, %f1292, %f1299;
|
|
add.f32 %f1301, %f1297, %f1300;
|
|
add.f32 %f1302, %f1298, %f1301;
|
|
sub.f32 %f1303, %f1298, %f1302;
|
|
add.f32 %f1304, %f1301, %f1303;
|
|
mov.f32 %f1305, 0f3F317200;
|
|
mul.rn.f32 %f1306, %f1278, %f1305;
|
|
mov.f32 %f1307, 0f35BFBE8E;
|
|
mul.rn.f32 %f1308, %f1278, %f1307;
|
|
add.f32 %f1309, %f1306, %f1302;
|
|
sub.f32 %f1310, %f1306, %f1309;
|
|
add.f32 %f1311, %f1302, %f1310;
|
|
add.f32 %f1312, %f1304, %f1311;
|
|
add.f32 %f1313, %f1308, %f1312;
|
|
add.f32 %f1314, %f1309, %f1313;
|
|
sub.f32 %f1315, %f1309, %f1314;
|
|
add.f32 %f1316, %f1313, %f1315;
|
|
mov.f32 %f1317, 0f3ED55555;
|
|
mul.rn.f32 %f1318, %f1317, %f1314;
|
|
neg.f32 %f1319, %f1318;
|
|
fma.rn.f32 %f1320, %f1317, %f1314, %f1319;
|
|
fma.rn.f32 %f1321, %f1317, %f1316, %f1320;
|
|
mov.f32 %f1322, 0f00000000;
|
|
fma.rn.f32 %f1323, %f1322, %f1314, %f1321;
|
|
add.rn.f32 %f1324, %f1318, %f1323;
|
|
neg.f32 %f1325, %f1324;
|
|
add.rn.f32 %f1326, %f1318, %f1325;
|
|
add.rn.f32 %f1327, %f1326, %f1323;
|
|
mov.b32 %r424, %f1324;
|
|
setp.eq.s32 %p156, %r424, 1118925336;
|
|
add.s32 %r425, %r424, -1;
|
|
mov.b32 %f1328, %r425;
|
|
add.f32 %f1329, %f1327, 0f37000000;
|
|
selp.f32 %f348, %f1329, %f1327, %p156;
|
|
selp.f32 %f1330, %f1328, %f1324, %p156;
|
|
mov.f32 %f1331, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1332, %f1330, %f1331;
|
|
cvt.rzi.f32.f32 %f1333, %f1332;
|
|
abs.f32 %f1334, %f1333;
|
|
setp.gt.f32 %p157, %f1334, 0f42FC0000;
|
|
mov.b32 %r426, %f1333;
|
|
and.b32 %r427, %r426, -2147483648;
|
|
or.b32 %r428, %r427, 1123811328;
|
|
mov.b32 %f1335, %r428;
|
|
selp.f32 %f1336, %f1335, %f1333, %p157;
|
|
mov.f32 %f1337, 0fBF317218;
|
|
fma.rn.f32 %f1338, %f1336, %f1337, %f1330;
|
|
mov.f32 %f1339, 0f3102E308;
|
|
fma.rn.f32 %f1340, %f1336, %f1339, %f1338;
|
|
mul.f32 %f1341, %f1340, 0f3FB8AA3B;
|
|
add.f32 %f1342, %f1336, 0f4B40007F;
|
|
mov.b32 %r429, %f1342;
|
|
shl.b32 %r430, %r429, 23;
|
|
mov.b32 %f1343, %r430;
|
|
ex2.approx.ftz.f32 %f1344, %f1341;
|
|
mul.f32 %f349, %f1344, %f1343;
|
|
setp.eq.f32 %p158, %f349, 0f7F800000;
|
|
mov.f32 %f1712, 0f7F800000;
|
|
@%p158 bra $L__BB0_131;
|
|
|
|
fma.rn.f32 %f1712, %f349, %f348, %f349;
|
|
|
|
$L__BB0_131:
|
|
setp.lt.f32 %p159, %f333, 0f00000000;
|
|
and.pred %p8, %p159, %p146;
|
|
setp.eq.f32 %p161, %f333, 0f00000000;
|
|
@%p161 bra $L__BB0_135;
|
|
bra.uni $L__BB0_132;
|
|
|
|
$L__BB0_135:
|
|
add.f32 %f1349, %f333, %f333;
|
|
selp.f32 %f1714, %f1349, 0f00000000, %p146;
|
|
bra.uni $L__BB0_136;
|
|
|
|
$L__BB0_132:
|
|
mov.b32 %r431, %f1712;
|
|
xor.b32 %r432, %r431, -2147483648;
|
|
mov.b32 %f1345, %r432;
|
|
selp.f32 %f1714, %f1345, %f1712, %p8;
|
|
setp.geu.f32 %p162, %f333, 0f00000000;
|
|
@%p162 bra $L__BB0_136;
|
|
|
|
mov.f32 %f1346, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1347, %f1346;
|
|
setp.eq.f32 %p163, %f1347, 0f3ED55555;
|
|
@%p163 bra $L__BB0_136;
|
|
|
|
mov.f32 %f1714, 0f7FFFFFFF;
|
|
|
|
$L__BB0_136:
|
|
add.f32 %f1350, %f347, 0f3ED55555;
|
|
mov.b32 %r433, %f1350;
|
|
setp.lt.s32 %p165, %r433, 2139095040;
|
|
@%p165 bra $L__BB0_141;
|
|
|
|
setp.gtu.f32 %p166, %f347, 0f7F800000;
|
|
@%p166 bra $L__BB0_140;
|
|
bra.uni $L__BB0_138;
|
|
|
|
$L__BB0_140:
|
|
add.f32 %f1714, %f333, 0f3ED55555;
|
|
bra.uni $L__BB0_141;
|
|
|
|
$L__BB0_138:
|
|
setp.neu.f32 %p167, %f347, 0f7F800000;
|
|
@%p167 bra $L__BB0_141;
|
|
|
|
selp.f32 %f1714, 0fFF800000, 0f7F800000, %p8;
|
|
|
|
$L__BB0_141:
|
|
abs.f32 %f358, %f334;
|
|
setp.lt.f32 %p168, %f358, 0f00800000;
|
|
mul.f32 %f1352, %f358, 0f4B800000;
|
|
selp.f32 %f1353, %f1352, %f358, %p168;
|
|
selp.f32 %f1354, 0fC3170000, 0fC2FE0000, %p168;
|
|
mov.b32 %r434, %f1353;
|
|
and.b32 %r435, %r434, 8388607;
|
|
or.b32 %r436, %r435, 1065353216;
|
|
mov.b32 %f1355, %r436;
|
|
shr.u32 %r437, %r434, 23;
|
|
cvt.rn.f32.u32 %f1356, %r437;
|
|
add.f32 %f1357, %f1354, %f1356;
|
|
setp.gt.f32 %p169, %f1355, 0f3FB504F3;
|
|
mul.f32 %f1358, %f1355, 0f3F000000;
|
|
add.f32 %f1359, %f1357, 0f3F800000;
|
|
selp.f32 %f1360, %f1359, %f1357, %p169;
|
|
selp.f32 %f1361, %f1358, %f1355, %p169;
|
|
add.f32 %f1362, %f1361, 0fBF800000;
|
|
add.f32 %f1363, %f1361, 0f3F800000;
|
|
rcp.approx.ftz.f32 %f1364, %f1363;
|
|
add.f32 %f1365, %f1362, %f1362;
|
|
mul.f32 %f1366, %f1365, %f1364;
|
|
mul.f32 %f1367, %f1366, %f1366;
|
|
mov.f32 %f1368, 0f3C4CAF63;
|
|
mov.f32 %f1369, 0f3B18F0FE;
|
|
fma.rn.f32 %f1370, %f1369, %f1367, %f1368;
|
|
mov.f32 %f1371, 0f3DAAAABD;
|
|
fma.rn.f32 %f1372, %f1370, %f1367, %f1371;
|
|
mul.rn.f32 %f1373, %f1372, %f1367;
|
|
mul.rn.f32 %f1374, %f1373, %f1366;
|
|
sub.f32 %f1375, %f1362, %f1366;
|
|
add.f32 %f1376, %f1375, %f1375;
|
|
neg.f32 %f1377, %f1366;
|
|
fma.rn.f32 %f1378, %f1377, %f1362, %f1376;
|
|
mul.rn.f32 %f1379, %f1364, %f1378;
|
|
add.f32 %f1380, %f1374, %f1366;
|
|
sub.f32 %f1381, %f1366, %f1380;
|
|
add.f32 %f1382, %f1374, %f1381;
|
|
add.f32 %f1383, %f1379, %f1382;
|
|
add.f32 %f1384, %f1380, %f1383;
|
|
sub.f32 %f1385, %f1380, %f1384;
|
|
add.f32 %f1386, %f1383, %f1385;
|
|
mov.f32 %f1387, 0f3F317200;
|
|
mul.rn.f32 %f1388, %f1360, %f1387;
|
|
mov.f32 %f1389, 0f35BFBE8E;
|
|
mul.rn.f32 %f1390, %f1360, %f1389;
|
|
add.f32 %f1391, %f1388, %f1384;
|
|
sub.f32 %f1392, %f1388, %f1391;
|
|
add.f32 %f1393, %f1384, %f1392;
|
|
add.f32 %f1394, %f1386, %f1393;
|
|
add.f32 %f1395, %f1390, %f1394;
|
|
add.f32 %f1396, %f1391, %f1395;
|
|
sub.f32 %f1397, %f1391, %f1396;
|
|
add.f32 %f1398, %f1395, %f1397;
|
|
mov.f32 %f1399, 0f3ED55555;
|
|
mul.rn.f32 %f1400, %f1399, %f1396;
|
|
neg.f32 %f1401, %f1400;
|
|
fma.rn.f32 %f1402, %f1399, %f1396, %f1401;
|
|
fma.rn.f32 %f1403, %f1399, %f1398, %f1402;
|
|
mov.f32 %f1404, 0f00000000;
|
|
fma.rn.f32 %f1405, %f1404, %f1396, %f1403;
|
|
add.rn.f32 %f1406, %f1400, %f1405;
|
|
neg.f32 %f1407, %f1406;
|
|
add.rn.f32 %f1408, %f1400, %f1407;
|
|
add.rn.f32 %f1409, %f1408, %f1405;
|
|
mov.b32 %r438, %f1406;
|
|
setp.eq.s32 %p170, %r438, 1118925336;
|
|
add.s32 %r439, %r438, -1;
|
|
mov.b32 %f1410, %r439;
|
|
add.f32 %f1411, %f1409, 0f37000000;
|
|
selp.f32 %f359, %f1411, %f1409, %p170;
|
|
selp.f32 %f1412, %f1410, %f1406, %p170;
|
|
mov.f32 %f1413, 0f3FB8AA3B;
|
|
mul.rn.f32 %f1414, %f1412, %f1413;
|
|
cvt.rzi.f32.f32 %f1415, %f1414;
|
|
abs.f32 %f1416, %f1415;
|
|
setp.gt.f32 %p171, %f1416, 0f42FC0000;
|
|
mov.b32 %r440, %f1415;
|
|
and.b32 %r441, %r440, -2147483648;
|
|
or.b32 %r442, %r441, 1123811328;
|
|
mov.b32 %f1417, %r442;
|
|
selp.f32 %f1418, %f1417, %f1415, %p171;
|
|
mov.f32 %f1419, 0fBF317218;
|
|
fma.rn.f32 %f1420, %f1418, %f1419, %f1412;
|
|
mov.f32 %f1421, 0f3102E308;
|
|
fma.rn.f32 %f1422, %f1418, %f1421, %f1420;
|
|
mul.f32 %f1423, %f1422, 0f3FB8AA3B;
|
|
add.f32 %f1424, %f1418, 0f4B40007F;
|
|
mov.b32 %r443, %f1424;
|
|
shl.b32 %r444, %r443, 23;
|
|
mov.b32 %f1425, %r444;
|
|
ex2.approx.ftz.f32 %f1426, %f1423;
|
|
mul.f32 %f360, %f1426, %f1425;
|
|
setp.eq.f32 %p172, %f360, 0f7F800000;
|
|
mov.f32 %f1715, 0f7F800000;
|
|
@%p172 bra $L__BB0_143;
|
|
|
|
fma.rn.f32 %f1715, %f360, %f359, %f360;
|
|
|
|
$L__BB0_143:
|
|
setp.lt.f32 %p173, %f334, 0f00000000;
|
|
and.pred %p9, %p173, %p146;
|
|
setp.eq.f32 %p175, %f334, 0f00000000;
|
|
@%p175 bra $L__BB0_147;
|
|
bra.uni $L__BB0_144;
|
|
|
|
$L__BB0_147:
|
|
add.f32 %f1431, %f334, %f334;
|
|
selp.f32 %f1717, %f1431, 0f00000000, %p146;
|
|
bra.uni $L__BB0_148;
|
|
|
|
$L__BB0_144:
|
|
mov.b32 %r445, %f1715;
|
|
xor.b32 %r446, %r445, -2147483648;
|
|
mov.b32 %f1427, %r446;
|
|
selp.f32 %f1717, %f1427, %f1715, %p9;
|
|
setp.geu.f32 %p176, %f334, 0f00000000;
|
|
@%p176 bra $L__BB0_148;
|
|
|
|
mov.f32 %f1428, 0f3ED55555;
|
|
cvt.rzi.f32.f32 %f1429, %f1428;
|
|
setp.eq.f32 %p177, %f1429, 0f3ED55555;
|
|
@%p177 bra $L__BB0_148;
|
|
|
|
mov.f32 %f1717, 0f7FFFFFFF;
|
|
|
|
$L__BB0_148:
|
|
add.f32 %f1432, %f358, 0f3ED55555;
|
|
mov.b32 %r447, %f1432;
|
|
setp.lt.s32 %p179, %r447, 2139095040;
|
|
@%p179 bra $L__BB0_153;
|
|
|
|
setp.gtu.f32 %p180, %f358, 0f7F800000;
|
|
@%p180 bra $L__BB0_152;
|
|
bra.uni $L__BB0_150;
|
|
|
|
$L__BB0_152:
|
|
add.f32 %f1717, %f334, 0f3ED55555;
|
|
bra.uni $L__BB0_153;
|
|
|
|
$L__BB0_150:
|
|
setp.neu.f32 %p181, %f358, 0f7F800000;
|
|
@%p181 bra $L__BB0_153;
|
|
|
|
selp.f32 %f1717, 0fFF800000, 0f7F800000, %p9;
|
|
|
|
$L__BB0_153:
|
|
fma.rn.f32 %f1433, %f1711, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p182, %f332, 0f3F800000;
|
|
mov.f32 %f1434, 0f3F800000;
|
|
selp.f32 %f1435, 0f3F7FFFFF, %f1433, %p182;
|
|
mul.f32 %f1436, %f332, 0f414EB852;
|
|
setp.lt.f32 %p183, %f332, 0f3B4D2E1C;
|
|
selp.f32 %f1437, %f1436, %f1435, %p183;
|
|
fma.rn.f32 %f1438, %f1714, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p184, %f333, 0f3F800000;
|
|
selp.f32 %f1439, 0f3F7FFFFF, %f1438, %p184;
|
|
mul.f32 %f1440, %f333, 0f414EB852;
|
|
setp.lt.f32 %p185, %f333, 0f3B4D2E1C;
|
|
selp.f32 %f1441, %f1440, %f1439, %p185;
|
|
fma.rn.f32 %f1442, %f1717, 0f3F870A3D, 0fBD6147AE;
|
|
setp.eq.f32 %p186, %f334, 0f3F800000;
|
|
selp.f32 %f1443, 0f3F7FFFFF, %f1442, %p186;
|
|
mul.f32 %f1444, %f334, 0f414EB852;
|
|
setp.lt.f32 %p187, %f334, 0f3B4D2E1C;
|
|
selp.f32 %f1445, %f1444, %f1443, %p187;
|
|
min.f32 %f1446, %f1437, %f1434;
|
|
mov.f32 %f1447, 0f00000000;
|
|
max.f32 %f1448, %f1447, %f1446;
|
|
mul.f32 %f1449, %f1448, 0f43800000;
|
|
cvt.rzi.u32.f32 %r448, %f1449;
|
|
min.u32 %r449, %r448, 255;
|
|
min.f32 %f1450, %f1441, %f1434;
|
|
max.f32 %f1451, %f1447, %f1450;
|
|
mul.f32 %f1452, %f1451, 0f43800000;
|
|
cvt.rzi.u32.f32 %r450, %f1452;
|
|
min.u32 %r451, %r450, 255;
|
|
min.f32 %f1453, %f1445, %f1434;
|
|
max.f32 %f1454, %f1447, %f1453;
|
|
mul.f32 %f1455, %f1454, 0f43800000;
|
|
cvt.rzi.u32.f32 %r452, %f1455;
|
|
min.u32 %r453, %r452, 255;
|
|
shl.b64 %rd82, %rd23, 2;
|
|
add.s64 %rd83, %rd22, %rd82;
|
|
cvt.u16.u32 %rs47, %r453;
|
|
cvt.u16.u32 %rs48, %r451;
|
|
cvt.u16.u32 %rs49, %r449;
|
|
mov.u16 %rs50, 255;
|
|
st.global.v4.u8 [%rd83], {%rs49, %rs48, %rs47, %rs50};
|
|
|
|
$L__BB0_154:
|
|
and.b32 %r454, %r88, 4;
|
|
setp.eq.s32 %p188, %r454, 0;
|
|
ld.const.u32 %r498, [params+108];
|
|
@%p188 bra $L__BB0_158;
|
|
|
|
setp.eq.s32 %p189, %r498, 0;
|
|
ld.const.u64 %rd84, [params+224];
|
|
cvta.to.global.u64 %rd85, %rd84;
|
|
ld.const.u32 %r455, [params+216];
|
|
mad.lo.s32 %r456, %r455, %r7, %r6;
|
|
mul.wide.u32 %rd86, %r456, 8;
|
|
add.s64 %rd24, %rd85, %rd86;
|
|
@%p189 bra $L__BB0_157;
|
|
|
|
ld.global.v4.u16 {%rs58, %rs59, %rs60, %rs61}, [%rd24];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1456, %rs58;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1457, %rs59;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1458, %rs60;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1459, %f292, %f1456;
|
|
add.f32 %f1460, %f293, %f1457;
|
|
add.f32 %f1461, %f295, %f1458;
|
|
mov.f32 %f1462, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs56, %f1461;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs55, %f1460;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs54, %f1459;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs57, %f1462;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd24], {%rs54, %rs55, %rs56, %rs57};
|
|
bra.uni $L__BB0_158;
|
|
|
|
$L__BB0_157:
|
|
mov.f32 %f1466, 0f3F800000;
|
|
mov.u32 %r498, 0;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs65, %f1466;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs64, %f295;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs63, %f293;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs62, %f292;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd24], {%rs62, %rs63, %rs64, %rs65};
|
|
|
|
$L__BB0_158:
|
|
add.f32 %f1467, %f1687, %f1690;
|
|
add.f32 %f1468, %f1684, %f1467;
|
|
add.f32 %f1469, %f1688, %f1691;
|
|
add.f32 %f1470, %f1685, %f1469;
|
|
add.f32 %f1471, %f1689, %f1692;
|
|
add.f32 %f1472, %f1686, %f1471;
|
|
mul.f32 %f1473, %f1468, 0f3F13CD3A;
|
|
mul.f32 %f1474, %f1470, 0f3F13CD3A;
|
|
mul.f32 %f1475, %f1472, 0f3F13CD3A;
|
|
div.rn.f32 %f1476, %f1693, %f1473;
|
|
div.rn.f32 %f1477, %f1694, %f1474;
|
|
div.rn.f32 %f1478, %f1695, %f1475;
|
|
setp.eq.f32 %p190, %f1693, 0f00000000;
|
|
selp.f32 %f1479, 0f00000000, %f1476, %p190;
|
|
setp.eq.f32 %p191, %f1694, 0f00000000;
|
|
selp.f32 %f1480, 0f00000000, %f1477, %p191;
|
|
setp.eq.f32 %p192, %f1695, 0f00000000;
|
|
selp.f32 %f1481, 0f00000000, %f1478, %p192;
|
|
mul.f32 %f1482, %f1690, %f1479;
|
|
mul.f32 %f1483, %f1691, %f1480;
|
|
mul.f32 %f1484, %f1692, %f1481;
|
|
mul.f32 %f1485, %f1687, %f1479;
|
|
mul.f32 %f1486, %f1688, %f1480;
|
|
mul.f32 %f1487, %f1689, %f1481;
|
|
mul.f32 %f1488, %f1684, %f1479;
|
|
mul.f32 %f1489, %f1685, %f1480;
|
|
mul.f32 %f1490, %f1686, %f1481;
|
|
mul.f32 %f369, %f1482, %f926;
|
|
mul.f32 %f370, %f1483, %f927;
|
|
mul.f32 %f371, %f1484, %f294;
|
|
mul.f32 %f372, %f1485, %f926;
|
|
mul.f32 %f373, %f1486, %f927;
|
|
mul.f32 %f374, %f1487, %f294;
|
|
mul.f32 %f375, %f1488, %f926;
|
|
mul.f32 %f376, %f1489, %f927;
|
|
mul.f32 %f377, %f1490, %f294;
|
|
ld.const.u64 %rd87, [params+256];
|
|
cvta.to.global.u64 %rd88, %rd87;
|
|
ld.const.u32 %r458, [params+248];
|
|
mad.lo.s32 %r459, %r458, %r7, %r6;
|
|
mul.wide.u32 %rd89, %r459, 8;
|
|
add.s64 %rd25, %rd88, %rd89;
|
|
setp.eq.s32 %p193, %r498, 0;
|
|
@%p193 bra $L__BB0_160;
|
|
|
|
ld.global.v4.u16 {%rs73, %rs74, %rs75, %rs76}, [%rd25];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1491, %rs73;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1492, %rs74;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1493, %rs75;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1494, %f369, %f1491;
|
|
add.f32 %f1495, %f370, %f1492;
|
|
add.f32 %f1496, %f371, %f1493;
|
|
mov.f32 %f1497, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs71, %f1496;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs70, %f1495;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs69, %f1494;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs72, %f1497;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd25], {%rs69, %rs70, %rs71, %rs72};
|
|
bra.uni $L__BB0_161;
|
|
|
|
$L__BB0_160:
|
|
mov.f32 %f1501, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs80, %f1501;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs79, %f371;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs78, %f370;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs77, %f369;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd25], {%rs77, %rs78, %rs79, %rs80};
|
|
|
|
$L__BB0_161:
|
|
ld.const.u64 %rd90, [params+272];
|
|
cvta.to.global.u64 %rd91, %rd90;
|
|
ld.const.u32 %r460, [params+264];
|
|
mad.lo.s32 %r461, %r460, %r7, %r6;
|
|
mul.wide.u32 %rd92, %r461, 8;
|
|
add.s64 %rd26, %rd91, %rd92;
|
|
@%p193 bra $L__BB0_163;
|
|
|
|
ld.global.v4.u16 {%rs88, %rs89, %rs90, %rs91}, [%rd26];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1502, %rs88;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1503, %rs89;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1504, %rs90;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1505, %f372, %f1502;
|
|
add.f32 %f1506, %f373, %f1503;
|
|
add.f32 %f1507, %f374, %f1504;
|
|
mov.f32 %f1508, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs86, %f1507;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs85, %f1506;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs84, %f1505;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs87, %f1508;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd26], {%rs84, %rs85, %rs86, %rs87};
|
|
bra.uni $L__BB0_164;
|
|
|
|
$L__BB0_163:
|
|
mov.f32 %f1512, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs95, %f1512;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs94, %f374;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs93, %f373;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs92, %f372;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd26], {%rs92, %rs93, %rs94, %rs95};
|
|
|
|
$L__BB0_164:
|
|
ld.const.u64 %rd93, [params+288];
|
|
cvta.to.global.u64 %rd94, %rd93;
|
|
ld.const.u32 %r462, [params+280];
|
|
mad.lo.s32 %r463, %r462, %r7, %r6;
|
|
mul.wide.u32 %rd95, %r463, 8;
|
|
add.s64 %rd27, %rd94, %rd95;
|
|
@%p193 bra $L__BB0_166;
|
|
|
|
ld.global.v4.u16 {%rs103, %rs104, %rs105, %rs106}, [%rd27];
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1513, %rs103;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1514, %rs104;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.f32.f16 %f1515, %rs105;}
|
|
|
|
// end inline asm
|
|
add.f32 %f1516, %f375, %f1513;
|
|
add.f32 %f1517, %f376, %f1514;
|
|
add.f32 %f1518, %f377, %f1515;
|
|
mov.f32 %f1519, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs101, %f1518;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs100, %f1517;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs99, %f1516;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs102, %f1519;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd27], {%rs99, %rs100, %rs101, %rs102};
|
|
bra.uni $L__BB0_184;
|
|
|
|
$L__BB0_166:
|
|
mov.f32 %f1523, 0f3F800000;
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs110, %f1523;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs109, %f377;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs108, %f376;}
|
|
|
|
// end inline asm
|
|
// begin inline asm
|
|
{ cvt.rn.f16.f32 %rs107, %f375;}
|
|
|
|
// end inline asm
|
|
st.global.v4.u16 [%rd27], {%rs107, %rs108, %rs109, %rs110};
|
|
|
|
$L__BB0_184:
|
|
ret;
|
|
|
|
}
|
|
|